From nobody Fri Jul 24 05:21:39 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7F83241D237; Thu, 23 Jul 2026 13:43:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.153.233 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784814212; cv=none; b=F3Blr8SVQgfPrTsKg0wNNimdHhbd7FgUTnEtvHkLYsN7yG0CQB6vCz2+DJL93gz1DBOaqRkIPzjzSKPRla/pM2hA9HLp9sTwDjEdRPdniwEgUG/UrgNMXQNOwPVHd8pRLjKQbEIqOQvkPrdy37IhhqSYwl/fQp4Lz4AKQ3nIi2g= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784814212; c=relaxed/simple; bh=Mhai/yJWlg46MESWfPRp6obiFFa/8GcRXHYra2YJRv0=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=d1h8gWLeY2CuSdh9Ehj394PMmK8BXa7TdXdM5ldvUYHLKIUkO1QfwPZVtCudfV2chjBD9YYIe/0A5WZRPWPwrEv/geg6DwCLHIkUKcg6HanKjraqNQZkvkUPsnCnIB46xkkDbqqd6hB4OZrLtDRevFMEpSQY4cx8w2FTrr0lmhM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=VFv1eaFY; arc=none smtp.client-ip=68.232.153.233 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="VFv1eaFY" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1784814208; x=1816350208; h=from:date:subject:mime-version:content-transfer-encoding: message-id:references:in-reply-to:to:cc; bh=Mhai/yJWlg46MESWfPRp6obiFFa/8GcRXHYra2YJRv0=; b=VFv1eaFYkB2TcQFIXiwWMwBKAguWCYco01D+8VgOCbMYgnAD/fpGP/7u 8HBPJfw3n4x5kLd+Kt6uELaJh0SOt9VAsS7ZhFXKM491psrWnBojulkSG tbAjsCPrhvTDvSOyxX0d3Vxh5dAG1f5dc+5ZNwDV88TEqxH9fyLMpFzri jwr+zLaqGheaS5IoYgJLdzzy6IX9JMot2vRDVZfgFu8A6aQZbO2P+BoX/ hL4dDqsRwT4NxrHsly/CtWH3Hy9pp8Fl1rOaKrThqmSAO4ZBb/FDhh7EZ /WpFEWf7CW4QeYb7wCdZdejv7LmU47x0hR3MSmV+pmOvX7U2IdgKTl6K0 g==; X-CSE-ConnectionGUID: CbaVrIJ+R2mp7lU6UtioWQ== X-CSE-MsgGUID: eLejrbRnTMiAnDhN/xwoqA== X-IronPort-AV: E=Sophos;i="6.25,180,1779174000"; d="scan'208";a="292445387" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa5.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Jul 2026 06:43:21 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.87.71) by chn-vm-ex4.mchp-main.com (10.10.87.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.2.2562.43; Thu, 23 Jul 2026 06:43:19 -0700 Received: from [127.0.1.1] (10.10.85.11) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.58 via Frontend Transport; Thu, 23 Jul 2026 06:43:16 -0700 From: Ariana Lazar Date: Thu, 23 Jul 2026 16:43:10 +0300 Subject: [PATCH 1/3] iio: dac: mcp47feb02: refactor MCP47FEB02 I2C driver into two modules Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20260723-mcp47feb02_refactor-v1-1-ee59e63672bc@microchip.com> References: <20260723-mcp47feb02_refactor-v1-0-ee59e63672bc@microchip.com> In-Reply-To: <20260723-mcp47feb02_refactor-v1-0-ee59e63672bc@microchip.com> To: Jonathan Cameron , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , "Andy Shevchenko" , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley CC: , , , Ariana Lazar X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1784814192; l=34734; i=ariana.lazar@microchip.com; s=20250825; h=from:subject:message-id; bh=Mhai/yJWlg46MESWfPRp6obiFFa/8GcRXHYra2YJRv0=; b=Sb1QQc/DQn9wd6pjY+B76LeAAHW9xMWNJyvW53+JuVucnShP70/1bJvGNprfENdJcJ/15yXFB 7NgdxVy04XMBrJ0Im247dGkqr1kOGKGdZYMTLjgdx1sA7ei61k8no93 X-Developer-Key: i=ariana.lazar@microchip.com; a=ed25519; pk=jmvf1fSxcnzZmXfITM3L94IwutM+wqA1POQHiYyD6Dk= Prepare the driver for the bus-specific code refactoring into separate files. The renamed file will contain the common DAC functionality shared by the MCP47FxBy1/2/4/8 I2C and MCP48FxBy1/2/4/8 SPI drivers. The MCP47FEB02 driver was refactored into two modules: mcp47feb02-core.c and mcp47feb02-i2c.c in order to prepare the support for SPI MCP48FxBy1/2/4/8 DAC family on top of the current implementation. Signed-off-by: Ariana Lazar --- MAINTAINERS | 4 +- drivers/iio/dac/Kconfig | 10 +- drivers/iio/dac/Makefile | 3 +- .../iio/dac/{mcp47feb02.c =3D> mcp47feb02-core.c} | 414 +--------------= ------ drivers/iio/dac/mcp47feb02-i2c.c | 145 ++++++++ drivers/iio/dac/mcp47feb02.h | 153 ++++++++ 6 files changed, 325 insertions(+), 404 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index 6b4560681b51cfabf0b0e98fd89b69d8c527228b..fc87609865f26a9f484edc42058= f7df659a0fa4f 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -16118,7 +16118,9 @@ M: Ariana Lazar L: linux-iio@vger.kernel.org S: Supported F: Documentation/devicetree/bindings/iio/dac/microchip,mcp47feb02.yaml -F: drivers/iio/dac/mcp47feb02.c +F: drivers/iio/dac/mcp47feb02-core.c +F: drivers/iio/dac/mcp47feb02-i2c.c +F: drivers/iio/dac/mcp47feb02.h =20 MCP4821 DAC DRIVER M: Anshul Dalal diff --git a/drivers/iio/dac/Kconfig b/drivers/iio/dac/Kconfig index 657c68e75542e47ad5603165bcbc3660e90c6450..cc10d43ffd1e89bbf945ef89ea5= af0abe1a91084 100644 --- a/drivers/iio/dac/Kconfig +++ b/drivers/iio/dac/Kconfig @@ -550,8 +550,13 @@ config MCP4728 will be called mcp4728. =20 config MCP47FEB02 - tristate "MCP47F(E/V)B01/02/04/08/11/12/14/18/21/22/24/28 DAC driver" + tristate + +config MCP47FEB02_I2C + tristate "MCP47F(E/V)B01/02/04/08/11/12/14/18/21/22/24/28 I2C DAC driver" depends on I2C + select REGMAP_I2C + select MCP47FEB02 help Say yes here if you want to build the driver for the Microchip: - 8-bit DAC: @@ -567,7 +572,8 @@ config MCP47FEB02 (DAC) with I2C interface. =20 To compile this driver as a module, choose M here: the module - will be called mcp47feb02. + will be called mcp47feb02_i2c and you will also get + mcp47feb02_core for the core module. =20 config MCP4821 tristate "MCP4801/02/11/12/21/22 DAC driver" diff --git a/drivers/iio/dac/Makefile b/drivers/iio/dac/Makefile index 0034317984985035f7987a744899924bfd4612e3..28c8646a987cff1ac4d693fe868= 98d66c901d5bd 100644 --- a/drivers/iio/dac/Makefile +++ b/drivers/iio/dac/Makefile @@ -54,7 +54,8 @@ obj-$(CONFIG_MAX5522) +=3D max5522.o obj-$(CONFIG_MAX5821) +=3D max5821.o obj-$(CONFIG_MCP4725) +=3D mcp4725.o obj-$(CONFIG_MCP4728) +=3D mcp4728.o -obj-$(CONFIG_MCP47FEB02) +=3D mcp47feb02.o +obj-$(CONFIG_MCP47FEB02) +=3D mcp47feb02-core.o +obj-$(CONFIG_MCP47FEB02_I2C) +=3D mcp47feb02-i2c.o obj-$(CONFIG_MCP4821) +=3D mcp4821.o obj-$(CONFIG_MCP4922) +=3D mcp4922.o obj-$(CONFIG_STM32_DAC_CORE) +=3D stm32-dac-core.o diff --git a/drivers/iio/dac/mcp47feb02.c b/drivers/iio/dac/mcp47feb02-core= .c similarity index 64% rename from drivers/iio/dac/mcp47feb02.c rename to drivers/iio/dac/mcp47feb02-core.c index a823c2a673a26d70e5829cb587034da435af0451..6c86fa40e6eb2f1f602cac4c752= 65b6af7000c72 100644 --- a/drivers/iio/dac/mcp47feb02.c +++ b/drivers/iio/dac/mcp47feb02-core.c @@ -2,7 +2,7 @@ /* * IIO driver for MCP47FEB02 Multi-Channel DAC with I2C interface * - * Copyright (C) 2025 Microchip Technology Inc. and its subsidiaries + * Copyright (C) 2026 Microchip Technology Inc. and its subsidiaries * * Author: Ariana Lazar * @@ -16,7 +16,6 @@ #include #include #include -#include #include #include #include @@ -30,324 +29,14 @@ #include #include =20 -/* Register addresses must be left shifted with 3 positions in order to ap= pend command mask */ -#define MCP47FEB02_DAC0_REG_ADDR 0x00 -#define MCP47FEB02_VREF_REG_ADDR 0x40 -#define MCP47FEB02_POWER_DOWN_REG_ADDR 0x48 -#define MCP47FEB02_DAC_CTRL_MASK GENMASK(1, 0) - -#define MCP47FEB02_GAIN_CTRL_STATUS_REG_ADDR 0x50 -#define MCP47FEB02_GAIN_BIT_MASK BIT(0) -#define MCP47FEB02_GAIN_BIT_STATUS_EEWA_MASK BIT(6) -#define MCP47FEB02_GAIN_BITS_MASK GENMASK(15, 8) - -#define MCP47FEB02_WIPERLOCK_STATUS_REG_ADDR 0x58 - -#define MCP47FEB02_NV_DAC0_REG_ADDR 0x80 -#define MCP47FEB02_NV_VREF_REG_ADDR 0xC0 -#define MCP47FEB02_NV_POWER_DOWN_REG_ADDR 0xC8 -#define MCP47FEB02_NV_GAIN_CTRL_I2C_SLAVE_REG_ADDR 0xD0 -#define MCP47FEB02_NV_I2C_SLAVE_ADDR_MASK GENMASK(7, 0) - -/* Voltage reference, Power-Down control register and DAC Wiperlock status= register fields */ -#define DAC_CTRL_MASK(ch) (GENMASK(1, 0) << (2 * (ch))) -#define DAC_CTRL_VAL(ch, val) ((val) << (2 * (ch))) - -/* Gain Control and I2C Slave Address Reguster fields */ -#define DAC_GAIN_MASK(ch) (BIT(0) << (8 + (ch))) -#define DAC_GAIN_VAL(ch, val) ((val) << (8 + (ch))) - -#define REG_ADDR(reg) ((reg) << 3) -#define NV_REG_ADDR(reg) ((NV_DAC_ADDR_OFFSET + (reg)) << 3) -#define READFLAG_MASK GENMASK(2, 1) - -#define MCP47FEB02_MAX_CH 8 -#define MCP47FEB02_MAX_SCALES_CH 3 -#define MCP47FEB02_DAC_WIPER_UNLOCKED 0 -#define MCP47FEB02_NORMAL_OPERATION 0 -#define MCP47FEB02_INTERNAL_BAND_GAP_uV 2440000 -#define NV_DAC_ADDR_OFFSET 0x10 - -enum mcp47feb02_vref_mode { - MCP47FEB02_VREF_VDD =3D 0, - MCP47FEB02_INTERNAL_BAND_GAP =3D 1, - MCP47FEB02_EXTERNAL_VREF_UNBUFFERED =3D 2, - MCP47FEB02_EXTERNAL_VREF_BUFFERED =3D 3, -}; - -enum mcp47feb02_scale { - MCP47FEB02_SCALE_VDD =3D 0, - MCP47FEB02_SCALE_GAIN_X1 =3D 1, - MCP47FEB02_SCALE_GAIN_X2 =3D 2, -}; - -enum mcp47feb02_gain_bit_mode { - MCP47FEB02_GAIN_BIT_X1 =3D 0, - MCP47FEB02_GAIN_BIT_X2 =3D 1, -}; +#include "mcp47feb02.h" =20 -static const char * const mcp47feb02_powerdown_modes[] =3D { +const char * const mcp47feb02_powerdown_modes[] =3D { "1kohm_to_gnd", "100kohm_to_gnd", "open_circuit", }; =20 -/** - * struct mcp47feb02_features - chip specific data - * @name: device name - * @phys_channels: number of hardware channels - * @resolution: DAC resolution - * @have_ext_vref1: does the hardware have an the second external voltage = reference? - * @have_eeprom: does the hardware have an internal eeprom? - */ -struct mcp47feb02_features { - const char *name; - unsigned int phys_channels; - unsigned int resolution; - bool have_ext_vref1; - bool have_eeprom; -}; - -static const struct mcp47feb02_features mcp47feb01_chip_features =3D { - .name =3D "mcp47feb01", - .phys_channels =3D 1, - .resolution =3D 8, - .have_ext_vref1 =3D false, - .have_eeprom =3D true, -}; - -static const struct mcp47feb02_features mcp47feb02_chip_features =3D { - .name =3D "mcp47feb02", - .phys_channels =3D 2, - .resolution =3D 8, - .have_ext_vref1 =3D false, - .have_eeprom =3D true, -}; - -static const struct mcp47feb02_features mcp47feb04_chip_features =3D { - .name =3D "mcp47feb04", - .phys_channels =3D 4, - .resolution =3D 8, - .have_ext_vref1 =3D true, - .have_eeprom =3D true, -}; - -static const struct mcp47feb02_features mcp47feb08_chip_features =3D { - .name =3D "mcp47feb08", - .phys_channels =3D 8, - .resolution =3D 8, - .have_ext_vref1 =3D true, - .have_eeprom =3D true, -}; - -static const struct mcp47feb02_features mcp47feb11_chip_features =3D { - .name =3D "mcp47feb11", - .phys_channels =3D 1, - .resolution =3D 10, - .have_ext_vref1 =3D false, - .have_eeprom =3D true, -}; - -static const struct mcp47feb02_features mcp47feb12_chip_features =3D { - .name =3D "mcp47feb12", - .phys_channels =3D 2, - .resolution =3D 10, - .have_ext_vref1 =3D false, - .have_eeprom =3D true, -}; - -static const struct mcp47feb02_features mcp47feb14_chip_features =3D { - .name =3D "mcp47feb14", - .phys_channels =3D 4, - .resolution =3D 10, - .have_ext_vref1 =3D true, - .have_eeprom =3D true, -}; - -static const struct mcp47feb02_features mcp47feb18_chip_features =3D { - .name =3D "mcp47feb18", - .phys_channels =3D 8, - .resolution =3D 10, - .have_ext_vref1 =3D true, - .have_eeprom =3D true, -}; - -static const struct mcp47feb02_features mcp47feb21_chip_features =3D { - .name =3D "mcp47feb21", - .phys_channels =3D 1, - .resolution =3D 12, - .have_ext_vref1 =3D false, - .have_eeprom =3D true, -}; - -static const struct mcp47feb02_features mcp47feb22_chip_features =3D { - .name =3D "mcp47feb22", - .phys_channels =3D 2, - .resolution =3D 12, - .have_ext_vref1 =3D false, - .have_eeprom =3D true, -}; - -static const struct mcp47feb02_features mcp47feb24_chip_features =3D { - .name =3D "mcp47feb24", - .phys_channels =3D 4, - .resolution =3D 12, - .have_ext_vref1 =3D true, - .have_eeprom =3D true, -}; - -static const struct mcp47feb02_features mcp47feb28_chip_features =3D { - .name =3D "mcp47feb28", - .phys_channels =3D 8, - .resolution =3D 12, - .have_ext_vref1 =3D true, - .have_eeprom =3D true, -}; - -static const struct mcp47feb02_features mcp47fvb01_chip_features =3D { - .name =3D "mcp47fvb01", - .phys_channels =3D 1, - .resolution =3D 8, - .have_ext_vref1 =3D false, - .have_eeprom =3D false, -}; - -static const struct mcp47feb02_features mcp47fvb02_chip_features =3D { - .name =3D "mcp47fvb02", - .phys_channels =3D 2, - .resolution =3D 8, - .have_ext_vref1 =3D false, - .have_eeprom =3D false, -}; - -static const struct mcp47feb02_features mcp47fvb04_chip_features =3D { - .name =3D "mcp47fvb04", - .phys_channels =3D 4, - .resolution =3D 8, - .have_ext_vref1 =3D true, - .have_eeprom =3D false, -}; - -static const struct mcp47feb02_features mcp47fvb08_chip_features =3D { - .name =3D "mcp47fvb08", - .phys_channels =3D 8, - .resolution =3D 8, - .have_ext_vref1 =3D true, - .have_eeprom =3D false, -}; - -static const struct mcp47feb02_features mcp47fvb11_chip_features =3D { - .name =3D "mcp47fvb11", - .phys_channels =3D 1, - .resolution =3D 10, - .have_ext_vref1 =3D false, - .have_eeprom =3D false, -}; - -static const struct mcp47feb02_features mcp47fvb12_chip_features =3D { - .name =3D "mcp47fvb12", - .phys_channels =3D 2, - .resolution =3D 10, - .have_ext_vref1 =3D false, - .have_eeprom =3D false, -}; - -static const struct mcp47feb02_features mcp47fvb14_chip_features =3D { - .name =3D "mcp47fvb14", - .phys_channels =3D 4, - .resolution =3D 10, - .have_ext_vref1 =3D true, - .have_eeprom =3D false, -}; - -static const struct mcp47feb02_features mcp47fvb18_chip_features =3D { - .name =3D "mcp47fvb18", - .phys_channels =3D 8, - .resolution =3D 10, - .have_ext_vref1 =3D true, - .have_eeprom =3D false, -}; - -static const struct mcp47feb02_features mcp47fvb21_chip_features =3D { - .name =3D "mcp47fvb21", - .phys_channels =3D 1, - .resolution =3D 12, - .have_ext_vref1 =3D false, - .have_eeprom =3D false, -}; - -static const struct mcp47feb02_features mcp47fvb22_chip_features =3D { - .name =3D "mcp47fvb22", - .phys_channels =3D 2, - .resolution =3D 12, - .have_ext_vref1 =3D false, - .have_eeprom =3D false, -}; - -static const struct mcp47feb02_features mcp47fvb24_chip_features =3D { - .name =3D "mcp47fvb24", - .phys_channels =3D 4, - .resolution =3D 12, - .have_ext_vref1 =3D true, - .have_eeprom =3D false, -}; - -static const struct mcp47feb02_features mcp47fvb28_chip_features =3D { - .name =3D "mcp47fvb28", - .phys_channels =3D 8, - .resolution =3D 12, - .have_ext_vref1 =3D true, - .have_eeprom =3D false, -}; - -/** - * struct mcp47feb02_channel_data - channel configuration - * @ref_mode: chosen voltage for reference - * @use_2x_gain: output driver gain control - * @powerdown: is false if the channel is in normal operation mode - * @powerdown_mode: selected power-down mode - * @dac_data: dac value - */ -struct mcp47feb02_channel_data { - u8 ref_mode; - bool use_2x_gain; - bool powerdown; - u8 powerdown_mode; - u16 dac_data; -}; - -/** - * struct mcp47feb02_data - chip configuration - * @chdata: options configured for each channel on the device - * @lock: prevents concurrent reads/writes to driver's state members - * @chip_features: pointer to features struct - * @scale_1: scales set on channels that are based on Vref1 - * @scale: scales set on channels that are based on Vref/Vref0 - * @active_channels_mask: enabled channels - * @regmap: regmap for directly accessing device register - * @labels: table with channels labels - * @phys_channels: physical channels on the device - * @vref1_buffered: Vref1 buffer is enabled - * @vref_buffered: Vref/Vref0 buffer is enabled - * @use_vref1: vref1-supply is defined - * @use_vref: vref-supply is defined - */ -struct mcp47feb02_data { - struct mcp47feb02_channel_data chdata[MCP47FEB02_MAX_CH]; - struct mutex lock; /* prevents concurrent reads/writes to driver's state = members */ - const struct mcp47feb02_features *chip_features; - int scale_1[2 * MCP47FEB02_MAX_SCALES_CH]; - int scale[2 * MCP47FEB02_MAX_SCALES_CH]; - unsigned long active_channels_mask; - struct regmap *regmap; - const char *labels[MCP47FEB02_MAX_CH]; - u16 phys_channels; - bool vref1_buffered; - bool vref_buffered; - bool use_vref1; - bool use_vref; -}; - static const struct regmap_range mcp47feb02_readable_ranges[] =3D { regmap_reg_range(MCP47FEB02_DAC0_REG_ADDR, MCP47FEB02_WIPERLOCK_STATUS_RE= G_ADDR), regmap_reg_range(MCP47FEB02_NV_DAC0_REG_ADDR, MCP47FEB02_NV_GAIN_CTRL_I2C= _SLAVE_REG_ADDR), @@ -380,7 +69,7 @@ static const struct regmap_access_table mcp47feb02_volat= ile_table =3D { .n_yes_ranges =3D ARRAY_SIZE(mcp47feb02_volatile_ranges), }; =20 -static const struct regmap_config mcp47feb02_regmap_config =3D { +const struct regmap_config mcp47feb02_regmap_config =3D { .name =3D "mcp47feb02_regmap", .reg_bits =3D 8, .val_bits =3D 16, @@ -392,6 +81,7 @@ static const struct regmap_config mcp47feb02_regmap_conf= ig =3D { .cache_type =3D REGCACHE_MAPLE, .val_format_endian =3D REGMAP_ENDIAN_BIG, }; +EXPORT_SYMBOL_NS_GPL(mcp47feb02_regmap_config, "IIO_MCP47FEB02"); =20 /* For devices that doesn't have nonvolatile memory */ static const struct regmap_range mcp47fvb02_readable_ranges[] =3D { @@ -422,7 +112,7 @@ static const struct regmap_access_table mcp47fvb02_vola= tile_table =3D { .n_yes_ranges =3D ARRAY_SIZE(mcp47fvb02_volatile_ranges), }; =20 -static const struct regmap_config mcp47fvb02_regmap_config =3D { +const struct regmap_config mcp47fvb02_regmap_config =3D { .name =3D "mcp47fvb02_regmap", .reg_bits =3D 8, .val_bits =3D 16, @@ -434,6 +124,7 @@ static const struct regmap_config mcp47fvb02_regmap_con= fig =3D { .cache_type =3D REGCACHE_MAPLE, .val_format_endian =3D REGMAP_ENDIAN_BIG, }; +EXPORT_SYMBOL_NS_GPL(mcp47fvb02_regmap_config, "IIO_MCP47FEB02"); =20 static int mcp47feb02_write_to_eeprom(struct mcp47feb02_data *data, unsign= ed int reg, unsigned int val) @@ -666,7 +357,7 @@ static ssize_t mcp47feb02_write_powerdown(struct iio_de= v *indio_dev, uintptr_t p return len; } =20 -static DEFINE_SIMPLE_DEV_PM_OPS(mcp47feb02_pm_ops, mcp47feb02_suspend, mcp= 47feb02_resume); +EXPORT_SIMPLE_DEV_PM_OPS(mcp47feb02_pm_ops, mcp47feb02_suspend, mcp47feb02= _resume); =20 static const struct iio_enum mcp47febxx_powerdown_mode_enum =3D { .items =3D mcp47feb02_powerdown_modes, @@ -1091,10 +782,9 @@ static int mcp47feb02_init_ch_scales(struct mcp47feb0= 2_data *data, int vdd_uV, return 0; } =20 -static int mcp47feb02_probe(struct i2c_client *client) +int mcp47feb02_common_probe(const struct mcp47feb02_features *chip_feature= s, struct regmap *regmap) { - const struct mcp47feb02_features *chip_features; - struct device *dev =3D &client->dev; + struct device *dev =3D regmap_get_device(regmap); struct mcp47feb02_data *data; struct iio_dev *indio_dev; int vref1_uV, vref_uV, vdd_uV, ret; @@ -1104,21 +794,13 @@ static int mcp47feb02_probe(struct i2c_client *clien= t) return -ENOMEM; =20 data =3D iio_priv(indio_dev); - chip_features =3D i2c_get_match_data(client); - if (!chip_features) - return -EINVAL; - data->chip_features =3D chip_features; + data->regmap =3D regmap; =20 - if (chip_features->have_eeprom) { - data->regmap =3D devm_regmap_init_i2c(client, &mcp47feb02_regmap_config); + if (chip_features->have_eeprom) indio_dev->info =3D &mcp47feb02_info; - } else { - data->regmap =3D devm_regmap_init_i2c(client, &mcp47fvb02_regmap_config); + else indio_dev->info =3D &mcp47fvb02_info; - } - if (IS_ERR(data->regmap)) - return dev_err_probe(dev, PTR_ERR(data->regmap), "Error initializing i2c= regmap\n"); =20 indio_dev->name =3D chip_features->name; =20 @@ -1175,75 +857,7 @@ static int mcp47feb02_probe(struct i2c_client *client) =20 return devm_iio_device_register(dev, indio_dev); } - -static const struct i2c_device_id mcp47feb02_id[] =3D { - { .name =3D "mcp47feb01", .driver_data =3D (kernel_ulong_t)&mcp47feb01_ch= ip_features }, - { .name =3D "mcp47feb02", .driver_data =3D (kernel_ulong_t)&mcp47feb02_ch= ip_features }, - { .name =3D "mcp47feb04", .driver_data =3D (kernel_ulong_t)&mcp47feb04_ch= ip_features }, - { .name =3D "mcp47feb08", .driver_data =3D (kernel_ulong_t)&mcp47feb08_ch= ip_features }, - { .name =3D "mcp47feb11", .driver_data =3D (kernel_ulong_t)&mcp47feb11_ch= ip_features }, - { .name =3D "mcp47feb12", .driver_data =3D (kernel_ulong_t)&mcp47feb12_ch= ip_features }, - { .name =3D "mcp47feb14", .driver_data =3D (kernel_ulong_t)&mcp47feb14_ch= ip_features }, - { .name =3D "mcp47feb18", .driver_data =3D (kernel_ulong_t)&mcp47feb18_ch= ip_features }, - { .name =3D "mcp47feb21", .driver_data =3D (kernel_ulong_t)&mcp47feb21_ch= ip_features }, - { .name =3D "mcp47feb22", .driver_data =3D (kernel_ulong_t)&mcp47feb22_ch= ip_features }, - { .name =3D "mcp47feb24", .driver_data =3D (kernel_ulong_t)&mcp47feb24_ch= ip_features }, - { .name =3D "mcp47feb28", .driver_data =3D (kernel_ulong_t)&mcp47feb28_ch= ip_features }, - { .name =3D "mcp47fvb01", .driver_data =3D (kernel_ulong_t)&mcp47fvb01_ch= ip_features }, - { .name =3D "mcp47fvb02", .driver_data =3D (kernel_ulong_t)&mcp47fvb02_ch= ip_features }, - { .name =3D "mcp47fvb04", .driver_data =3D (kernel_ulong_t)&mcp47fvb04_ch= ip_features }, - { .name =3D "mcp47fvb08", .driver_data =3D (kernel_ulong_t)&mcp47fvb08_ch= ip_features }, - { .name =3D "mcp47fvb11", .driver_data =3D (kernel_ulong_t)&mcp47fvb11_ch= ip_features }, - { .name =3D "mcp47fvb12", .driver_data =3D (kernel_ulong_t)&mcp47fvb12_ch= ip_features }, - { .name =3D "mcp47fvb14", .driver_data =3D (kernel_ulong_t)&mcp47fvb14_ch= ip_features }, - { .name =3D "mcp47fvb18", .driver_data =3D (kernel_ulong_t)&mcp47fvb18_ch= ip_features }, - { .name =3D "mcp47fvb21", .driver_data =3D (kernel_ulong_t)&mcp47fvb21_ch= ip_features }, - { .name =3D "mcp47fvb22", .driver_data =3D (kernel_ulong_t)&mcp47fvb22_ch= ip_features }, - { .name =3D "mcp47fvb24", .driver_data =3D (kernel_ulong_t)&mcp47fvb24_ch= ip_features }, - { .name =3D "mcp47fvb28", .driver_data =3D (kernel_ulong_t)&mcp47fvb28_ch= ip_features }, - { } -}; -MODULE_DEVICE_TABLE(i2c, mcp47feb02_id); - -static const struct of_device_id mcp47feb02_of_match[] =3D { - { .compatible =3D "microchip,mcp47feb01", .data =3D &mcp47feb01_chip_feat= ures }, - { .compatible =3D "microchip,mcp47feb02", .data =3D &mcp47feb02_chip_feat= ures }, - { .compatible =3D "microchip,mcp47feb04", .data =3D &mcp47feb04_chip_feat= ures }, - { .compatible =3D "microchip,mcp47feb08", .data =3D &mcp47feb08_chip_feat= ures }, - { .compatible =3D "microchip,mcp47feb11", .data =3D &mcp47feb11_chip_feat= ures }, - { .compatible =3D "microchip,mcp47feb12", .data =3D &mcp47feb12_chip_feat= ures }, - { .compatible =3D "microchip,mcp47feb14", .data =3D &mcp47feb14_chip_feat= ures }, - { .compatible =3D "microchip,mcp47feb18", .data =3D &mcp47feb18_chip_feat= ures }, - { .compatible =3D "microchip,mcp47feb21", .data =3D &mcp47feb21_chip_feat= ures }, - { .compatible =3D "microchip,mcp47feb22", .data =3D &mcp47feb22_chip_feat= ures }, - { .compatible =3D "microchip,mcp47feb24", .data =3D &mcp47feb24_chip_feat= ures }, - { .compatible =3D "microchip,mcp47feb28", .data =3D &mcp47feb28_chip_feat= ures }, - { .compatible =3D "microchip,mcp47fvb01", .data =3D &mcp47fvb01_chip_feat= ures }, - { .compatible =3D "microchip,mcp47fvb02", .data =3D &mcp47fvb02_chip_feat= ures }, - { .compatible =3D "microchip,mcp47fvb04", .data =3D &mcp47fvb04_chip_feat= ures }, - { .compatible =3D "microchip,mcp47fvb08", .data =3D &mcp47fvb08_chip_feat= ures }, - { .compatible =3D "microchip,mcp47fvb11", .data =3D &mcp47fvb11_chip_feat= ures }, - { .compatible =3D "microchip,mcp47fvb12", .data =3D &mcp47fvb12_chip_feat= ures }, - { .compatible =3D "microchip,mcp47fvb14", .data =3D &mcp47fvb14_chip_feat= ures }, - { .compatible =3D "microchip,mcp47fvb18", .data =3D &mcp47fvb18_chip_feat= ures }, - { .compatible =3D "microchip,mcp47fvb21", .data =3D &mcp47fvb21_chip_feat= ures }, - { .compatible =3D "microchip,mcp47fvb22", .data =3D &mcp47fvb22_chip_feat= ures }, - { .compatible =3D "microchip,mcp47fvb24", .data =3D &mcp47fvb24_chip_feat= ures }, - { .compatible =3D "microchip,mcp47fvb28", .data =3D &mcp47fvb28_chip_feat= ures }, - { } -}; -MODULE_DEVICE_TABLE(of, mcp47feb02_of_match); - -static struct i2c_driver mcp47feb02_driver =3D { - .driver =3D { - .name =3D "mcp47feb02", - .of_match_table =3D mcp47feb02_of_match, - .pm =3D pm_sleep_ptr(&mcp47feb02_pm_ops), - }, - .probe =3D mcp47feb02_probe, - .id_table =3D mcp47feb02_id, -}; -module_i2c_driver(mcp47feb02_driver); +EXPORT_SYMBOL_NS(mcp47feb02_common_probe, "IIO_MCP47FEB02"); =20 MODULE_AUTHOR("Ariana Lazar "); MODULE_DESCRIPTION("IIO driver for MCP47FEB02 Multi-Channel DAC with I2C i= nterface"); diff --git a/drivers/iio/dac/mcp47feb02-i2c.c b/drivers/iio/dac/mcp47feb02-= i2c.c new file mode 100644 index 0000000000000000000000000000000000000000..808c51d0afdf564321abcd46a5a= 7d9595c5472da --- /dev/null +++ b/drivers/iio/dac/mcp47feb02-i2c.c @@ -0,0 +1,145 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * IIO driver for MCP47FEB02 Multi-Channel DAC with I2C interface + * + * Copyright (C) 2026 Microchip Technology Inc. and its subsidiaries + * + * Author: Ariana Lazar + * + * Datasheet links for devices with I2C interface: + * [MCP47FEBxx] https://ww1.microchip.com/downloads/aemDocuments/documents= /OTH/ProductDocuments/DataSheets/20005375A.pdf + * [MCP47FVBxx] https://ww1.microchip.com/downloads/aemDocuments/documents= /OTH/ProductDocuments/DataSheets/20005405A.pdf + * [MCP47FxBx4/8] https://ww1.microchip.com/downloads/aemDocuments/documen= ts/MSLD/ProductDocuments/DataSheets/MCP47FXBX48-Data-Sheet-DS200006368A.pdf + */ +#include +#include +#include +#include +#include +#include +#include + +#include "mcp47feb02.h" + +/* Parts with EEPROM memory */ +MCP47FEB02_CHIP_INFO(mcp47feb01, 1, 8, false, true); +MCP47FEB02_CHIP_INFO(mcp47feb02, 2, 8, false, true); +MCP47FEB02_CHIP_INFO(mcp47feb04, 4, 8, true, true); +MCP47FEB02_CHIP_INFO(mcp47feb08, 8, 8, true, true); +MCP47FEB02_CHIP_INFO(mcp47feb11, 1, 10, false, true); +MCP47FEB02_CHIP_INFO(mcp47feb12, 2, 10, false, true); +MCP47FEB02_CHIP_INFO(mcp47feb14, 4, 10, true, true); +MCP47FEB02_CHIP_INFO(mcp47feb18, 8, 10, true, true); +MCP47FEB02_CHIP_INFO(mcp47feb21, 1, 12, false, true); +MCP47FEB02_CHIP_INFO(mcp47feb22, 2, 12, false, true); +MCP47FEB02_CHIP_INFO(mcp47feb24, 4, 12, true, true); +MCP47FEB02_CHIP_INFO(mcp47feb28, 8, 12, true, true); + +/* Parts without EEPROM memory */ +MCP47FEB02_CHIP_INFO(mcp47fvb01, 1, 8, false, false); +MCP47FEB02_CHIP_INFO(mcp47fvb02, 2, 8, false, false); +MCP47FEB02_CHIP_INFO(mcp47fvb04, 4, 8, true, false); +MCP47FEB02_CHIP_INFO(mcp47fvb08, 8, 8, true, false); +MCP47FEB02_CHIP_INFO(mcp47fvb11, 1, 10, false, false); +MCP47FEB02_CHIP_INFO(mcp47fvb12, 2, 10, false, false); +MCP47FEB02_CHIP_INFO(mcp47fvb14, 4, 10, true, false); +MCP47FEB02_CHIP_INFO(mcp47fvb18, 8, 10, true, false); +MCP47FEB02_CHIP_INFO(mcp47fvb21, 1, 12, false, false); +MCP47FEB02_CHIP_INFO(mcp47fvb22, 2, 12, false, false); +MCP47FEB02_CHIP_INFO(mcp47fvb24, 4, 12, true, false); +MCP47FEB02_CHIP_INFO(mcp47fvb28, 8, 12, true, false); + +static int mcp47feb02_i2c_probe(struct i2c_client *client) +{ + const struct mcp47feb02_features *chip_features; + struct device *dev =3D &client->dev; + struct regmap *regmap; + + chip_features =3D i2c_get_match_data(client); + if (!chip_features) + return -EINVAL; + + if (chip_features->have_eeprom) + regmap =3D devm_regmap_init_i2c(client, &mcp47feb02_regmap_config); + else + regmap =3D devm_regmap_init_i2c(client, &mcp47fvb02_regmap_config); + + if (IS_ERR(regmap)) + return dev_err_probe(dev, PTR_ERR(regmap), "Error initializing I2C regma= p\n"); + + return mcp47feb02_common_probe(chip_features, regmap); +} + +static const struct i2c_device_id mcp47feb02_i2c_id[] =3D { + { "mcp47feb01", (kernel_ulong_t)&mcp47feb01_chip_features }, + { "mcp47feb02", (kernel_ulong_t)&mcp47feb02_chip_features }, + { "mcp47feb04", (kernel_ulong_t)&mcp47feb04_chip_features }, + { "mcp47feb08", (kernel_ulong_t)&mcp47feb08_chip_features }, + { "mcp47feb11", (kernel_ulong_t)&mcp47feb11_chip_features }, + { "mcp47feb12", (kernel_ulong_t)&mcp47feb12_chip_features }, + { "mcp47feb14", (kernel_ulong_t)&mcp47feb14_chip_features }, + { "mcp47feb18", (kernel_ulong_t)&mcp47feb18_chip_features }, + { "mcp47feb21", (kernel_ulong_t)&mcp47feb21_chip_features }, + { "mcp47feb22", (kernel_ulong_t)&mcp47feb22_chip_features }, + { "mcp47feb24", (kernel_ulong_t)&mcp47feb24_chip_features }, + { "mcp47feb28", (kernel_ulong_t)&mcp47feb28_chip_features }, + { "mcp47fvb01", (kernel_ulong_t)&mcp47fvb01_chip_features }, + { "mcp47fvb02", (kernel_ulong_t)&mcp47fvb02_chip_features }, + { "mcp47fvb04", (kernel_ulong_t)&mcp47fvb04_chip_features }, + { "mcp47fvb08", (kernel_ulong_t)&mcp47fvb08_chip_features }, + { "mcp47fvb11", (kernel_ulong_t)&mcp47fvb11_chip_features }, + { "mcp47fvb12", (kernel_ulong_t)&mcp47fvb12_chip_features }, + { "mcp47fvb14", (kernel_ulong_t)&mcp47fvb14_chip_features }, + { "mcp47fvb18", (kernel_ulong_t)&mcp47fvb18_chip_features }, + { "mcp47fvb21", (kernel_ulong_t)&mcp47fvb21_chip_features }, + { "mcp47fvb22", (kernel_ulong_t)&mcp47fvb22_chip_features }, + { "mcp47fvb24", (kernel_ulong_t)&mcp47fvb24_chip_features }, + { "mcp47fvb28", (kernel_ulong_t)&mcp47fvb28_chip_features }, + { } +}; +MODULE_DEVICE_TABLE(i2c, mcp47feb02_i2c_id); + +static const struct of_device_id mcp47feb02_of_i2c_match[] =3D { + { .compatible =3D "microchip,mcp47feb01", .data =3D &mcp47feb01_chip_feat= ures }, + { .compatible =3D "microchip,mcp47feb02", .data =3D &mcp47feb02_chip_feat= ures }, + { .compatible =3D "microchip,mcp47feb04", .data =3D &mcp47feb04_chip_feat= ures }, + { .compatible =3D "microchip,mcp47feb08", .data =3D &mcp47feb08_chip_feat= ures }, + { .compatible =3D "microchip,mcp47feb11", .data =3D &mcp47feb11_chip_feat= ures }, + { .compatible =3D "microchip,mcp47feb12", .data =3D &mcp47feb12_chip_feat= ures }, + { .compatible =3D "microchip,mcp47feb14", .data =3D &mcp47feb14_chip_feat= ures }, + { .compatible =3D "microchip,mcp47feb18", .data =3D &mcp47feb18_chip_feat= ures }, + { .compatible =3D "microchip,mcp47feb21", .data =3D &mcp47feb21_chip_feat= ures }, + { .compatible =3D "microchip,mcp47feb22", .data =3D &mcp47feb22_chip_feat= ures }, + { .compatible =3D "microchip,mcp47feb24", .data =3D &mcp47feb24_chip_feat= ures }, + { .compatible =3D "microchip,mcp47feb28", .data =3D &mcp47feb28_chip_feat= ures }, + { .compatible =3D "microchip,mcp47fvb01", .data =3D &mcp47fvb01_chip_feat= ures }, + { .compatible =3D "microchip,mcp47fvb02", .data =3D &mcp47fvb02_chip_feat= ures }, + { .compatible =3D "microchip,mcp47fvb04", .data =3D &mcp47fvb04_chip_feat= ures }, + { .compatible =3D "microchip,mcp47fvb08", .data =3D &mcp47fvb08_chip_feat= ures }, + { .compatible =3D "microchip,mcp47fvb11", .data =3D &mcp47fvb11_chip_feat= ures }, + { .compatible =3D "microchip,mcp47fvb12", .data =3D &mcp47fvb12_chip_feat= ures }, + { .compatible =3D "microchip,mcp47fvb14", .data =3D &mcp47fvb14_chip_feat= ures }, + { .compatible =3D "microchip,mcp47fvb18", .data =3D &mcp47fvb18_chip_feat= ures }, + { .compatible =3D "microchip,mcp47fvb21", .data =3D &mcp47fvb21_chip_feat= ures }, + { .compatible =3D "microchip,mcp47fvb22", .data =3D &mcp47fvb22_chip_feat= ures }, + { .compatible =3D "microchip,mcp47fvb24", .data =3D &mcp47fvb24_chip_feat= ures }, + { .compatible =3D "microchip,mcp47fvb28", .data =3D &mcp47fvb28_chip_feat= ures }, + { } +}; +MODULE_DEVICE_TABLE(of, mcp47feb02_of_i2c_match); + +static struct i2c_driver mcp47feb02_i2c_driver =3D { + .driver =3D { + .name =3D "mcp47feb02", + .of_match_table =3D mcp47feb02_of_i2c_match, + .pm =3D pm_sleep_ptr(&mcp47feb02_pm_ops), + }, + .probe =3D mcp47feb02_i2c_probe, + .id_table =3D mcp47feb02_i2c_id, +}; +module_i2c_driver(mcp47feb02_i2c_driver); + +MODULE_AUTHOR("Ariana Lazar "); +MODULE_DESCRIPTION("IIO driver for MCP47FEB02 Multi-Channel DAC with I2C i= nterface"); +MODULE_LICENSE("GPL"); +MODULE_IMPORT_NS("IIO_MCP47FEB02"); diff --git a/drivers/iio/dac/mcp47feb02.h b/drivers/iio/dac/mcp47feb02.h new file mode 100644 index 0000000000000000000000000000000000000000..7dbf157d7d6dcfeda7e47141ad4= 47dfa0a79fd51 --- /dev/null +++ b/drivers/iio/dac/mcp47feb02.h @@ -0,0 +1,153 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +#ifndef __DRIVERS_IIO_DAC_MCP47FEB02_H__ +#define __DRIVERS_IIO_DAC_MCP47FEB02_H__ + +#include +#include +#include +#include + +#include + +/* Register addresses must be left shifted with 3 positions in order to ap= pend command mask */ +#define MCP47FEB02_DAC0_REG_ADDR 0x00 +#define MCP47FEB02_VREF_REG_ADDR 0x40 +#define MCP47FEB02_POWER_DOWN_REG_ADDR 0x48 +#define MCP47FEB02_DAC_CTRL_MASK GENMASK(1, 0) + +#define MCP47FEB02_GAIN_CTRL_STATUS_REG_ADDR 0x50 +#define MCP47FEB02_GAIN_BIT_MASK BIT(0) +#define MCP47FEB02_GAIN_BIT_STATUS_EEWA_MASK BIT(6) +#define MCP47FEB02_GAIN_BITS_MASK GENMASK(15, 8) + +#define MCP47FEB02_WIPERLOCK_STATUS_REG_ADDR 0x58 + +#define MCP47FEB02_NV_DAC0_REG_ADDR 0x80 +#define MCP47FEB02_NV_VREF_REG_ADDR 0xC0 +#define MCP47FEB02_NV_POWER_DOWN_REG_ADDR 0xC8 +#define MCP47FEB02_NV_GAIN_CTRL_I2C_SLAVE_REG_ADDR 0xD0 +#define MCP47FEB02_NV_I2C_SLAVE_ADDR_MASK GENMASK(7, 0) + +/* Voltage reference, Power-Down control register and DAC Wiperlock status= register fields */ +#define DAC_CTRL_MASK(ch) (GENMASK(1, 0) << (2 * (ch))) +#define DAC_CTRL_VAL(ch, val) ((val) << (2 * (ch))) + +/* Gain Control and I2C Slave Address Reguster fields */ +#define DAC_GAIN_MASK(ch) (BIT(0) << (8 + (ch))) +#define DAC_GAIN_VAL(ch, val) ((val) << (8 + (ch))) + +#define REG_ADDR(reg) ((reg) << 3) +#define NV_REG_ADDR(reg) ((NV_DAC_ADDR_OFFSET + (reg)) << 3) +#define READFLAG_MASK GENMASK(2, 1) + +#define MCP47FEB02_MAX_CH 8 +#define MCP47FEB02_MAX_SCALES_CH 3 +#define MCP47FEB02_DAC_WIPER_UNLOCKED 0 +#define MCP47FEB02_NORMAL_OPERATION 0 +#define MCP47FEB02_INTERNAL_BAND_GAP_uV 2440000 +#define NV_DAC_ADDR_OFFSET 0x10 + +/* Macro used for generating chip features structures */ +#define MCP47FEB02_CHIP_INFO(_name, _channels, _res, _vref1, _eeprom) \ +static const struct mcp47feb02_features _name##_chip_features =3D { \ + .name =3D #_name, \ + .phys_channels =3D _channels, \ + .resolution =3D _res, \ + .have_ext_vref1 =3D _vref1, \ + .have_eeprom =3D _eeprom, \ +} + +enum mcp47feb02_vref_mode { + MCP47FEB02_VREF_VDD =3D 0, + MCP47FEB02_INTERNAL_BAND_GAP =3D 1, + MCP47FEB02_EXTERNAL_VREF_UNBUFFERED =3D 2, + MCP47FEB02_EXTERNAL_VREF_BUFFERED =3D 3, +}; + +enum mcp47feb02_scale { + MCP47FEB02_SCALE_VDD =3D 0, + MCP47FEB02_SCALE_GAIN_X1 =3D 1, + MCP47FEB02_SCALE_GAIN_X2 =3D 2, +}; + +enum mcp47feb02_gain_bit_mode { + MCP47FEB02_GAIN_BIT_X1 =3D 0, + MCP47FEB02_GAIN_BIT_X2 =3D 1, +}; + +extern const char * const mcp47feb02_powerdown_modes[]; + +/** + * struct mcp47feb02_features - chip specific data + * @name: device name + * @phys_channels: number of hardware channels + * @resolution: DAC resolution + * @have_ext_vref1: does the hardware have an the second external voltage = reference? + * @have_eeprom: does the hardware have an internal eeprom? + */ +struct mcp47feb02_features { + const char *name; + unsigned int phys_channels; + unsigned int resolution; + bool have_ext_vref1; + bool have_eeprom; +}; + +/** + * struct mcp47feb02_channel_data - channel configuration + * @ref_mode: chosen voltage for reference + * @use_2x_gain: output driver gain control + * @powerdown: is false if the channel is in normal operation mode + * @powerdown_mode: selected power-down mode + * @dac_data: dac value + */ +struct mcp47feb02_channel_data { + u8 ref_mode; + bool use_2x_gain; + bool powerdown; + u8 powerdown_mode; + u16 dac_data; +}; + +/** + * struct mcp47feb02_data - chip configuration + * @chdata: options configured for each channel on the device + * @lock: prevents concurrent reads/writes to driver's state members + * @chip_features: pointer to features struct + * @scale_1: scales set on channels that are based on Vref1 + * @scale: scales set on channels that are based on Vref/Vref0 + * @active_channels_mask: enabled channels + * @regmap: regmap for directly accessing device register + * @labels: table with channels labels + * @phys_channels: physical channels on the device + * @vref1_buffered: Vref1 buffer is enabled + * @vref_buffered: Vref/Vref0 buffer is enabled + * @use_vref1: vref1-supply is defined + * @use_vref: vref-supply is defined + */ +struct mcp47feb02_data { + struct mcp47feb02_channel_data chdata[MCP47FEB02_MAX_CH]; + struct mutex lock; /* prevents concurrent reads/writes to driver's state = members */ + const struct mcp47feb02_features *chip_features; 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d="scan'208";a="228212210" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Jul 2026 06:43:26 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.87.71) by chn-vm-ex1.mchp-main.com (10.10.87.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.2.2562.43; Thu, 23 Jul 2026 06:43:22 -0700 Received: from [127.0.1.1] (10.10.85.11) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.58 via Frontend Transport; Thu, 23 Jul 2026 06:43:19 -0700 From: Ariana Lazar Date: Thu, 23 Jul 2026 16:43:11 +0300 Subject: [PATCH 2/3] dt-bindings: iio: dac: add support for MCP48FEB02 SPI Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20260723-mcp47feb02_refactor-v1-2-ee59e63672bc@microchip.com> References: <20260723-mcp47feb02_refactor-v1-0-ee59e63672bc@microchip.com> In-Reply-To: <20260723-mcp47feb02_refactor-v1-0-ee59e63672bc@microchip.com> To: Jonathan Cameron , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , "Andy Shevchenko" , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley CC: , , , Ariana Lazar X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1784814192; l=16363; i=ariana.lazar@microchip.com; s=20250825; h=from:subject:message-id; bh=2eCL6Ve56cznAUIZu21dq4yIYihvpuGC3XwDoU2PTtM=; b=z/2Bsx7YD2oTgMV8CvkhQJ+ObdCGCNnnG4epKv8MrixywHhoqA9ujMKP8TRM7buFo2DSDT+mB 3eqeAWdMofZBkowc3PlFnFKVClHIqufGf3Chwm8JDrCj/r1cNfPNMVL X-Developer-Key: i=ariana.lazar@microchip.com; a=ed25519; pk=jmvf1fSxcnzZmXfITM3L94IwutM+wqA1POQHiYyD6Dk= Add the SPI MCP48FxBy1/2/4/8 part numbers, the spi-max-frequency property and a devicetree example for SPI usage to the existing binding. Signed-off-by: Ariana Lazar --- .../bindings/iio/dac/microchip,mcp47feb02.yaml | 244 +++++++++++++++++= ---- 1 file changed, 197 insertions(+), 47 deletions(-) diff --git a/Documentation/devicetree/bindings/iio/dac/microchip,mcp47feb02= .yaml b/Documentation/devicetree/bindings/iio/dac/microchip,mcp47feb02.yaml index d131f136bd15161666932261bcacd6d124b23ede..d25c763241a4f4b147e690213a2= 6efa06282c7c0 100644 --- a/Documentation/devicetree/bindings/iio/dac/microchip,mcp47feb02.yaml +++ b/Documentation/devicetree/bindings/iio/dac/microchip,mcp47feb02.yaml @@ -4,58 +4,92 @@ $id: http://devicetree.org/schemas/iio/dac/microchip,mcp47feb02.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# =20 -title: Microchip MCP47F(E/V)B(0/1/2)(1/2/4/8) DAC with I2C Interface Famil= ies +title: Microchip MCP4(7/8)F(E/V)B(0/1/2)(1/2/4/8) DAC with I2C/SPI Interfa= ce Families =20 maintainers: - Ariana Lazar =20 description: | - Datasheet for MCP47FEB01, MCP47FEB11, MCP47FEB21, MCP47FEB02, MCP47FEB12, - MCP47FEB22 can be found here: - https://ww1.microchip.com/downloads/aemDocuments/documents/OTH/Product= Documents/DataSheets/20005375A.pdf - Datasheet for MCP47FVB01, MCP47FVB11, MCP47FVB21, MCP47FVB02, MCP47FVB12, - MCP47FVB22 can be found here: - https://ww1.microchip.com/downloads/aemDocuments/documents/OTH/Product= Documents/DataSheets/20005405A.pdf - Datasheet for MCP47FEB04, MCP47FEB14, MCP47FEB24, MCP47FEB08, MCP47FEB18, - MCP47FEB28, MCP47FVB04, MCP47FVB14, MCP47FVB24, MCP47FVB08, MCP47FVB18, - MCP47FVB28 can be found here: - https://ww1.microchip.com/downloads/aemDocuments/documents/MSLD/Produc= tDocuments/DataSheets/MCP47FXBX48-Data-Sheet-DS200006368A.pdf - - +------------+--------------+-------------+-------------+------------+ - | Device | Resolution | Channels | Vref number | Memory | - |------------|--------------|-------------|-------------|------------| - | MCP47FEB01 | 8-bit | 1 | 1 | EEPROM | - | MCP47FEB11 | 10-bit | 1 | 1 | EEPROM | - | MCP47FEB21 | 12-bit | 1 | 1 | EEPROM | - |------------|--------------|-------------|-------------|------------| - | MCP47FEB02 | 8-bit | 2 | 1 | EEPROM | - | MCP47FEB12 | 10-bit | 2 | 1 | EEPROM | - | MCP47FEB22 | 12-bit | 2 | 1 | EEPROM | - |------------|--------------|-------------|-------------|------------| - | MCP47FVB01 | 8-bit | 1 | 1 | RAM | - | MCP47FVB11 | 10-bit | 1 | 1 | RAM | - | MCP47FVB21 | 12-bit | 1 | 1 | RAM | - |------------|--------------|-------------|-------------|------------| - | MCP47FVB02 | 8-bit | 2 | 1 | RAM | - | MCP47FVB12 | 10-bit | 2 | 1 | RAM | - | MCP47FVB22 | 12-bit | 2 | 1 | RAM | - |------------|--------------|-------------|-------------|------------| - | MCP47FVB04 | 8-bit | 4 | 2 | RAM | - | MCP47FVB14 | 10-bit | 4 | 2 | RAM | - | MCP47FVB24 | 12-bit | 4 | 2 | RAM | - |------------|--------------|-------------|-------------|------------| - | MCP47FVB08 | 8-bit | 8 | 2 | RAM | - | MCP47FVB18 | 10-bit | 8 | 2 | RAM | - | MCP47FVB28 | 12-bit | 8 | 2 | RAM | - |------------|--------------|-------------|-------------|------------| - | MCP47FEB04 | 8-bit | 4 | 2 | EEPROM | - | MCP47FEB14 | 10-bit | 4 | 2 | EEPROM | - | MCP47FEB24 | 12-bit | 4 | 2 | EEPROM | - |------------|--------------|-------------|-------------|------------| - | MCP47FEB08 | 8-bit | 8 | 2 | EEPROM | - | MCP47FEB18 | 10-bit | 8 | 2 | EEPROM | - | MCP47FEB28 | 12-bit | 8 | 2 | EEPROM | - +------------+--------------+-------------+-------------+------------+ + Datasheets for MCP47F(E/V)B(0/1/2)(1/2/4/8) DAC with I2C Interface Famil= ies: + Datasheet for MCP47FEB01, MCP47FEB11, MCP47FEB21, MCP47FEB02, MCP47FEB1= 2, + MCP47FEB22 can be found here: + https://ww1.microchip.com/downloads/aemDocuments/documents/OTH/Produc= tDocuments/DataSheets/20005375A.pdf + Datasheet for MCP47FVB01, MCP47FVB11, MCP47FVB21, MCP47FVB02, MCP47FVB1= 2, + MCP47FVB22 can be found here: + https://ww1.microchip.com/downloads/aemDocuments/documents/OTH/Produc= tDocuments/DataSheets/20005405A.pdf + Datasheet for MCP47FEB04, MCP47FEB14, MCP47FEB24, MCP47FEB08, MCP47FEB1= 8, + MCP47FEB28, MCP47FVB04, MCP47FVB14, MCP47FVB24, MCP47FVB08, MCP47FVB18, + MCP47FVB28 can be found here: + https://ww1.microchip.com/downloads/aemDocuments/documents/MSLD/Produ= ctDocuments/DataSheets/MCP47FXBX48-Data-Sheet-DS200006368A.pdf + Datasheets for MCP48F(E/V)B(0/1/2)(1/2/4/8) DAC with SPI Interface Fami= lies: + Datasheet for MCP48FEB01, MCP48FEB02, MCP48FEB11, MCP48FEB12, MCP48FEB2= 1, + MCP48FEB22 can be found here: + https://ww1.microchip.com/downloads/aemDocuments/documents/OTH/Produc= tDocuments/DataSheets/20005429B.pdf + Datasheet for MCP48FVB01, MCP48FVB02, MCP48FVB11, MCP48FVB12, MCP48FVB2= 1, + MCP48FVB22 can be found here: + https://ww1.microchip.com/downloads/aemDocuments/documents/OTH/Produc= tDocuments/DataSheets/20005466A.pdf + Datasheet for MCP48FEB04, MCP48FEB14, MCP48FEB24, MCP48FEB08, MCP48FEB1= 8, + MCP48FEB28, MCP48FVB04, MCP48FVB14, MCP48FVB24, MCP48FVB08, MCP48FVB18, + MCP48FVB28 can be found here: + https://ww1.microchip.com/downloads/aemDocuments/documents/MSLD/Produ= ctDocuments/DataSheets/MCP48FXBX4-8-Family-Data-Sheet-DS20006362A.pdf + + +------------+--------------+-------------+-------------+------------+--= ----------+ + | Device | Resolution | Channels | Vref number | Memory | I= nterface | + |------------|--------------|-------------|-------------|------------|--= ----------| + | MCP47FEB01 | | 1 | 1 | EEPROM | = I2C | + | MCP47FEB02 | | 2 | 1 | EEPROM | = I2C | + | MCP47FEB04 | | 4 | 2 | EEPROM | = I2C | + | MCP47FEB08 | 8-bit | 8 | 2 | EEPROM | = I2C | + | MCP48FEB01 | | 1 | 1 | EEPROM | = SPI | + | MCP48FEB02 | | 2 | 1 | EEPROM | = SPI | + | MCP48FEB04 | | 4 | 2 | EEPROM | = SPI | + | MCP48FEB08 | | 8 | 2 | EEPROM | = SPI | + |------------|--------------|-------------|-------------|------------|--= ----------| + | MCP47FEB11 | | 1 | 1 | EEPROM | = I2C | + | MCP47FEB12 | | 2 | 1 | EEPROM | = I2C | + | MCP47FEB14 | | 4 | 2 | EEPROM | = I2C | + | MCP47FEB18 | 10-bit | 8 | 2 | EEPROM | = I2C | + | MCP48FEB11 | | 1 | 1 | EEPROM | = SPI | + | MCP48FEB12 | | 2 | 1 | EEPROM | = SPI | + | MCP48FEB14 | | 4 | 2 | EEPROM | = SPI | + | MCP48FEB18 | | 8 | 2 | EEPROM | = SPI | + |------------|--------------|-------------|-------------|------------|--= ----------| + | MCP47FEB21 | | 1 | 1 | EEPROM | = I2C | + | MCP47FEB22 | | 2 | 1 | EEPROM | = I2C | + | MCP47FEB24 | | 4 | 2 | EEPROM | = I2C | + | MCP47FEB28 | 12-bit | 8 | 2 | EEPROM | = I2C | + | MCP48FEB21 | | 1 | 1 | EEPROM | = SPI | + | MCP48FEB22 | | 2 | 1 | EEPROM | = SPI | + | MCP48FEB24 | | 4 | 2 | EEPROM | = SPI | + | MCP48FEB28 | | 8 | 2 | EEPROM | = SPI | + |------------|--------------|-------------|-------------|------------|--= ----------| + | MCP47FVB01 | | 1 | 1 | RAM | = I2C | + | MCP47FVB02 | | 2 | 1 | RAM | = I2C | + | MCP47FVB04 | | 4 | 2 | RAM | = I2C | + | MCP47FVB08 | 8-bit | 8 | 2 | RAM | = I2C | + | MCP48FVB01 | | 1 | 1 | RAM | = SPI | + | MCP48FVB02 | | 2 | 1 | RAM | = SPI | + | MCP48FVB04 | | 4 | 2 | RAM | = SPI | + | MCP48FVB08 | | 8 | 2 | RAM | = SPI | + |------------|--------------|-------------|-------------|------------|--= ----------| + | MCP47FVB11 | | 1 | 1 | RAM | = I2C | + | MCP47FVB12 | | 2 | 1 | RAM | = I2C | + | MCP47FVB14 | | 4 | 2 | RAM | = I2C | + | MCP47FVB18 | 10-bit | 8 | 2 | RAM | = I2C | + | MCP48FVB11 | | 1 | 1 | RAM | = SPI | + | MCP48FVB12 | | 2 | 1 | RAM | = SPI | + | MCP48FVB14 | | 4 | 2 | RAM | = SPI | + | MCP48FVB18 | | 8 | 2 | RAM | = SPI | + |------------|--------------|-------------|-------------|------------|--= ----------| + | MCP47FVB21 | | 1 | 1 | RAM | = I2C | + | MCP47FVB22 | | 2 | 1 | RAM | = I2C | + | MCP47FVB24 | | 4 | 2 | RAM | = I2C | + | MCP47FVB28 | 12-bit | 8 | 2 | RAM | = I2C | + | MCP48FVB21 | | 1 | 1 | RAM | = SPI | + | MCP48FVB22 | | 2 | 1 | RAM | = SPI | + | MCP48FVB24 | | 4 | 2 | RAM | = SPI | + | MCP48FVB28 | | 8 | 2 | RAM | = SPI | + +------------+--------------+-------------+-------------+------------+--= ----------+ =20 properties: compatible: @@ -84,10 +118,37 @@ properties: - microchip,mcp47feb08 - microchip,mcp47feb18 - microchip,mcp47feb28 + - microchip,mcp48feb01 + - microchip,mcp48feb02 + - microchip,mcp48feb04 + - microchip,mcp48feb08 + - microchip,mcp48feb11 + - microchip,mcp48feb12 + - microchip,mcp48feb14 + - microchip,mcp48feb18 + - microchip,mcp48feb21 + - microchip,mcp48feb22 + - microchip,mcp48feb24 + - microchip,mcp48feb28 + - microchip,mcp48fvb01 + - microchip,mcp48fvb02 + - microchip,mcp48fvb04 + - microchip,mcp48fvb08 + - microchip,mcp48fvb11 + - microchip,mcp48fvb12 + - microchip,mcp48fvb14 + - microchip,mcp48fvb18 + - microchip,mcp48fvb21 + - microchip,mcp48fvb22 + - microchip,mcp48fvb24 + - microchip,mcp48fvb28 =20 reg: maxItems: 1 =20 + spi-max-frequency: + maximum: 10000000 + "#address-cells": const: 1 =20 @@ -178,6 +239,13 @@ required: - vdd-supply =20 allOf: + - if: + properties: + compatible: + contains: + pattern: "^microchip,mcp48f[ev]b[0-2][1248]$" + then: + $ref: /schemas/spi/spi-peripheral-props.yaml# - if: properties: compatible: @@ -189,6 +257,12 @@ allOf: - microchip,mcp47fvb01 - microchip,mcp47fvb11 - microchip,mcp47fvb21 + - microchip,mcp48feb01 + - microchip,mcp48feb11 + - microchip,mcp48feb21 + - microchip,mcp48fvb01 + - microchip,mcp48fvb11 + - microchip,mcp48fvb21 then: properties: lat1-gpios: false @@ -211,6 +285,12 @@ allOf: - microchip,mcp47fvb02 - microchip,mcp47fvb12 - microchip,mcp47fvb22 + - microchip,mcp48feb02 + - microchip,mcp48feb12 + - microchip,mcp48feb22 + - microchip,mcp48fvb02 + - microchip,mcp48fvb12 + - microchip,mcp48fvb22 then: properties: lat1-gpios: false @@ -233,6 +313,12 @@ allOf: - microchip,mcp47feb04 - microchip,mcp47feb14 - microchip,mcp47feb24 + - microchip,mcp48feb04 + - microchip,mcp48feb14 + - microchip,mcp48feb24 + - microchip,mcp48fvb04 + - microchip,mcp48fvb14 + - microchip,mcp48fvb24 then: patternProperties: "^channel@[0-3]$": @@ -251,6 +337,12 @@ allOf: - microchip,mcp47feb08 - microchip,mcp47feb18 - microchip,mcp47feb28 + - microchip,mcp48feb08 + - microchip,mcp48feb18 + - microchip,mcp48feb28 + - microchip,mcp48fvb08 + - microchip,mcp48fvb18 + - microchip,mcp48fvb28 then: patternProperties: "^channel@[0-7]$": @@ -272,6 +364,39 @@ allOf: properties: microchip,vref1-buffered: false =20 + - if: + properties: + compatible: + contains: + enum: + - microchip,mcp47feb01 + - microchip,mcp47feb02 + - microchip,mcp47feb04 + - microchip,mcp47feb08 + - microchip,mcp47feb11 + - microchip,mcp47feb12 + - microchip,mcp47feb14 + - microchip,mcp47feb18 + - microchip,mcp47feb21 + - microchip,mcp47feb22 + - microchip,mcp47feb24 + - microchip,mcp47feb28 + - microchip,mcp47fvb01 + - microchip,mcp47fvb02 + - microchip,mcp47fvb04 + - microchip,mcp47fvb08 + - microchip,mcp47fvb11 + - microchip,mcp47fvb12 + - microchip,mcp47fvb14 + - microchip,mcp47fvb18 + - microchip,mcp47fvb21 + - microchip,mcp47fvb22 + - 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bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20260723-mcp47feb02_refactor-v1-3-ee59e63672bc@microchip.com> References: <20260723-mcp47feb02_refactor-v1-0-ee59e63672bc@microchip.com> In-Reply-To: <20260723-mcp47feb02_refactor-v1-0-ee59e63672bc@microchip.com> To: Jonathan Cameron , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , "Andy Shevchenko" , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley CC: , , , Ariana Lazar X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1784814192; l=10545; i=ariana.lazar@microchip.com; s=20250825; h=from:subject:message-id; bh=v80uD4b7lDo1ZZ8CZQ+WcFKZgM4jqAZbGuCR6HE8K6c=; b=VsqD8eRoMFgrdCQFNKJ6/xypiEBCgRopGnsGyn57LiFsdJpJO6RtKBO5FQI8s8z0ULIgswzeD u74Thu6VCDwCi9r+MHt+R3v2FFxsKVVpi3/Mlh15tDckEhn8T8IjddI X-Developer-Key: i=ariana.lazar@microchip.com; a=ed25519; pk=jmvf1fSxcnzZmXfITM3L94IwutM+wqA1POQHiYyD6Dk= This is the iio driver for Microchip MCP48FxBy1/2/4/8 series of buffered voltage output Digital-to-Analog Converters with nonvolatile or volatile memory and an SPI Interface. The families support up to 8 output channels. The devices can be 8-bit, 10-bit and 12-bit. Signed-off-by: Ariana Lazar --- MAINTAINERS | 1 + drivers/iio/dac/Kconfig | 23 ++++++ drivers/iio/dac/Makefile | 1 + drivers/iio/dac/mcp47feb02-spi.c | 146 +++++++++++++++++++++++++++++++++++= ++++ 4 files changed, 171 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index fc87609865f26a9f484edc42058f7df659a0fa4f..b2ffcc0161ba0d147df35558312= cbf99052ed13e 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -16120,6 +16120,7 @@ S: Supported F: Documentation/devicetree/bindings/iio/dac/microchip,mcp47feb02.yaml F: drivers/iio/dac/mcp47feb02-core.c F: drivers/iio/dac/mcp47feb02-i2c.c +F: drivers/iio/dac/mcp47feb02-spi.c F: drivers/iio/dac/mcp47feb02.h =20 MCP4821 DAC DRIVER diff --git a/drivers/iio/dac/Kconfig b/drivers/iio/dac/Kconfig index cc10d43ffd1e89bbf945ef89ea5af0abe1a91084..d941f78f7110b185fee6f025be8= 29bae1e4534da 100644 --- a/drivers/iio/dac/Kconfig +++ b/drivers/iio/dac/Kconfig @@ -575,6 +575,29 @@ config MCP47FEB02_I2C will be called mcp47feb02_i2c and you will also get mcp47feb02_core for the core module. =20 +config MCP47FEB02_SPI + tristate "MCP48F(E/V)B01/02/04/08/11/12/14/18/21/22/24/28 SPI DAC driver" + depends on SPI + select REGMAP_SPI + select MCP47FEB02 + help + Say yes here if you want to build the driver for the Microchip: + - 8-bit DAC: + MCP48FEB01, MCP48FEB02, MCP48FEB04, MCP48FEB08, + MCP48FVB01, MCP48FVB02, MCP48FVB04, MCP48FVB08 + - 10-bit DAC: + MCP48FEB11, MCP48FEB12, MCP48FEB14, MCP48FEB18, + MCP48FVB11, MCP48FVB12, MCP48FVB14, MCP48FVB18 + - 12-bit DAC: + MCP48FEB21, MCP48FEB22, MCP48FEB24, MCP48FEB28, + MCP48FVB21, MCP48FVB22, MCP48FVB24, MCP48FVB28 + having 1 to 8 channels, 8/10/12-bit digital-to-analog converter + (DAC) with SPI interface. + + To compile this driver as a module, choose M here: the module + will be called mcp47feb02_spi and you will also get + mcp47feb02_core for the core module. + config MCP4821 tristate "MCP4801/02/11/12/21/22 DAC driver" depends on SPI diff --git a/drivers/iio/dac/Makefile b/drivers/iio/dac/Makefile index 28c8646a987cff1ac4d693fe86898d66c901d5bd..9903198b934e8b66a4ea6562b66= 2d8073ed9cc59 100644 --- a/drivers/iio/dac/Makefile +++ b/drivers/iio/dac/Makefile @@ -56,6 +56,7 @@ obj-$(CONFIG_MCP4725) +=3D mcp4725.o obj-$(CONFIG_MCP4728) +=3D mcp4728.o obj-$(CONFIG_MCP47FEB02) +=3D mcp47feb02-core.o obj-$(CONFIG_MCP47FEB02_I2C) +=3D mcp47feb02-i2c.o +obj-$(CONFIG_MCP47FEB02_SPI) +=3D mcp47feb02-spi.o obj-$(CONFIG_MCP4821) +=3D mcp4821.o obj-$(CONFIG_MCP4922) +=3D mcp4922.o obj-$(CONFIG_STM32_DAC_CORE) +=3D stm32-dac-core.o diff --git a/drivers/iio/dac/mcp47feb02-spi.c b/drivers/iio/dac/mcp47feb02-= spi.c new file mode 100644 index 0000000000000000000000000000000000000000..4395d49405dd818dac5a411257e= 84ca8bfd5deec --- /dev/null +++ b/drivers/iio/dac/mcp47feb02-spi.c @@ -0,0 +1,146 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * IIO driver for MCP48FEB02 Multi-Channel DAC with SPI interface + * + * Copyright (C) 2026 Microchip Technology Inc. and its subsidiaries + * + * Author: Ariana Lazar + * + * Datasheet links for devices with SPI interface: + * [MCP48FEBxx] https://ww1.microchip.com/downloads/aemDocuments/documents= /OTH/ProductDocuments/DataSheets/20005429B.pdf + * [MCP48FVBxx] https://ww1.microchip.com/downloads/aemDocuments/documents= /OTH/ProductDocuments/DataSheets/20005466A.pdf + * [MCP48FxBx4/8] https://ww1.microchip.com/downloads/aemDocuments/documen= ts/MSLD/ProductDocuments/DataSheets/MCP48FXBX4-8-Family-Data-Sheet-DS200063= 62A.pdf + */ +#include +#include +#include +#include +#include +#include +#include +#include + +#include "mcp47feb02.h" + +/* Parts with EEPROM memory */ +MCP47FEB02_CHIP_INFO(mcp48feb01, 1, 8, false, true); +MCP47FEB02_CHIP_INFO(mcp48feb02, 2, 8, false, true); +MCP47FEB02_CHIP_INFO(mcp48feb04, 4, 8, true, true); +MCP47FEB02_CHIP_INFO(mcp48feb08, 8, 8, true, true); +MCP47FEB02_CHIP_INFO(mcp48feb11, 1, 10, false, true); +MCP47FEB02_CHIP_INFO(mcp48feb12, 2, 10, false, true); +MCP47FEB02_CHIP_INFO(mcp48feb14, 4, 10, true, true); +MCP47FEB02_CHIP_INFO(mcp48feb18, 8, 10, true, true); +MCP47FEB02_CHIP_INFO(mcp48feb21, 1, 12, false, true); +MCP47FEB02_CHIP_INFO(mcp48feb22, 2, 12, false, true); +MCP47FEB02_CHIP_INFO(mcp48feb24, 4, 12, true, true); +MCP47FEB02_CHIP_INFO(mcp48feb28, 8, 12, true, true); + +/* Parts without EEPROM memory */ +MCP47FEB02_CHIP_INFO(mcp48fvb01, 1, 8, false, false); +MCP47FEB02_CHIP_INFO(mcp48fvb02, 2, 8, false, false); +MCP47FEB02_CHIP_INFO(mcp48fvb04, 4, 8, true, false); +MCP47FEB02_CHIP_INFO(mcp48fvb08, 8, 8, true, false); +MCP47FEB02_CHIP_INFO(mcp48fvb11, 1, 10, false, false); +MCP47FEB02_CHIP_INFO(mcp48fvb12, 2, 10, false, false); +MCP47FEB02_CHIP_INFO(mcp48fvb14, 4, 10, true, false); +MCP47FEB02_CHIP_INFO(mcp48fvb18, 8, 10, true, false); +MCP47FEB02_CHIP_INFO(mcp48fvb21, 1, 12, false, false); +MCP47FEB02_CHIP_INFO(mcp48fvb22, 2, 12, false, false); +MCP47FEB02_CHIP_INFO(mcp48fvb24, 4, 12, true, false); +MCP47FEB02_CHIP_INFO(mcp48fvb28, 8, 12, true, false); + +static int mcp47feb02_spi_probe(struct spi_device *spi) +{ + const struct mcp47feb02_features *chip_features; + struct device *dev =3D &spi->dev; + struct regmap *regmap; + + chip_features =3D spi_get_device_match_data(spi); + if (!chip_features) + return -EINVAL; + + if (chip_features->have_eeprom) + regmap =3D devm_regmap_init_spi(spi, &mcp47feb02_regmap_config); + else + regmap =3D devm_regmap_init_spi(spi, &mcp47fvb02_regmap_config); + + if (IS_ERR(regmap)) + return dev_err_probe(dev, PTR_ERR(regmap), "Error initializing SPI regma= p\n"); + + return mcp47feb02_common_probe(chip_features, regmap); +} + +static const struct spi_device_id mcp47feb02_spi_id[] =3D { + { "mcp48feb01", (kernel_ulong_t)&mcp48feb01_chip_features }, + { "mcp48feb02", (kernel_ulong_t)&mcp48feb02_chip_features }, + { "mcp48feb04", (kernel_ulong_t)&mcp48feb04_chip_features }, + { "mcp48feb08", (kernel_ulong_t)&mcp48feb08_chip_features }, + { "mcp48feb11", (kernel_ulong_t)&mcp48feb11_chip_features }, + { "mcp48feb12", (kernel_ulong_t)&mcp48feb12_chip_features }, + { "mcp48feb14", (kernel_ulong_t)&mcp48feb14_chip_features }, + { "mcp48feb18", (kernel_ulong_t)&mcp48feb18_chip_features }, + { "mcp48feb21", (kernel_ulong_t)&mcp48feb21_chip_features }, + { "mcp48feb22", (kernel_ulong_t)&mcp48feb22_chip_features }, + { "mcp48feb24", (kernel_ulong_t)&mcp48feb24_chip_features }, + { "mcp48feb28", (kernel_ulong_t)&mcp48feb28_chip_features }, + { "mcp48fvb01", (kernel_ulong_t)&mcp48fvb01_chip_features }, + { "mcp48fvb02", (kernel_ulong_t)&mcp48fvb02_chip_features }, + { "mcp48fvb04", (kernel_ulong_t)&mcp48fvb04_chip_features }, + { "mcp48fvb08", (kernel_ulong_t)&mcp48fvb08_chip_features }, + { "mcp48fvb11", (kernel_ulong_t)&mcp48fvb11_chip_features }, + { "mcp48fvb12", (kernel_ulong_t)&mcp48fvb12_chip_features }, + { "mcp48fvb14", (kernel_ulong_t)&mcp48fvb14_chip_features }, + { "mcp48fvb18", (kernel_ulong_t)&mcp48fvb18_chip_features }, + { "mcp48fvb21", (kernel_ulong_t)&mcp48fvb21_chip_features }, + { "mcp48fvb22", (kernel_ulong_t)&mcp48fvb22_chip_features }, + { "mcp48fvb24", (kernel_ulong_t)&mcp48fvb24_chip_features }, + { "mcp48fvb28", (kernel_ulong_t)&mcp48fvb28_chip_features }, + { } +}; +MODULE_DEVICE_TABLE(spi, mcp47feb02_spi_id); + +static const struct of_device_id mcp47feb02_of_spi_match[] =3D { + { .compatible =3D "microchip,mcp48feb01", .data =3D &mcp48feb01_chip_feat= ures }, + { .compatible =3D "microchip,mcp48feb02", .data =3D &mcp48feb02_chip_feat= ures }, + { .compatible =3D "microchip,mcp48feb04", .data =3D &mcp48feb04_chip_feat= ures }, + { .compatible =3D "microchip,mcp48feb08", .data =3D &mcp48feb08_chip_feat= ures }, + { .compatible =3D "microchip,mcp48feb11", .data =3D &mcp48feb11_chip_feat= ures }, + { .compatible =3D "microchip,mcp48feb12", .data =3D &mcp48feb12_chip_feat= ures }, + { .compatible =3D "microchip,mcp48feb14", .data =3D &mcp48feb14_chip_feat= ures }, + { .compatible =3D "microchip,mcp48feb18", .data =3D &mcp48feb18_chip_feat= ures }, + { .compatible =3D "microchip,mcp48feb21", .data =3D &mcp48feb21_chip_feat= ures }, + { .compatible =3D "microchip,mcp48feb22", .data =3D &mcp48feb22_chip_feat= ures }, + { .compatible =3D "microchip,mcp48feb24", .data =3D &mcp48feb24_chip_feat= ures }, + { .compatible =3D "microchip,mcp48feb28", .data =3D &mcp48feb28_chip_feat= ures }, + { .compatible =3D "microchip,mcp48fvb01", .data =3D &mcp48fvb01_chip_feat= ures }, + { .compatible =3D "microchip,mcp48fvb02", .data =3D &mcp48fvb02_chip_feat= ures }, + { .compatible =3D "microchip,mcp48fvb04", .data =3D &mcp48fvb04_chip_feat= ures }, + { .compatible =3D "microchip,mcp48fvb08", .data =3D &mcp48fvb08_chip_feat= ures }, + { .compatible =3D "microchip,mcp48fvb11", .data =3D &mcp48fvb11_chip_feat= ures }, + { .compatible =3D "microchip,mcp48fvb12", .data =3D &mcp48fvb12_chip_feat= ures }, + { .compatible =3D "microchip,mcp48fvb14", .data =3D &mcp48fvb14_chip_feat= ures }, + { .compatible =3D "microchip,mcp48fvb18", .data =3D &mcp48fvb18_chip_feat= ures }, + { .compatible =3D "microchip,mcp48fvb21", .data =3D &mcp48fvb21_chip_feat= ures }, + { .compatible =3D "microchip,mcp48fvb22", .data =3D &mcp48fvb22_chip_feat= ures }, + { .compatible =3D "microchip,mcp48fvb24", .data =3D &mcp48fvb24_chip_feat= ures }, + { .compatible =3D "microchip,mcp48fvb28", .data =3D &mcp48fvb28_chip_feat= ures }, + { } +}; +MODULE_DEVICE_TABLE(of, mcp47feb02_of_spi_match); + +static struct spi_driver mcp47feb02_spi_driver =3D { + .driver =3D { + .name =3D "mcp47feb02", + .of_match_table =3D mcp47feb02_of_spi_match, + .pm =3D pm_sleep_ptr(&mcp47feb02_pm_ops), + }, + .probe =3D mcp47feb02_spi_probe, + .id_table =3D mcp47feb02_spi_id, +}; +module_spi_driver(mcp47feb02_spi_driver); + +MODULE_AUTHOR("Ariana Lazar "); +MODULE_DESCRIPTION("IIO driver for MCP48FEB02 Multi-Channel DAC with SPI i= nterface"); +MODULE_LICENSE("GPL"); +MODULE_IMPORT_NS("IIO_MCP47FEB02"); --=20 2.43.0