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Wed, 22 Jul 2026 10:18:48 -0700 (PDT) Received: from localhost.localdomain ([86.126.27.145]) by smtp.googlemail.com with ESMTPSA id 5b1f17b1804b1-4956b5c2108sm123344555e9.2.2026.07.22.10.18.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 22 Jul 2026 10:18:47 -0700 (PDT) From: Eduard Bostina To: Conor Dooley , devicetree@vger.kernel.org, Eduard Bostina , Krzysztof Kozlowski , linux-kernel@vger.kernel.org, Mark Brown , Rob Herring Cc: daniel.baluta@nxp.com, simona.toaca@nxp.com, goledhruva@gmail.com, m-chawdhry@ti.com Subject: [PATCH] dt-bindings: arm: omap: Convert L4 interconnect to DT schema Date: Wed, 22 Jul 2026 17:18:40 +0000 Message-ID: <20260722171840.299303-1-egbostina@gmail.com> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Convert the Texas Instruments OMAP L4 interconnect bus bindings to DT schema. During the conversion, several updates were made: - Defined the compatible property as an array to require the TI-specific string first, followed by either 'simple-bus' or 'simple-pm-bus'. - Added a 'select' block to ensure this schema is only applied to TI-specific nodes, preventing duplicate schema warnings against the core simple-pm-bus.yaml. - Made 'reg' and 'reg-names' optional. Signed-off-by: Eduard Bostina --- .../devicetree/bindings/arm/omap/l4.txt | 37 -------- .../bindings/arm/omap/ti,omap-l4.yaml | 93 +++++++++++++++++++ 2 files changed, 93 insertions(+), 37 deletions(-) delete mode 100644 Documentation/devicetree/bindings/arm/omap/l4.txt create mode 100644 Documentation/devicetree/bindings/arm/omap/ti,omap-l4.y= aml diff --git a/Documentation/devicetree/bindings/arm/omap/l4.txt b/Documentat= ion/devicetree/bindings/arm/omap/l4.txt deleted file mode 100644 index 6816adcdc15f..000000000000 --- a/Documentation/devicetree/bindings/arm/omap/l4.txt +++ /dev/null @@ -1,37 +0,0 @@ -L4 interconnect bindings - -These bindings describe the OMAP SoCs L4 interconnect bus. - -Required properties: -- compatible : Should be "ti,omap2-l4" for OMAP2 family l4 core bus - Should be "ti,omap2-l4-wkup" for OMAP2 family l4 wkup bus - Should be "ti,omap3-l4-core" for OMAP3 family l4 core bus - Should be "ti,omap4-l4-cfg" for OMAP4 family l4 cfg bus - Should be "ti,omap4-l4-per" for OMAP4 family l4 per bus - Should be "ti,omap4-l4-wkup" for OMAP4 family l4 wkup bus - Should be "ti,omap5-l4-cfg" for OMAP5 family l4 cfg bus - Should be "ti,omap5-l4-wkup" for OMAP5 family l4 wkup bus - Should be "ti,dra7-l4-cfg" for DRA7 family l4 cfg bus - Should be "ti,dra7-l4-wkup" for DRA7 family l4 wkup bus - Should be "ti,am3-l4-wkup" for AM33xx family l4 wkup bus - Should be "ti,am4-l4-wkup" for AM43xx family l4 wkup bus -- ranges : contains the IO map range for the bus -- reg : registers link agent and interconnect agent and access protection -- reg-names : "la" for link agent, "ia0" to "ia3" for one to three - interconnect agent instances, "ap" for access if it exists - -Examples: - -l4: interconnect@48000000 { - compatible "ti,omap4-l4-per", "simple-bus"; - reg =3D <0x48000000 0x800>, - <0x48000800 0x800>, - <0x48001000 0x400>, - <0x48001400 0x400>, - <0x48001800 0x400>, - <0x48001c00 0x400>; - reg-names =3D "ap", "la", "ia0", "ia1", "ia2", "ia3"; - #address-cells =3D <1>; - #size-cells =3D <1>; - ranges =3D <0 0x48000000 0x100000>; -}; diff --git a/Documentation/devicetree/bindings/arm/omap/ti,omap-l4.yaml b/D= ocumentation/devicetree/bindings/arm/omap/ti,omap-l4.yaml new file mode 100644 index 000000000000..465d48f44730 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/omap/ti,omap-l4.yaml @@ -0,0 +1,93 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/omap/ti,omap-l4.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TI OMAP SoCs L4 interconnect bus + +maintainers: + - Eduard Bostina + +description: + These bindings describe the OMAP SoCs L4 interconnect bus. + +select: + properties: + compatible: + contains: + enum: + - ti,omap2-l4 + - ti,omap2-l4-wkup + - ti,omap3-l4-core + - ti,omap4-l4-cfg + - ti,omap4-l4-per + - ti,omap4-l4-wkup + - ti,omap5-l4-cfg + - ti,omap5-l4-wkup + - ti,dra7-l4-cfg + - ti,dra7-l4-wkup + - ti,am3-l4-wkup + - ti,am4-l4-wkup + required: + - compatible + +properties: + compatible: + items: + - enum: + - ti,omap2-l4 + - ti,omap2-l4-wkup + - ti,omap3-l4-core + - ti,omap4-l4-cfg + - ti,omap4-l4-per + - ti,omap4-l4-wkup + - ti,omap5-l4-cfg + - ti,omap5-l4-wkup + - ti,dra7-l4-cfg + - ti,dra7-l4-wkup + - ti,am3-l4-wkup + - ti,am4-l4-wkup + - enum: + - simple-bus + - simple-pm-bus + + reg: + minItems: 1 + maxItems: 6 + + reg-names: + minItems: 1 + maxItems: 6 + items: + enum: + - ap + - la + - ia0 + - ia1 + - ia2 + - ia3 + + ranges: true + +required: + - compatible + - ranges + +additionalProperties: true + +examples: + - | + l4: interconnect@48000000 { + compatible =3D "ti,omap4-l4-per", "simple-bus"; + reg =3D <0x48000000 0x800>, + <0x48000800 0x800>, + <0x48001000 0x400>, + <0x48001400 0x400>, + <0x48001800 0x400>, + <0x48001c00 0x400>; + reg-names =3D "ap", "la", "ia0", "ia1", "ia2", "ia3"; + #address-cells =3D <1>; + #size-cells =3D <1>; + ranges =3D <0 0x48000000 0x100000>; + }; --=20 2.43.0