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[76.11.42.59]) by smtp.gmail.com with ESMTPSA id 6a1803df08f44-907baa296bcsm21512146d6.47.2026.07.22.07.04.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 22 Jul 2026 07:04:01 -0700 (PDT) From: Ryan Wilbur To: Greg Kroah-Hartman , Jiri Slaby Cc: =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= , Andy Shevchenko , John Ogness , Manuel Lauss , Hugo Villeneuve , linux-serial@vger.kernel.org, linux-kernel@vger.kernel.org, Ryan Wilbur , stable@vger.kernel.org Subject: [PATCH v3] serial: 8250_of: clear stuck empty-FIFO RX-timeout on LPC32xx Date: Wed, 22 Jul 2026 11:03:53 -0300 Message-Id: <20260722140353.115899-1-rwilbur633@gmail.com> X-Mailer: git-send-email 2.25.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The NXP LPC32xx UART (PORT_LPC3220) can latch an RX character-timeout interrupt while the RX FIFO is empty: IIR reports UART_IIR_RX_TIMEOUT (0x0c) but LSR.DR is clear. A character timeout is only cleared by reading RHR, but serial8250_rx_chars() reads RHR only when LSR.DR is set, so nothing ever clears the condition. The interrupt is level-triggered and re-fires immediately, so on a single-core ARM926 the resulting interrupt storm livelocks the CPU. It is reproducible when userspace repeatedly opens the front-panel port (ttyS1): serial8250_do_set_termios() re-enables interrupts on unlock and the handler then spins forever with iir=3D0xcc lsr=3D0x60 ier=3D0x05, tripp= ing the soft-lockup detector in serial8250_handle_irq_locked(). LPC32xx has no dedicated 8250 glue driver, it's driven by the generic 8250_of. Add a hardware specific handle_irq for PORT_LPC3220, wired up in of_platform_serial_setup() the same way fsl8250_handle_irq is installed. The handler follows dw8250_handle_irq(): on an RX timeout with an empty FIFO (LSR.DR and LSR.BI clear) it does one throwaway RHR read to clear the condition, then calls serial8250_handle_irq_locked(). No real received data is ever discarded, and it is a no-op on healthy UARTs which never report a timeout with DR clear. This is the same class of bug already worked around in other 8250 drivers; see commit 424d79183af0 ("serial: 8250_dw: Avoid "too much work" from bogus= rx timeout interrupt") which reports the identical iir=3D0xcc/lsr=3D0x60. See also UART_RX_TIMEOUT_QUIRK in 8250_omap, and the note in 8250_bcm7271. Cc: stable@vger.kernel.org Assisted-by: Claude:Opus4.8 Signed-off-by: Ryan Wilbur --- Changes in v3: - Move the workaround out of the generic serial8250_handle_irq_locked() into an LPC32xx-specific ->handle_irq in 8250_of.c - Skip the dummy read when LSR.BI is set, matching dw8250_handle_irq Changes in v2: - Drop the PORT_LPC3220 gate and handle the spurious RX timeout generically v2: https://lore.kernel.org/linux-serial/20260720131123.29840-1-rwilbur633@= gmail.com/ v1: https://lore.kernel.org/linux-serial/20260717123530.481021-1-rwilbur633= @gmail.com/ drivers/tty/serial/8250/8250_of.c | 37 +++++++++++++++++++++++++++++++ 1 file changed, 37 insertions(+) diff --git a/drivers/tty/serial/8250/8250_of.c b/drivers/tty/serial/8250/82= 50_of.c index f0537fb6ef4f..93db28a48dea 100644 --- a/drivers/tty/serial/8250/8250_of.c +++ b/drivers/tty/serial/8250/8250_of.c @@ -82,6 +82,40 @@ static int of_platform_serial_clk_notifier_cb(struct not= ifier_block *nb, unsigne return NOTIFY_DONE; } =20 +static int lpc32xx_handle_irq(struct uart_port *port) +{ + struct uart_8250_port *up =3D up_to_u8250p(port); + unsigned int iir; + u16 status; + + guard(serial8250_rpm)(up); + + iir =3D serial_port_in(port, UART_IIR); + if (iir & UART_IIR_NO_INT) + return 0; + + guard(uart_port_lock_check_sysrq_irqsave)(port); + + /* + * The LPC32xx UART can assert an RX character-timeout interrupt while + * the RX FIFO is empty: IIR reports UART_IIR_RX_TIMEOUT but LSR.DR is + * clear. The timeout is only cleared by reading RHR, but the core RX + * path skips that read when the FIFO is empty, so the level-triggered + * IRQ re-fires forever and livelocks this single-core SoC. Do one + * throwaway RHR read to clear it; a healthy UART never reports a + * timeout with DR/BI clear, so no received data is ever discarded. + */ + if ((iir & 0x3f) =3D=3D UART_IIR_RX_TIMEOUT) { + status =3D serial_lsr_in(up); + if (!(status & (UART_LSR_DR | UART_LSR_BI))) + serial_port_in(port, UART_RX); + } + + serial8250_handle_irq_locked(port, iir); + + return 1; +} + /* * Fill a struct uart_port for a given device node */ @@ -185,6 +219,9 @@ static int of_platform_serial_setup(struct platform_dev= ice *ofdev, case PORT_NPCM: ret =3D npcm_setup(port); break; + case PORT_LPC3220: + port->handle_irq =3D lpc32xx_handle_irq; + break; default: /* Nothing to do */ ret =3D 0; base-commit: da7b5fd4e17f8e44c5590f2d603c01d499f056e6 --=20 2.25.1