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Wysocki" , Daniel Lezcano , Zhang Rui , Lukasz Luba , Stephen Boyd , Amit Kucheria , Thara Gopinath Cc: Ajit Pandey , Imran Shaik , Taniya Das , Jagadeesh Kona , Jishnu Prakash , Kamal Wadhwa , linux-arm-msm@vger.kernel.org, mfd@lists.linux.dev, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, Satya Priya Kakitapalli , Sachin Gupta , Krzysztof Kozlowski X-Mailer: b4 0.15.2 X-Proofpoint-Spam-Info: AW1haW4tMjYwNzIyMDEwMyBTYWx0ZWRfX1aCmirbvzXtT BLEeLAx31df+jWWPP8Z4cu9yQfNb4FKYQ0eHYDpWE98K3xgkxE48qpJIQvFk+3/BcJWcTe5feZ3 Y0uPuNKT4KnxgIL9URFmANL6ccWKPsc= X-Proofpoint-ORIG-GUID: h9KObpaxzTUE_LnA2IaalN9hqBFwwhXa X-Proofpoint-GUID: h9KObpaxzTUE_LnA2IaalN9hqBFwwhXa X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzIyMDEwMyBTYWx0ZWRfX1md6iAEi0Ix3 ScEiZmITgMshJMwofa4vIk3Q5Ei1h3G/ilJotY1eCXa6+xliJix5QWcTJZZJASC4UOpZ850QcKZ 0+hnuLLr7LlR36QMUulbYcxjKZmdXK5LZkusGchPopJnT/SdUOevBKJndBstvcrHClbMm+oePvs TkX9h/InDNVxk/d8Y3GZDkyYFYUhS1CMD9smZ3942mqy0JWrx9UN0Z1uZu6YXpJHGsgz0tTfB0b gqqXslwtRizROqq1fjeowuNexPuxCs9Ps5vLgNmBe3QT9BmYRoEqxE4j+lKzXsgIHvVnW1KOG6f NkuWVsf94yGMD3mv5TCQ4/5oS++nlM4rVuGGm/OB09+Xv6M+w26JiKEzcrVMI8BDnK/x01e/BiI aTrsFgDH7g99GidCPLurGLFMR9yhRjYCQ4rgHC+0dJZgCodnfUosmzwG7wkdDxRv9H98y05oHbC kZZr080SKlxqjlWtuCQ== X-Authority-Analysis: v=2.4 cv=QahWeMbv c=1 sm=1 tr=0 ts=6a609f2b cx=c_pps a=cmESyDAEBpBGqyK7t0alAg==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yOCtJkima9RkubShWh1s:22 a=gEfo2CItAAAA:8 a=COk6AnOGAAAA:8 a=EUspDBNiAAAA:8 a=E-gG5h9l_blIFwvKag4A:9 a=QEXdDO2ut3YA:10 a=1OuFwYUASf3TG4hYMiVC:22 a=sptkURWiP4Gy88Gu7hUp:22 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-07-22_03,2026-07-21_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 priorityscore=1501 malwarescore=0 bulkscore=0 lowpriorityscore=0 phishscore=0 spamscore=0 clxscore=1015 adultscore=0 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607220103 From: Satya Priya Kakitapalli Add bindings for the Qualcomm MBG (Master Bandgap) temperature alarm peripheral found on the PM8775 PMIC. Unlike the existing SPMI temp alarm peripheral, the MBG peripheral supports both hot and cold threshold monitoring across two programmable levels (LVL1 and LVL2), with interrupt status reported via a fault status register over SPMI. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Satya Priya Kakitapalli Co-developed-by: Sachin Gupta Signed-off-by: Sachin Gupta --- .../devicetree/bindings/mfd/qcom,spmi-pmic.yaml | 4 ++ .../bindings/thermal/qcom,pm8775-mbg-tm.yaml | 72 ++++++++++++++++++= ++++ 2 files changed, 76 insertions(+) diff --git a/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml b/Do= cumentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml index 809be2756a0c..bd77cb7173e2 100644 --- a/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml +++ b/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml @@ -194,6 +194,10 @@ patternProperties: type: object $ref: /schemas/thermal/qcom,spmi-temp-alarm.yaml# =20 + "^temperature-sensor@[0-9a-f]+$": + type: object + $ref: /schemas/thermal/qcom,pm8775-mbg-tm.yaml# + "^typec@[0-9a-f]+$": type: object $ref: /schemas/usb/qcom,pmic-typec.yaml# diff --git a/Documentation/devicetree/bindings/thermal/qcom,pm8775-mbg-tm.y= aml b/Documentation/devicetree/bindings/thermal/qcom,pm8775-mbg-tm.yaml new file mode 100644 index 000000000000..2e084d040625 --- /dev/null +++ b/Documentation/devicetree/bindings/thermal/qcom,pm8775-mbg-tm.yaml @@ -0,0 +1,72 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/thermal/qcom,pm8775-mbg-tm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm's SPMI PMIC MBG Thermal Monitoring + +maintainers: + - Jishnu Prakash + - Kamal Wadhwa + +description: + Qualcomm's MBG(Master Bandgap) temperature alarm monitors the die + temperature and generates an interrupt if the PMIC die temperature is + over a set of programmable temperature thresholds. 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Wed, 22 Jul 2026 03:45:04 -0700 (PDT) Received: from hu-sachgupt-hyd.qualcomm.com ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2cf8f2e797asm12382455ad.39.2026.07.22.03.44.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 22 Jul 2026 03:45:04 -0700 (PDT) From: Sachin Gupta Date: Wed, 22 Jul 2026 16:14:42 +0530 Subject: [PATCH v3 2/2] thermal: qcom: Add support for Qualcomm MBG thermal monitoring Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260722-spmi-mbg-driver-v3-2-ef73064f2789@oss.qualcomm.com> References: <20260722-spmi-mbg-driver-v3-0-ef73064f2789@oss.qualcomm.com> In-Reply-To: <20260722-spmi-mbg-driver-v3-0-ef73064f2789@oss.qualcomm.com> To: Lee Jones , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "Rafael J. Wysocki" , Daniel Lezcano , Zhang Rui , Lukasz Luba , Stephen Boyd , Amit Kucheria , Thara Gopinath Cc: Ajit Pandey , Imran Shaik , Taniya Das , Jagadeesh Kona , Jishnu Prakash , Kamal Wadhwa , linux-arm-msm@vger.kernel.org, mfd@lists.linux.dev, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, Satya Priya Kakitapalli , Sachin Gupta , Konrad Dybcio X-Mailer: b4 0.15.2 X-Proofpoint-GUID: OhHtCZ2b55nNWQdKg03WmTD3UrB40BWc X-Authority-Analysis: v=2.4 cv=KLhqylFo c=1 sm=1 tr=0 ts=6a609f32 cx=c_pps a=MTSHoo12Qbhz2p7MsH1ifg==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_K5XuSEh1TEqbUxoQ0s3:22 a=COk6AnOGAAAA:8 a=EUspDBNiAAAA:8 a=Ngz-wdeGRUxtqNebZn4A:9 a=QEXdDO2ut3YA:10 a=GvdueXVYPmCkWapjIL-Q:22 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzIyMDEwMyBTYWx0ZWRfX7K4m3Ddg57V2 LECed8Cskbvt+YXtP1fSQfiAkGRiZLu8sGhvprLSiPYGTad6vFWNRstX7J6Q9aXlUnF7qA49Md3 0FdmBAhYf61d4PCNc9IVlfqkLiVrkNnT2ulgvA7FZHY9LcC7ekbLfsUM10KKG9GLmPgPp9wp76s 8/8jAhNK+/BJ0w3/XfL8eCFGJwqkK2nrZEUYMw2jcK66Ibk75/zZTGXZQKGXkroakuU5HgOJBK5 nbBeEz7840kXs+R+dlBFZkc92z5DJB9SXWFWgapMTc9dMOC3v7N3HySKkD4x5B9t3GiNc6vCrqn J0AwP1l6JFo5y/vKJxuSD2uRNB2CaSPvmGWs9ZhED1/DDK222EPHaWVll7OwWCxDPtQoT0qsRTR emqI8tRL649U+qsrBouHzlBYHCh6dSIqgjdLJTbx0baC3RfwTSjdalwrrJ6pfkH8YwYwEbmn8Gr ikKlhmAjfa3iovJVc+g== X-Proofpoint-ORIG-GUID: OhHtCZ2b55nNWQdKg03WmTD3UrB40BWc X-Proofpoint-Spam-Info: AW1haW4tMjYwNzIyMDEwMyBTYWx0ZWRfX2EJ7XGSm6tUC NZpFmCqt9Zqz46I9bVT37ZDZQgyXu33grXHTQronUh7phA3f9PyIUdvjXHkSU39+cnPECHnT2z8 Y7KCmLRyFk/NH1n9l7/5xOuK0VNXmNU= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-07-22_03,2026-07-21_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 spamscore=0 clxscore=1015 impostorscore=0 lowpriorityscore=0 priorityscore=1501 malwarescore=0 phishscore=0 adultscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607220103 From: Satya Priya Kakitapalli Add a driver for the Qualcomm MBG (Master Bandgap) thermal monitoring device. It monitors PMIC die temperature in hardware and raises an interrupt when a programmed threshold is crossed. MBG hardware supports two upper-threshold levels. Currently, only the level-1 threshold is supported by the driver. Temperature is read from the associated ADC channel, and when a level-1 upper-threshold violation occurs, the hardware generates an interrupt over SPMI. The driver notifies the thermal framework accordingly. Reviewed-by: Konrad Dybcio Signed-off-by: Satya Priya Kakitapalli Co-developed-by: Sachin Gupta Signed-off-by: Sachin Gupta --- drivers/thermal/qcom/Kconfig | 14 ++ drivers/thermal/qcom/Makefile | 1 + drivers/thermal/qcom/qcom-spmi-mbg-tm.c | 256 ++++++++++++++++++++++++++++= ++++ 3 files changed, 271 insertions(+) diff --git a/drivers/thermal/qcom/Kconfig b/drivers/thermal/qcom/Kconfig index a6bb01082ec6..ecfd1d166e53 100644 --- a/drivers/thermal/qcom/Kconfig +++ b/drivers/thermal/qcom/Kconfig @@ -21,6 +21,20 @@ config QCOM_SPMI_ADC_TM5 Thermal client sets threshold temperature for both warm and cool and gets updated when a threshold is reached. =20 +config QCOM_SPMI_MBG_TM + tristate "Qualcomm SPMI PMIC MBG Temperature monitor" + depends on QCOM_SPMI_ADC5_GEN3 + select REGMAP_SPMI + help + This enables Qualcomm PMIC MBG (Master Bandgap) thermal monitor. + + The MBG block monitors PMIC die temperature in hardware and raises an + interrupt when the programmed threshold is crossed. + + Temperature is read from the associated ADC channel, and threshold + interrupts are forwarded to the thermal framework as trip-violation + events. Current support handles a single LVL1 upper (hot) trip. + config QCOM_SPMI_TEMP_ALARM tristate "Qualcomm SPMI PMIC Temperature Alarm" depends on OF && SPMI && IIO diff --git a/drivers/thermal/qcom/Makefile b/drivers/thermal/qcom/Makefile index 0fa2512042e7..1bec2746b98d 100644 --- a/drivers/thermal/qcom/Makefile +++ b/drivers/thermal/qcom/Makefile @@ -4,5 +4,6 @@ obj-$(CONFIG_QCOM_TSENS) +=3D qcom_tsens.o qcom_tsens-y +=3D tsens.o tsens-v2.o tsens-v1.o tsens-v0_1.o \ tsens-8960.o obj-$(CONFIG_QCOM_SPMI_ADC_TM5) +=3D qcom-spmi-adc-tm5.o +obj-$(CONFIG_QCOM_SPMI_MBG_TM) +=3D qcom-spmi-mbg-tm.o obj-$(CONFIG_QCOM_SPMI_TEMP_ALARM) +=3D qcom-spmi-temp-alarm.o obj-$(CONFIG_QCOM_LMH) +=3D lmh.o diff --git a/drivers/thermal/qcom/qcom-spmi-mbg-tm.c b/drivers/thermal/qcom= /qcom-spmi-mbg-tm.c new file mode 100644 index 000000000000..fa2f10002253 --- /dev/null +++ b/drivers/thermal/qcom/qcom-spmi-mbg-tm.c @@ -0,0 +1,256 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#define MBG_TEMP_MON2_FAULT_STATUS 0x50 + +#define MON_FAULT_STATUS_MASK GENMASK(7, 4) +#define MON_FAULT_LVL1_UPR 0x5 + +#define MON2_LVL1_UP_THRESH 0x59 + +#define MBG_TEMP_MON2_MISC_CFG 0x5f +#define MON2_UP_THRESH_EN BIT(1) + +#define MBG_TEMP_STEP_MV 8 +#define MBG_TEMP_DEFAULT_TEMP_MV 600 +#define MBG_TEMP_CONSTANT 1000 +#define MBG_MIN_TRIP_TEMP 25000 +#define MBG_MAX_SUPPORTED_TEMP 160000 + +/** + * struct mbg_tm_chip - MBG thermal monitor device data. + * @map: regmap for accessing MBG thermal registers. + * @dev: mbg_tm_chip device. + * @tz_dev: thermal zone device registered with the thermal framework. + * @lock: mbg_tm_chip lock for set trip temperature. + * @base: base register offset for this MBG instance + * @irq: interrupt line used to signal threshold events + * @last_temp: last measured temperature. + * @last_thres_crossed: indicates whether the last interrupt crossed a thr= eshold + * @adc: IIO ADC channel used for temperature sensing + */ +struct mbg_tm_chip { + struct regmap *map; + struct device *dev; + struct thermal_zone_device *tz_dev; + struct mutex lock; + unsigned int base; + int irq; + int last_temp; + bool last_thres_crossed; + struct iio_channel *adc; +}; + +/** + * struct mbg_map_table - temperature to voltage mapping entry + * @min_temp: minimum temperature supported by this mapping entry + * @vtemp0: reference voltage or ADC code corresponding to the temperature + * @tc: temperature coefficient used for conversion calculations + */ +struct mbg_map_table { + int min_temp; + int vtemp0; + int tc; +}; + +static const struct mbg_map_table map_table[] =3D { + { -60000, 4337, 1967 }, + { -40000, 4731, 1964 }, + { -20000, 5124, 1957 }, + { 0, 5515, 1949 }, + { 20000, 5905, 1940 }, + { 40000, 6293, 1930 }, + { 60000, 6679, 1921 }, + { 80000, 7064, 1910 }, + { 100000, 7446, 1896 }, + { 120000, 7825, 1878 }, + { 140000, 8201, 1859 }, +}; + +static int mbg_tm_get_temp(struct thermal_zone_device *tz, int *temp) +{ + struct mbg_tm_chip *chip =3D thermal_zone_device_priv(tz); + int ret, milli_celsius; + + scoped_guard(mutex, &chip->lock) { + if (chip->last_thres_crossed) { + dev_dbg(chip->dev, "last_temp: %d\n", chip->last_temp); + chip->last_thres_crossed =3D false; + *temp =3D chip->last_temp; + return 0; + } + } + + ret =3D iio_read_channel_processed(chip->adc, &milli_celsius); + if (ret < 0) { + dev_err(chip->dev, "Failed to read iio channel with %d\n", ret); + return ret; + } + + *temp =3D milli_celsius; + + return 0; +} + +static int temp_to_vtemp_mv(int temp) +{ + int idx, vtemp, tc =3D 0, t0 =3D 0, vtemp0 =3D 0; + + for (idx =3D 0; idx < ARRAY_SIZE(map_table); idx++) + if (temp >=3D map_table[idx].min_temp && + temp < (map_table[idx].min_temp + 20000)) { + tc =3D map_table[idx].tc; + t0 =3D map_table[idx].min_temp; + vtemp0 =3D map_table[idx].vtemp0; + break; + } + + /* + * Formula to calculate vtemp(mV) from a given temp + * vtemp =3D (temp - minT) * tc + vtemp0 + * tc, t0 and vtemp0 values are mentioned in the map_table array. + */ + vtemp =3D ((temp - t0) * tc + vtemp0 * 100000) / 1000000; + + /* step size is 8mV */ + return abs(vtemp - MBG_TEMP_DEFAULT_TEMP_MV) / MBG_TEMP_STEP_MV; +} + +static int mbg_tm_set_trip_temp(struct thermal_zone_device *tz, int low_te= mp, + int temp) +{ + struct mbg_tm_chip *chip =3D thermal_zone_device_priv(tz); + int ret =3D 0; + + guard(mutex)(&chip->lock); + + /* The HW has a limitation that the trip set must be above 25C */ + if (temp > MBG_MIN_TRIP_TEMP && temp < MBG_MAX_SUPPORTED_TEMP) { + ret =3D regmap_write(chip->map, chip->base + MON2_LVL1_UP_THRESH, + temp_to_vtemp_mv(temp)); + if (ret < 0) + return ret; + + ret =3D regmap_set_bits(chip->map, chip->base + MBG_TEMP_MON2_MISC_CFG, + MON2_UP_THRESH_EN); + if (ret < 0) + return ret; + } else { + dev_err(chip->dev, "Set trip b/w 25C and 160C\n"); + ret =3D regmap_clear_bits(chip->map, chip->base + MBG_TEMP_MON2_MISC_CFG, + MON2_UP_THRESH_EN); + return -ERANGE; + } + + /* + * Configure the last_temp one degree higher, to ensure the + * violated temp is returned to thermal framework when it reads + * temperature for the first time after the violation happens. + * This is needed to account for the inaccuracy in the conversion + * formula used which leads to the thermal framework setting back + * the same thresholds in case the temperature it reads does not + * show violation. + */ + chip->last_temp =3D temp + MBG_TEMP_CONSTANT; + + return ret; +} + +static const struct thermal_zone_device_ops mbg_tm_ops =3D { + .get_temp =3D mbg_tm_get_temp, + .set_trips =3D mbg_tm_set_trip_temp, +}; + +static irqreturn_t mbg_tm_isr(int irq, void *data) +{ + struct mbg_tm_chip *chip =3D data; + int ret, val; + + scoped_guard(mutex, &chip->lock) { + ret =3D regmap_read(chip->map, chip->base + MBG_TEMP_MON2_FAULT_STATUS, = &val); + if (ret < 0) + return IRQ_HANDLED; + if (FIELD_GET(MON_FAULT_STATUS_MASK, val) =3D=3D MON_FAULT_LVL1_UPR) + chip->last_thres_crossed =3D true; + } + + if (FIELD_GET(MON_FAULT_STATUS_MASK, val) =3D=3D MON_FAULT_LVL1_UPR) { + dev_dbg(chip->dev, "Notifying Thermal, fault status=3D%d\n", val); + thermal_zone_device_update(chip->tz_dev, THERMAL_TRIP_VIOLATED); + } else { + dev_dbg(chip->dev, "Lvl1 upper threshold not violated, ignoring interrup= t\n"); + } + + return IRQ_HANDLED; +} + +static int mbg_tm_probe(struct platform_device *pdev) +{ + struct mbg_tm_chip *chip; + struct device_node *node =3D pdev->dev.of_node; + u32 res; + int ret; + + chip =3D devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL); + if (!chip) + return -ENOMEM; + + chip->dev =3D &pdev->dev; + + mutex_init(&chip->lock); + + chip->map =3D dev_get_regmap(pdev->dev.parent, NULL); + if (!chip->map) + return -ENXIO; + + ret =3D device_property_read_u32(chip->dev, "reg", &res); + if (ret < 0) + return dev_err_probe(chip->dev, ret, "Couldn't read reg property\n"); + + chip->base =3D res; + + chip->irq =3D platform_get_irq(pdev, 0); + if (chip->irq < 0) + return dev_err_probe(chip->dev, chip->irq, "Failed to get irq\n"); + + chip->adc =3D devm_iio_channel_get(&pdev->dev, "thermal"); + if (IS_ERR(chip->adc)) + return dev_err_probe(chip->dev, PTR_ERR(chip->adc), "Failed to get adc c= hannel\n"); + + chip->tz_dev =3D devm_thermal_of_zone_register(chip->dev, 0, chip, &mbg_t= m_ops); + if (IS_ERR(chip->tz_dev)) + return dev_err_probe(chip->dev, PTR_ERR(chip->tz_dev), + "Failed to register sensor\n"); + + return devm_request_threaded_irq(&pdev->dev, chip->irq, NULL, mbg_tm_isr,= IRQF_ONESHOT, + node->name, chip); +} + +static const struct of_device_id mbg_tm_match_table[] =3D { + { .compatible =3D "qcom,pm8775-mbg-tm" }, + { } +}; +MODULE_DEVICE_TABLE(of, mbg_tm_match_table); + +static struct platform_driver mbg_tm_driver =3D { + .driver =3D { + .name =3D "qcom-spmi-mbg-tm", + .of_match_table =3D mbg_tm_match_table, + }, + .probe =3D mbg_tm_probe, +}; +module_platform_driver(mbg_tm_driver); + +MODULE_DESCRIPTION("PMIC MBG Temperature monitor driver"); +MODULE_LICENSE("GPL"); --=20 2.34.1