From nobody Fri Jul 24 22:54:58 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 23E60356762; Wed, 22 Jul 2026 13:45:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784727958; cv=none; b=RcRAKqhnl41Dy6EMHj0UE1OE7vjKFqx9gx5/yetfi/HgWKMDuKP4DOT9J8dC9LBCaH/v7Q+kj6MijUZrcheGaCJ/kMvY/feEuPVlMPkJmaPltn035iTvVXkcI4E0Un26wq0Vahi1T456o/yI0jEULzKU9IUJz/rClOcXDQ8+zXA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784727958; c=relaxed/simple; bh=72+93u2x1FJX/Wrk9jq2RGNs2uk35TLneVVzVanyQd8=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Cy47fYFSmjC4XGfwx4nRSm/tbm19aYh4t6jMXT/jSVgiqa5IOudyADw5yApRCTMIeLpTtatjsPXce8H8y8jHWd61ufu+f+4iLAy5nJxtYDiiw53+oZchV7L6e2Kt426uwTBmafSs7iWUTmNMh0uXIr1O8umb/SrZyRUto2OKMeM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=H7UPShWP; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="H7UPShWP" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 378381F000E9; Wed, 22 Jul 2026 13:45:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1784727956; bh=42bI6S7OB18sBS+H73AC5+tOmPTkN6hTu7pc311WTww=; h=From:Date:Subject:References:In-Reply-To:To:Cc; b=H7UPShWPfjwciQQKgtRxBnt5/u3Rx+FGHPO6bxLcC/t3OFi23e3OxOP5UdiZLJ8AR 3xCI0RwAc6Io+juDmHE76DO8AO+F/qR95/FCGexEFng94rDt5fVsGCdp6BTFiFeP76 OqPRNArmRnb5ahRp6GoYGyy9I12QJwYqaYH6tpEi8RPwX0swH0ftv4+ptD4/zg2PkJ 02/ieZA3+Km2axjKUyrIBH8N2wtk3gqhZjNJSxTiPzhhAJm80kJECkn29gIIYaOwSQ MNvxnQfTAKpIECbsGBdL3q0srsTDRXYyfO6+zSnCDqN7Gjqy8UbLKwJv9faTmMV0Nt kK9T3kiPiB6yw== From: Mattijs Korpershoek Date: Wed, 22 Jul 2026 15:45:44 +0200 Subject: [PATCH v3 1/2] dt-bindings: phy: Add sa8255p USB PHY Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260722-phy-qcom-qmp-usb-8255-v3-1-e789070b48f7@kernel.org> References: <20260722-phy-qcom-qmp-usb-8255-v3-0-e789070b48f7@kernel.org> In-Reply-To: <20260722-phy-qcom-qmp-usb-8255-v3-0-e789070b48f7@kernel.org> To: Vinod Koul , Neil Armstrong , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Maxime Ripard , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Mattijs Korpershoek X-Mailer: b4 0.16-dev X-Developer-Signature: v=1; a=openpgp-sha256; l=2094; i=mkorpershoek@kernel.org; h=from:subject:message-id; bh=72+93u2x1FJX/Wrk9jq2RGNs2uk35TLneVVzVanyQd8=; b=kA0DAAoBGQ0dtGZOGTUByyZiAGpgyY+ipwsLK3Uo0/lpxqy9xNmBgqkcqJja+rHzntzS0ksPl okBMwQAAQoAHRYhBC7pQqe2H2q+UxOtABkNHbRmThk1BQJqYMmPAAoJEBkNHbRmThk1VRkIAOYF fKH6MVhvcIRn0U0G6hFmzKVuKqcKtr9KqrQiGrIUVIxFK7gQhSQfma6kGSpi8l6h63H7wCxmNdN iY0mnt+Lu1pLO03bwTZO2vbFGkpWeUDrfPYaenjNCnI9dyUY8vu77W1Em/x3vVwnp65zEh/d5E0 XnSfIp+c7eMZXRTk//iEbEj15NpK4+Iqh1Ix1huUOJXV049Mss4Gx9ygZ54AwY7HS7FdWgXoX5h wYqE7l8Mx6v1Y1b8E2ef11xOrTacRwCzvTleHl+IgbZY5NSuI32/XqrDujt4xEe4fKsJxgEpXn5 sCi4cgwmIa+v5ZORng3tlA/a75VpXybDhqPfrog= X-Developer-Key: i=mkorpershoek@kernel.org; a=openpgp; fpr=8234A35B45C0D26B31C1A2DA570338B018144F28 SA8255p platform abstracts resources such as clocks, interconnect and GPIO pins configuration in Firmware. SCMI power protocol is used to request resource configurations. Two power domains can be requested: transfer and core. transfer controls clocks and interconnects and core controls the GDSC, resets and TLMM (GPIOs) Add a new binding for the for the Qualcomm QMP Super Speed (SS) UNI PHY found in SA8255P. Signed-off-by: Mattijs Korpershoek Reviewed-by: Krzysztof Kozlowski --- .../phy/qcom,sa8255p-qmp-usb3-uni-phy.yaml | 52 ++++++++++++++++++= ++++ 1 file changed, 52 insertions(+) diff --git a/Documentation/devicetree/bindings/phy/qcom,sa8255p-qmp-usb3-un= i-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sa8255p-qmp-usb3-un= i-phy.yaml new file mode 100644 index 000000000000..d274d500fc9c --- /dev/null +++ b/Documentation/devicetree/bindings/phy/qcom,sa8255p-qmp-usb3-uni-phy.y= aml @@ -0,0 +1,52 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/qcom,sa8255p-qmp-usb3-uni-phy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm SA8255p QMP PHY controller + +maintainers: + - Mattijs Korpershoek + +properties: + compatible: + const: qcom,sa8255p-qmp-usb3-uni-phy + + reg: + maxItems: 1 + + "#phy-cells": + const: 0 + + power-domains: + maxItems: 2 + + power-domain-names: + items: + - const: transfer + - const: core + +required: + - compatible + - reg + - "#phy-cells" + - power-domains + - power-domain-names + +unevaluatedProperties: false + +examples: + - | + soc { + #address-cells =3D <2>; + #size-cells =3D <2>; + + phy@88e8000 { + compatible =3D "qcom,sa8255p-qmp-usb3-uni-phy"; + reg =3D <0x0 0x088e8000 0x0 0x2000>; + #phy-cells =3D <0>; + power-domains =3D <&scmi12_pd 2>, <&scmi12_pd 3>; + power-domain-names =3D "transfer", "core"; + }; + }; --=20 2.55.0 From nobody Fri Jul 24 22:54:58 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4B96F35AC07; Wed, 22 Jul 2026 13:45:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784727961; cv=none; b=taRt/Kc0fza6JtBbx0kHhJ61Nzif+NLXIFam/eRPYtNZ9c+Q60CAf6S12N2QD1jULsm5Kjn+WbuIy+fqcyMYJSWXBF7Lk/XU3vVyjHFDqmC6NxPgL7MvciEsOcY4EBL0w4uBGhh6tHRAG9VFTvZ8QSfjE9GdvVCtYRTNOste/7k= ARC-Message-Signature: i=1; a=rsa-sha256; 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b=K4chh4e+iqeOizyiwjvdtV0hJ2Cie2CKFvXSWq2Ddkvz4mCeDO76M1VoiIu5H7bkH cwiiVuCuYEWio35djZQEyXqFUO2gJGi24mRA/+zrAB6PsaEEhIo8m9FWeG58PfQc3x Spo3u3r1QRhzSo5CnvjyVQe9YZU0xDpMRrlqY45Tec10aRitn5C5Ngnz20T83wIDNV 2HMgCmgye6PSkn1iWw1/ODyDUcXraMAuqJDXytlcYF7G33+ELhUMfIOoooWs6wgVjG DR9GDebJxcJ+1lHjWbwldArs4oDp0JeA2zWnNCqw0oFM6ldbDbb86uCZv+E0SsYIgX 5OaxJCaLDgItQ== From: Mattijs Korpershoek Date: Wed, 22 Jul 2026 15:45:45 +0200 Subject: [PATCH v3 2/2] phy: qcom: qmp-usb: Add support for SA8255P Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260722-phy-qcom-qmp-usb-8255-v3-2-e789070b48f7@kernel.org> References: <20260722-phy-qcom-qmp-usb-8255-v3-0-e789070b48f7@kernel.org> In-Reply-To: <20260722-phy-qcom-qmp-usb-8255-v3-0-e789070b48f7@kernel.org> To: Vinod Koul , Neil Armstrong , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Maxime Ripard , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Mattijs Korpershoek , Sriram Dash , Shazad Hussain X-Mailer: b4 0.16-dev X-Developer-Signature: v=1; a=openpgp-sha256; l=9971; i=mkorpershoek@kernel.org; h=from:subject:message-id; bh=ddoeNMHs8AqLo9GJhhAO2kXbmYmXYUOc/9qmjKA8gVI=; b=owEBbQGS/pANAwAKARkNHbRmThk1AcsmYgBqYMmPfOC06naW5u5KKjNSW3i42rHqdwj5HdMDw vJbJiT64MSJATMEAAEKAB0WIQQu6UKnth9qvlMTrQAZDR20Zk4ZNQUCamDJjwAKCRAZDR20Zk4Z NbhaB/9Z29/nHfzBJCk/TjuSGwHeHf6w216iGs/G7aTvmMBgVS9X09mQH6Q/NKPJQuGUJzq0Gw1 6NKA0B1a44ZCdQxFK0gh83q45e00NVSnKSJHXa28doodKtD63i5IUA/FAuW2OFRC4SrOTZaQwJr CDV7OovVPxHKQ95ReKjZN6L7onqrsOYc9QpXrtBmPfv9c6G6LCc9zmcb3nLdvYT4LdHio15aSee 1sM09pxU3zDoHv/daIVQcw+BSjBvjFSM62B3JdJiyv1kDFMltCD3Z+HA3ZnV6OLQbPcKiNnClr2 Rhjr0YIvB0NbIYi04xfcVuDYBroby/a1Qcbtkqpu5XBVCdyC X-Developer-Key: i=mkorpershoek@kernel.org; a=openpgp; fpr=8234A35B45C0D26B31C1A2DA570338B018144F28 From: Sriram Dash The Qualcomm automotive SA8255p SoC relies on firmware to configure platform resources, including clocks, interconnects and TLMM. The driver requests resources operations over SCMI using power protocols. The SCMI power protocol enables or disables resources like clocks, interconnect paths, and TLMM (GPIOs) using runtime PM framework APIs, such as resume/suspend, to control power on/off. Power domain "core" controls the GDSC, resets, and TLMM (GPIOs) whereas power domain "transfer" controls clocks and interconnects. In this variant, two disjoint sets of resources are modeled against the power domain suppliers which can be turned on/off to achieve modeled device states. Two modeled low power states d1 and d3 are supported. transition: d0 <--> d3 :: both core and transfer suppliers transition: d0 <--> d1 :: only transfer supplier Signed-off-by: Sriram Dash Signed-off-by: Shazad Hussain Signed-off-by: Mattijs Korpershoek --- drivers/phy/qualcomm/phy-qcom-qmp-usb.c | 182 ++++++++++++++++++++++++++++= ---- 1 file changed, 160 insertions(+), 22 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-usb.c b/drivers/phy/qualcomm= /phy-qcom-qmp-usb.c index c5507168e135..881f4ce23241 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-usb.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-usb.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include #include @@ -1411,6 +1412,9 @@ struct qmp_phy_cfg { =20 /* Offset from PCS to PCS_USB region */ unsigned int pcs_usb_offset; + + /* true, if the device resources are fw managed */ + bool fw_managed; }; =20 struct qmp_usb { @@ -1437,6 +1441,8 @@ struct qmp_usb { struct phy *phy; =20 struct clk_fixed_rate pipe_clk_fixed; + + struct dev_pm_domain_list *pd_list; }; =20 static inline void qphy_setbits(void __iomem *base, u32 offset, u32 val) @@ -1631,6 +1637,25 @@ static const struct qmp_phy_cfg qdu1000_usb3_uniphy_= cfg =3D { .has_pwrdn_delay =3D true, }; =20 +static const struct qmp_phy_cfg sa8255p_usb3_uniphy_cfg =3D { + .offsets =3D &qmp_usb_offsets_v5, + + .serdes_tbl =3D sc8280xp_usb3_uniphy_serdes_tbl, + .serdes_tbl_num =3D ARRAY_SIZE(sc8280xp_usb3_uniphy_serdes_tbl), + .tx_tbl =3D sc8280xp_usb3_uniphy_tx_tbl, + .tx_tbl_num =3D ARRAY_SIZE(sc8280xp_usb3_uniphy_tx_tbl), + .rx_tbl =3D sc8280xp_usb3_uniphy_rx_tbl, + .rx_tbl_num =3D ARRAY_SIZE(sc8280xp_usb3_uniphy_rx_tbl), + .pcs_tbl =3D sa8775p_usb3_uniphy_pcs_tbl, + .pcs_tbl_num =3D ARRAY_SIZE(sa8775p_usb3_uniphy_pcs_tbl), + .pcs_usb_tbl =3D sa8775p_usb3_uniphy_pcs_usb_tbl, + .pcs_usb_tbl_num =3D ARRAY_SIZE(sa8775p_usb3_uniphy_pcs_usb_tbl), + .vreg_list =3D qmp_phy_vreg_l, + .num_vregs =3D ARRAY_SIZE(qmp_phy_vreg_l), + .regs =3D qmp_v5_usb3phy_regs_layout, + .fw_managed =3D true, +}; + static const struct qmp_phy_cfg sa8775p_usb3_uniphy_cfg =3D { .offsets =3D &qmp_usb_offsets_v5, =20 @@ -1865,6 +1890,77 @@ static const struct qmp_phy_cfg glymur_usb3_uniphy_c= fg =3D { .regs =3D qmp_v7_usb3phy_regs_layout, }; =20 +static int qmp_usb_domain_attach(struct qmp_usb *qmp) +{ + struct dev_pm_domain_attach_data pd_data =3D { + .pd_flags =3D PD_FLAG_NO_DEV_LINK, + .pd_names =3D (const char *[]) { "transfer", "core" }, + .num_pd_names =3D 2, + }; + struct device *dev =3D qmp->dev; + int ret; + + ret =3D dev_pm_domain_attach_list(dev, &pd_data, &qmp->pd_list); + if (ret < 0) + return dev_err_probe(dev, ret, "domain attach failed\n"); + + return 0; +} + +static void qmp_usb_domain_detach(void *data) +{ + struct qmp_usb *qmp =3D data; + + dev_pm_domain_detach_list(qmp->pd_list); +} + +/* d3_to_d0 transition by turning on all the suppliers */ +static int qmp_usb_d3_to_d0(struct qmp_usb *qmp) +{ + int ret; + + if (!qmp->pd_list) + return 0; + + ret =3D pm_runtime_resume_and_get(qmp->pd_list->pd_devs[0]); + if (ret) + return ret; + + ret =3D pm_runtime_resume_and_get(qmp->pd_list->pd_devs[1]); + if (ret) + pm_runtime_put_sync(qmp->pd_list->pd_devs[0]); + + return ret; +} + +/* d0_to_d3 transition by turning off all the suppliers */ +static void qmp_usb_d0_to_d3(struct qmp_usb *qmp) +{ + if (!qmp->pd_list) + return; + + pm_runtime_put_sync(qmp->pd_list->pd_devs[1]); + pm_runtime_put_sync(qmp->pd_list->pd_devs[0]); +} + +/* d1_to_d0 transition by turning on the 'transfer' supplier */ +static int qmp_usb_d1_to_d0(struct qmp_usb *qmp) +{ + if (!qmp->pd_list) + return 0; + + return pm_runtime_resume_and_get(qmp->pd_list->pd_devs[0]); +} + +/* d0_to_d1 transition by turning off the 'transfer' supplier */ +static void qmp_usb_d0_to_d1(struct qmp_usb *qmp) +{ + if (!qmp->pd_list) + return; + + pm_runtime_put_sync(qmp->pd_list->pd_devs[0]); +} + static int qmp_usb_serdes_init(struct qmp_usb *qmp) { const struct qmp_phy_cfg *cfg =3D qmp->cfg; @@ -1884,10 +1980,16 @@ static int qmp_usb_init(struct phy *phy) void __iomem *pcs =3D qmp->pcs; int ret; =20 + ret =3D qmp_usb_d3_to_d0(qmp); + if (ret < 0) { + dev_err(qmp->dev, "Failed to transition to d0 state\n"); + return ret; + } + ret =3D regulator_bulk_enable(cfg->num_vregs, qmp->vregs); if (ret) { dev_err(qmp->dev, "failed to enable regulators, err=3D%d\n", ret); - return ret; + goto err_transition_to_d3; } =20 ret =3D reset_control_bulk_assert(qmp->num_resets, qmp->resets); @@ -1914,6 +2016,8 @@ static int qmp_usb_init(struct phy *phy) reset_control_bulk_assert(qmp->num_resets, qmp->resets); err_disable_regulators: regulator_bulk_disable(cfg->num_vregs, qmp->vregs); +err_transition_to_d3: + qmp_usb_d0_to_d3(qmp); =20 return ret; } @@ -1929,6 +2033,8 @@ static int qmp_usb_exit(struct phy *phy) =20 regulator_bulk_disable(cfg->num_vregs, qmp->vregs); =20 + qmp_usb_d0_to_d3(qmp); + return 0; } =20 @@ -2111,6 +2217,8 @@ static int __maybe_unused qmp_usb_runtime_suspend(str= uct device *dev) clk_disable_unprepare(qmp->pipe_clk); clk_bulk_disable_unprepare(qmp->num_clks, qmp->clks); =20 + qmp_usb_d0_to_d1(qmp); + return 0; } =20 @@ -2126,14 +2234,23 @@ static int __maybe_unused qmp_usb_runtime_resume(st= ruct device *dev) return 0; } =20 + ret =3D qmp_usb_d1_to_d0(qmp); + if (ret < 0) { + dev_err(qmp->dev, "Failed to transition to d0 state\n"); + return ret; + } + ret =3D clk_bulk_prepare_enable(qmp->num_clks, qmp->clks); - if (ret) + if (ret) { + qmp_usb_d0_to_d1(qmp); return ret; + } =20 ret =3D clk_prepare_enable(qmp->pipe_clk); if (ret) { dev_err(dev, "pipe_clk enable failed, err=3D%d\n", ret); clk_bulk_disable_unprepare(qmp->num_clks, qmp->clks); + qmp_usb_d0_to_d1(qmp); return ret; } =20 @@ -2313,10 +2430,12 @@ static int qmp_usb_parse_dt_legacy(struct qmp_usb *= qmp, struct device_node *np) qmp->pcs_misc =3D NULL; } =20 - qmp->pipe_clk =3D devm_get_clk_from_child(dev, np, NULL); - if (IS_ERR(qmp->pipe_clk)) { - return dev_err_probe(dev, PTR_ERR(qmp->pipe_clk), - "failed to get pipe clock\n"); + if (!qmp->cfg->fw_managed) { + qmp->pipe_clk =3D devm_get_clk_from_child(dev, np, NULL); + if (IS_ERR(qmp->pipe_clk)) { + return dev_err_probe(dev, PTR_ERR(qmp->pipe_clk), + "failed to get pipe clock\n"); + } } =20 ret =3D devm_clk_bulk_get_all(qmp->dev, &qmp->clks); @@ -2325,10 +2444,12 @@ static int qmp_usb_parse_dt_legacy(struct qmp_usb *= qmp, struct device_node *np) =20 qmp->num_clks =3D ret; =20 - ret =3D qmp_usb_reset_init(qmp, usb3phy_legacy_reset_l, - ARRAY_SIZE(usb3phy_legacy_reset_l)); - if (ret) - return ret; + if (!qmp->cfg->fw_managed) { + ret =3D qmp_usb_reset_init(qmp, usb3phy_legacy_reset_l, + ARRAY_SIZE(usb3phy_legacy_reset_l)); + if (ret) + return ret; + } =20 return 0; } @@ -2362,17 +2483,19 @@ static int qmp_usb_parse_dt(struct qmp_usb *qmp) if (ret) return ret; =20 - qmp->pipe_clk =3D devm_clk_get(dev, "pipe"); - if (IS_ERR(qmp->pipe_clk)) { - return dev_err_probe(dev, PTR_ERR(qmp->pipe_clk), - "failed to get pipe clock\n"); + if (!qmp->cfg->fw_managed) { + qmp->pipe_clk =3D devm_clk_get(dev, "pipe"); + if (IS_ERR(qmp->pipe_clk)) { + return dev_err_probe(dev, PTR_ERR(qmp->pipe_clk), + "failed to get pipe clock\n"); + } + + ret =3D qmp_usb_reset_init(qmp, usb3phy_reset_l, + ARRAY_SIZE(usb3phy_reset_l)); + if (ret) + return ret; } =20 - ret =3D qmp_usb_reset_init(qmp, usb3phy_reset_l, - ARRAY_SIZE(usb3phy_reset_l)); - if (ret) - return ret; - return 0; } =20 @@ -2395,6 +2518,16 @@ static int qmp_usb_probe(struct platform_device *pde= v) if (!qmp->cfg) return -EINVAL; =20 + if (qmp->cfg->fw_managed) { + ret =3D qmp_usb_domain_attach(qmp); + if (ret) + return ret; + + ret =3D devm_add_action_or_reset(dev, qmp_usb_domain_detach, qmp); + if (ret) + return ret; + } + ret =3D devm_regulator_bulk_get_const(dev, qmp->cfg->num_vregs, qmp->cfg->vreg_list, &qmp->vregs); if (ret) @@ -2421,9 +2554,11 @@ static int qmp_usb_probe(struct platform_device *pde= v) */ pm_runtime_forbid(dev); =20 - ret =3D phy_pipe_clk_register(qmp, np); - if (ret) - goto err_node_put; + if (!qmp->cfg->fw_managed) { + ret =3D phy_pipe_clk_register(qmp, np); + if (ret) + goto err_node_put; + } =20 qmp->phy =3D devm_phy_create(dev, np, &qmp_usb_phy_ops); if (IS_ERR(qmp->phy)) { @@ -2470,6 +2605,9 @@ static const struct of_device_id qmp_usb_of_match_tab= le[] =3D { }, { .compatible =3D "qcom,qdu1000-qmp-usb3-uni-phy", .data =3D &qdu1000_usb3_uniphy_cfg, + }, { + .compatible =3D "qcom,sa8255p-qmp-usb3-uni-phy", + .data =3D &sa8255p_usb3_uniphy_cfg, }, { .compatible =3D "qcom,sa8775p-qmp-usb3-uni-phy", .data =3D &sa8775p_usb3_uniphy_cfg, --=20 2.55.0