From nobody Fri Jul 24 23:30:38 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CBF104C97; Wed, 22 Jul 2026 08:39:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784709576; cv=none; b=YFjPPf9jYER7i0xskvIzw2S7le7Scae6/D2Mfvd4u/A5kc8/PnHiXFKJHhBrnMqq9Yza3sLiGMwh1JURlUkTi7K5231YNFHeMGHcj7LmoKoLME8IQvdyDPTmgc98E0Sw4A2Xv56yzx8ZP6KY1tBJWDcKqyOU4JgMnMAeuibJpUs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784709576; c=relaxed/simple; bh=mT9CPnievwR2Vlu+sM5I4sxsoKNQaEXEI5Zu+SVC4BA=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=JFRXwf7Ghu2/GPx+CGnVTkJon1PR9jn1LThF0FwkZo18prwFNTRqbZwvk5N3JJjtyXvVW5rnrdA6LtJNmVE6JONZJ8C7rqv1hBEU9TXKAOmkmV6lcXVyCpZa39xSmOmHy+8EcIZufxae8Qau6S348+8XoYU6uBetwXkIlDvDdyc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=QIbqLvyA; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="QIbqLvyA" Received: by smtp.kernel.org (Postfix) with ESMTPS id 7C4CEC2BCF7; Wed, 22 Jul 2026 08:39:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1784709576; bh=mT9CPnievwR2Vlu+sM5I4sxsoKNQaEXEI5Zu+SVC4BA=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=QIbqLvyAugBhJcr+NOTz3WNliMKOI3yJyO/dJHVrgo861yG4h89YiONl/vIjZoQ8l pX//tr8/S/5rGGqmMxx4wHYIaQozOoLnQpKT4+R+HKy54pXfYkoRLYr+WGcH/J8MWA terO/ybQtSj6Rg1DJ/Agn7DyU+LOZKZz/LkuKIYkOgyKwSoMJObV/BT3Uwwc2c/5XP GMX/Xr/ycedzkDHPMufBbCOL4GuwntgegLisTnGqjRh7bzLf0m/RslaMiyqpBfFmDr HniSgkK8MUwKOq+cahmlJB5typaelV3q8vvn/RhQRRAmuvVOkY5k6r2G+6qIK4wHNd 9O/ICO0aH5ShQ== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 69107C44539; Wed, 22 Jul 2026 08:39:36 +0000 (UTC) From: Xianwei Zhao via B4 Relay Date: Wed, 22 Jul 2026 08:39:31 +0000 Subject: [PATCH 1/3] dt-bindings: power: Add Amlogic A9 power domains Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260722-a9-pm-v1-1-1fe20a44bf2d@amlogic.com> References: <20260722-a9-pm-v1-0-1fe20a44bf2d@amlogic.com> In-Reply-To: <20260722-a9-pm-v1-0-1fe20a44bf2d@amlogic.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Jianxin Pan , Ulf Hansson Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, Xianwei Zhao X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1784709572; l=3033; i=xianwei.zhao@amlogic.com; s=20251216; h=from:subject:message-id; bh=vpFb6MO7p6AA5kHtUgazEsyrRR4E6EHks7lJJa+cLZ8=; b=9/FHHo814FjLOz0QZGsCYKIUd6uaz9LzMRoMhURLgnw9IdTZWGXSrNkRltgjH38S7Tv9q6wHl xty8DlG0G24Cym43lnpsTeg8qi3ngLKiWaY75sejCxz/epehbUliSB5 X-Developer-Key: i=xianwei.zhao@amlogic.com; a=ed25519; pk=dWwxtWCxC6FHRurOmxEtr34SuBYU+WJowV/ZmRJ7H+k= X-Endpoint-Received: by B4 Relay for xianwei.zhao@amlogic.com/20251216 with auth_id=578 X-Original-From: Xianwei Zhao Reply-To: xianwei.zhao@amlogic.com From: Xianwei Zhao Add devicetree binding document and related header file for Amlogic A9 secure power domains. Signed-off-by: Xianwei Zhao --- .../bindings/power/amlogic,meson-sec-pwrc.yaml | 1 + include/dt-bindings/power/amlogic,a9-pwrc.h | 61 ++++++++++++++++++= ++++ 2 files changed, 62 insertions(+) diff --git a/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc= .yaml b/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml index 12b71688dd34..e608a0c75961 100644 --- a/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml +++ b/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml @@ -22,6 +22,7 @@ properties: - amlogic,meson-s4-pwrc - amlogic,a4-pwrc - amlogic,a5-pwrc + - amlogic,a9-pwrc - amlogic,c3-pwrc - amlogic,t7-pwrc - amlogic,s6-pwrc diff --git a/include/dt-bindings/power/amlogic,a9-pwrc.h b/include/dt-bindi= ngs/power/amlogic,a9-pwrc.h new file mode 100644 index 000000000000..c1c2308a0d0c --- /dev/null +++ b/include/dt-bindings/power/amlogic,a9-pwrc.h @@ -0,0 +1,61 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */ +/* + * Copyright (C) 2026 Amlogic, Inc. All rights reserved + */ + +#ifndef _DT_BINDINGS_AMLOGIC_A9_POWER_H +#define _DT_BINDINGS_AMLOGIC_A9_POWER_H + +#define PWRC_A9_DSPA_ID 0 +#define PWRC_A9_U3HSG_U3_ID 1 +#define PWRC_A9_DP_ID 2 +#define PWRC_A9_DOS_HCODEC_ID 3 +#define PWRC_A9_TAHOE_ID 4 +#define PWRC_A9_DOS_HEVC_ID 5 +#define PWRC_A9_U2H_ID 6 +#define PWRC_A9_U3DRD_B_ID 7 +#define PWRC_A9_VPU_HDMI_ID 8 +#define PWRC_A9_U2DRD_ID 9 +#define PWRC_A9_U3DRD_A_ID 10 +#define PWRC_A9_SD_EMMC_C_ID 11 +#define PWRC_A9_GE2D_ID 12 +#define PWRC_A9_AMFC_ID 13 +#define PWRC_A9_EDPTX_ID 14 +#define PWRC_A9_OPP_ID 15 +#define PWRC_A9_VICP_ID 16 +#define PWRC_A9_SD_EMMC_A_ID 17 +#define PWRC_A9_SD_EMMC_B_ID 18 +#define PWRC_A9_ETH_ID 19 +#define PWRC_A9_PCIE_A_ID 20 +#define PWRC_A9_PCIE_B_ID 21 +#define PWRC_A9_NNA_4T_ID 22 +#define PWRC_A9_HDMIRX_ID 23 +#define PWRC_A9_CVE_ID 24 +#define PWRC_A9_ISP_ID 25 +#define PWRC_A9_ETH_1G_ID 26 +#define PWRC_A9_U3HSG_HSG_ID 27 +#define PWRC_A9_U3DPPHY_U3_ID 28 +#define PWRC_A9_U3DPPHY_DP_ID 29 +#define PWRC_A9_PCIE3PHY_ID 30 +#define PWRC_A9_U3HSG_PCIE2_ID 31 +#define PWRC_A9_MALI_TOP_ID 32 +#define PWRC_A9_AO_SED_ID 33 +#define PWRC_A9_AO_IR_ID 34 +#define PWRC_A9_AO_UART_B_ID 35 +#define PWRC_A9_AO_UART_C_ID 36 +#define PWRC_A9_AO_UART_D_ID 37 +#define PWRC_A9_AO_SPISG_ID 38 +#define PWRC_A9_AO_UART_E_ID 39 +#define PWRC_A9_AO_CEC_ID 40 +#define PWRC_A9_EE_SRAMA_ID 41 +#define PWRC_A9_AUDIO_ID 42 +#define PWRC_A9_DMC0_ID 43 +#define PWRC_A9_GIC_ID 44 +#define PWRC_A9_DDRPHY_ID 45 +#define PWRC_A9_AUCPU_ID 46 +#define PWRC_A9_DSI0_ID 47 +#define PWRC_A9_DSI1_ID 48 +#define PWRC_A9_CAN0_ID 49 +#define PWRC_A9_CAN1_ID 50 + +#endif --=20 2.52.0 From nobody Fri Jul 24 23:30:38 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CC05F368D4D; Wed, 22 Jul 2026 08:39:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784709576; cv=none; b=lgpnuxT6NjHo6jrBHyxRz2hVW7rjsOayvvxwFszEFpRGuhWmZqmLby5mD1giIaOLXxt29Ea0WDI8se6qo0IM9VLlFCJVjwhe4Evizoz3nMU87Dh7Hh5bMhiLOxnBgnMhHIvtV+zLZU5vLpuUMBKD/+2TYZmKEF5vlpNuVIDM5+k= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784709576; c=relaxed/simple; bh=rcQeDo5UoMmhlm0sZIB41JjoS+2snFmUVnAn3/eGTz0=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=g2MTumMJ33BeyPXNomNE2Xtpmp/a0kb06hAxFPtv+StOF2S4j1qICf0WHVztL3e12Ysm3uFotg+zVHzwPrbSkiaM5FXyrLc3NbOyxyq4XoOB3ZZAcfhE802UDpUH60T6KzPueRA++0yy6c0qxGYPYH9G3HcpdYBenXYxBUi91cQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=Gwihkad8; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="Gwihkad8" Received: by smtp.kernel.org (Postfix) with ESMTPS id 941B4C2BCFD; Wed, 22 Jul 2026 08:39:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1784709576; bh=rcQeDo5UoMmhlm0sZIB41JjoS+2snFmUVnAn3/eGTz0=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=Gwihkad8V3uKxA0Tqtj4E6G7FNqhVjguejzl1oIRI+6Vw/T1Bq1vty42OoKjoJ3fd /ZiMYjzJfKuuu+1r48A/9jox+/zGIFg1X9rPkRsXhqmkRQM+TZN3GsR2L8TAy1zh6/ 4mtYk+nIRWzQk4TNcsHiI7LBApYq6cNzkv1NoYYvhe1ovLny1buAcUUa+3l7UHKpeW iHWsS5aPZ4FoFoJ9HeY0HD68bx1EvKnO8vB2W6Umzm8NfX6RF8MdGedRrPIfqmokLU B6ur0qlflskfRWdW23KZRFNwc8LcccP0LntmUVOFj2RWd0DocLMZGES+c64TTwdHCM CRUuSy0DCN3wg== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7F95BC4453A; Wed, 22 Jul 2026 08:39:36 +0000 (UTC) From: Xianwei Zhao via B4 Relay Date: Wed, 22 Jul 2026 08:39:32 +0000 Subject: [PATCH 2/3] pmdomain: amlogic: Add support for A9 power domains controller Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260722-a9-pm-v1-2-1fe20a44bf2d@amlogic.com> References: <20260722-a9-pm-v1-0-1fe20a44bf2d@amlogic.com> In-Reply-To: <20260722-a9-pm-v1-0-1fe20a44bf2d@amlogic.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Jianxin Pan , Ulf Hansson Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, Xianwei Zhao X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1784709572; l=3797; i=xianwei.zhao@amlogic.com; s=20251216; h=from:subject:message-id; bh=aA+XjaI8J4Dk36k0e6tePHR7OYdh6T5F5939mIxU5ck=; b=2XyApDwRB19STwV3fcrFyt6Uej1ZasA9HEWcQrSNgX7BV4hbGtLXf2iYQ9wr8vzRKDFMxbum2 5AHuduN6EErCuFYXumBll49nsmWVSLloPwCVVq0Gp27E1IHfud8X2WD X-Developer-Key: i=xianwei.zhao@amlogic.com; a=ed25519; pk=dWwxtWCxC6FHRurOmxEtr34SuBYU+WJowV/ZmRJ7H+k= X-Endpoint-Received: by B4 Relay for xianwei.zhao@amlogic.com/20251216 with auth_id=578 X-Original-From: Xianwei Zhao Reply-To: xianwei.zhao@amlogic.com From: Xianwei Zhao Add support for the A9 power controller, whose registers are in the secure domain and should be accessed via SMC. Signed-off-by: Xianwei Zhao --- drivers/pmdomain/amlogic/meson-secure-pwrc.c | 69 ++++++++++++++++++++++++= ++++ 1 file changed, 69 insertions(+) diff --git a/drivers/pmdomain/amlogic/meson-secure-pwrc.c b/drivers/pmdomai= n/amlogic/meson-secure-pwrc.c index 1d2f371d2d7f..133549956efa 100644 --- a/drivers/pmdomain/amlogic/meson-secure-pwrc.c +++ b/drivers/pmdomain/amlogic/meson-secure-pwrc.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include #include @@ -175,6 +176,65 @@ static const struct meson_secure_pwrc_domain_desc a5_p= wrc_domains[] =3D { SEC_PD(A5_DSPA, 0), }; =20 +static const struct meson_secure_pwrc_domain_desc a9_pwrc_domains[] =3D { + SEC_PD(A9_DSPA, 0), + SEC_PD(A9_U3HSG_U3, 0), + SEC_PD(A9_DP, 0), + SEC_PD(A9_DOS_HCODEC, 0), + SEC_PD(A9_TAHOE, 0), + SEC_PD(A9_DOS_HEVC, 0), + SEC_PD(A9_U2H, 0), + SEC_PD(A9_U3DRD_B, 0), + SEC_PD(A9_VPU_HDMI, 0), + SEC_PD(A9_U2DRD, 0), + SEC_PD(A9_U3DRD_A, 0), + SEC_PD(A9_SD_EMMC_C, 0), + SEC_PD(A9_GE2D, 0), + SEC_PD(A9_AMFC, 0), + SEC_PD(A9_EDPTX, 0), + SEC_PD(A9_OPP, 0), + SEC_PD(A9_VICP, 0), + SEC_PD(A9_SD_EMMC_A, 0), + SEC_PD(A9_SD_EMMC_B, 0), + SEC_PD(A9_ETH, 0), + SEC_PD(A9_PCIE_A, 0), + SEC_PD(A9_PCIE_B, 0), + SEC_PD(A9_NNA_4T, 0), + SEC_PD(A9_HDMIRX, 0), + SEC_PD(A9_CVE, 0), + SEC_PD(A9_ISP, 0), + SEC_PD(A9_ETH_1G, 0), + SEC_PD(A9_U3HSG_HSG, 0), + SEC_PD(A9_U3DPPHY_U3, 0), + SEC_PD(A9_U3DPPHY_DP, 0), + SEC_PD(A9_PCIE3PHY, 0), + SEC_PD(A9_U3HSG_PCIE2, 0), + SEC_PD(A9_MALI_TOP, 0), + SEC_PD(A9_AO_SED, 0), + SEC_PD(A9_AO_IR, 0), + /* UART_B is for console log, and should be always on */ + SEC_PD(A9_AO_UART_B, GENPD_FLAG_ALWAYS_ON), + SEC_PD(A9_AO_UART_C, 0), + SEC_PD(A9_AO_UART_D, 0), + SEC_PD(A9_AO_SPISG, 0), + SEC_PD(A9_AO_UART_E, 0), + SEC_PD(A9_AO_CEC, 0), + /* SRAMA is used as ATF runtime memory, and should be always on */ + SEC_PD(A9_EE_SRAMA, GENPD_FLAG_ALWAYS_ON), + SEC_PD(A9_AUDIO, 0), + /* DMC0 is for DDR PHY ana/dig and DMC, and should be always on */ + SEC_PD(A9_DMC0, GENPD_FLAG_ALWAYS_ON), + /*GIC needs to be used consistently, and should be always on */ + SEC_PD(A9_GIC, GENPD_FLAG_ALWAYS_ON), + /* DDRPHY is for DDR Work, and should be always on */ + SEC_PD(A9_DDRPHY, GENPD_FLAG_ALWAYS_ON), + SEC_PD(A9_AUCPU, 0), + SEC_PD(A9_DSI0, 0), + SEC_PD(A9_DSI1, 0), + SEC_PD(A9_CAN0, 0), + SEC_PD(A9_CAN1, 0), +}; + static const struct meson_secure_pwrc_domain_desc c3_pwrc_domains[] =3D { SEC_PD(C3_NNA, 0), SEC_PD(C3_AUDIO, 0), @@ -425,6 +485,11 @@ static const struct meson_secure_pwrc_domain_data amlo= gic_secure_a5_pwrc_data =3D .count =3D ARRAY_SIZE(a5_pwrc_domains), }; =20 +static const struct meson_secure_pwrc_domain_data amlogic_secure_a9_pwrc_d= ata =3D { + .domains =3D a9_pwrc_domains, + .count =3D ARRAY_SIZE(a9_pwrc_domains), +}; + static const struct meson_secure_pwrc_domain_data amlogic_secure_c3_pwrc_d= ata =3D { .domains =3D c3_pwrc_domains, .count =3D ARRAY_SIZE(c3_pwrc_domains), @@ -468,6 +533,10 @@ static const struct of_device_id meson_secure_pwrc_mat= ch_table[] =3D { .compatible =3D "amlogic,a5-pwrc", .data =3D &amlogic_secure_a5_pwrc_data, }, + { + .compatible =3D "amlogic,a9-pwrc", + .data =3D &amlogic_secure_a9_pwrc_data, + }, { .compatible =3D "amlogic,c3-pwrc", .data =3D &amlogic_secure_c3_pwrc_data, --=20 2.52.0 From nobody Fri Jul 24 23:30:38 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DB53836F8FE; Wed, 22 Jul 2026 08:39:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784709576; cv=none; b=Ynq0IAt2oqDg+YO4CxtlKYWnclk1QZL/TdBlSpGLhcEm6r1+NpUkxzoSzlfqO4C3Ooe6JeeTEdRbZV0N1rSJ6EfjpohQ406a0iI3P9WkzgCOZe9ZmXxirQFK49EsG1VQhabprMUyZcNU5DS+nK5F6Sw6SfIs5D15FUE8TyxE42U= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784709576; c=relaxed/simple; bh=/CtfcRiNZmIDjw0LmLMal82IJMGbUeAVONk2Kky6N14=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=nqhhUm9kpDJoWrtQt6h0mis7BAyXGBunu6GBXXY5nLQO9bi8ugho9FTTm/o0oQc6DdprruKtz2n+i7K4wNUJarnjTbV5+pFZA0VrDQzSYsC0B/fbq+ZHR8Lac1E+1QMUWnBAxhyS2hbYO3sPmbr6Cj+40qTwIu2HCmYYlnBaLLI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=oNHdOlra; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="oNHdOlra" Received: by smtp.kernel.org (Postfix) with ESMTPS id A69C0C2BD00; Wed, 22 Jul 2026 08:39:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1784709576; bh=/CtfcRiNZmIDjw0LmLMal82IJMGbUeAVONk2Kky6N14=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=oNHdOlraHo+Y14/Ovs6YzBJBV36uW+MUta/e+nK4VatrdD1OCMINZDd6AsESFUjW4 R+lrppCBOUs2iXb0NLZWzyFhD+emjmGeAgN9vbA/fMCiAzjW62BegG+fQKW2p8pdWE gEQqCzG+e7BvVjhpWbAXExzzyWT7Cg+UPF8CqgzrFtFq3iH5f7e2/fJ9vZEM+LdLzQ o7c1/FtRL9j3Ww5Z+WYF87rGro3tXesyn0+DoobiNzixatFX81XrfAbT7v8KA+MvEl fLsLG28Rv3ZYj0R5cqXPUGPX2kvF/iBm8DyKC2D3SuMUbcFxTgmTUesm8JjbcoxfXj kyg50pSITti6g== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9299FC44533; Wed, 22 Jul 2026 08:39:36 +0000 (UTC) From: Xianwei Zhao via B4 Relay Date: Wed, 22 Jul 2026 08:39:33 +0000 Subject: [PATCH 3/3] arm64: dts: amlogic: a9: Add power domain controller node Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260722-a9-pm-v1-3-1fe20a44bf2d@amlogic.com> References: <20260722-a9-pm-v1-0-1fe20a44bf2d@amlogic.com> In-Reply-To: <20260722-a9-pm-v1-0-1fe20a44bf2d@amlogic.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Jianxin Pan , Ulf Hansson Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, Xianwei Zhao X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1784709572; l=1059; i=xianwei.zhao@amlogic.com; s=20251216; h=from:subject:message-id; bh=xo1Aubxoy/JqFSkmWDscfP/W3QukIsgCeqLnk3l3H2c=; b=8m2xj7Wdhudv3R9CMZS9z6M+V7M9mHlKRD7/9v7ugrfgIHOsm2Z43TnkReKOjQANfg6+hGJW7 CJVRk7lvnCpBLpygK1jOTD3xy+wTNafcwO0b2uGVTJhA5kLx7f2QAbf X-Developer-Key: i=xianwei.zhao@amlogic.com; a=ed25519; pk=dWwxtWCxC6FHRurOmxEtr34SuBYU+WJowV/ZmRJ7H+k= X-Endpoint-Received: by B4 Relay for xianwei.zhao@amlogic.com/20251216 with auth_id=578 X-Original-From: Xianwei Zhao Reply-To: xianwei.zhao@amlogic.com From: Xianwei Zhao Add power domain controller node for Amlogic A9 SoC. Signed-off-by: Xianwei Zhao --- arch/arm64/boot/dts/amlogic/amlogic-a9.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a9.dtsi b/arch/arm64/boot/= dts/amlogic/amlogic-a9.dtsi index b0e0fadeed82..3652b2034c96 100644 --- a/arch/arm64/boot/dts/amlogic/amlogic-a9.dtsi +++ b/arch/arm64/boot/dts/amlogic/amlogic-a9.dtsi @@ -7,6 +7,7 @@ #include #include #include +#include =20 / { interrupt-parent =3D <&gic>; @@ -72,6 +73,15 @@ cpu7: cpu@700 { }; }; =20 + sm: secure-monitor { + compatible =3D "amlogic,meson-gxbb-sm"; + + pwrc: power-controller { + compatible =3D "amlogic,a9-pwrc"; + #power-domain-cells =3D <1>; + }; + }; + timer { compatible =3D "arm,armv8-timer"; interrupts =3D , --=20 2.52.0