From nobody Fri Jul 24 22:54:57 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 410A53BE15E; Wed, 22 Jul 2026 12:06:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784722000; cv=none; b=tvoek7YS/BqoYNaOqxyXPyfEBVDRh2KUKdtL6bXTP2F0fb/nMYVf80Wi8vp7LGdLdbQRpIMJhodGZAmUW2ddedPrVoC533ZvBE7yaSVYgOMlVGbhFOEAfrRfIO7C9bfTz0qDOg9KiFTkdWzzH6A3S6oBwR9qwHNj4s9LpcHijWI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784722000; c=relaxed/simple; bh=EV7iUo1NsjFqcITJtzVqmOKRWQ1ecKxaV381yInG0ho=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=W0xnJbuFbxGUk4caQB2xaup1BJZdO4deb3Y7QRliKof817EYwsxsQwUJO4Cq6O8crIZhFVFa7pxbUB2qbLjIeS9FR5bzEP/VEpKASYfb5NOtyBBDcLiBl8ffP0B8JXqJ4goOpUw8pbcAkEq/WFM6q7ROY20v6yEvmn39nWz4Xdc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=MLYKae0g; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="MLYKae0g" Received: by smtp.kernel.org (Postfix) with ESMTPS id A4D1AC2BCF7; Wed, 22 Jul 2026 12:06:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1784721999; bh=EV7iUo1NsjFqcITJtzVqmOKRWQ1ecKxaV381yInG0ho=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=MLYKae0gbn41J1tpBcuBS/2UgCEr41iJtNM6OmW89vncfAwHVeIQgwKfeAOKC+9m3 PKHMqhS+xgZHtwR94Mfs3Jy3oyE2f3HVmfpRQZTAJYQqJD2+HPh50u1HytK95/NXov V2EcJB5A6eaJwQvLqkU7YsZ/xP19OjE4LNethZ3CC8Lia0Uh1ZsMss8lW9bfnrCQjt F7JkwFgTeciqezJZWs4mHFai3kpxLMdQ1PS0NqB8U8JKvPxqkWkJiL6vXDK8fhHjty JnJyL5bHrEBph92BXhjrM+IYbgVnNlfe8lMR8s9uS7jc6xd5PXPwJwKN5i41d0nz6z dy6rHMmAR6weQ== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7CD07C44539; Wed, 22 Jul 2026 12:06:39 +0000 (UTC) From: Congcong Yao via B4 Relay Date: Wed, 22 Jul 2026 20:02:43 +0800 Subject: [PATCH RESEND v3 1/2] memory: mtk-smi: Add mt8189 support Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260722-8189-smi-support-v3-1-ae00e13deeac@mediatek.com> References: <20260722-8189-smi-support-v3-0-ae00e13deeac@mediatek.com> In-Reply-To: <20260722-8189-smi-support-v3-0-ae00e13deeac@mediatek.com> To: Yong Wu , Krzysztof Kozlowski , Matthias Brugger , AngeloGioacchino Del Regno , Rob Herring , Conor Dooley Cc: linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, Congcong Yao X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1784721998; l=4625; i=congcong.yao@mediatek.com; s=20260722; h=from:subject:message-id; bh=wS9TOb8YOqNWavcXHnJhOL4NUnuoZhgp5xywhpZ31s8=; b=sFw1dk4MQy2CKlXqRSPoXj/ipWDTcHCmoR+jOwY8ky3tpbibXHWZppsoDKStE00rAtDoEpSuY L3EauqdW7ChAbg1hVJ3FX5WXeeInWaZuCp7Z6qMqTz2q6uVOc1D6/Sq X-Developer-Key: i=congcong.yao@mediatek.com; a=ed25519; pk=tIrmGxKQQxnfyb48iCCd19063tppPj89U3nupGYAIxg= X-Endpoint-Received: by B4 Relay for congcong.yao@mediatek.com/20260722 with auth_id=889 X-Original-From: Congcong Yao Reply-To: congcong.yao@mediatek.com From: Congcong Yao Add the necessary platform data and ostdl setting to enable support for mt8189 smi. Signed-off-by: Congcong Yao Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Yong Wu --- drivers/memory/mtk-smi.c | 44 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 44 insertions(+) diff --git a/drivers/memory/mtk-smi.c b/drivers/memory/mtk-smi.c index aaeba8ab211e..f2d5462af681 100644 --- a/drivers/memory/mtk-smi.c +++ b/drivers/memory/mtk-smi.c @@ -401,6 +401,30 @@ static const u8 mtk_smi_larb_mt8188_ostd[][SMI_LARB_PO= RT_NR_MAX] =3D { [25] =3D {0x01}, }; =20 +static const u8 mtk_smi_larb_mt8189_ostd[][SMI_LARB_PORT_NR_MAX] =3D { + [0] =3D {0x8, 0x20, 0x20, 0x20, 0x20, 0x20, 0x10, 0x0,}, + [1] =3D {0x8, 0x20, 0x20, 0x20, 0x20, 0x20, 0x10, 0x0,}, + [2] =3D {0x7, 0x7, 0x4, 0x4, 0x0, 0x0, 0x2, 0x2, 0x7, 0x7, 0x0,}, + [4] =3D {0x2F, 0x1E, 0x9, 0x1, 0x1, 0x1, 0x1, 0x2, 0x2, 0x5, 0x1, 0x17,}, + [7] =3D {0x20, 0x2, 0x1, 0x1, 0x1, 0x4, 0x2, 0x1, 0x1, 0x2, 0x3, 0x2, + 0xA, 0xF, 0x4, 0x6, 0x5, 0x1,}, + [9] =3D {0x6, 0x3, 0xC, 0x6, 0x1, 0x4, 0x3, 0x1, 0x2, 0x4, 0x5, 0x2, + 0x4, 0x2, 0x3, 0xB, 0x1, 0x4, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, + 0x1, 0x1,}, + [11] =3D {0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, + 0x1, 0x1, 0x1, 0xB, 0x1, 0x4, 0x6, 0x5, 0x6, 0x1, 0x5, 0x2, + 0x9, 0x5,}, + [13] =3D {0x2, 0x8, 0x8, 0x8, 0x4, 0x4, 0x4, 0x4, 0x4, 0xE, 0x4, 0x1, + 0x6, 0x6, 0x2,}, + [14] =3D {0x1, 0x1, 0x1, 0x20, 0xE, 0x4, 0x8, 0x8, 0x6, 0x4,}, + [16] =3D {0x1E, 0xC, 0x2, 0x8, 0xE, 0x2, 0x1E, 0x10, 0x4, 0x2, 0x2, 0x2, + 0x2, 0x2, 0x4, 0x2, 0x4,}, + [17] =3D {0x1E, 0xC, 0x2, 0x8, 0xE, 0x2, 0x1E, 0x10, 0x4, 0x2, 0x2, 0x2, + 0x2, 0x2, 0x4, 0x2, 0x4,}, + [19] =3D {0x2, 0x1, 0x3, 0x1,}, + [20] =3D {0x7, 0x7, 0x3, 0x3, 0x1, 0x1,}, +}; + static const u8 mtk_smi_larb_mt8192_ostd[][SMI_LARB_PORT_NR_MAX] =3D { [0] =3D {0x2, 0x2, 0x28, 0xa, 0xc, 0x28,}, [1] =3D {0x2, 0x2, 0x18, 0x18, 0x18, 0xa, 0xc, 0x28,}, @@ -533,6 +557,13 @@ static const struct mtk_smi_larb_gen mtk_smi_larb_mt81= 88 =3D { .ostd =3D mtk_smi_larb_mt8188_ostd, }; =20 +static const struct mtk_smi_larb_gen mtk_smi_larb_mt8189 =3D { + .config_port =3D mtk_smi_larb_config_port_gen2_general, + .flags_general =3D MTK_SMI_FLAG_THRT_UPDATE | MTK_SMI_FLAG_SW= _FLAG | + MTK_SMI_FLAG_SLEEP_CTL | MTK_SMI_FLAG_CFG_PORT_SEC_CTL, + .ostd =3D mtk_smi_larb_mt8189_ostd, +}; + static const struct mtk_smi_larb_gen mtk_smi_larb_mt8192 =3D { .config_port =3D mtk_smi_larb_config_port_gen2_general, .ostd =3D mtk_smi_larb_mt8192_ostd, @@ -556,6 +587,7 @@ static const struct of_device_id mtk_smi_larb_of_ids[] = =3D { {.compatible =3D "mediatek,mt8183-smi-larb", .data =3D &mtk_smi_larb_mt81= 83}, {.compatible =3D "mediatek,mt8186-smi-larb", .data =3D &mtk_smi_larb_mt81= 86}, {.compatible =3D "mediatek,mt8188-smi-larb", .data =3D &mtk_smi_larb_mt81= 88}, + {.compatible =3D "mediatek,mt8189-smi-larb", .data =3D &mtk_smi_larb_mt81= 89}, {.compatible =3D "mediatek,mt8192-smi-larb", .data =3D &mtk_smi_larb_mt81= 92}, {.compatible =3D "mediatek,mt8195-smi-larb", .data =3D &mtk_smi_larb_mt81= 95}, {} @@ -808,6 +840,16 @@ static const struct mtk_smi_common_plat mtk_smi_common= _mt8188_vpp =3D { .init =3D mtk_smi_common_mt8195_init, }; =20 +static const struct mtk_smi_common_plat mtk_smi_common_mt8189 =3D { + .type =3D MTK_SMI_GEN2, + .bus_sel =3D F_MMU1_LARB(1) | F_MMU1_LARB(3) | F_MMU1_LARB(5) | + F_MMU1_LARB(7), +}; + +static const struct mtk_smi_common_plat mtk_smi_sub_common_mt8189 =3D { + .type =3D MTK_SMI_GEN2_SUB_COMM, +}; + static const struct mtk_smi_common_plat mtk_smi_common_mt8192 =3D { .type =3D MTK_SMI_GEN2, .has_gals =3D true, @@ -852,6 +894,8 @@ static const struct of_device_id mtk_smi_common_of_ids[= ] =3D { {.compatible =3D "mediatek,mt8186-smi-common", .data =3D &mtk_smi_common_= mt8186}, {.compatible =3D "mediatek,mt8188-smi-common-vdo", .data =3D &mtk_smi_com= mon_mt8188_vdo}, {.compatible =3D "mediatek,mt8188-smi-common-vpp", .data =3D &mtk_smi_com= mon_mt8188_vpp}, + {.compatible =3D "mediatek,mt8189-smi-common", .data =3D &mtk_smi_common_= mt8189}, + {.compatible =3D "mediatek,mt8189-smi-sub-common", .data =3D &mtk_smi_sub= _common_mt8189}, {.compatible =3D "mediatek,mt8192-smi-common", .data =3D &mtk_smi_common_= mt8192}, {.compatible =3D "mediatek,mt8195-smi-common-vdo", .data =3D &mtk_smi_com= mon_mt8195_vdo}, {.compatible =3D "mediatek,mt8195-smi-common-vpp", .data =3D &mtk_smi_com= mon_mt8195_vpp}, --=20 2.43.0 From nobody Fri Jul 24 22:54:57 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 43F193DD516; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260722-8189-smi-support-v3-2-ae00e13deeac@mediatek.com> References: <20260722-8189-smi-support-v3-0-ae00e13deeac@mediatek.com> In-Reply-To: <20260722-8189-smi-support-v3-0-ae00e13deeac@mediatek.com> To: Yong Wu , Krzysztof Kozlowski , Matthias Brugger , AngeloGioacchino Del Regno , Rob Herring , Conor Dooley Cc: linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, Congcong Yao X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1784721998; l=3542; i=congcong.yao@mediatek.com; s=20260722; h=from:subject:message-id; bh=RfjGr9dS2BPv3kvuxEnkhOj9VPQPmNK7ihihb5BjbNg=; b=x7NGCgN8LrMDzFJIcNKrh88tbvs0GYx28y6/vxkixXR05ogRN+A7oci4VPiC3GFlg+a+seXF8 +y+oAy+j07eDHhwUFa1zRyv66ykiEJeHKFwqja9ZJW0aVZnINSni1+s X-Developer-Key: i=congcong.yao@mediatek.com; a=ed25519; pk=tIrmGxKQQxnfyb48iCCd19063tppPj89U3nupGYAIxg= X-Endpoint-Received: by B4 Relay for congcong.yao@mediatek.com/20260722 with auth_id=889 X-Original-From: Congcong Yao Reply-To: congcong.yao@mediatek.com From: Congcong Yao Add smi larb, common and sub-commom binding description for mt8189. About what smi-sub-common is, please check the below diagram, we add it in mediatek,smi-common.yaml file. Signed-off-by: Congcong Yao Reviewed-by: AngeloGioacchino Del Regno --- .../memory-controllers/mediatek,smi-common.yaml | 18 ++++++++++++++= ++++ .../bindings/memory-controllers/mediatek,smi-larb.yaml | 3 +++ 2 files changed, 21 insertions(+) diff --git a/Documentation/devicetree/bindings/memory-controllers/mediatek,= smi-common.yaml b/Documentation/devicetree/bindings/memory-controllers/medi= atek,smi-common.yaml index 0762e0ff66ef..4e1deeff92b1 100644 --- a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-com= mon.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-com= mon.yaml @@ -25,6 +25,21 @@ description: | SMI generation 1 to transform the smi clock into emi clock domain, but t= hat is not needed for SMI generation 2. =20 + The smi-common connects with smi-larb and IOMMU. The maximum inputs numb= er of + a smi-common is 8. In SMI generation 2, the engines number may be over 8. + In this case, we use a smi-sub-common to merge some larbs. + The block diagram something is like: + + IOMMU + | | + smi-common + --------------------------- + | | ... + larb0 sub-common ... <-max number is 8 + ---------------- + | | ... + larb1 larbX ... <-max number is 8 + properties: compatible: oneOf: @@ -40,6 +55,8 @@ properties: - mediatek,mt8186-smi-common - mediatek,mt8188-smi-common-vdo - mediatek,mt8188-smi-common-vpp + - mediatek,mt8189-smi-common + - mediatek,mt8189-smi-sub-common - mediatek,mt8192-smi-common - mediatek,mt8195-smi-common-vdo - mediatek,mt8195-smi-common-vpp @@ -108,6 +125,7 @@ allOf: compatible: contains: enum: + - mediatek,mt8189-smi-sub-common - mediatek,mt8195-smi-sub-common then: required: diff --git a/Documentation/devicetree/bindings/memory-controllers/mediatek,= smi-larb.yaml b/Documentation/devicetree/bindings/memory-controllers/mediat= ek,smi-larb.yaml index 2e7fac4b5094..9a5dafd7c07e 100644 --- a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-lar= b.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-lar= b.yaml @@ -27,6 +27,7 @@ properties: - mediatek,mt8183-smi-larb - mediatek,mt8186-smi-larb - mediatek,mt8188-smi-larb + - mediatek,mt8189-smi-larb - mediatek,mt8192-smi-larb - mediatek,mt8195-smi-larb =20 @@ -85,6 +86,7 @@ allOf: - mediatek,mt8183-smi-larb - mediatek,mt8186-smi-larb - mediatek,mt8188-smi-larb + - mediatek,mt8189-smi-larb - mediatek,mt8195-smi-larb =20 then: @@ -119,6 +121,7 @@ allOf: - mediatek,mt6779-smi-larb - mediatek,mt8186-smi-larb - mediatek,mt8188-smi-larb + - mediatek,mt8189-smi-larb - mediatek,mt8192-smi-larb - mediatek,mt8195-smi-larb =20 --=20 2.43.0