From nobody Sat Jul 25 01:25:38 2026 Received: from canpmsgout01.his.huawei.com (canpmsgout01.his.huawei.com [113.46.200.216]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A330744470D for ; Tue, 21 Jul 2026 08:19:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=113.46.200.216 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784621951; cv=none; b=StjmBMuo0S9eps/7Jaa2lZVOuyQd1H9RVgwyOIO3RXL7JVMTF1+rCDoziKbONzr3wCJTAsJbw+EL9LZh9Cr+wWP+tBmJjifNVzjcFatiIimrpeS3bfLMgzRRj2LN20A1Z3KW8Apn7XndWXoImG7i3q/mJIv9fIWyYB9e7wNInkQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784621951; c=relaxed/simple; bh=1bUALc+wNzm/jFko/O9FK+b72+zjJ61Wjo1tXNFllZk=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=q+L1nsUUYIZ9s/PWpsecpqQo74uRoKApYLVFe83uRQWULOcmLGev6MBqSKdMB+yJGvDZgVOWR5C3b5PexHnkBq78/+W1VTpPVeKiuHv2xgef3evvvjYThvrNta6+Ycej0oApc8EJJmSVSHwHE63EbTHYi21hzMYau4Kmld6k3p0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com; spf=pass smtp.mailfrom=huawei.com; dkim=pass (1024-bit key) header.d=huawei.com header.i=@huawei.com header.b=o4GJv8CT; arc=none smtp.client-ip=113.46.200.216 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=huawei.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=huawei.com header.i=@huawei.com header.b="o4GJv8CT" dkim-signature: v=1; a=rsa-sha256; d=huawei.com; s=dkim; c=relaxed/relaxed; q=dns/txt; h=From; bh=xx5QBUbkJeO+8NVxlyHI+T4QL5u8nrlJRITGeX3ec8o=; b=o4GJv8CTuCkLCE/j6tEGY10AJB1WOLGMRhWicgEaJv7E4qP71sNqT9M7Idp7u1RGqmI9YUjW4 d4bMEpp5WtmARIV8xRGQTcvBfUhqdV5XtsbZS4aRqVchfqLBPSeW8j/MSHvHQ6NPwbZiHtGbimv F/YY0VViUNfs7sVuwLpJqBY= Received: from mail.maildlp.com (unknown [172.19.162.140]) by canpmsgout01.his.huawei.com (SkyGuard) with ESMTPS id 4h495v45Zfz1T4Km; Tue, 21 Jul 2026 16:09:39 +0800 (CST) Received: from dggpemf500011.china.huawei.com (unknown [7.185.36.131]) by mail.maildlp.com (Postfix) with ESMTPS id A5CD9203D1; Tue, 21 Jul 2026 16:18:58 +0800 (CST) Received: from huawei.com (10.90.53.73) by dggpemf500011.china.huawei.com (7.185.36.131) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.11; Tue, 21 Jul 2026 16:18:57 +0800 From: Jinjie Ruan To: , , , , , , , , , , , , , , , , , , , , , , CC: Subject: [PATCH v17 01/15] arm64: ptrace: Skip syscall exit reporting for PTRACE_SYSEMU_SINGLESTEP Date: Tue, 21 Jul 2026 16:18:44 +0800 Message-ID: <20260721081858.1169276-2-ruanjinjie@huawei.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260721081858.1169276-1-ruanjinjie@huawei.com> References: <20260721081858.1169276-1-ruanjinjie@huawei.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: kwepems500001.china.huawei.com (7.221.188.70) To dggpemf500011.china.huawei.com (7.185.36.131) Content-Type: text/plain; charset="utf-8" According to the ptrace man page (Syscall-stops section): "If the tracee was restarted by PTRACE_SYSCALL or PTRACE_SYSEMU, the tracee enters syscall-enter-stop just prior to entering any system call (which will not be executed if the restart was using PTRACE_SYSEMU, regardless of any change made to registers at this point or how the tracee is restarted after this stop). ... If the tracee is continued using any other method (including PTRACE_SYSEMU), no syscall-exit-stop occurs. Note that all mentions PTRACE_SYSEMU apply equally to PTRACE_SYSEMU_SINGLESTEP." When a tracer uses PTRACE_SYSEMU_SINGLESTEP, both _TIF_SYSCALL_EMU and _TIF_SINGLESTEP are set. Currently, arm64 unconditionally reports a syscall exit stop whenever _TIF_SINGLESTEP is set, regardless of the emulation state. This deviates from the documented behavior and breaks consistency with x86, where PTRACE_SYSEMU_SINGLESTEP does not trigger a redundant exit stop. [Changes] - Introduce report_single_step(): Returns false when _TIF_SYSCALL_EMU is set, ensuring emulated syscalls do not trigger a duplicate report. - Update syscall_exit_work(): Use the new helper instead of directly checking _TIF_SINGLESTEP. [Impact] - PTRACE_SINGLESTEP: Continues to report exit stops for actual instructions. - PTRACE_SYSEMU: Continues to skip exit stops. - PTRACE_SYSEMU_SINGLESTEP: Now correctly skips the redundant exit stop, aligning arm64 with documentation and the generic entry infrastructure. Cc: Mark Rutland Cc: Will Deacon Cc: Catalin Marinas Fixes: ac2081cdc4d9 ("arm64: ptrace: Consistently use pseudo-singlestep exc= eptions") Reviewed-by: Ada Couprie Diaz Reviewed-by: Linus Walleij Reviewed-by: Yeoreum Yun Signed-off-by: Jinjie Ruan --- arch/arm64/kernel/ptrace.c | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/arch/arm64/kernel/ptrace.c b/arch/arm64/kernel/ptrace.c index 924805e0c8da..4e9c71d477a5 100644 --- a/arch/arm64/kernel/ptrace.c +++ b/arch/arm64/kernel/ptrace.c @@ -2482,16 +2482,26 @@ int syscall_trace_enter(struct pt_regs *regs) return regs->syscallno; } =20 +static inline bool report_single_step(unsigned long flags) +{ + if (flags & _TIF_SYSCALL_EMU) + return false; + + return flags & _TIF_SINGLESTEP; +} + void syscall_trace_exit(struct pt_regs *regs) { unsigned long flags =3D read_thread_flags(); + bool step; =20 audit_syscall_exit(regs); =20 if (flags & _TIF_SYSCALL_TRACEPOINT) trace_sys_exit(regs, syscall_get_return_value(current, regs)); =20 - if (flags & (_TIF_SYSCALL_TRACE | _TIF_SINGLESTEP)) + step =3D report_single_step(flags); + if (step || flags & _TIF_SYSCALL_TRACE) report_syscall_exit(regs); =20 rseq_syscall(regs); --=20 2.34.1 From nobody Sat Jul 25 01:25:38 2026 Received: from canpmsgout08.his.huawei.com (canpmsgout08.his.huawei.com [113.46.200.223]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 916E63BA236 for ; Tue, 21 Jul 2026 08:19:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=113.46.200.223 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784621952; cv=none; b=RNNVt+zFPJFovfZwJigAO6bL/sG4ryDxjr28Y14+FNNcHowDpAOQ5rKG4l8LCLRGT/FrXFBayffx6/oz2X+11qbqpOf0v78WUFDWY8fntrfns1Wmw91u01akUJrWP/wIuFsMxLWXOz/osZcMOxz6ObtrKIf1mc5CGruYAp/t68A= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784621952; c=relaxed/simple; bh=P/Pavkcfji53cLrkH6oW2iDJnydAk6BWgVYjxZM+z8g=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=jDRJDdF5uVrxac1Ax5CN2DPshkuJQlxqoNXcPR8DY4u1F0XTD7gnKBE7sueq1ZuaiuJ1NP3p5RMf7LIeU7VsI+MPDTgEXyVkA+aVULDwAPEUqb9SUCAsvBSfBgo16zdCRRaV0yw+A4PFdWXQxuWibxaTDRhL8TVfghZam4JQJzE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com; spf=pass smtp.mailfrom=huawei.com; dkim=pass (1024-bit key) header.d=huawei.com header.i=@huawei.com header.b=DfcVeem5; arc=none smtp.client-ip=113.46.200.223 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=huawei.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=huawei.com header.i=@huawei.com header.b="DfcVeem5" dkim-signature: v=1; a=rsa-sha256; d=huawei.com; s=dkim; c=relaxed/relaxed; q=dns/txt; h=From; bh=0r5CS7SV39qqjCqco+74BzMJY0RngzF2mSdulT8Fpkg=; b=DfcVeem5+MnKlRuGOQh0Z6ny7kYUzfefpf5ZOBU3CfGlCJZ0AxstCUsHQZJbV73yA05ZICib/ ISf0PPuy0M1l7OXYVL7FIyLpyHEulh1lFtRuB6y/pMtnmf6QBA5viSVHGEO24gQGsOPZjP74QQe XQ0ewthC8PLuN6j6lIJSpss= Received: from mail.maildlp.com (unknown [172.19.163.214]) by canpmsgout08.his.huawei.com (SkyGuard) with ESMTPS id 4h495s57ZGzmV91; Tue, 21 Jul 2026 16:09:37 +0800 (CST) Received: from dggpemf500011.china.huawei.com (unknown [7.185.36.131]) by mail.maildlp.com (Postfix) with ESMTPS id E67F74057C; Tue, 21 Jul 2026 16:18:59 +0800 (CST) Received: from huawei.com (10.90.53.73) by dggpemf500011.china.huawei.com (7.185.36.131) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.11; Tue, 21 Jul 2026 16:18:58 +0800 From: Jinjie Ruan To: , , , , , , , , , , , , , , , , , , , , , , CC: Subject: [PATCH v17 02/15] arm64: ptrace: Rework audit_syscall_entry() Date: Tue, 21 Jul 2026 16:18:45 +0800 Message-ID: <20260721081858.1169276-3-ruanjinjie@huawei.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260721081858.1169276-1-ruanjinjie@huawei.com> References: <20260721081858.1169276-1-ruanjinjie@huawei.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: kwepems500001.china.huawei.com (7.221.188.70) To dggpemf500011.china.huawei.com (7.185.36.131) Content-Type: text/plain; charset="utf-8" Extract syscall_enter_audit() helper and switch to generic helpers to get syscall number and syscall arguments, matching the generic entry implementation. The new code: - Checks audit_context() first to avoid unnecessary work when audit is not active. - Use syscall_get_arguments() helper instead of directly accessing regs fields. - Use syscall_get_nr() helper to get syscall number instead of directly accessing regs->syscallno. - Now exactly equivalent to generic entry's syscall_enter_audit(). This is a preparation step for converting arm64 to the generic entry infrastructure. No functional changes intended. Cc: Mark Rutland Cc: Will Deacon Cc: Catalin Marinas Reviewed-by: Ada Couprie Diaz Reviewed-by: Linus Walleij Reviewed-by: Yeoreum Yun Reviewed-by: Kevin Brodsky Signed-off-by: Jinjie Ruan --- arch/arm64/kernel/ptrace.c | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/arch/arm64/kernel/ptrace.c b/arch/arm64/kernel/ptrace.c index 4e9c71d477a5..643e63a65734 100644 --- a/arch/arm64/kernel/ptrace.c +++ b/arch/arm64/kernel/ptrace.c @@ -2458,6 +2458,17 @@ static void report_syscall_exit(struct pt_regs *regs) } } =20 +#ifdef CONFIG_AUDITSYSCALL +static inline void syscall_enter_audit(struct pt_regs *regs) +{ + long syscall =3D syscall_get_nr(current, regs); + unsigned long args[6]; + + syscall_get_arguments(current, regs, args); + __audit_syscall_entry(syscall, args[0], args[1], args[2], args[3]); +} +#endif + int syscall_trace_enter(struct pt_regs *regs) { unsigned long flags =3D read_thread_flags(); @@ -2476,8 +2487,8 @@ int syscall_trace_enter(struct pt_regs *regs) if (test_thread_flag(TIF_SYSCALL_TRACEPOINT)) trace_sys_enter(regs, regs->syscallno); =20 - audit_syscall_entry(regs->syscallno, regs->orig_x0, regs->regs[1], - regs->regs[2], regs->regs[3]); + if (unlikely(audit_context())) + syscall_enter_audit(regs); =20 return regs->syscallno; } --=20 2.34.1 From nobody Sat Jul 25 01:25:38 2026 Received: from canpmsgout01.his.huawei.com (canpmsgout01.his.huawei.com [113.46.200.216]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CDE133BB699 for ; Tue, 21 Jul 2026 08:19:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=113.46.200.216 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784621952; cv=none; b=Q2cQ361vplhvKgXXitQTbRxU2ZGBVFZ5w7cSKyF+PHPgwk+wR6Gs5DV/Jn6YpnX1R5mB+dNmiE6aUJI1SmIeofD+WyTU22vH9tAtKk/i8f59I5M/SEp0y0N3xUOWCu2af9/8KfOnJyuDh7Df103zxOjuDmgceB710ra8qccQsEM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784621952; c=relaxed/simple; bh=vLf+bljWpuEcc05pRrTLh2j/tGyRh2NWJgfMczQ96IE=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=j/kTr6pNsKrn9sO8kNEKOI6fLOc+SlQKiyMVSjPq/XZqwCJ6nH+rdl8i5EZd4OngS4mSL0na6Y3wuoqMsb4oXtOzmd/Y6/eXFDyKIuiktDpibiH4YNJw8u1yaxE5sJcPmRfjEktuQjtdXgvcW2SXOAWcXjdMMWSyv8qsjD2lyNw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com; spf=pass smtp.mailfrom=huawei.com; dkim=pass (1024-bit key) header.d=huawei.com header.i=@huawei.com header.b=Yoed7e8R; arc=none smtp.client-ip=113.46.200.216 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=huawei.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=huawei.com header.i=@huawei.com header.b="Yoed7e8R" dkim-signature: v=1; a=rsa-sha256; d=huawei.com; s=dkim; c=relaxed/relaxed; q=dns/txt; h=From; bh=cdc1f7APJXH1A4RlASICiN/qzPLenJiErSnTlc675VE=; b=Yoed7e8RXfOGKV5BdhCPVXK/NpNB6mm/UMlPjDUXaQkHY7ucrT8JDQ96VcORif+3a7+Fop22y cFDvKhdwhXM41APldPjb8jHhpx+SUKhJ3da18rRw3RmPu3w+dXIpr9au56y+EnCkAnetg3JJ+pw XnHVMvusQEhxGFgUiJ4agEk= Received: from mail.maildlp.com (unknown [172.19.163.0]) by canpmsgout01.his.huawei.com (SkyGuard) with ESMTPS id 4h495y10Zlz1T4Km; Tue, 21 Jul 2026 16:09:42 +0800 (CST) Received: from dggpemf500011.china.huawei.com (unknown [7.185.36.131]) by mail.maildlp.com (Postfix) with ESMTPS id 387C340537; Tue, 21 Jul 2026 16:19:01 +0800 (CST) Received: from huawei.com (10.90.53.73) by dggpemf500011.china.huawei.com (7.185.36.131) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.11; Tue, 21 Jul 2026 16:18:59 +0800 From: Jinjie Ruan To: , , , , , , , , , , , , , , , , , , , , , , CC: Subject: [PATCH v17 03/15] arm64: ptrace: Open-code seccomp check in syscall_trace_enter() Date: Tue, 21 Jul 2026 16:18:46 +0800 Message-ID: <20260721081858.1169276-4-ruanjinjie@huawei.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260721081858.1169276-1-ruanjinjie@huawei.com> References: <20260721081858.1169276-1-ruanjinjie@huawei.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: kwepems500001.china.huawei.com (7.221.188.70) To dggpemf500011.china.huawei.com (7.185.36.131) Content-Type: text/plain; charset="utf-8" Refactor syscall_trace_enter() by open-coding the seccomp check to align with the generic entry framework. The generic entry implementation expands the seccomp check in-place by testing SYSCALL_WORK_SECCOMP and directly calling the underlying __seccomp_permit_syscall() function. Moreover, generic entry explicitly re-reads work flags after ptrace handling to ensure any updates to seccomp work flags during the ptrace stop are observed. Bring arm64 in line with this behavior: - Re-read thread flags after ptrace handling. - Test the updated flags for _TIF_SECCOMP and call __seccomp_permit_syscall(). No functional changes are intended; this change simplifies future migration to the generic entry framework. Cc: Mark Rutland Cc: Will Deacon Cc: Catalin Marinas Link: https://lore.kernel.org/all/20260713025712.416366-1-ruanjinjie@huawei= .com/ Reviewed-by: Ada Couprie Diaz Reviewed-by: Linus Walleij Reviewed-by: Yeoreum Yun Reviewed-by: Kevin Brodsky Signed-off-by: Jinjie Ruan --- arch/arm64/kernel/ptrace.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/arch/arm64/kernel/ptrace.c b/arch/arm64/kernel/ptrace.c index 643e63a65734..cd0607ec70ef 100644 --- a/arch/arm64/kernel/ptrace.c +++ b/arch/arm64/kernel/ptrace.c @@ -2478,11 +2478,16 @@ int syscall_trace_enter(struct pt_regs *regs) ret =3D report_syscall_entry(regs); if (ret || (flags & _TIF_SYSCALL_EMU)) return NO_SYSCALL; + + /* ptrace might have changed thread flags */ + flags =3D read_thread_flags(); } =20 /* Do the secure computing after ptrace; failures should be fast. */ - if (!seccomp_permit_syscall()) - return NO_SYSCALL; + if (unlikely(flags & _TIF_SECCOMP)) { + if (!__seccomp_permit_syscall()) + return NO_SYSCALL; + } =20 if (test_thread_flag(TIF_SYSCALL_TRACEPOINT)) trace_sys_enter(regs, regs->syscallno); --=20 2.34.1 From nobody Sat Jul 25 01:25:38 2026 Received: from canpmsgout12.his.huawei.com (canpmsgout12.his.huawei.com [113.46.200.227]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D5086445AFB for ; Tue, 21 Jul 2026 08:19:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=113.46.200.227 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784621955; cv=none; b=jOIKf/yYLBUpS436f1xaJTKHdwkzVRWqltghKHCPNec4cd8dsJfsk2FwjhM46dnjG+lh5+iCBT/M5Rt6MjnKjWN5Esib1C8kwv1V94zt1nFA9u7s2W3f+WGB/ICgnJQveFkBTX4qUzKHCEJ249QI5fVP67654tvIHw8pMDXKrag= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784621955; c=relaxed/simple; bh=BsNH8hEoq8mv8KrexaKki8sV91LtOnE5IWdc1YEW764=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=bD5HCsfcTfG61ns1UXHV+ICwqS2/SDGTkp51wxH532rt0L8sQrRNGgVh/FSA6kqZdmoR4Yf8HG2YE++EnSU01kDYxNiCBts80jHJitGMejyAbPsJMsGMWMPFLXERvnCKVwIwu8PvRuq+CvE4tPos1rwbpFA5H+i/JQ2zQ6ZRp5M= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com; spf=pass smtp.mailfrom=huawei.com; dkim=pass (1024-bit key) header.d=huawei.com header.i=@huawei.com header.b=M+/Ejxxn; arc=none smtp.client-ip=113.46.200.227 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=huawei.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=huawei.com header.i=@huawei.com header.b="M+/Ejxxn" dkim-signature: v=1; a=rsa-sha256; d=huawei.com; s=dkim; c=relaxed/relaxed; q=dns/txt; h=From; bh=sTcYvhfX5GMjsoEzyZU2Oo3ewF8hCnSfBncHN/B9G88=; b=M+/EjxxnR3B3nd+Kkfpm6YBuhFPSbx3W3mFYbVp6f8m+lWlQY8QcgZgFmSjHJNp0qg7lwvxRG Jc5lfx+2FQq9RH+YI34FRV3yute6HvqR9CJDWDX9EEVufGdXHadisBEE14ejlF9f4Kw1IunrzL2 Vhtl20PtMtMHF537dvCQKjg= Received: from mail.maildlp.com (unknown [172.19.163.15]) by canpmsgout12.his.huawei.com (SkyGuard) with ESMTPS id 4h495k4RQMznTVd; Tue, 21 Jul 2026 16:09:30 +0800 (CST) Received: from dggpemf500011.china.huawei.com (unknown [7.185.36.131]) by mail.maildlp.com (Postfix) with ESMTPS id 77FD040586; Tue, 21 Jul 2026 16:19:02 +0800 (CST) Received: from huawei.com (10.90.53.73) by dggpemf500011.china.huawei.com (7.185.36.131) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.11; Tue, 21 Jul 2026 16:19:01 +0800 From: Jinjie Ruan To: , , , , , , , , , , , , , , , , , , , , , , CC: Subject: [PATCH v17 04/15] arm64: ptrace: Rename and clean up syscall_trace_enter() Date: Tue, 21 Jul 2026 16:18:47 +0800 Message-ID: <20260721081858.1169276-5-ruanjinjie@huawei.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260721081858.1169276-1-ruanjinjie@huawei.com> References: <20260721081858.1169276-1-ruanjinjie@huawei.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: kwepems500001.china.huawei.com (7.221.188.70) To dggpemf500011.china.huawei.com (7.185.36.131) Content-Type: text/plain; charset="utf-8" Rename syscall_trace_enter() to arm64_syscall_trace_enter() to avoid name collisions and clarify the boundary when arm64 eventually switches to the generic entry infrastructure. In addition, replace direct accesses to regs->syscallno with the standard syscall_get_nr() helper for both trace_sys_enter() and the return value. This decouples the tracing logic from architecture-specific struct pt_regs layouts, aligning the implementation with the generic entry pattern. No functional changes intended; this is a preparation step for converting arm64 to the generic entry infrastructure. Cc: Mark Rutland Cc: Will Deacon Cc: Catalin Marinas Signed-off-by: Jinjie Ruan Reviewed-by: Linus Walleij --- arch/arm64/include/asm/syscall.h | 2 +- arch/arm64/kernel/ptrace.c | 6 +++--- arch/arm64/kernel/syscall.c | 2 +- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/arm64/include/asm/syscall.h b/arch/arm64/include/asm/sysc= all.h index 5e4c7fc44f73..d1dabdcde41c 100644 --- a/arch/arm64/include/asm/syscall.h +++ b/arch/arm64/include/asm/syscall.h @@ -120,7 +120,7 @@ static inline int syscall_get_arch(struct task_struct *= task) return AUDIT_ARCH_AARCH64; } =20 -int syscall_trace_enter(struct pt_regs *regs); +int arm64_syscall_trace_enter(struct pt_regs *regs); void syscall_trace_exit(struct pt_regs *regs); =20 #endif /* __ASM_SYSCALL_H */ diff --git a/arch/arm64/kernel/ptrace.c b/arch/arm64/kernel/ptrace.c index cd0607ec70ef..4c7dba12629c 100644 --- a/arch/arm64/kernel/ptrace.c +++ b/arch/arm64/kernel/ptrace.c @@ -2469,7 +2469,7 @@ static inline void syscall_enter_audit(struct pt_regs= *regs) } #endif =20 -int syscall_trace_enter(struct pt_regs *regs) +int arm64_syscall_trace_enter(struct pt_regs *regs) { unsigned long flags =3D read_thread_flags(); int ret; @@ -2490,12 +2490,12 @@ int syscall_trace_enter(struct pt_regs *regs) } =20 if (test_thread_flag(TIF_SYSCALL_TRACEPOINT)) - trace_sys_enter(regs, regs->syscallno); + trace_sys_enter(regs, syscall_get_nr(current, regs)); =20 if (unlikely(audit_context())) syscall_enter_audit(regs); =20 - return regs->syscallno; + return syscall_get_nr(current, regs); } =20 static inline bool report_single_step(unsigned long flags) diff --git a/arch/arm64/kernel/syscall.c b/arch/arm64/kernel/syscall.c index 358ddfbf1401..3e78e159b2a1 100644 --- a/arch/arm64/kernel/syscall.c +++ b/arch/arm64/kernel/syscall.c @@ -113,7 +113,7 @@ static void el0_svc_common(struct pt_regs *regs, int sc= no, int sc_nr, */ if (scno =3D=3D NO_SYSCALL) syscall_set_return_value(current, regs, -ENOSYS, 0); - scno =3D syscall_trace_enter(regs); + scno =3D arm64_syscall_trace_enter(regs); if (scno =3D=3D NO_SYSCALL) goto trace_exit; } --=20 2.34.1 From nobody Sat Jul 25 01:25:38 2026 Received: from canpmsgout03.his.huawei.com (canpmsgout03.his.huawei.com [113.46.200.218]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 251274446FF for ; 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Tue, 21 Jul 2026 16:19:02 +0800 From: Jinjie Ruan To: , , , , , , , , , , , , , , , , , , , , , , CC: Subject: [PATCH v17 05/15] arm64: ptrace: Protect rseq_syscall() from tracer PC modifications Date: Tue, 21 Jul 2026 16:18:48 +0800 Message-ID: <20260721081858.1169276-6-ruanjinjie@huawei.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260721081858.1169276-1-ruanjinjie@huawei.com> References: <20260721081858.1169276-1-ruanjinjie@huawei.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: kwepems500001.china.huawei.com (7.221.188.70) To dggpemf500011.china.huawei.com (7.185.36.131) Content-Type: text/plain; charset="utf-8" Move the rseq_syscall() check earlier in the syscall exit path to ensure it operates on the original instruction pointer (regs->pc) before any potential modification by a tracer. [Background] When CONFIG_DEBUG_RSEQ is enabled, rseq_syscall() verifies that a system call was not executed within an rseq critical section by examining regs->pc. If a violation is detected, it triggers a SIGSEGV. [Problem] Currently, arm64 invokes rseq_syscall() after report_syscall_exit(). However, during report_syscall_exit(), a ptrace tracer can modify the task's instruction pointer via PTRACE_SETREGSET (with NT_PRSTATUS). This leads to an inconsistency where rseq may analyze a post-trace PC instead of the actual PC at the time of syscall exit. [Why this matters] The rseq check is intended to validate the execution context of the syscall itself. Analyzing a tracer-modified PC can lead to incorrect detection or missed violations. Moving the check earlier ensures rseq sees the authentic state of the task. [Alignment] This change aligns arm64 with: - Generic entry, which calls rseq_syscall() first. - arm32 implementation, which also performs the check before audit. [Impact] There is no functional change to signal delivery; SIGSEGV will still be processed in arm64_exit_to_user_mode() at the end of the exit path. Cc: Mark Rutland Cc: Thomas Gleixner Cc: Will Deacon Cc: Catalin Marinas Reviewed-by: Ada Couprie Diaz Reviewed-by: Linus Walleij Reviewed-by: Yeoreum Yun Reviewed-by: Kevin Brodsky Signed-off-by: Jinjie Ruan --- arch/arm64/kernel/ptrace.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/kernel/ptrace.c b/arch/arm64/kernel/ptrace.c index 4c7dba12629c..a7091333a9e9 100644 --- a/arch/arm64/kernel/ptrace.c +++ b/arch/arm64/kernel/ptrace.c @@ -2511,6 +2511,8 @@ void syscall_trace_exit(struct pt_regs *regs) unsigned long flags =3D read_thread_flags(); bool step; =20 + rseq_syscall(regs); + audit_syscall_exit(regs); =20 if (flags & _TIF_SYSCALL_TRACEPOINT) @@ -2519,8 +2521,6 @@ void syscall_trace_exit(struct pt_regs *regs) step =3D report_single_step(flags); if (step || flags & _TIF_SYSCALL_TRACE) report_syscall_exit(regs); - - rseq_syscall(regs); } =20 /* --=20 2.34.1 From nobody Sat Jul 25 01:25:38 2026 Received: from canpmsgout10.his.huawei.com (canpmsgout10.his.huawei.com [113.46.200.225]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8331F445AE2 for ; Tue, 21 Jul 2026 08:19:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=113.46.200.225 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784621952; cv=none; b=FmkN4+LKa5qDGumvj9ys8tzhXgE/xeC81qR2Lq+HW1adoP64lYhXpmRdzXwETWjSxLbmTYbDDGPVIqEjw9ET7A7av4v+vijDITk1HD/og0oez5cQD4QE8CNET/tKr7xratGNNwdLNV+u5V4ZssjSV9I0KeAD1gTPQZVFu634B6E= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784621952; c=relaxed/simple; bh=fSL5e/tZ8PBY2Q4pdtY7wWD+zQE/LVu9BxBDm1S+Qe4=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=FCVp0w6eU5dEkl85AzE2yXtg4B/7BnLgY1+t/K2tg89745arMqaYcV2TKweVOf/rl09PhQppqLvbbEbvLDoNXlWFJTK56B8h4fhD9MA1rHGZeIf9z852wA72lne0wVYg2UewDJ139O5SjqauasUTN6KSsWxPdLhgp+UiDi9kGjM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com; spf=pass smtp.mailfrom=huawei.com; dkim=pass (1024-bit key) header.d=huawei.com header.i=@huawei.com header.b=41yXRk9x; arc=none smtp.client-ip=113.46.200.225 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=huawei.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=huawei.com header.i=@huawei.com header.b="41yXRk9x" dkim-signature: v=1; a=rsa-sha256; d=huawei.com; s=dkim; c=relaxed/relaxed; q=dns/txt; h=From; bh=FnYDyjFiAR1AxVoELjeLgtZ0vAqYI3txzE4z19P1pME=; b=41yXRk9x+uMNmX2XAzIa3ZCE1wFWbSR2SARzWYCMks1pllTC5OyA36c05tMWmct10lGVxiIPT BGqq/iw6X2JA5sAW4MfYtJXZ01jQsMm9unaFK5sJhiQtUx8487Y2fRt16FZTlGMDSRkrGuSzJFO 4Xz2DLVpi6473wTEt3aIIw8= Received: from mail.maildlp.com (unknown [172.19.163.127]) by canpmsgout10.his.huawei.com (SkyGuard) with ESMTPS id 4h49601qJ5z1K9D2; Tue, 21 Jul 2026 16:09:44 +0800 (CST) Received: from dggpemf500011.china.huawei.com (unknown [7.185.36.131]) by mail.maildlp.com (Postfix) with ESMTPS id 1024040572; Tue, 21 Jul 2026 16:19:05 +0800 (CST) Received: from huawei.com (10.90.53.73) by dggpemf500011.china.huawei.com (7.185.36.131) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.11; Tue, 21 Jul 2026 16:19:03 +0800 From: Jinjie Ruan To: , , , , , , , , , , , , , , , , , , , , , , CC: Subject: [PATCH v17 06/15] arm64: syscall: Rework the syscall exit path in el0_svc_common() Date: Tue, 21 Jul 2026 16:18:49 +0800 Message-ID: <20260721081858.1169276-7-ruanjinjie@huawei.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260721081858.1169276-1-ruanjinjie@huawei.com> References: <20260721081858.1169276-1-ruanjinjie@huawei.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: kwepems500001.china.huawei.com (7.221.188.70) To dggpemf500011.china.huawei.com (7.185.36.131) Content-Type: text/plain; charset="utf-8" In preparation for moving arm64 over to the generic entry, invert the nested conditional flags check within el0_svc_common(). No functional changes. Cc: Mark Rutland Cc: Will Deacon Cc: Catalin Marinas Cc: Ada Couprie Diaz Signed-off-by: Jinjie Ruan Reviewed-by: Linus Walleij --- arch/arm64/kernel/syscall.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm64/kernel/syscall.c b/arch/arm64/kernel/syscall.c index 3e78e159b2a1..b8d7d29a431b 100644 --- a/arch/arm64/kernel/syscall.c +++ b/arch/arm64/kernel/syscall.c @@ -127,8 +127,9 @@ static void el0_svc_common(struct pt_regs *regs, int sc= no, int sc_nr, */ if (!has_syscall_work(flags) && !IS_ENABLED(CONFIG_DEBUG_RSEQ)) { flags =3D read_thread_flags(); - if (!has_syscall_work(flags) && !(flags & _TIF_SINGLESTEP)) - return; + if (has_syscall_work(flags) || flags & _TIF_SINGLESTEP) + syscall_trace_exit(regs); + return; } =20 trace_exit: --=20 2.34.1 From nobody Sat Jul 25 01:25:38 2026 Received: from canpmsgout12.his.huawei.com (canpmsgout12.his.huawei.com [113.46.200.227]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 527CE446C19 for ; Tue, 21 Jul 2026 08:19:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=113.46.200.227 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784621956; cv=none; b=QDkCbxdh4+NdqpuBJQPeGRjxKJd2MR8XU6tVhe8ILYf9ZK1E8RSDMDbFL+Jnh3aIEIG30IDVJJDQEkUSbaVIFCs8OL47iz7y2Cg40W5M166gLxOpIavuZnZnRbFGwy5rKOLWkv6f2QSh+CCDcuTYKyR3QrvTq7gdXg9VvynI69c= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784621956; c=relaxed/simple; bh=Zd+dhp6bdQpRaW25RlTkFiubTkG0Xn/bPZjQPCqE2uQ=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=neyB9g9YnA7ec1t9Zq0ywiCf1NpiqMJH/5EtE6YghrbBD6KgRLG8BYUWoGotypx50KWd8Sf5rjjYC7TtQ8dLIrCxTB0Xm1Rf5CuxgAhOQcgZvMIiT1LZFL6RAwAfcdzcBp0iEe54ZczoQG4EGPB3NHxNOfVI8IeUKKbsYZzt6P8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com; spf=pass smtp.mailfrom=huawei.com; dkim=pass (1024-bit key) header.d=huawei.com header.i=@huawei.com header.b=qH3c7lcs; arc=none smtp.client-ip=113.46.200.227 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=huawei.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=huawei.com header.i=@huawei.com header.b="qH3c7lcs" dkim-signature: v=1; a=rsa-sha256; d=huawei.com; s=dkim; c=relaxed/relaxed; q=dns/txt; h=From; bh=ryQ2hwYYW7NAQIt/JNDlICEsgqwe1CEogCM860IyUNg=; b=qH3c7lcsfFjYw49OQabDNUJT2ZxQ1jtMXnuVY9bAFODAodjmQJbgh38aXMYg/vkRkcelmDB67 R5FNqmvz17qI//XAueLpCbe9h80ZoSszPs/WZGAFu4BJCf7vZEAGh4SMWZcDi7nuRJBqswvAMkq 9FadGLfqBPE5Es0GMqCTm2Q= Received: from mail.maildlp.com (unknown [172.19.163.127]) by canpmsgout12.his.huawei.com (SkyGuard) with ESMTPS id 4h495p3XnYznTbk; Tue, 21 Jul 2026 16:09:34 +0800 (CST) Received: from dggpemf500011.china.huawei.com (unknown [7.185.36.131]) by mail.maildlp.com (Postfix) with ESMTPS id 5934240572; Tue, 21 Jul 2026 16:19:06 +0800 (CST) Received: from huawei.com (10.90.53.73) by dggpemf500011.china.huawei.com (7.185.36.131) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.11; Tue, 21 Jul 2026 16:19:05 +0800 From: Jinjie Ruan To: , , , , , , , , , , , , , , , , , , , , , , CC: Subject: [PATCH v17 07/15] arm64: ptrace: Pass thread flags to trace enter/exit Date: Tue, 21 Jul 2026 16:18:50 +0800 Message-ID: <20260721081858.1169276-8-ruanjinjie@huawei.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260721081858.1169276-1-ruanjinjie@huawei.com> References: <20260721081858.1169276-1-ruanjinjie@huawei.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: kwepems500001.china.huawei.com (7.221.188.70) To dggpemf500011.china.huawei.com (7.185.36.131) Content-Type: text/plain; charset="utf-8" Move the reading of thread flags from inside arm64_syscall_trace_enter() and syscall_trace_exit() to their callers. This aligns the function signatures with the generic entry framework, where the caller is responsible for supplying the flags. In el0_svc_common(), the flags are now passed directly to the tracing functions, and re-read before the enter/exit path to reflect any updates. No functional change intended; this is a preparatory step for converting arm64 to the generic entry infrastructure. Cc: Mark Rutland Cc: Will Deacon Cc: Catalin Marinas Reviewed-by: Ada Couprie Diaz Reviewed-by: Linus Walleij Reviewed-by: Yeoreum Yun Reviewed-by: Kevin Brodsky Signed-off-by: Jinjie Ruan --- arch/arm64/include/asm/syscall.h | 4 ++-- arch/arm64/kernel/ptrace.c | 6 ++---- arch/arm64/kernel/syscall.c | 11 +++++++---- 3 files changed, 11 insertions(+), 10 deletions(-) diff --git a/arch/arm64/include/asm/syscall.h b/arch/arm64/include/asm/sysc= all.h index d1dabdcde41c..696739f5a250 100644 --- a/arch/arm64/include/asm/syscall.h +++ b/arch/arm64/include/asm/syscall.h @@ -120,7 +120,7 @@ static inline int syscall_get_arch(struct task_struct *= task) return AUDIT_ARCH_AARCH64; } =20 -int arm64_syscall_trace_enter(struct pt_regs *regs); -void syscall_trace_exit(struct pt_regs *regs); +int arm64_syscall_trace_enter(struct pt_regs *regs, unsigned long flags); +void syscall_trace_exit(struct pt_regs *regs, unsigned long flags); =20 #endif /* __ASM_SYSCALL_H */ diff --git a/arch/arm64/kernel/ptrace.c b/arch/arm64/kernel/ptrace.c index a7091333a9e9..18fa29ae1425 100644 --- a/arch/arm64/kernel/ptrace.c +++ b/arch/arm64/kernel/ptrace.c @@ -2469,9 +2469,8 @@ static inline void syscall_enter_audit(struct pt_regs= *regs) } #endif =20 -int arm64_syscall_trace_enter(struct pt_regs *regs) +int arm64_syscall_trace_enter(struct pt_regs *regs, unsigned long flags) { - unsigned long flags =3D read_thread_flags(); int ret; =20 if (flags & (_TIF_SYSCALL_EMU | _TIF_SYSCALL_TRACE)) { @@ -2506,9 +2505,8 @@ static inline bool report_single_step(unsigned long f= lags) return flags & _TIF_SINGLESTEP; } =20 -void syscall_trace_exit(struct pt_regs *regs) +void syscall_trace_exit(struct pt_regs *regs, unsigned long flags) { - unsigned long flags =3D read_thread_flags(); bool step; =20 rseq_syscall(regs); diff --git a/arch/arm64/kernel/syscall.c b/arch/arm64/kernel/syscall.c index b8d7d29a431b..e778aac6fab9 100644 --- a/arch/arm64/kernel/syscall.c +++ b/arch/arm64/kernel/syscall.c @@ -113,7 +113,7 @@ static void el0_svc_common(struct pt_regs *regs, int sc= no, int sc_nr, */ if (scno =3D=3D NO_SYSCALL) syscall_set_return_value(current, regs, -ENOSYS, 0); - scno =3D arm64_syscall_trace_enter(regs); + scno =3D arm64_syscall_trace_enter(regs, read_thread_flags()); if (scno =3D=3D NO_SYSCALL) goto trace_exit; } @@ -127,13 +127,16 @@ static void el0_svc_common(struct pt_regs *regs, int = scno, int sc_nr, */ if (!has_syscall_work(flags) && !IS_ENABLED(CONFIG_DEBUG_RSEQ)) { flags =3D read_thread_flags(); - if (has_syscall_work(flags) || flags & _TIF_SINGLESTEP) - syscall_trace_exit(regs); + if (has_syscall_work(flags) || flags & _TIF_SINGLESTEP) { + flags =3D read_thread_flags(); + syscall_trace_exit(regs, flags); + } return; } =20 trace_exit: - syscall_trace_exit(regs); + flags =3D read_thread_flags(); + syscall_trace_exit(regs, flags); } =20 void do_el0_svc(struct pt_regs *regs) --=20 2.34.1 From nobody Sat Jul 25 01:25:38 2026 Received: from canpmsgout07.his.huawei.com (canpmsgout07.his.huawei.com [113.46.200.222]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 75B504499AF for ; Tue, 21 Jul 2026 08:19:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=113.46.200.222 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784621959; cv=none; b=p2luRrlitB7hkyiBD1KU5L7RJyTlpK9PSIZgHQXh41DZdx9jfx4IAtXR41W13cwbsNVVNtbefGEs5zm4+ILPBpncYPfXbG1vwMlkGgLtBpCNad8f003SvBwv/Xmhs2QzZ0t649Er0+KpZdstUWA0dKMw8x3v/yOF2nWnAMptJWM= ARC-Message-Signature: i=1; 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charset="utf-8" Introduce a helper arm64_syscall_exit_to_user_mode_work() that encapsulates the re-reading of thread flags and the call to syscall_trace_exit(). Use it in el0_svc_common() to replace the open-coded instances, removing the duplicated flags read and making the control flow simpler. This aligns the arm64 exit path with the pattern expected by the generic entry infrastructure, which uses a similar syscall_exit_to_user_mode_work() callback. No functional changes intended; this is a preparation step for converting arm64 to the generic entry infrastructure. Cc: Mark Rutland Cc: Will Deacon Cc: Catalin Marinas Cc: Ada Couprie Diaz Signed-off-by: Jinjie Ruan Reviewed-by: Linus Walleij --- arch/arm64/include/asm/syscall.h | 7 +++++++ arch/arm64/kernel/syscall.c | 9 +++------ 2 files changed, 10 insertions(+), 6 deletions(-) diff --git a/arch/arm64/include/asm/syscall.h b/arch/arm64/include/asm/sysc= all.h index 696739f5a250..3e4672ab4a4f 100644 --- a/arch/arm64/include/asm/syscall.h +++ b/arch/arm64/include/asm/syscall.h @@ -123,4 +123,11 @@ static inline int syscall_get_arch(struct task_struct = *task) int arm64_syscall_trace_enter(struct pt_regs *regs, unsigned long flags); void syscall_trace_exit(struct pt_regs *regs, unsigned long flags); =20 +static __always_inline void arm64_syscall_exit_to_user_mode_work(struct pt= _regs *regs) +{ + unsigned long flags =3D read_thread_flags(); + + syscall_trace_exit(regs, flags); +} + #endif /* __ASM_SYSCALL_H */ diff --git a/arch/arm64/kernel/syscall.c b/arch/arm64/kernel/syscall.c index e778aac6fab9..0061fc63e7ba 100644 --- a/arch/arm64/kernel/syscall.c +++ b/arch/arm64/kernel/syscall.c @@ -127,16 +127,13 @@ static void el0_svc_common(struct pt_regs *regs, int = scno, int sc_nr, */ if (!has_syscall_work(flags) && !IS_ENABLED(CONFIG_DEBUG_RSEQ)) { flags =3D read_thread_flags(); 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charset="utf-8" Refactor the syscall exit path to better match the generic entry framework. Specifically: - Introduce `_TIF_SYSCALL_EXIT_WORK` to aggregate exit-time thread flags (trace, audit, tracepoint). - Rename `syscall_trace_exit()` to `arm64_syscall_exit_work()` to better reflect its role. - Move `rseq_syscall()` out of `arm64_syscall_exit_work()` and into `arm64_syscall_exit_to_user_mode_work()` so that it runs unconditionally on all exits, consistent with generic entry. - Gate `arm64_syscall_exit_work()` behind the new flag check, mirroring the generic entry exit's pattern. Gating audit on `_TIF_SYSCALL_AUDIT` is equivalent to the previous `audit_context()` check: the audit context and flag are statically allocated at fork and freed at exit, remaining stable throughout syscall execution. No functional changes intended. Cc: Mark Rutland Cc: Will Deacon Cc: Catalin Marinas Cc: Ada Couprie Diaz Signed-off-by: Jinjie Ruan Reviewed-by: Linus Walleij --- arch/arm64/include/asm/syscall.h | 8 ++++++-- arch/arm64/include/asm/thread_info.h | 3 +++ arch/arm64/kernel/ptrace.c | 5 +---- 3 files changed, 10 insertions(+), 6 deletions(-) diff --git a/arch/arm64/include/asm/syscall.h b/arch/arm64/include/asm/sysc= all.h index 3e4672ab4a4f..7cc872fde019 100644 --- a/arch/arm64/include/asm/syscall.h +++ b/arch/arm64/include/asm/syscall.h @@ -8,6 +8,7 @@ #include #include #include +#include =20 typedef long (*syscall_fn_t)(const struct pt_regs *regs); =20 @@ -121,13 +122,16 @@ static inline int syscall_get_arch(struct task_struct= *task) } =20 int arm64_syscall_trace_enter(struct pt_regs *regs, unsigned long flags); -void syscall_trace_exit(struct pt_regs *regs, unsigned long flags); +void arm64_syscall_exit_work(struct pt_regs *regs, unsigned long flags); =20 static __always_inline void arm64_syscall_exit_to_user_mode_work(struct pt= _regs *regs) { unsigned long flags =3D read_thread_flags(); =20 - syscall_trace_exit(regs, flags); + rseq_syscall(regs); + + if (unlikely(flags & _TIF_SYSCALL_EXIT_WORK) || flags & _TIF_SINGLESTEP) + arm64_syscall_exit_work(regs, flags); } =20 #endif /* __ASM_SYSCALL_H */ diff --git a/arch/arm64/include/asm/thread_info.h b/arch/arm64/include/asm/= thread_info.h index 5d7fe3e153c8..56a2c9426a32 100644 --- a/arch/arm64/include/asm/thread_info.h +++ b/arch/arm64/include/asm/thread_info.h @@ -112,6 +112,9 @@ void arch_setup_new_exec(void); _TIF_SYSCALL_TRACEPOINT | _TIF_SECCOMP | \ _TIF_SYSCALL_EMU) =20 +#define _TIF_SYSCALL_EXIT_WORK (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT | \ + _TIF_SYSCALL_TRACEPOINT) + #ifdef CONFIG_SHADOW_CALL_STACK #define INIT_SCS \ .scs_base =3D init_shadow_call_stack, \ diff --git a/arch/arm64/kernel/ptrace.c b/arch/arm64/kernel/ptrace.c index 18fa29ae1425..10ead67b4eaf 100644 --- a/arch/arm64/kernel/ptrace.c +++ b/arch/arm64/kernel/ptrace.c @@ -28,7 +28,6 @@ #include #include #include -#include =20 #include #include @@ -2505,12 +2504,10 @@ static inline bool report_single_step(unsigned long= flags) return flags & _TIF_SINGLESTEP; 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charset="utf-8" Use exit-specific _TIF_SYSCALL_EXIT_WORK mask to filter out entry-only flags during the system call exit path checks. This aligns arm64 with the generic entry framework's SYSCALL_WORK_EXIT semantics. [Rationale] The current syscall exit path re-evaluates the thread flags using the global _TIF_SYSCALL_WORK mask. However, _TIF_SYSCALL_WORK includes flags that are strictly relevant to system call entry processing: 1. _TIF_SECCOMP: Seccomp filtering (__seccomp_permit_syscall()) only runs on entry. There is no seccomp callback for syscall exit. 2. _TIF_SYSCALL_EMU: In PTRACE_SYSEMU mode, the syscall is intercepted and skipped on entry. Since the syscall is never fully executed, reporting a separate syscall exit stop is unnecessary. [Changes] - _TIF_SYSCALL_EXIT_WORK: A new mask containing only flags requiring exit-time processing: _TIF_SYSCALL_TRACE, _TIF_SYSCALL_AUDIT, and _TIF_SYSCALL_TRACEPOINT. - Optimize re-evaluation check: Use _TIF_SYSCALL_EXIT_WORK inside the el0_svc_common() fast-path block to prevent redundant exit work execution when entry-only flags fluctuate or are synchronously modified under the hood. The outermost gating maintains _TIF_SYSCALL_WORK to preserve architectural entry-exit symmetry for tracers. - Cleanup: Remove the has_syscall_work() helper as it is no longer needed, supporting direct flag comparison to clearly distinguish between entry and exit mandates. [Impact] Unnecessary exit tracing and auditing processing are safely bypassed when entry-specific flags fluctuate during the fast-path re-check block. This safely streamlines the syscall exit sequence to mirror the generic entry syscall exit behaviors without breaking debugger expectations. No functional changes intended Cc: Mark Rutland Cc: Will Deacon Cc: Catalin Marinas Cc: Ada Couprie Diaz Reviewed-by: Ada Couprie Diaz Reviewed-by: Linus Walleij Reviewed-by: Yeoreum Yun Signed-off-by: Jinjie Ruan --- arch/arm64/kernel/syscall.c | 11 +++-------- 1 file changed, 3 insertions(+), 8 deletions(-) diff --git a/arch/arm64/kernel/syscall.c b/arch/arm64/kernel/syscall.c index 0061fc63e7ba..a8e0bf8d362e 100644 --- a/arch/arm64/kernel/syscall.c +++ b/arch/arm64/kernel/syscall.c @@ -54,11 +54,6 @@ static void invoke_syscall(struct pt_regs *regs, unsigne= d int scno, syscall_set_return_value(current, regs, 0, ret); } =20 -static inline bool has_syscall_work(unsigned long flags) -{ - return unlikely(flags & _TIF_SYSCALL_WORK); -} - static void el0_svc_common(struct pt_regs *regs, int scno, int sc_nr, const syscall_fn_t syscall_table[]) { @@ -95,7 +90,7 @@ static void el0_svc_common(struct pt_regs *regs, int scno= , int sc_nr, return; } =20 - if (has_syscall_work(flags)) { + if (unlikely(flags & _TIF_SYSCALL_WORK)) { /* * The de-facto standard way to skip a system call using ptrace * is to set the system call to -1 (NO_SYSCALL) and set x0 to a @@ -125,9 +120,9 @@ static void el0_svc_common(struct pt_regs *regs, int sc= no, int sc_nr, * check again. However, if we were tracing entry, then we always trace * exit regardless, as the old entry assembly did. */ - if (!has_syscall_work(flags) && !IS_ENABLED(CONFIG_DEBUG_RSEQ)) { + if (!(unlikely(flags & _TIF_SYSCALL_WORK)) && !IS_ENABLED(CONFIG_DEBUG_RS= EQ)) { flags =3D read_thread_flags(); - if (has_syscall_work(flags) || flags & _TIF_SINGLESTEP) + if (unlikely(flags & _TIF_SYSCALL_EXIT_WORK) || flags & _TIF_SINGLESTEP) arm64_syscall_exit_to_user_mode_work(regs); return; } --=20 2.34.1 From nobody Sat Jul 25 01:25:38 2026 Received: from canpmsgout07.his.huawei.com (canpmsgout07.his.huawei.com [113.46.200.222]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DD36744CAC2 for ; Tue, 21 Jul 2026 08:19:19 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=113.46.200.222 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784621962; cv=none; b=dl7z9cdahKGPTLR55kmeS5ZnFaoPJ13sXauglvHZhxPrzw24lidmkNw6rjG0YUQC+cowBYDPk4luk2wrCQ2y46vj5G7v3y8yidbxvbJHJV6b5h0tgKP1zAPxcoZE+RhiWrDLrTX1H9wHBUbmF/mcrwSfCBMnQXCzCpp/bUVMKsY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784621962; c=relaxed/simple; bh=6Wwi+OyWuz/KPd3W5OnalBjIpqoDGGYtzc8moQwyshk=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=oeNtCrimf4cj7e9F/hbIIsOB14EprfdqHZXeu4p4gF8waw/4U/TrD6yfIr04oQxdAs3BPW3bsbMsXfVE/0f2/wF9UOMTWtIYIu7pbKQI7Jds22oB3lbv899oxKS9ptrESQANfMvONyK26upJMurXi7DfrxQrtnHj2OMYcmUfst0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com; spf=pass smtp.mailfrom=huawei.com; dkim=pass (1024-bit key) header.d=huawei.com header.i=@huawei.com header.b=TbmmB0kh; arc=none smtp.client-ip=113.46.200.222 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=huawei.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=huawei.com header.i=@huawei.com header.b="TbmmB0kh" dkim-signature: v=1; a=rsa-sha256; d=huawei.com; s=dkim; c=relaxed/relaxed; q=dns/txt; h=From; bh=NJeAdwdxWOOSys6gC+zXvLV8FMT7RnU+jSncR7MBcTQ=; b=TbmmB0khGaHtXpeDcUUIXptONjXPj43FzUyeUQ1RfNjScRToqG3B1xy+rOBAcV246tsnMce5c Tqz/Bcf/7v9QxN/Jti5CjoxBj4ZPbsoH8s4tzGPSo35jqsMfywnmUqAPtYxwg5b1MWQCHSlUZrN EI3lQedyWGYVe6IKy/936Do= Received: from mail.maildlp.com (unknown [172.19.162.92]) by canpmsgout07.his.huawei.com (SkyGuard) with ESMTPS id 4h49652fj3zLlWC; Tue, 21 Jul 2026 16:09:49 +0800 (CST) Received: from dggpemf500011.china.huawei.com (unknown [7.185.36.131]) by mail.maildlp.com (Postfix) with ESMTPS id 63FD440565; Tue, 21 Jul 2026 16:19:11 +0800 (CST) Received: from huawei.com (10.90.53.73) by dggpemf500011.china.huawei.com (7.185.36.131) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.11; Tue, 21 Jul 2026 16:19:10 +0800 From: Jinjie Ruan To: , , , , , , , , , , , , , , , , , , , , , , CC: Subject: [PATCH v17 11/15] arm64: syscall: Simplify el0_svc_common() syscall exit path Date: Tue, 21 Jul 2026 16:18:54 +0800 Message-ID: <20260721081858.1169276-12-ruanjinjie@huawei.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260721081858.1169276-1-ruanjinjie@huawei.com> References: <20260721081858.1169276-1-ruanjinjie@huawei.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: kwepems500001.china.huawei.com (7.221.188.70) To dggpemf500011.china.huawei.com (7.185.36.131) Content-Type: text/plain; charset="utf-8" Remove the redundant nested conditional check within the system call exit path of el0_svc_common() to streamline the exit sequence. When entering this fast-path block, CONFIG_DEBUG_RSEQ is guaranteed to be disabled so the call of rseq_syscall() is a no-op. Under this constraint, the code logic inside the block becomes completely identical to what the arm64_syscall_exit_to_user_mode_work() helper already does. Replace that nested logic with a direct invocation of the helper, eliminating redundant code. Before: | if (... && !IS_ENABLED(CONFIG_DEBUG_RSEQ)) { | flags =3D read_thread_flags(); | if (unlikely(flags & _TIF_SYSCALL_EXIT_WORK) || flags & _TIF_SINGLESTEP) | arm64_syscall_exit_to_user_mode_work(regs); | return; | } | trace_exit: | arm64_syscall_exit_to_user_mode_work(regs); After simplify: | if (... && !IS_ENABLED(CONFIG_DEBUG_RSEQ)) { | arm64_syscall_exit_to_user_mode_work(regs); | return; | } | trace_exit: | arm64_syscall_exit_to_user_mode_work(regs); Furthermore, Since both the conditional fast-path and the fallback slow-path now uniformly invoke arm64_syscall_exit_to_user_mode_work(), this explicit conditional branch is entirely redundant regardless of whether the evaluation is true or false. Removing it collapses the duplicated logic into a single, unconditional path. No functional changes. Cc: Mark Rutland Cc: Will Deacon Cc: Catalin Marinas Cc: Ada Couprie Diaz Signed-off-by: Jinjie Ruan Reviewed-by: Linus Walleij --- arch/arm64/kernel/syscall.c | 13 ------------- 1 file changed, 13 deletions(-) diff --git a/arch/arm64/kernel/syscall.c b/arch/arm64/kernel/syscall.c index a8e0bf8d362e..3488afd45d20 100644 --- a/arch/arm64/kernel/syscall.c +++ b/arch/arm64/kernel/syscall.c @@ -114,19 +114,6 @@ static void el0_svc_common(struct pt_regs *regs, int s= cno, int sc_nr, } =20 invoke_syscall(regs, scno, sc_nr, syscall_table); - - /* - * The tracing status may have changed under our feet, so we have to - * check again. However, if we were tracing entry, then we always trace - * exit regardless, as the old entry assembly did. - */ - if (!(unlikely(flags & _TIF_SYSCALL_WORK)) && !IS_ENABLED(CONFIG_DEBUG_RS= EQ)) { - flags =3D read_thread_flags(); - if (unlikely(flags & _TIF_SYSCALL_EXIT_WORK) || flags & _TIF_SINGLESTEP) - arm64_syscall_exit_to_user_mode_work(regs); - return; - } - trace_exit: arm64_syscall_exit_to_user_mode_work(regs); } --=20 2.34.1 From nobody Sat Jul 25 01:25:38 2026 Received: from canpmsgout08.his.huawei.com (canpmsgout08.his.huawei.com [113.46.200.223]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 29AFC449984 for ; Tue, 21 Jul 2026 08:19:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=113.46.200.223 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784621958; cv=none; b=nZ0a4OKZ0YXWAffcaq/qNYoWr2OWsYIhLifyifKP1CQK9mUmdo0nbUeqgfrTCoLFhyw0KKaPZlztWoeoKE81ViO0DCxsNSiRaoef9SgSjCoEx12n7O7CP28b5YIIZBF0ZV/ZE+BEk29EUnLvyqQuSd5AUGuPsCDdDlQ3PVHAYng= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784621958; c=relaxed/simple; bh=fJ7YyPl5AohCaXhCSAXm9/ybkHF51RIBFy2iqkYhKxg=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=tJBpXIniikxKM+Z7k/sSvTDv+4Ep6h25a1kxFFGcMB7/dbB8z4zJBki2dUh44BO2bJeKM0r2gIGVwkuI02ZgmN/Yjg3juzxp3ayryCmGdZkh9v/BkNvN7l62GK2XG2rfPzmnRIUy/GN56gdhy+wCGl1qRgAxWFJUuEIndomVTV0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com; spf=pass smtp.mailfrom=huawei.com; dkim=pass (1024-bit key) header.d=huawei.com header.i=@huawei.com header.b=Lm7Mwl8j; arc=none smtp.client-ip=113.46.200.223 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=huawei.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=huawei.com header.i=@huawei.com header.b="Lm7Mwl8j" dkim-signature: v=1; a=rsa-sha256; d=huawei.com; s=dkim; c=relaxed/relaxed; q=dns/txt; h=From; bh=Lh7h7vTKaIOCDCwAfymzFileaKG83eBW/Fb4jfXmBeg=; b=Lm7Mwl8j9+v+3+wqcv1x+wLel/grMZGJ5AVCHmpiG2UKw9qSdVW8pYoFHu3lJD6K8uKLPD2l/ QjF0c10QOhrEPpryKHrTofiNFbrd0orxnAlQf36c1lydojOuE0E/YCKKyhQPH79D74plmQbUG4m sD956xUjMQX4X90PXrBkri8= Received: from mail.maildlp.com (unknown [172.19.163.163]) by canpmsgout08.his.huawei.com (SkyGuard) with ESMTPS id 4h49663K70zmV8f; Tue, 21 Jul 2026 16:09:50 +0800 (CST) Received: from dggpemf500011.china.huawei.com (unknown [7.185.36.131]) by mail.maildlp.com (Postfix) with ESMTPS id A88E040588; Tue, 21 Jul 2026 16:19:12 +0800 (CST) Received: from huawei.com (10.90.53.73) by dggpemf500011.china.huawei.com (7.185.36.131) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.11; Tue, 21 Jul 2026 16:19:11 +0800 From: Jinjie Ruan To: , , , , , , , , , , , , , , , , , , , , , , CC: Subject: [PATCH v17 12/15] arm64: ptrace: Make return type of arm64_syscall_trace_enter() bool Date: Tue, 21 Jul 2026 16:18:55 +0800 Message-ID: <20260721081858.1169276-13-ruanjinjie@huawei.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260721081858.1169276-1-ruanjinjie@huawei.com> References: <20260721081858.1169276-1-ruanjinjie@huawei.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: kwepems500001.china.huawei.com (7.221.188.70) To dggpemf500011.china.huawei.com (7.185.36.131) Content-Type: text/plain; charset="utf-8" In preparation for migrating arm64 to the generic entry infrastructure, decouple the decision to execute the syscall from the syscall number itself. The ptrace and seccomp now returns a boolean flag rather than overloading NO_SYSCALL (-1). Changes: - arm64_syscall_trace_enter() returns bool: - false: abort syscall execution - true: proceed, with syscall number reread from regs - If we decide to execute the syscall, reread the syscall number and check if it is NO_SYSCALL again. Because when a tracer sets the syscall number to -1 and provides a custom return value in x0, this avoids calling invoke_syscall() which would overwrite the custom value with -ENOSYS by sys_ni_syscall(). Behavioral impact (unchanged): - User-issued syscall(-1): unchanged, returns -ENOSYS. - Tracer skip with custom x0: unchanged, returns custom x0 - Tracer skip without setting x0: unchanged, returns original argument (garbage) - Normal syscalls and seccomp rejects: unaffected No functional changes. Cc: Mark Rutland Cc: Will Deacon Cc: Catalin Marinas Cc: Ada Couprie Diaz Signed-off-by: Jinjie Ruan Reviewed-by: Linus Walleij --- arch/arm64/include/asm/syscall.h | 2 +- arch/arm64/kernel/ptrace.c | 8 ++++---- arch/arm64/kernel/syscall.c | 6 +++++- 3 files changed, 10 insertions(+), 6 deletions(-) diff --git a/arch/arm64/include/asm/syscall.h b/arch/arm64/include/asm/sysc= all.h index 7cc872fde019..f19d4a8824ba 100644 --- a/arch/arm64/include/asm/syscall.h +++ b/arch/arm64/include/asm/syscall.h @@ -121,7 +121,7 @@ static inline int syscall_get_arch(struct task_struct *= task) return AUDIT_ARCH_AARCH64; } =20 -int arm64_syscall_trace_enter(struct pt_regs *regs, unsigned long flags); +bool arm64_syscall_trace_enter(struct pt_regs *regs, unsigned long flags); void arm64_syscall_exit_work(struct pt_regs *regs, unsigned long flags); =20 static __always_inline void arm64_syscall_exit_to_user_mode_work(struct pt= _regs *regs) diff --git a/arch/arm64/kernel/ptrace.c b/arch/arm64/kernel/ptrace.c index 10ead67b4eaf..b2b28dcb2826 100644 --- a/arch/arm64/kernel/ptrace.c +++ b/arch/arm64/kernel/ptrace.c @@ -2468,14 +2468,14 @@ static inline void syscall_enter_audit(struct pt_re= gs *regs) } #endif =20 -int arm64_syscall_trace_enter(struct pt_regs *regs, unsigned long flags) +bool arm64_syscall_trace_enter(struct pt_regs *regs, unsigned long flags) { int ret; =20 if (flags & (_TIF_SYSCALL_EMU | _TIF_SYSCALL_TRACE)) { ret =3D report_syscall_entry(regs); if (ret || (flags & _TIF_SYSCALL_EMU)) - return NO_SYSCALL; + return false; =20 /* ptrace might have changed thread flags */ flags =3D read_thread_flags(); @@ -2484,7 +2484,7 @@ int arm64_syscall_trace_enter(struct pt_regs *regs, u= nsigned long flags) /* Do the secure computing after ptrace; failures should be fast. */ if (unlikely(flags & _TIF_SECCOMP)) { if (!__seccomp_permit_syscall()) - return NO_SYSCALL; + return false; } =20 if (test_thread_flag(TIF_SYSCALL_TRACEPOINT)) @@ -2493,7 +2493,7 @@ int arm64_syscall_trace_enter(struct pt_regs *regs, u= nsigned long flags) if (unlikely(audit_context())) syscall_enter_audit(regs); =20 - return syscall_get_nr(current, regs); + return true; } =20 static inline bool report_single_step(unsigned long flags) diff --git a/arch/arm64/kernel/syscall.c b/arch/arm64/kernel/syscall.c index 3488afd45d20..72c6e8b7ab21 100644 --- a/arch/arm64/kernel/syscall.c +++ b/arch/arm64/kernel/syscall.c @@ -108,7 +108,11 @@ static void el0_svc_common(struct pt_regs *regs, int s= cno, int sc_nr, */ if (scno =3D=3D NO_SYSCALL) syscall_set_return_value(current, regs, -ENOSYS, 0); - scno =3D arm64_syscall_trace_enter(regs, read_thread_flags()); + if (!arm64_syscall_trace_enter(regs, read_thread_flags())) + goto trace_exit; + + /* Reread the syscall number as it might have been modified */ + scno =3D syscall_get_nr(current, regs); if (scno =3D=3D NO_SYSCALL) goto trace_exit; } --=20 2.34.1 From nobody Sat Jul 25 01:25:38 2026 Received: from canpmsgout04.his.huawei.com (canpmsgout04.his.huawei.com [113.46.200.219]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 296DB44D022 for ; Tue, 21 Jul 2026 08:19:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=113.46.200.219 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784621965; cv=none; b=BvyfAUfy7cfmq9TuL1ivlrIQuGMWMc7OYLFpNleCzcgjcmV1nqa2Z+DVGZRQgezY8OPHfzZAdlyYSDc4ZHA1BVNwYWGwABlb+itzNsQTRWX8OUwH96oukkOoI8mqM+NozRxUUclrlyRP8iF3rFKqQcEaPTN04FDtpasObR+HBNM= ARC-Message-Signature: i=1; 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a=rsa-sha256; d=huawei.com; s=dkim; c=relaxed/relaxed; q=dns/txt; h=From; bh=aoqKVccsrHLgQ9VNsY6Oa6KnpX+y7UKI6ZcuKj/c97I=; b=17j3JqfBDHRcDUwEcusDBhCtdSqmtpzKLUkptdBx4Am6KoznmfMlGWc2qTcr/ZXDlCR1tDAlm BfTaDSIA6b/+xf7kLr8+vaurIgnM2x1G+E2Y6aNhoyui7YOly/e+MMcehpUP7FOBemgqerQ09Hz L3vvZVvVWa+biLpZ6Fiuamc= Received: from mail.maildlp.com (unknown [172.19.162.223]) by canpmsgout04.his.huawei.com (SkyGuard) with ESMTPS id 4h49656hKxz1prKd; Tue, 21 Jul 2026 16:09:49 +0800 (CST) Received: from dggpemf500011.china.huawei.com (unknown [7.185.36.131]) by mail.maildlp.com (Postfix) with ESMTPS id 0316640575; Tue, 21 Jul 2026 16:19:14 +0800 (CST) Received: from huawei.com (10.90.53.73) by dggpemf500011.china.huawei.com (7.185.36.131) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.11; Tue, 21 Jul 2026 16:19:12 +0800 From: Jinjie Ruan To: , , , , , , , , , , , , , , , , , , , , , , CC: Subject: [PATCH v17 13/15] arm64: entry: Convert to generic entry Date: Tue, 21 Jul 2026 16:18:56 +0800 Message-ID: <20260721081858.1169276-14-ruanjinjie@huawei.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260721081858.1169276-1-ruanjinjie@huawei.com> References: <20260721081858.1169276-1-ruanjinjie@huawei.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: kwepems500001.china.huawei.com (7.221.188.70) To dggpemf500011.china.huawei.com (7.185.36.131) Content-Type: text/plain; charset="utf-8" Implement the generic entry framework for arm64 to handle system call entry and exit. This follows the migration of x86, RISC-V, and LoongArch, consolidating architecture-specific syscall tracing and auditing into the common kernel entry infrastructure, making it easier to enable advanced features on arm64, such as "Syscall User Dispatch" and "rseq time slice extension" optimization. [Background] Arm64 has already adopted generic IRQ entry. Completing the conversion to the generic syscall entry framework reduces architectural divergence, simplifies maintenance, and allows arm64 to automatically benefit from improvements in the common entry code. [Changes] 1. Kconfig and Infrastructure: - Select GENERIC_ENTRY and remove GENERIC_IRQ_ENTRY (now implied). - Migrate struct thread_info to use the syscall_work field instead of TIF flags for syscall-related tasks. 2. Thread Info and Flags: - Remove definitions for TIF_SYSCALL_TRACE, TIF_SYSCALL_AUDIT, TIF_SYSCALL_TRACEPOINT, TIF_SECCOMP, and TIF_SYSCALL_EMU. - Replace _TIF_SYSCALL_WORK and _TIF_SYSCALL_EXIT_WORK with the generic SYSCALL_WORK bitmask. - Map single-step state to SYSCALL_EXIT_TRAP in debug-monitors.c. 3. Architecture-Specific Hooks (asm/entry-common.h): Implement following arch function by porting the existing arm64 logic to the generic interface: - arch_ptrace_report_syscall_permit_entry() - arch_ptrace_report_syscall_exit() 4. Cleanup and Refactoring: Remove redundant arm64-specific syscall tracing functions from ptrace.c, including following key functions and related audit/step helpers: - arm64_syscall_exit_to_user_mode_work() - arm64_syscall_trace_enter() - arm64_syscall_exit_work(). - Update el0_svc_common() in syscall.c to use the generic syscall_work checks and entry/exit call sites. [Why this matters] - Unified Interface: Aligns arm64 with the modern kernel entry standard. - Improved Maintainability: Bug fixes in kernel/entry/common.c now apply to arm64 automatically. - Feature Readiness: Simplifies the implementation of future cross-architecture syscall features. [Compatibility] This conversion maintains full ABI compatibility with existing userspace. The ptrace register-saving behavior, seccomp filtering, and syscall tracing semantics remain identical to the previous implementation. Additionally, since arm64 now does not select HAVE_GENERIC_TIF_BITS, there is no functional change regarding rseq management, as those generic entry pathways remain a no-op for this architecture." Cc: Mark Rutland Cc: Will Deacon Cc: Catalin Marinas Cc: Thomas Gleixner Cc: Peter Zijlstra Tested-by: Ada Couprie Diaz Reviewed-by: Ada Couprie Diaz Reviewed-by: Linus Walleij Acked-by: Peter Zijlstra (Intel) Reviewed-by: Yeoreum Yun Reviewed-by: Kevin Brodsky Suggested-by: Kevin Brodsky Suggested-by: Mark Rutland Signed-off-by: Jinjie Ruan --- arch/arm64/Kconfig | 2 +- arch/arm64/include/asm/entry-common.h | 77 +++++++++++++++ arch/arm64/include/asm/syscall.h | 14 --- arch/arm64/include/asm/thread_info.h | 19 +--- arch/arm64/kernel/debug-monitors.c | 8 ++ arch/arm64/kernel/entry-common.c | 2 +- arch/arm64/kernel/ptrace.c | 136 -------------------------- arch/arm64/kernel/signal.c | 2 +- arch/arm64/kernel/syscall.c | 9 +- 9 files changed, 95 insertions(+), 174 deletions(-) diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index b3afe0688919..aea686dce3d5 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -128,9 +128,9 @@ config ARM64 select GENERIC_CPU_DEVICES select GENERIC_CPU_VULNERABILITIES select GENERIC_EARLY_IOREMAP + select GENERIC_ENTRY select GENERIC_IDLE_POLL_SETUP select GENERIC_IOREMAP - select GENERIC_IRQ_ENTRY select GENERIC_IRQ_IPI select GENERIC_IRQ_KEXEC_CLEAR_VM_FORWARD select GENERIC_IRQ_PROBE diff --git a/arch/arm64/include/asm/entry-common.h b/arch/arm64/include/asm= /entry-common.h index cab8cd78f693..2b053acbe10f 100644 --- a/arch/arm64/include/asm/entry-common.h +++ b/arch/arm64/include/asm/entry-common.h @@ -3,14 +3,21 @@ #ifndef _ASM_ARM64_ENTRY_COMMON_H #define _ASM_ARM64_ENTRY_COMMON_H =20 +#include #include =20 +#include #include #include #include #include #include =20 +enum ptrace_syscall_dir { + PTRACE_SYSCALL_ENTER =3D 0, + PTRACE_SYSCALL_EXIT, +}; + #define ARCH_EXIT_TO_USER_MODE_WORK (_TIF_MTE_ASYNC_FAULT | _TIF_FOREIGN_F= PSTATE) =20 static __always_inline void arch_exit_to_user_mode_work(struct pt_regs *re= gs, @@ -54,4 +61,74 @@ static inline bool arch_irqentry_exit_need_resched(void) =20 #define arch_irqentry_exit_need_resched arch_irqentry_exit_need_resched =20 +static __always_inline unsigned long ptrace_save_reg(struct pt_regs *regs, + enum ptrace_syscall_dir dir, + int *regno) +{ + unsigned long saved_reg; + + /* + * We have some ABI weirdness here in the way that we handle syscall + * exit stops because we indicate whether or not the stop has been + * signalled from syscall entry or syscall exit by clobbering a general + * purpose register (ip/r12 for AArch32, x7 for AArch64) in the tracee + * and restoring its old value after the stop. This means that: + * + * - Any writes by the tracer to this register during the stop are + * ignored/discarded. + * + * - The actual value of the register is not available during the stop, + * so the tracer cannot save it and restore it later. + * + * - Syscall stops behave differently to seccomp and pseudo-step traps + * (the latter do not nobble any registers). + */ + *regno =3D (is_compat_task() ? 12 : 7); + saved_reg =3D regs->regs[*regno]; + regs->regs[*regno] =3D dir; + + return saved_reg; +} + +static __always_inline bool arch_ptrace_report_syscall_permit_entry(struct= pt_regs *regs) +{ + unsigned long saved_reg; + bool permit; + int regno; + + saved_reg =3D ptrace_save_reg(regs, PTRACE_SYSCALL_ENTER, ®no); + permit =3D ptrace_report_syscall_permit_entry(regs); + if (!permit) + forget_syscall(regs); + regs->regs[regno] =3D saved_reg; + + return permit; +} + +#define arch_ptrace_report_syscall_permit_entry arch_ptrace_report_syscall= _permit_entry + +static __always_inline void arch_ptrace_report_syscall_exit(struct pt_regs= *regs, + int step) +{ + unsigned long saved_reg; + int regno; + + saved_reg =3D ptrace_save_reg(regs, PTRACE_SYSCALL_EXIT, ®no); + if (!step) { + ptrace_report_syscall_exit(regs, 0); + regs->regs[regno] =3D saved_reg; + } else { + regs->regs[regno] =3D saved_reg; + + /* + * Signal a pseudo-step exception since we are stepping but + * tracer modifications to the registers may have rewound the + * state machine. + */ + ptrace_report_syscall_exit(regs, 1); + } +} + +#define arch_ptrace_report_syscall_exit arch_ptrace_report_syscall_exit + #endif /* _ASM_ARM64_ENTRY_COMMON_H */ diff --git a/arch/arm64/include/asm/syscall.h b/arch/arm64/include/asm/sysc= all.h index f19d4a8824ba..e3e716575846 100644 --- a/arch/arm64/include/asm/syscall.h +++ b/arch/arm64/include/asm/syscall.h @@ -120,18 +120,4 @@ static inline int syscall_get_arch(struct task_struct = *task) =20 return AUDIT_ARCH_AARCH64; } - -bool arm64_syscall_trace_enter(struct pt_regs *regs, unsigned long flags); -void arm64_syscall_exit_work(struct pt_regs *regs, unsigned long flags); - -static __always_inline void arm64_syscall_exit_to_user_mode_work(struct pt= _regs *regs) -{ - unsigned long flags =3D read_thread_flags(); - - rseq_syscall(regs); - - if (unlikely(flags & _TIF_SYSCALL_EXIT_WORK) || flags & _TIF_SINGLESTEP) - arm64_syscall_exit_work(regs, flags); -} - #endif /* __ASM_SYSCALL_H */ diff --git a/arch/arm64/include/asm/thread_info.h b/arch/arm64/include/asm/= thread_info.h index 56a2c9426a32..3f621ba0f961 100644 --- a/arch/arm64/include/asm/thread_info.h +++ b/arch/arm64/include/asm/thread_info.h @@ -46,6 +46,7 @@ struct thread_info { u64 mpam_partid_pmg; #endif u32 cpu; + unsigned long syscall_work; /* SYSCALL_WORK_ flags */ }; =20 #define thread_saved_pc(tsk) \ @@ -68,11 +69,6 @@ void arch_setup_new_exec(void); #define TIF_UPROBE 5 /* uprobe breakpoint or singlestep */ #define TIF_MTE_ASYNC_FAULT 6 /* MTE Asynchronous Tag Check Fault */ #define TIF_NOTIFY_SIGNAL 7 /* signal notifications exist */ -#define TIF_SYSCALL_TRACE 8 /* syscall trace active */ -#define TIF_SYSCALL_AUDIT 9 /* syscall auditing */ -#define TIF_SYSCALL_TRACEPOINT 10 /* syscall tracepoint for ftrace */ -#define TIF_SECCOMP 11 /* syscall secure computing */ -#define TIF_SYSCALL_EMU 12 /* syscall emulation active */ #define TIF_PATCH_PENDING 13 /* pending live patching update */ #define TIF_MEMDIE 18 /* is terminating due to OOM killer */ #define TIF_FREEZE 19 @@ -94,27 +90,14 @@ void arch_setup_new_exec(void); #define _TIF_NEED_RESCHED_LAZY (1 << TIF_NEED_RESCHED_LAZY) #define _TIF_NOTIFY_RESUME (1 << TIF_NOTIFY_RESUME) #define _TIF_FOREIGN_FPSTATE (1 << TIF_FOREIGN_FPSTATE) -#define _TIF_SYSCALL_TRACE (1 << TIF_SYSCALL_TRACE) -#define _TIF_SYSCALL_AUDIT (1 << TIF_SYSCALL_AUDIT) -#define _TIF_SYSCALL_TRACEPOINT (1 << TIF_SYSCALL_TRACEPOINT) -#define _TIF_SECCOMP (1 << TIF_SECCOMP) -#define _TIF_SYSCALL_EMU (1 << TIF_SYSCALL_EMU) #define _TIF_PATCH_PENDING (1 << TIF_PATCH_PENDING) #define _TIF_UPROBE (1 << TIF_UPROBE) -#define _TIF_SINGLESTEP (1 << TIF_SINGLESTEP) #define _TIF_32BIT (1 << TIF_32BIT) #define _TIF_SVE (1 << TIF_SVE) #define _TIF_MTE_ASYNC_FAULT (1 << TIF_MTE_ASYNC_FAULT) #define _TIF_NOTIFY_SIGNAL (1 << TIF_NOTIFY_SIGNAL) #define _TIF_TSC_SIGSEGV (1 << TIF_TSC_SIGSEGV) =20 -#define _TIF_SYSCALL_WORK (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT | \ - _TIF_SYSCALL_TRACEPOINT | _TIF_SECCOMP | \ - _TIF_SYSCALL_EMU) - -#define _TIF_SYSCALL_EXIT_WORK (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT | \ - _TIF_SYSCALL_TRACEPOINT) - #ifdef CONFIG_SHADOW_CALL_STACK #define INIT_SCS \ .scs_base =3D init_shadow_call_stack, \ diff --git a/arch/arm64/kernel/debug-monitors.c b/arch/arm64/kernel/debug-m= onitors.c index 29307642f4c9..c53683839155 100644 --- a/arch/arm64/kernel/debug-monitors.c +++ b/arch/arm64/kernel/debug-monitors.c @@ -385,11 +385,19 @@ void user_enable_single_step(struct task_struct *task) =20 if (!test_and_set_ti_thread_flag(ti, TIF_SINGLESTEP)) set_regs_spsr_ss(task_pt_regs(task)); + + /* + * Ensure that the generic entry code triggers a trap once stepping + * out of a system call prior to executing any user instruction, + * as the generic entry code does not natively check for TIF_SINGLESTEP. + */ + set_task_syscall_work(task, SYSCALL_EXIT_TRAP); } NOKPROBE_SYMBOL(user_enable_single_step); =20 void user_disable_single_step(struct task_struct *task) { clear_ti_thread_flag(task_thread_info(task), TIF_SINGLESTEP); + clear_task_syscall_work(task, SYSCALL_EXIT_TRAP); } NOKPROBE_SYMBOL(user_disable_single_step); diff --git a/arch/arm64/kernel/entry-common.c b/arch/arm64/kernel/entry-com= mon.c index ceb4eb11232a..9eac76804bd9 100644 --- a/arch/arm64/kernel/entry-common.c +++ b/arch/arm64/kernel/entry-common.c @@ -6,7 +6,7 @@ */ =20 #include -#include +#include #include #include #include diff --git a/arch/arm64/kernel/ptrace.c b/arch/arm64/kernel/ptrace.c index b2b28dcb2826..8bdee1805c93 100644 --- a/arch/arm64/kernel/ptrace.c +++ b/arch/arm64/kernel/ptrace.c @@ -8,7 +8,6 @@ * Copyright (C) 2012 ARM Ltd. */ =20 -#include #include #include #include @@ -18,7 +17,6 @@ #include #include #include -#include #include #include #include @@ -37,13 +35,9 @@ #include #include #include -#include #include #include =20 -#define CREATE_TRACE_POINTS -#include - struct pt_regs_offset { const char *name; int offset; @@ -2388,136 +2382,6 @@ long arch_ptrace(struct task_struct *child, long re= quest, return ptrace_request(child, request, addr, data); } =20 -enum ptrace_syscall_dir { - PTRACE_SYSCALL_ENTER =3D 0, - PTRACE_SYSCALL_EXIT, -}; - -static __always_inline unsigned long ptrace_save_reg(struct pt_regs *regs, - enum ptrace_syscall_dir dir, - int *regno) -{ - unsigned long saved_reg; - - /* - * We have some ABI weirdness here in the way that we handle syscall - * exit stops because we indicate whether or not the stop has been - * signalled from syscall entry or syscall exit by clobbering a general - * purpose register (ip/r12 for AArch32, x7 for AArch64) in the tracee - * and restoring its old value after the stop. This means that: - * - * - Any writes by the tracer to this register during the stop are - * ignored/discarded. - * - * - The actual value of the register is not available during the stop, - * so the tracer cannot save it and restore it later. - * - * - Syscall stops behave differently to seccomp and pseudo-step traps - * (the latter do not nobble any registers). - */ - *regno =3D (is_compat_task() ? 12 : 7); - saved_reg =3D regs->regs[*regno]; - regs->regs[*regno] =3D dir; - - return saved_reg; -} - -static int report_syscall_entry(struct pt_regs *regs) -{ - unsigned long saved_reg; - int regno, ret; - - saved_reg =3D ptrace_save_reg(regs, PTRACE_SYSCALL_ENTER, ®no); - ret =3D !ptrace_report_syscall_permit_entry(regs); - if (ret) - forget_syscall(regs); - regs->regs[regno] =3D saved_reg; - - return ret; -} - -static void report_syscall_exit(struct pt_regs *regs) -{ - unsigned long saved_reg; - int regno; - - saved_reg =3D ptrace_save_reg(regs, PTRACE_SYSCALL_EXIT, ®no); - if (!test_thread_flag(TIF_SINGLESTEP)) { - ptrace_report_syscall_exit(regs, 0); - regs->regs[regno] =3D saved_reg; - } else { - regs->regs[regno] =3D saved_reg; - - /* - * Signal a pseudo-step exception since we are stepping but - * tracer modifications to the registers may have rewound the - * state machine. - */ - ptrace_report_syscall_exit(regs, 1); - } -} - -#ifdef CONFIG_AUDITSYSCALL -static inline void syscall_enter_audit(struct pt_regs *regs) -{ - long syscall =3D syscall_get_nr(current, regs); - unsigned long args[6]; - - syscall_get_arguments(current, regs, args); - __audit_syscall_entry(syscall, args[0], args[1], args[2], args[3]); -} -#endif - -bool arm64_syscall_trace_enter(struct pt_regs *regs, unsigned long flags) -{ - int ret; - - if (flags & (_TIF_SYSCALL_EMU | _TIF_SYSCALL_TRACE)) { - ret =3D report_syscall_entry(regs); - if (ret || (flags & _TIF_SYSCALL_EMU)) - return false; - - /* ptrace might have changed thread flags */ - flags =3D read_thread_flags(); - } - - /* Do the secure computing after ptrace; failures should be fast. */ - if (unlikely(flags & _TIF_SECCOMP)) { - if (!__seccomp_permit_syscall()) - return false; - } - - if (test_thread_flag(TIF_SYSCALL_TRACEPOINT)) - trace_sys_enter(regs, syscall_get_nr(current, regs)); - - if (unlikely(audit_context())) - syscall_enter_audit(regs); - - return true; -} - -static inline bool report_single_step(unsigned long flags) -{ - if (flags & _TIF_SYSCALL_EMU) - return false; - - return flags & _TIF_SINGLESTEP; -} - -void arm64_syscall_exit_work(struct pt_regs *regs, unsigned long flags) -{ - bool step; - - audit_syscall_exit(regs); - - if (flags & _TIF_SYSCALL_TRACEPOINT) - trace_sys_exit(regs, syscall_get_return_value(current, regs)); - - step =3D report_single_step(flags); - if (step || flags & _TIF_SYSCALL_TRACE) - report_syscall_exit(regs); -} - /* * SPSR_ELx bits which are always architecturally RES0 per ARM DDI 0487D.a. * We permit userspace to set SSBS (AArch64 bit 12, AArch32 bit 23) which = is diff --git a/arch/arm64/kernel/signal.c b/arch/arm64/kernel/signal.c index 38e6fa204c17..093eebb9d764 100644 --- a/arch/arm64/kernel/signal.c +++ b/arch/arm64/kernel/signal.c @@ -8,8 +8,8 @@ =20 #include #include +#include #include -#include #include #include #include diff --git a/arch/arm64/kernel/syscall.c b/arch/arm64/kernel/syscall.c index 72c6e8b7ab21..4a13108defb0 100644 --- a/arch/arm64/kernel/syscall.c +++ b/arch/arm64/kernel/syscall.c @@ -2,6 +2,7 @@ =20 #include #include +#include #include #include #include @@ -58,6 +59,7 @@ static void el0_svc_common(struct pt_regs *regs, int scno= , int sc_nr, const syscall_fn_t syscall_table[]) { unsigned long flags =3D read_thread_flags(); + unsigned long work; =20 regs->orig_x0 =3D regs->regs[0]; regs->syscallno =3D scno; @@ -90,7 +92,8 @@ static void el0_svc_common(struct pt_regs *regs, int scno= , int sc_nr, return; } =20 - if (unlikely(flags & _TIF_SYSCALL_WORK)) { + work =3D READ_ONCE(current_thread_info()->syscall_work); + if (unlikely(work & SYSCALL_WORK_ENTER)) { /* * The de-facto standard way to skip a system call using ptrace * is to set the system call to -1 (NO_SYSCALL) and set x0 to a @@ -108,7 +111,7 @@ static void el0_svc_common(struct pt_regs *regs, int sc= no, int sc_nr, */ if (scno =3D=3D NO_SYSCALL) syscall_set_return_value(current, regs, -ENOSYS, 0); - if (!arm64_syscall_trace_enter(regs, read_thread_flags())) + if (!syscall_trace_enter(regs, work, scno)) goto trace_exit; =20 /* Reread the syscall number as it might have been modified */ @@ -119,7 +122,7 @@ static void el0_svc_common(struct pt_regs *regs, int sc= no, int sc_nr, =20 invoke_syscall(regs, scno, sc_nr, syscall_table); trace_exit: - arm64_syscall_exit_to_user_mode_work(regs); + syscall_exit_to_user_mode_work(regs); } =20 void do_el0_svc(struct pt_regs *regs) --=20 2.34.1 From nobody Sat Jul 25 01:25:38 2026 Received: from canpmsgout01.his.huawei.com (canpmsgout01.his.huawei.com [113.46.200.216]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5FEB544CF40 for ; Tue, 21 Jul 2026 08:19:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=113.46.200.216 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784621966; cv=none; b=qxWsmwMBVvNHzeTQlqnDbaHE992VhwcklpzHrAnQ+cGmL+bZ6UTx7Pgwq7ySwFdm7m5Aot42v0pN30+314OaAs7z6+3aSCl3vyx3PiRZEFD0gSVq3HdBx4IC6CI6bVi+Pu/rHCHxzZ8WjiNcSd/tVsgX0W6BWmDqH6BKdiLoiXs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784621966; c=relaxed/simple; bh=gQCqwMyijXQUPHUAAVu5D+LWgRlhb2dH81hwEWQXdms=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; 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Tue, 21 Jul 2026 16:09:56 +0800 (CST) Received: from dggpemf500011.china.huawei.com (unknown [7.185.36.131]) by mail.maildlp.com (Postfix) with ESMTPS id 3C0F54057F; Tue, 21 Jul 2026 16:19:15 +0800 (CST) Received: from huawei.com (10.90.53.73) by dggpemf500011.china.huawei.com (7.185.36.131) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.11; Tue, 21 Jul 2026 16:19:13 +0800 From: Jinjie Ruan To: , , , , , , , , , , , , , , , , , , , , , , CC: Subject: [PATCH v17 14/15] arm64: Inline el0_svc_common() Date: Tue, 21 Jul 2026 16:18:57 +0800 Message-ID: <20260721081858.1169276-15-ruanjinjie@huawei.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260721081858.1169276-1-ruanjinjie@huawei.com> References: <20260721081858.1169276-1-ruanjinjie@huawei.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: kwepems500001.china.huawei.com (7.221.188.70) To dggpemf500011.china.huawei.com (7.185.36.131) After converting arm64 to Generic Entry framework, the compiler no longer inlines el0_svc_common() into its caller do_el0_svc(). This introduces a small but measurable overhead in the critical system call path. Manually forcing el0_svc_common() to be inlined restores the performance. Benchmarking with perf bench syscall basic on a Kunpeng 920 platform (based on v6.19-rc1) shows a ~1% performance uplift. Inlining this function reduces function prologue/epilogue overhead and allows for better compiler optimization in the hot system call dispatch path. | Metric | W/O this patch | With this patch | Change | | ---------- | -------------- | --------------- | --------- | | Total time | 2.195 [sec] | 2.171 [sec] | =E2=86=931.1% | | usecs/op | 0.219575 | 0.217192 | =E2=86=931.1% | | ops/sec | 4,554,260 | 4,604,225 | =E2=86=911.1% | Cc: Mark Rutland Cc: Will Deacon Cc: Catalin Marinas Reviewed-by: Ada Couprie Diaz Reviewed-by: Linus Walleij Reviewed-by: Yeoreum Yun Reviewed-by: Kevin Brodsky Signed-off-by: Jinjie Ruan --- arch/arm64/kernel/syscall.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/kernel/syscall.c b/arch/arm64/kernel/syscall.c index 4a13108defb0..2535cae9413d 100644 --- a/arch/arm64/kernel/syscall.c +++ b/arch/arm64/kernel/syscall.c @@ -55,8 +55,8 @@ static void invoke_syscall(struct pt_regs *regs, unsigned= int scno, syscall_set_return_value(current, regs, 0, ret); } =20 -static void el0_svc_common(struct pt_regs *regs, int scno, int sc_nr, - const syscall_fn_t syscall_table[]) +static __always_inline void el0_svc_common(struct pt_regs *regs, int scno,= int sc_nr, + const syscall_fn_t syscall_table[]) { unsigned long flags =3D read_thread_flags(); unsigned long work; --=20 2.34.1 From nobody Sat Jul 25 01:25:38 2026 Received: from canpmsgout05.his.huawei.com (canpmsgout05.his.huawei.com [113.46.200.220]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 41C314657EE for ; Tue, 21 Jul 2026 08:19:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=113.46.200.220 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784621972; cv=none; b=rTx9V1V2xcYkmwHjpYFS4Afxlt9Xu/dvAqNeIgPxmffZvWB1qKyvO734lDUfbBX/tIdpbH04BudZNY2QDNRmxj9+m5YuJIXY2phXv1zaHDjSMxDsO6M3aS71Z156LhvHO6tTJQ5u0ZpaPG7+E583yH5k5/mdEFO1zS1L+a0in78= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784621972; c=relaxed/simple; bh=wKECfFVNNZa0c321DFEPH8BsliaCFgQfuccmmwQJDOM=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=S/MhX9Hay3HVp2Ic9qIInGkXy8CBFuBCnEhBw1RBJVe7EzoJJsqgBfKPJrm6co6tI2yfsM+vTFTmF6XaoxXxl75wQIrdGoRmnx/ZlEUxKzmKQliopGBi7HIGnOd3IqN7FPp3ZaofD2DP7vtvETE7s/au5EFUkiRN93X7Tz3bt6Y= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com; spf=pass smtp.mailfrom=huawei.com; dkim=pass (1024-bit key) header.d=huawei.com header.i=@huawei.com header.b=XNnIFRMh; arc=none smtp.client-ip=113.46.200.220 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=huawei.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=huawei.com header.i=@huawei.com header.b="XNnIFRMh" dkim-signature: v=1; a=rsa-sha256; d=huawei.com; s=dkim; c=relaxed/relaxed; q=dns/txt; h=From; bh=8T3SbzD1h+RgSp3yBQ/VbQfpUd/mcH1iQ870xzewBhQ=; b=XNnIFRMhLmbS0Tcl8aE6LZenU8BsoDEY6QOkftUcpa7z7s+VnU17Cr98KYYZhKBoc/TeTLBYJ cYKb6NhZyrS/KyaTkTf+1CuzVhHPFiRuYJ8JWHgqegmov+ixGsMN1tOUVymJNqorgoOMFcjMbUw o+pE6tIVdpI+Hv9ncW4JRq4= Received: from mail.maildlp.com (unknown [172.19.163.0]) by canpmsgout05.his.huawei.com (SkyGuard) with ESMTPS id 4h495y0V3dz12LDF; Tue, 21 Jul 2026 16:09:42 +0800 (CST) Received: from dggpemf500011.china.huawei.com (unknown [7.185.36.131]) by mail.maildlp.com (Postfix) with ESMTPS id 7DFD040537; Tue, 21 Jul 2026 16:19:16 +0800 (CST) Received: from huawei.com (10.90.53.73) by dggpemf500011.china.huawei.com (7.185.36.131) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.11; Tue, 21 Jul 2026 16:19:15 +0800 From: Jinjie Ruan To: , , , , , , , , , , , , , , , , , , , , , , CC: Subject: [PATCH v17 15/15] arm64: vdso: Expose sigreturn address on vdso to the kernel Date: Tue, 21 Jul 2026 16:18:58 +0800 Message-ID: <20260721081858.1169276-16-ruanjinjie@huawei.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260721081858.1169276-1-ruanjinjie@huawei.com> References: <20260721081858.1169276-1-ruanjinjie@huawei.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: kwepems500001.china.huawei.com (7.221.188.70) To dggpemf500011.china.huawei.com (7.185.36.131) Syscall User Dispatch (SUD) must not intercept the signal trampoline code, otherwise returning from a signal with a locked selector may cause infinite recursion into the signal handler. Provide an arm64 implementation of arch_syscall_is_vdso_sigreturn() to exclude these sigreturn syscalls from dispatch. For native 64-bit tasks, check whether the current PC matches the 'svc #0' instruction inside the vDSO sigreturn trampoline (defined in arch/arm64/kernel/vdso/sigreturn.S as below). SYM_CODE_START(__kernel_rt_sigreturn) mov x8, #__NR_rt_sigreturn svc #0 SYM_CODE_END(__kernel_rt_sigreturn) For COMPAT tasks, verify that the instruction falls within the dedicated 'sigpage' range, since compat signal handlers use this architecture- specific page (not the vDSO) for their return trampoline. This prevents SUD from incorrectly dispatching syscalls issued during signal return. Suggested-by: Thomas Wei=C3=9Fschuh Suggested-by: Kevin Brodsky Suggested-by: kemal Signed-off-by: Jinjie Ruan Reviewed-by: Thomas Wei=C3=9Fschuh --- arch/arm64/Kconfig | 1 + arch/arm64/include/asm/elf.h | 1 + arch/arm64/kernel/vdso.c | 16 ++++++++++++++++ arch/arm64/kernel/vdso/sigreturn.S | 1 + arch/arm64/kernel/vdso/vdso.lds.S | 1 + 5 files changed, 20 insertions(+) diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index aea686dce3d5..a41d2b593899 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -86,6 +86,7 @@ config ARM64 select ARCH_SUPPORTS_SCHED_SMT select ARCH_SUPPORTS_SCHED_CLUSTER select ARCH_SUPPORTS_SCHED_MC + select ARCH_SUPPORTS_SYSCALL_USER_DISPATCH select ARCH_WANT_BATCHED_UNMAP_TLB_FLUSH select ARCH_WANT_COMPAT_IPC_PARSE_VERSION if COMPAT select ARCH_WANT_DEFAULT_BPF_JIT diff --git a/arch/arm64/include/asm/elf.h b/arch/arm64/include/asm/elf.h index d2779d604c7b..a8b232c5c6d9 100644 --- a/arch/arm64/include/asm/elf.h +++ b/arch/arm64/include/asm/elf.h @@ -293,6 +293,7 @@ static inline int arch_check_elf(void *ehdr, bool has_i= nterp, return 0; } =20 +extern bool arch_syscall_is_vdso_sigreturn(struct pt_regs *regs); #endif /* !__ASSEMBLER__ */ =20 #endif diff --git a/arch/arm64/kernel/vdso.c b/arch/arm64/kernel/vdso.c index 592dd8668de4..37cdc7c72e15 100644 --- a/arch/arm64/kernel/vdso.c +++ b/arch/arm64/kernel/vdso.c @@ -343,3 +343,19 @@ int arch_setup_additional_pages(struct linux_binprm *b= prm, int uses_interp) =20 return ret; } + +bool arch_syscall_is_vdso_sigreturn(struct pt_regs *regs) +{ + unsigned long landing_pad; + +#ifdef CONFIG_COMPAT + if (is_compat_task()) { + unsigned long sigpage =3D (unsigned long)current->mm->context.sigpage; + + return regs->pc >=3D sigpage && regs->pc < (sigpage + PAGE_SIZE); + } +#endif + landing_pad =3D (unsigned long)VDSO_SYMBOL(current->mm->context.vdso, sig= return_landing_pad); + + return regs->pc =3D=3D landing_pad; +} diff --git a/arch/arm64/kernel/vdso/sigreturn.S b/arch/arm64/kernel/vdso/si= greturn.S index 0e18729abc3b..8d2d413ff45e 100644 --- a/arch/arm64/kernel/vdso/sigreturn.S +++ b/arch/arm64/kernel/vdso/sigreturn.S @@ -73,6 +73,7 @@ SYM_CODE_START(__kernel_rt_sigreturn) mov x8, #__NR_rt_sigreturn // PLEASE DO NOT MODIFY svc #0 + SYM_INNER_LABEL(__sigreturn_landing_pad, SYM_L_GLOBAL) // PLEASE DO NOT MODIFY // .cfi_endproc SYM_CODE_END(__kernel_rt_sigreturn) diff --git a/arch/arm64/kernel/vdso/vdso.lds.S b/arch/arm64/kernel/vdso/vds= o.lds.S index 52314be29191..da61d6fc6fe9 100644 --- a/arch/arm64/kernel/vdso/vdso.lds.S +++ b/arch/arm64/kernel/vdso/vdso.lds.S @@ -112,3 +112,4 @@ VERSION * Make the sigreturn code visible to the kernel. */ VDSO_sigtramp =3D __kernel_rt_sigreturn; +VDSO_sigreturn_landing_pad =3D __sigreturn_landing_pad; --=20 2.34.1