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[61.228.16.100]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2cf3479463bsm58467385ad.80.2026.07.20.09.21.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Jul 2026 09:21:24 -0700 (PDT) From: Shih-Yuan Lee To: Mark Brown Cc: Andy Shevchenko , Mika Westerberg , Lukas Wunner , Daniel Mack , Haojian Zhuang , Robert Jarzmik , linux-arm-kernel@lists.infradead.org, linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org, Shih-Yuan Lee Subject: [PATCH v16 1/7] spi: pxa2xx: introduce clock enable and disable helper functions Date: Tue, 21 Jul 2026 00:21:10 +0800 Message-Id: <20260720162117.32304-2-fourdollars@debian.org> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20260720162117.32304-1-fourdollars@debian.org> References: <20260720162117.32304-1-fourdollars@debian.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The driver disables the clock during PM runtime suspend, PM system suspend, and device unbinding (remove). It also disables the clock on various error unwinding paths in pxa2xx_spi_probe(). However, if the clock is already disabled (for example, if the device is already runtime-suspended during driver unbinding), calling the common clock framework's clk_disable_unprepare() again leads to clock prepare/enab= le count underflows, generating kernel warnings. Introduce pxa2xx_spi_clk_enable() and pxa2xx_spi_clk_disable() helper functions that track the clock enable state using a new 'clk_enabled' boolean flag in struct driver_data. This ensures clk_disable_unprepare() is called only when the clock is active, preventing clock underflows during suspend transitions and unbind. It also allows the probe function to safely unwind resource allocations without triggering clock underflows. Signed-off-by: Shih-Yuan Lee --- drivers/spi/spi-pxa2xx.c | 37 +++++++++++++++++++++++++++++-------- drivers/spi/spi-pxa2xx.h | 2 ++ 2 files changed, 31 insertions(+), 8 deletions(-) diff --git a/drivers/spi/spi-pxa2xx.c b/drivers/spi/spi-pxa2xx.c index 6291d7c2e06f..d50152aad348 100644 --- a/drivers/spi/spi-pxa2xx.c +++ b/drivers/spi/spi-pxa2xx.c @@ -713,6 +713,28 @@ static void handle_bad_msg(struct driver_data *drv_dat= a) dev_err(drv_data->ssp->dev, "bad message state in interrupt handler\n"); } =20 +static int pxa2xx_spi_clk_enable(struct driver_data *drv_data) +{ + int ret; + + if (drv_data->clk_enabled) + return 0; + + ret =3D clk_prepare_enable(drv_data->ssp->clk); + if (ret =3D=3D 0) + drv_data->clk_enabled =3D true; + + return ret; +} + +static void pxa2xx_spi_clk_disable(struct driver_data *drv_data) +{ + if (drv_data->clk_enabled) { + clk_disable_unprepare(drv_data->ssp->clk); + drv_data->clk_enabled =3D false; + } +} + static irqreturn_t ssp_int(int irq, void *dev_id) { struct driver_data *drv_data =3D dev_id; @@ -1352,7 +1374,7 @@ int pxa2xx_spi_probe(struct device *dev, struct ssp_d= evice *ssp, } =20 /* Enable SOC clock */ - status =3D clk_prepare_enable(ssp->clk); + status =3D pxa2xx_spi_clk_enable(drv_data); if (status) goto out_error_dma_irq_alloc; =20 @@ -1449,7 +1471,7 @@ int pxa2xx_spi_probe(struct device *dev, struct ssp_d= evice *ssp, return status; =20 out_error_clock_enabled: - clk_disable_unprepare(ssp->clk); + pxa2xx_spi_clk_disable(drv_data); =20 out_error_dma_irq_alloc: pxa2xx_spi_dma_release(drv_data); @@ -1468,7 +1490,7 @@ void pxa2xx_spi_remove(struct device *dev) =20 /* Disable the SSP at the peripheral and SOC level */ pxa_ssp_disable(ssp); - clk_disable_unprepare(ssp->clk); + pxa2xx_spi_clk_disable(drv_data); =20 /* Release DMA */ if (drv_data->controller_info->enable_dma) @@ -1492,7 +1514,7 @@ static int pxa2xx_spi_suspend(struct device *dev) pxa_ssp_disable(ssp); =20 if (!pm_runtime_suspended(dev)) - clk_disable_unprepare(ssp->clk); + pxa2xx_spi_clk_disable(drv_data); =20 return 0; } @@ -1500,12 +1522,11 @@ static int pxa2xx_spi_suspend(struct device *dev) static int pxa2xx_spi_resume(struct device *dev) { struct driver_data *drv_data =3D dev_get_drvdata(dev); - struct ssp_device *ssp =3D drv_data->ssp; int status; =20 /* Enable the SSP clock */ if (!pm_runtime_suspended(dev)) { - status =3D clk_prepare_enable(ssp->clk); + status =3D pxa2xx_spi_clk_enable(drv_data); if (status) return status; } @@ -1518,7 +1539,7 @@ static int pxa2xx_spi_runtime_suspend(struct device *= dev) { struct driver_data *drv_data =3D dev_get_drvdata(dev); =20 - clk_disable_unprepare(drv_data->ssp->clk); + pxa2xx_spi_clk_disable(drv_data); return 0; } =20 @@ -1526,7 +1547,7 @@ static int pxa2xx_spi_runtime_resume(struct device *d= ev) { struct driver_data *drv_data =3D dev_get_drvdata(dev); =20 - return clk_prepare_enable(drv_data->ssp->clk); + return pxa2xx_spi_clk_enable(drv_data); } =20 EXPORT_NS_GPL_DEV_PM_OPS(pxa2xx_spi_pm_ops, SPI_PXA2xx) =3D { diff --git a/drivers/spi/spi-pxa2xx.h b/drivers/spi/spi-pxa2xx.h index 447be0369384..820e573a3c60 100644 --- a/drivers/spi/spi-pxa2xx.h +++ b/drivers/spi/spi-pxa2xx.h @@ -72,6 +72,8 @@ struct driver_data { =20 void __iomem *lpss_base; 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[61.228.16.100]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2cf3479463bsm58467385ad.80.2026.07.20.09.21.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Jul 2026 09:21:27 -0700 (PDT) From: Shih-Yuan Lee To: Mark Brown Cc: Andy Shevchenko , Mika Westerberg , Lukas Wunner , Daniel Mack , Haojian Zhuang , Robert Jarzmik , linux-arm-kernel@lists.infradead.org, linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org, Shih-Yuan Lee Subject: [PATCH v16 2/7] spi: pxa2xx: introduce suspended flag for interrupt synchronization Date: Tue, 21 Jul 2026 00:21:11 +0800 Message-Id: <20260720162117.32304-3-fourdollars@debian.org> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20260720162117.32304-1-fourdollars@debian.org> References: <20260720162117.32304-1-fourdollars@debian.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" When a shared interrupt line is used, the interrupt handler ssp_int() can be triggered by other devices sharing the line. The handler must ensure it does not access the SSP controller registers via MMIO when the device is powered down or when its clock is gated; otherwise, it will cause PCIe Completion Timeouts and system hangs. Currently, ssp_int() guards MMIO access using: if (pm_runtime_suspended(drv_data->ssp->dev)) return IRQ_NONE; However, during PM transitions (such as system suspend or runtime PM autosuspend), device callbacks execute to disable the hardware and gate the clock, but the PM state machine does not mark the device as RPM_SUSPENDED until after the suspend callback returns. During this transitional state (RPM_SUSPENDING), pm_runtime_suspended() returns false. If a shared interrupt fires after the clock has been gated but before the PM state has transitioned, ssp_int() will execute, attempt MMIO reads on the unclocked register space, and hang the system. Formal verification using Spin/PROMELA confirms that a scheduling window exists where the interrupt thread accesses MMIO when clk_enabled is false, violating safety properties. Introduce a custom 'suspended' boolean flag in struct driver_data to track the device's suspended state across all PM transitions. Check both 'drv_data->suspended' and '!drv_data->clk_enabled' in ssp_int() to return IRQ_NONE immediately before any MMIO access is attempted. This closes the state transition race condition and mathematically guarante= es deadlock-free, safe shared interrupt handling during power transitions. Signed-off-by: Shih-Yuan Lee --- drivers/spi/spi-pxa2xx.c | 51 ++++++++++++++++++++++++++-------------- drivers/spi/spi-pxa2xx.h | 1 + 2 files changed, 35 insertions(+), 17 deletions(-) diff --git a/drivers/spi/spi-pxa2xx.c b/drivers/spi/spi-pxa2xx.c index d50152aad348..c44349ab2b52 100644 --- a/drivers/spi/spi-pxa2xx.c +++ b/drivers/spi/spi-pxa2xx.c @@ -730,8 +730,8 @@ static int pxa2xx_spi_clk_enable(struct driver_data *dr= v_data) static void pxa2xx_spi_clk_disable(struct driver_data *drv_data) { if (drv_data->clk_enabled) { - clk_disable_unprepare(drv_data->ssp->clk); drv_data->clk_enabled =3D false; + clk_disable_unprepare(drv_data->ssp->clk); } } =20 @@ -743,12 +743,12 @@ static irqreturn_t ssp_int(int irq, void *dev_id) u32 status; =20 /* - * The IRQ might be shared with other peripherals so we must first - * check that are we RPM suspended or not. If we are we assume that - * the IRQ was not for us (we shouldn't be RPM suspended when the - * interrupt is enabled). + * The IRQ might be shared with other peripherals or trigger during + * power state transitions. First check if device is suspended or if + * clock is disabled; if so, return IRQ_NONE immediately to avoid + * unclocked MMIO reads. */ - if (pm_runtime_suspended(drv_data->ssp->dev)) + if (drv_data->suspended || !drv_data->clk_enabled) return IRQ_NONE; =20 /* @@ -1310,6 +1310,7 @@ int pxa2xx_spi_probe(struct device *dev, struct ssp_d= evice *ssp, drv_data->controller =3D controller; drv_data->controller_info =3D platform_info; drv_data->ssp =3D ssp; + drv_data->suspended =3D true; =20 /* The spi->mode bits understood by this driver: */ controller->mode_bits =3D SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LOOP; @@ -1352,11 +1353,6 @@ int pxa2xx_spi_probe(struct device *dev, struct ssp_= device *ssp, | SSSR_ROR | SSSR_TUR; } =20 - status =3D request_irq(ssp->irq, ssp_int, IRQF_SHARED, dev_name(dev), - drv_data); - if (status < 0) - return dev_err_probe(dev, status, "cannot get IRQ %d\n", ssp->irq); - /* Setup DMA if requested */ if (platform_info->enable_dma) { status =3D pxa2xx_spi_dma_setup(drv_data); @@ -1376,7 +1372,16 @@ int pxa2xx_spi_probe(struct device *dev, struct ssp_= device *ssp, /* Enable SOC clock */ status =3D pxa2xx_spi_clk_enable(drv_data); if (status) - goto out_error_dma_irq_alloc; + goto out_error_dma_alloc; + + drv_data->suspended =3D false; + + status =3D request_irq(ssp->irq, ssp_int, IRQF_SHARED, dev_name(dev), + drv_data); + if (status < 0) { + status =3D dev_err_probe(dev, status, "cannot get IRQ %d\n", ssp->irq); + goto out_error_clock_enabled; + } =20 controller->max_speed_hz =3D clk_get_rate(ssp->clk); /* @@ -1456,7 +1461,7 @@ int pxa2xx_spi_probe(struct device *dev, struct ssp_d= evice *ssp, "ready", GPIOD_OUT_LOW); if (IS_ERR(drv_data->gpiod_ready)) { status =3D PTR_ERR(drv_data->gpiod_ready); - goto out_error_clock_enabled; + goto out_error_irq_alloc; } } =20 @@ -1465,17 +1470,19 @@ int pxa2xx_spi_probe(struct device *dev, struct ssp= _device *ssp, status =3D spi_register_controller(controller); if (status) { dev_err_probe(dev, status, "problem registering SPI controller\n"); - goto out_error_clock_enabled; + goto out_error_irq_alloc; } =20 return status; =20 +out_error_irq_alloc: + free_irq(ssp->irq, drv_data); + out_error_clock_enabled: pxa2xx_spi_clk_disable(drv_data); =20 -out_error_dma_irq_alloc: +out_error_dma_alloc: pxa2xx_spi_dma_release(drv_data); - free_irq(ssp->irq, drv_data); =20 return status; } @@ -1511,6 +1518,7 @@ static int pxa2xx_spi_suspend(struct device *dev) if (status) return status; =20 + drv_data->suspended =3D true; pxa_ssp_disable(ssp); =20 if (!pm_runtime_suspended(dev)) @@ -1531,6 +1539,8 @@ static int pxa2xx_spi_resume(struct device *dev) return status; } =20 + drv_data->suspended =3D false; + /* Start the queue running */ return spi_controller_resume(drv_data->controller); } @@ -1539,6 +1549,7 @@ static int pxa2xx_spi_runtime_suspend(struct device *= dev) { struct driver_data *drv_data =3D dev_get_drvdata(dev); =20 + drv_data->suspended =3D true; pxa2xx_spi_clk_disable(drv_data); return 0; } @@ -1546,8 +1557,14 @@ static int pxa2xx_spi_runtime_suspend(struct device = *dev) static int pxa2xx_spi_runtime_resume(struct device *dev) { struct driver_data *drv_data =3D dev_get_drvdata(dev); + int ret; =20 - return pxa2xx_spi_clk_enable(drv_data); + ret =3D pxa2xx_spi_clk_enable(drv_data); + if (ret) + return ret; + + drv_data->suspended =3D false; + return 0; } =20 EXPORT_NS_GPL_DEV_PM_OPS(pxa2xx_spi_pm_ops, SPI_PXA2xx) =3D { diff --git a/drivers/spi/spi-pxa2xx.h b/drivers/spi/spi-pxa2xx.h index 820e573a3c60..44f37bf9c519 100644 --- a/drivers/spi/spi-pxa2xx.h +++ b/drivers/spi/spi-pxa2xx.h @@ -72,6 +72,7 @@ struct driver_data { =20 void __iomem *lpss_base; =20 + bool suspended; bool clk_enabled; =20 /* Optional slave FIFO ready signal */ --=20 2.39.5 From nobody Sat Jul 25 02:11:17 2026 Received: from mail-pl1-f170.google.com (mail-pl1-f170.google.com [209.85.214.170]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4024643C7CA for ; Mon, 20 Jul 2026 16:21:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.170 ARC-Seal: i=1; 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[61.228.16.100]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2cf3479463bsm58467385ad.80.2026.07.20.09.21.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Jul 2026 09:21:29 -0700 (PDT) From: Shih-Yuan Lee To: Mark Brown Cc: Andy Shevchenko , Mika Westerberg , Lukas Wunner , Daniel Mack , Haojian Zhuang , Robert Jarzmik , linux-arm-kernel@lists.infradead.org, linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org, Shih-Yuan Lee Subject: [PATCH v16 3/7] spi: pxa2xx: overhaul teardown and suspend sequence using pxa2xx_spi_off Date: Tue, 21 Jul 2026 00:21:12 +0800 Message-Id: <20260720162117.32304-4-fourdollars@debian.org> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20260720162117.32304-1-fourdollars@debian.org> References: <20260720162117.32304-1-fourdollars@debian.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" When removing the driver or suspending the device, the clock must not be disabled while shared interrupts are still active. Gating the clock before waiting for in-flight interrupt handlers to complete results in race conditions where the handler performs unclocked MMIO accesses, causing PCIe Completion Timeouts. Overhaul the remove, suspend, and runtime_suspend paths to use a strict synchronized teardown order: 1. Disable hardware interrupt generation at the controller level. 2. Mark the device state as suspended (suspended =3D true) to prevent subsequent interrupt handlers from attempting MMIO reads. 3. Call synchronize_irq() to wait for any active interrupt handlers to drain completely. 4. Gate the clock via pxa2xx_spi_clk_disable(). Additionally, commit 29d7e05c5f75 ("spi: pxa2xx: Avoid touching SSCR0_SSE on MMP2") documented that disabling the hardware block via SSE on MMP2 SoC platforms corrupts the RX/TX FIFO. Instead of calling pxa_ssp_disable() directly, use the helper function pxa2xx_spi_off(), which respects the MMP2 platform quirk by bypassing SSE register writes. Signed-off-by: Shih-Yuan Lee --- drivers/spi/spi-pxa2xx.c | 45 ++++++++++++++++++++++++++++------------ 1 file changed, 32 insertions(+), 13 deletions(-) diff --git a/drivers/spi/spi-pxa2xx.c b/drivers/spi/spi-pxa2xx.c index c44349ab2b52..6bfd3382acc3 100644 --- a/drivers/spi/spi-pxa2xx.c +++ b/drivers/spi/spi-pxa2xx.c @@ -1495,16 +1495,24 @@ void pxa2xx_spi_remove(struct device *dev) =20 spi_unregister_controller(drv_data->controller); =20 - /* Disable the SSP at the peripheral and SOC level */ - pxa_ssp_disable(ssp); + /* Disable SSP interrupt generation on hardware level while clock is acti= ve */ + pxa2xx_spi_off(drv_data); + + /* Mark as suspended to prevent further IRQ handling */ + drv_data->suspended =3D true; + + /* Wait for any pending interrupt handlers to complete */ + synchronize_irq(ssp->irq); + + /* Release IRQ */ + free_irq(ssp->irq, drv_data); + + /* Safe to disable the SSP clock now */ pxa2xx_spi_clk_disable(drv_data); =20 /* Release DMA */ if (drv_data->controller_info->enable_dma) pxa2xx_spi_dma_release(drv_data); - - /* Release IRQ */ - free_irq(ssp->irq, drv_data); } EXPORT_SYMBOL_NS_GPL(pxa2xx_spi_remove, "SPI_PXA2xx"); =20 @@ -1519,10 +1527,10 @@ static int pxa2xx_spi_suspend(struct device *dev) return status; =20 drv_data->suspended =3D true; - pxa_ssp_disable(ssp); + pxa2xx_spi_off(drv_data); + synchronize_irq(ssp->irq); =20 - if (!pm_runtime_suspended(dev)) - pxa2xx_spi_clk_disable(drv_data); + pxa2xx_spi_clk_disable(drv_data); =20 return 0; } @@ -1530,6 +1538,7 @@ static int pxa2xx_spi_suspend(struct device *dev) static int pxa2xx_spi_resume(struct device *dev) { struct driver_data *drv_data =3D dev_get_drvdata(dev); + struct ssp_device *ssp =3D drv_data->ssp; int status; =20 /* Enable the SSP clock */ @@ -1542,7 +1551,15 @@ static int pxa2xx_spi_resume(struct device *dev) drv_data->suspended =3D false; =20 /* Start the queue running */ - return spi_controller_resume(drv_data->controller); + status =3D spi_controller_resume(drv_data->controller); + if (status) { + drv_data->suspended =3D true; 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[61.228.16.100]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2cf3479463bsm58467385ad.80.2026.07.20.09.21.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Jul 2026 09:21:32 -0700 (PDT) From: Shih-Yuan Lee To: Mark Brown Cc: Andy Shevchenko , Mika Westerberg , Lukas Wunner , Daniel Mack , Haojian Zhuang , Robert Jarzmik , linux-arm-kernel@lists.infradead.org, linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org, Shih-Yuan Lee Subject: [PATCH v16 4/7] spi: pxa2xx: lock out runtime autosuspend for Intel LPSS SPI in PIO mode Date: Tue, 21 Jul 2026 00:21:13 +0800 Message-Id: <20260720162117.32304-5-fourdollars@debian.org> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20260720162117.32304-1-fourdollars@debian.org> References: <20260720162117.32304-1-fourdollars@debian.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" When operating in PIO mode on Intel LPSS SPI controllers, runtime PM autosuspend clock-gates the hardware block when idle. On subsequent transfers, MMIO accesses to trigger resume are performed before the runtime PM state machine can wake the controller, causing PCIe Completion Timeouts. This issue does not affect DMA mode, where the DMA engine holds the required resources, nor does it affect non-LPSS controllers. Lock out runtime PM autosuspend for LPSS SPI controllers specifically when operating in PIO mode. Acquire a runtime PM reference via pm_runtime_get_noresume() in pxa2xx_spi_probe() after registration, and release it via pm_runtime_put_noidle() in pxa2xx_spi_remove() before hardware teardown to ensure the runtime PM reference held in probe is released without invoking runtime_suspend on already-unclocked hardware. Signed-off-by: Shih-Yuan Lee --- drivers/spi/spi-pxa2xx.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/spi/spi-pxa2xx.c b/drivers/spi/spi-pxa2xx.c index 6bfd3382acc3..34241a6742eb 100644 --- a/drivers/spi/spi-pxa2xx.c +++ b/drivers/spi/spi-pxa2xx.c @@ -1473,6 +1473,9 @@ int pxa2xx_spi_probe(struct device *dev, struct ssp_d= evice *ssp, goto out_error_irq_alloc; } =20 + if (is_lpss_ssp(drv_data) && !platform_info->enable_dma) + pm_runtime_get_noresume(dev); + return status; =20 out_error_irq_alloc: @@ -1495,6 +1498,13 @@ void pxa2xx_spi_remove(struct device *dev) =20 spi_unregister_controller(drv_data->controller); =20 + /* Release the PM reference held in probe for LPSS PIO mode before + * hardware teardown so the PM core does not invoke runtime_suspend + * on already-unclocked hardware. + */ + if (is_lpss_ssp(drv_data) && !drv_data->controller_info->enable_dma) + pm_runtime_put_noidle(dev); + /* Disable SSP interrupt generation on hardware level while clock is acti= ve */ pxa2xx_spi_off(drv_data); =20 --=20 2.39.5 From nobody Sat Jul 25 02:11:17 2026 Received: from mail-pl1-f171.google.com (mail-pl1-f171.google.com [209.85.214.171]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6666643D4EF for ; Mon, 20 Jul 2026 16:21:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.171 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784564498; cv=none; b=ZTwqqpwbK3BNJx5+YzjvXU7zd30Sf9hY5nrfrKPuf4PR5DHjKWw7hmW5+RKTk9HQeumyUMlIyaL22iQb/eDDwoNxrDHPdqpoSMvFKNEiXiYT34qtcboxmdWYbgW0/EI+V4p/sMY/RqhN+h3Gd3dNXDcSwD/vsAmD7XKaASHT/n8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784564498; c=relaxed/simple; bh=vMxi0GBCmk6kSxxY3msXn6b8DUdRebKtLoidNsiWryg=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=lPC1UPRWFGf7t1oE+lxLe2q2KNSgEZjhOGb/CKJQ6Hw6XWT00QH1as/y49tSRqoEJwkg0EpRa9vvmbJZTux3zEkd+kKdPBDkE+UcJxBA02HqTbNTl+unUOGHIlg7XYJ4kCzsZG/jxU2QBatVBfTa6F7YUrxbom5c6Rk67Fl+btw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=fail (p=none dis=none) header.from=debian.org; spf=pass smtp.mailfrom=gmail.com; arc=none smtp.client-ip=209.85.214.171 Authentication-Results: smtp.subspace.kernel.org; dmarc=fail (p=none dis=none) header.from=debian.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-pl1-f171.google.com with SMTP id d9443c01a7336-2ccf2360620so62522665ad.3 for ; Mon, 20 Jul 2026 09:21:36 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1784564496; x=1785169296; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=lgLs8NK0XHHTysnGduh8WTtXMi/Zls+hjiJh2kwYBOI=; b=AwErBuPOkQRTmGliIL9ZuNGpFwTUoU41UCtL0yNSoNAJ+TynmP3WrayBI0jV3RZ8cC rJjzFftDxjeUcY1R56E640eHYp3U9iGpLit5E4abwieBuayXZ5Q/Z31kk84DLCT3fXCY S2DVO0Tbx8UXqNNKxcmPESxKUwtG3Bp+ZbCE83gtuitFi48F5RH0/s0o0s6qQ0YOgbqK /KtRdZnoKoBbteqWqJCAyty7DGDlF/i8aB96nakxJtYnlPRcmbo4ueLLmWpDtLhPpUMv kBfLZN3L4XA33NF6VyDQ7x2/4r0JRvpZKPTkv2XggwsqMgLrtXnbnpBVK+WOq91DUUKO OxGQ== X-Forwarded-Encrypted: i=1; AHgh+RqNWcyAtofnJBwAJkAta4wFdOtYj85AFw8Ux5xFCaQLNBIHpExJsIF1JORyTWUoUJzr6SCtT8gwfIU4V1s=@vger.kernel.org X-Gm-Message-State: AOJu0YzHQa2z+F0rpUec8s8zhRehiMl8Jvzvg0CwgoYuzncKL3n2/yKR MB56VAlkPKElznzFLFaG3P0TA+1jaEd938W9VJWwf29tPBvX5NbcYCs= X-Gm-Gg: AR+sD13ugmUsyyHpsug/Wd9ltbKkslaeQKpCgaZN+aZLWbC0qLLcuKtSFWvJsg2xTDo UMDnovIWUNnlz9AFVLMp17q0xczvn5vch7aLNvtVojotjP5bMfTIKCI3khwkQhB0HxXvji87FJj pk6Fe+wtdlCY3HittS8YB9UAXn48znKXqt62RuyUeqK4K6n0VxPw0zOIox14w+H6zz9pWcFAtNT MHwqPFF9bsh/VvcXgJvU0t2ZLnel5UYQjoBO5+uY49E+2bb8MgfauiItRLvSSOJ6JF21NSaaxOn EjV5c0ANVSRwIs472gev4HOglEBrHIiGsAyAJAU/ONem29rq/a8XBe7Z+9AnhRrvKQ0zWCclqOb qw1a6ro8fh3XbKCwujNQHf+LbqMYh0JRQEZ7acp2Sa0k49JG7lc8tNUDCTsbA9Nm7lJsgAN3wAF fgmhGXXJjmB/y6lEz0lqvcPXxIi0e0YA6owBAH04rTUYyvqbvNZ7VO5NZ4PnJyHj0CqtRHJ4OJa 3XguK+bbj+So1gDug== X-Received: by 2002:a17:903:2350:b0:2c6:a981:b591 with SMTP id d9443c01a7336-2cf349961dcmr158135355ad.30.1784564495679; Mon, 20 Jul 2026 09:21:35 -0700 (PDT) Received: from penguin.tail0a1999.ts.net (61-228-16-100.dynamic-ip.hinet.net. [61.228.16.100]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2cf3479463bsm58467385ad.80.2026.07.20.09.21.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Jul 2026 09:21:35 -0700 (PDT) From: Shih-Yuan Lee To: Mark Brown Cc: Andy Shevchenko , Mika Westerberg , Lukas Wunner , Daniel Mack , Haojian Zhuang , Robert Jarzmik , linux-arm-kernel@lists.infradead.org, linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org, Shih-Yuan Lee Subject: [PATCH v16 5/7] spi: pxa2xx: disable DMA for Apple MacBook8,1 Date: Tue, 21 Jul 2026 00:21:14 +0800 Message-Id: <20260720162117.32304-6-fourdollars@debian.org> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20260720162117.32304-1-fourdollars@debian.org> References: <20260720162117.32304-1-fourdollars@debian.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" On MacBook8,1 (early 2015 12" MacBook), the LPSS SPI controller at 00:15.4 suffers from hardware DMA handshake failures and interrupt routing bugs, causing keyboard/touchpad transactions to fail when DMA is enabled. Move the forced PIO mode DMI quirk to spi-pxa2xx-pci.c (the LPSS host controller PCI glue driver) to avoid layering violations in client drivers (such as applespi). Add an explicit DMI match table for MacBook8,1 and a module parameter spi_pxa2xx_force_pio to allow forcing PIO mode on demand. Link: https://bugzilla.kernel.org/show_bug.cgi?id=3D108331 Signed-off-by: Shih-Yuan Lee --- drivers/spi/spi-pxa2xx-pci.c | 35 +++++++++++++++++++++++++++++++++-- 1 file changed, 33 insertions(+), 2 deletions(-) diff --git a/drivers/spi/spi-pxa2xx-pci.c b/drivers/spi/spi-pxa2xx-pci.c index cae77ac18520..31bdaa096d9e 100644 --- a/drivers/spi/spi-pxa2xx-pci.c +++ b/drivers/spi/spi-pxa2xx-pci.c @@ -18,9 +18,14 @@ =20 #include #include +#include =20 #include "spi-pxa2xx.h" =20 +static bool spi_pxa2xx_force_pio; +module_param_named(force_pio, spi_pxa2xx_force_pio, bool, 0444); +MODULE_PARM_DESC(force_pio, "Force PIO mode (disables DMA) for SPI transfe= rs. ([0] =3D disabled, 1 =3D enabled)"); + #define PCI_DEVICE_ID_INTEL_QUARK_X1000 0x0935 #define PCI_DEVICE_ID_INTEL_BYT 0x0f0e #define PCI_DEVICE_ID_INTEL_MRFLD 0x1194 @@ -93,6 +98,32 @@ static void lpss_dma_put_device(void *dma_dev) pci_dev_put(dma_dev); } =20 +static const struct dmi_system_id pxa2xx_spi_pci_dmi_table[] =3D { + { + .ident =3D "Apple MacBook8,1", + .matches =3D { + DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."), + DMI_MATCH(DMI_PRODUCT_NAME, "MacBook8,1"), + }, + }, + { } +}; + +static bool pxa2xx_spi_pci_can_dma(struct pci_dev *dev) +{ + if (spi_pxa2xx_force_pio) { + pci_info(dev, "Forcing PIO mode (disabling DMA)\n"); + return false; + } + + if (dmi_check_system(pxa2xx_spi_pci_dmi_table)) { + pci_info(dev, "MacBook8,1 detected: disabling DMA to force PIO mode\n"); + return false; + } + + return true; +} + static int lpss_spi_setup(struct pci_dev *dev, struct pxa2xx_spi_controlle= r *c) { struct ssp_device *ssp =3D &c->ssp; @@ -166,7 +197,7 @@ static int lpss_spi_setup(struct pci_dev *dev, struct p= xa2xx_spi_controller *c) =20 c->dma_filter =3D lpss_dma_filter; c->dma_burst_size =3D 1; - c->enable_dma =3D 1; + c->enable_dma =3D pxa2xx_spi_pci_can_dma(dev); return 0; } =20 @@ -238,7 +269,7 @@ static int mrfld_spi_setup(struct pci_dev *dev, struct = pxa2xx_spi_controller *c) =20 c->dma_filter =3D lpss_dma_filter; c->dma_burst_size =3D 8; - c->enable_dma =3D 1; + c->enable_dma =3D pxa2xx_spi_pci_can_dma(dev); return 0; } =20 --=20 2.39.5 From nobody Sat Jul 25 02:11:17 2026 Received: from mail-pl1-f169.google.com (mail-pl1-f169.google.com [209.85.214.169]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9456C43E4B9 for ; Mon, 20 Jul 2026 16:21:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.169 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784564504; cv=none; b=jG/9DP9lJA+7dBcVjtWLzw3w8L6Xp5o0WMw49lQa5VVLBgOfIMAZemib4OE3Iw3IG8N4r6wih9INvU8JBbyLUczIx/vuwshWlBQg0UvKh+5d+RGisfWTNBS07QzKBXbSzeIN7VH1wyYbikx3ogCoaazW0n1EXaEpoYWLxbavE2E= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784564504; c=relaxed/simple; bh=iS7PVNN5Owebkj5FvDrN/m+SHqVNAdifSioUypixLtw=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=ZGQsyWUbYBsv3i7Uc1n7Qgpf/z3yC5Yn+NKgXr1J17unTSqtZcDa/sEwbEoqC1u/xVHq4Kowki5ApvYAsgJsr5aYZtYFLvxaaKSnh3vwzi59EYFYivBTvl3udncbucJwL5PlOFx/lhPTrJRACYC0Ub5WO5/MqO7aGs/5uMYKAQM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=fail (p=none dis=none) header.from=debian.org; spf=pass smtp.mailfrom=gmail.com; arc=none smtp.client-ip=209.85.214.169 Authentication-Results: smtp.subspace.kernel.org; dmarc=fail (p=none dis=none) header.from=debian.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-pl1-f169.google.com with SMTP id d9443c01a7336-2cace91f112so105306925ad.0 for ; Mon, 20 Jul 2026 09:21:39 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1784564499; x=1785169299; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=agggjMeWOCHZp5peunlNPyTIEns3XzYOIFzREAaYZuY=; b=EoAk01b3udzSXytp8sH8iJ9Uf7MRq7PlAMOILkpYYHVWy4pah3r2Vb63hzyNaIkrAB TqJqOZoWTIe/5jrP8BJDeki/1bXsquaU3r+Vzk1TKPdiePdL/84AbNo0SX6mJAxYrMGi h1vZi8An49hPq9XcfjSF4RsJsAvY9No8AYMNLfzz706oyf9VPWiOv0VZGyZTf6D61RVe jd1GmUYMbDjXIbxrTJ6dVulw8TVM/6XiNavtUKXC7n9lvAtIbGOQtZjQUpH+NehfiG7M 1a98ith8C4Wz1AJOC1DeM3hI+fQtm0DOvFpkJn+26XgEeiXw6bZAhGoY0651dEBjLDer kbLQ== X-Forwarded-Encrypted: i=1; AHgh+RrmwfqTparAx9GjTmPMtczlEarniFR6frCqPe5R/8CmfadgVFe2nGWmkc8FxBl2m19ltfEc5vRaNGRn1/Q=@vger.kernel.org X-Gm-Message-State: AOJu0Yy7rmtqHgxnA3WQHlx2TmQeLWigcdk0b15xES7bBsLp9d3Qa/8Y eeCpVNGeZMn1yBw4ghIAO/Jj6oxFGIuJkmm7CB2BwwaMMFVy8XXyj1Q= X-Gm-Gg: AR+sD10Aean3es4+8LCnydFZz+YUboqOUDmQJ1reaOqxqLCBWhHm/VcC8s1TkyWRj/Q ENwzbxp831JC/mUcbkvKFFNFsD97o3z0S8y6GxjeakWVl1b2rOvX8jX0AmlYxYv1hjG/I0I9ZV5 T2Wn0UfxzaJWUO/k3MGtYoafFI/Sf+l9jxsTOC750ZJ0Ept6fm8TAlQ9eMSgs07gOrk/vmaspWV nQ0KZdTgMLasNHhTt8V1s5QTjwdr+T0eLOtG4bbBRsWlfdv5mB8ewI2Rn20kSizKSETZVSZLjYM 0fTqtYTtSXcLPOOU39eHwSJ+0PjdgObj6UH8qUdAxlwkH+ffFGETUkN68Rpzeia4NCQHKzSEe9b FdNHX4IjORkKFCv08jX/5Pi3n6iYGYaW93ovKx0cGv9DTYNfnZrfeLLLPxGpKFeHuQ41E7j2Iis bgHCGD/43XZAPVVl9eZ5Dhxx/Jvh5gkCFFHMlzUgHzltjGTyMsRHN3YLJzRkKeJEODSReiFVhr1 PrKsPKCIC7lwaqJVnId6tGQcXUx X-Received: by 2002:a17:903:2c05:b0:2ca:ec6f:aeca with SMTP id d9443c01a7336-2cf3481b670mr163970705ad.8.1784564498470; Mon, 20 Jul 2026 09:21:38 -0700 (PDT) Received: from penguin.tail0a1999.ts.net (61-228-16-100.dynamic-ip.hinet.net. [61.228.16.100]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2cf3479463bsm58467385ad.80.2026.07.20.09.21.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Jul 2026 09:21:38 -0700 (PDT) From: Shih-Yuan Lee To: Mark Brown Cc: Andy Shevchenko , Mika Westerberg , Lukas Wunner , Daniel Mack , Haojian Zhuang , Robert Jarzmik , linux-arm-kernel@lists.infradead.org, linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org, Shih-Yuan Lee Subject: [PATCH v16 6/7] spi: pxa2xx: restore LPSS private register state on S3 resume Date: Tue, 21 Jul 2026 00:21:15 +0800 Message-Id: <20260720162117.32304-7-fourdollars@debian.org> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20260720162117.32304-1-fourdollars@debian.org> References: <20260720162117.32304-1-fourdollars@debian.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Intel LPSS SPI controllers lose all private register state across S3 suspend because the LPSS power domain is fully removed. On resume the driver only re-enables the SSP clock, leaving the LPSS private registers in their power-on-reset state, which causes two problems: 1. LPSS_PRIV_RESETS (offset 0x04 within the LPSS private space) stays zero, keeping the functional block in reset. Any MMIO access while the block is held in reset causes a PCIe Completion Timeout and a watchdog-triggered system reset. LPSS_PRIV_RESETS_FUNC and LPSS_PRIV_RESETS_IDMA must be de-asserted before any other register access on resume. 2. The LPSS software chip-select control register must not be blindly restored from its suspend-time snapshot: if CS was asserted at the moment of suspend, restoring that state corrupts the first post-resume SPI transaction. Instead, call lpss_ssp_setup() which unconditionally writes SW_MODE | CS_HIGH (idle/deasserted), matching the state established at probe time. To resolve these issues safely: - Wrap S3 suspend/resume with pm_runtime_resume_and_get() and pm_runtime_put_noidle() to guarantee active clocks during MMIO access and preserve PM reference counting. - Restrict LPSS private register save/restore to LPT, BYT, and BSW platforms via pxa2xx_spi_need_lpss_restore() (newer platforms are handled by intel-lpss.c). - Save only the first 6 LPSS private registers (offsets 0x00..0x14) in drv_data during suspend, avoiding reserved offsets beyond 0x14. - On resume, de-assert resets first, restore saved registers, call lpss_ssp_setup(), and clear drv_data->suspended to prevent unclocked IRQ access. - Add error recovery paths for spi_controller_suspend/resume failures. - On the resume error path, call pm_runtime_set_suspended() before pm_runtime_put_noidle() to align the PM runtime state with the already-disabled hardware clock, preventing pxa2xx_spi_runtime_suspend() from attempting unclocked MMIO via pxa2xx_spi_off(). Link: https://bugzilla.kernel.org/show_bug.cgi?id=3D108331 Signed-off-by: Shih-Yuan Lee --- drivers/spi/spi-pxa2xx.c | 105 +++++++++++++++++++++++++++++++++++++-- drivers/spi/spi-pxa2xx.h | 1 + 2 files changed, 102 insertions(+), 4 deletions(-) diff --git a/drivers/spi/spi-pxa2xx.c b/drivers/spi/spi-pxa2xx.c index 34241a6742eb..851626ead25e 100644 --- a/drivers/spi/spi-pxa2xx.c +++ b/drivers/spi/spi-pxa2xx.c @@ -72,6 +72,11 @@ struct chip_data { #define LPSS_CAPS_CS_EN_SHIFT 9 #define LPSS_CAPS_CS_EN_MASK (0xf << LPSS_CAPS_CS_EN_SHIFT) =20 +/* Offsets from drv_data->lpss_base */ +#define LPSS_PRIV_RESETS 0x04 +#define LPSS_PRIV_RESETS_IDMA BIT(2) +#define LPSS_PRIV_RESETS_FUNC 0x3 + #define LPSS_PRIV_CLOCK_GATE 0x38 #define LPSS_PRIV_CLOCK_GATE_CLK_CTL_MASK 0x3 #define LPSS_PRIV_CLOCK_GATE_CLK_CTL_FORCE_ON 0x3 @@ -189,6 +194,18 @@ static bool is_lpss_ssp(const struct driver_data *drv_= data) } } =20 +static bool pxa2xx_spi_need_lpss_restore(const struct driver_data *drv_dat= a) +{ + switch (drv_data->ssp_type) { + case LPSS_LPT_SSP: + case LPSS_BYT_SSP: + case LPSS_BSW_SSP: + return true; + default: + return false; + } +} + static bool is_quark_x1000_ssp(const struct driver_data *drv_data) { return drv_data->ssp_type =3D=3D QUARK_X1000_SSP; @@ -1532,17 +1549,44 @@ static int pxa2xx_spi_suspend(struct device *dev) struct ssp_device *ssp =3D drv_data->ssp; int status; =20 + status =3D pm_runtime_resume_and_get(dev); + if (status < 0) + return status; + + status =3D spi_controller_suspend(drv_data->controller); if (status) - return status; + goto out_put; =20 + /* Disable SSP interrupt generation on hardware level while clock is acti= ve */ drv_data->suspended =3D true; pxa2xx_spi_off(drv_data); synchronize_irq(ssp->irq); =20 + if (pxa2xx_spi_need_lpss_restore(drv_data)) { + unsigned int i; + + /* + * Save the first 6 LPSS private registers (offsets 0x00 to 0x14) + * while the clock is still enabled. They are lost when the LPSS + * power domain is removed across S3 and must be restored on resume. + * Use drv_data->lpss_base so the correct per-platform offset + * is applied regardless of LPSS IP revision. + * Registers beyond 0x14 (except CS control at 0x18) are reserved + * or unimplemented on LPT, and accessing them triggers a PCIe + * Completion Timeout causing a system halt. + */ + for (i =3D 0; i < 6; i++) + drv_data->lpss_priv_ctx[i] =3D readl(drv_data->lpss_base + i * 4); + } + pxa2xx_spi_clk_disable(drv_data); =20 return 0; + +out_put: + pm_runtime_put_noidle(dev); + return status; } =20 static int pxa2xx_spi_resume(struct device *dev) @@ -1555,9 +1599,47 @@ static int pxa2xx_spi_resume(struct device *dev) if (!pm_runtime_suspended(dev)) { status =3D pxa2xx_spi_clk_enable(drv_data); if (status) - return status; + goto out_put; } =20 + if (pxa2xx_spi_need_lpss_restore(drv_data)) { + unsigned int i; + + /* + * The LPSS power domain is removed across S3, taking + * all private registers with it. De-assert the + * functional block and IDMA resets first; any MMIO + * access while the block is held in reset causes a + * PCIe Completion Timeout and a watchdog-triggered + * system reset. + */ + writel(LPSS_PRIV_RESETS_FUNC | LPSS_PRIV_RESETS_IDMA, + drv_data->lpss_base + LPSS_PRIV_RESETS); + + /* Restore the other 5 saved private registers */ + for (i =3D 0; i < 6; i++) { + if (i =3D=3D LPSS_PRIV_RESETS / 4) + continue; + writel(drv_data->lpss_priv_ctx[i], + drv_data->lpss_base + i * 4); + } + } + + if (is_lpss_ssp(drv_data)) { + /* + * Re-initialise the SW chip-select control register so + * CS starts deasserted (SW_MODE | CS_HIGH), regardless + * of the state it was in at suspend time. A stale + * asserted CS on the first post-resume transaction + * corrupts the write-status response from the device. + */ + lpss_ssp_setup(drv_data); + } + + /* + * Now that resets are de-asserted and registers are restored, + * it is safe to handle interrupts. + */ drv_data->suspended =3D false; =20 /* Start the queue running */ @@ -1566,10 +1648,25 @@ static int pxa2xx_spi_resume(struct device *dev) drv_data->suspended =3D true; synchronize_irq(ssp->irq); pxa2xx_spi_clk_disable(drv_data); - return status; + goto out_put; } =20 - return 0; +out_put: + if (!pm_runtime_suspended(dev)) { + if (status) + /* + * Clock is already disabled on the error path; align + * the PM runtime state with hardware reality before + * releasing the reference so the PM core does not + * later invoke pxa2xx_spi_runtime_suspend() and attempt + * unclocked MMIO via pxa2xx_spi_off(). + */ + pm_runtime_set_suspended(dev); + pm_runtime_put_noidle(dev); + } + + return status; + } =20 static int pxa2xx_spi_runtime_suspend(struct device *dev) diff --git a/drivers/spi/spi-pxa2xx.h b/drivers/spi/spi-pxa2xx.h index 44f37bf9c519..48169494f74e 100644 --- a/drivers/spi/spi-pxa2xx.h +++ b/drivers/spi/spi-pxa2xx.h @@ -71,6 +71,7 @@ struct driver_data { irqreturn_t (*transfer_handler)(struct driver_data *drv_data); =20 void __iomem *lpss_base; + u32 lpss_priv_ctx[6]; =20 bool suspended; bool clk_enabled; --=20 2.39.5 From nobody Sat Jul 25 02:11:17 2026 Received: from mail-pl1-f182.google.com (mail-pl1-f182.google.com [209.85.214.182]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 405DF43E4BA for ; Mon, 20 Jul 2026 16:21:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.182 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784564506; cv=none; b=UPYaP9ETl56gSyqTDBasc/kCH87eFor2iKpmppIvFjnLQe1JxM7dir3qMUQIDg4929DnEENTfoMlGKohIYhb4c014YkhF2rts1fR3mHscoYCER37FM0gnFiUyohjAPYl+zq4rw5+/kHRS6q6cr6I30YaKbeOL9Ulh4yQakZFZ+Q= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784564506; c=relaxed/simple; bh=X1AOeou6yS9kGr/z/ALcY89ALvKc5/5jxNmhSrNGyNE=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=KPgx0JmjhEhhFu86txDtP12oRy0CSmD93Qx4/olcZ+O1ab97+xiIlo2Td4imah7LVuXZGOQddHxyVtNBuEzpxLDk+xfJw863GKYmp28QpsL8vFcd3gihVqw6B3vZwNZisTAdfs2js7LZzLtr0l8MKWbB5cl5yCCKyC9jHL7I+44= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=fail (p=none dis=none) header.from=debian.org; spf=pass smtp.mailfrom=gmail.com; arc=none smtp.client-ip=209.85.214.182 Authentication-Results: smtp.subspace.kernel.org; dmarc=fail (p=none dis=none) header.from=debian.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-pl1-f182.google.com with SMTP id d9443c01a7336-2cc97653887so113025715ad.1 for ; Mon, 20 Jul 2026 09:21:42 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1784564501; x=1785169301; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=RU/JGA5nOjMqs/efzn0kjJdYCZ/griCBQ2ley/7YLuw=; b=dZu0mMX3hlTrn6Ge9+vDihotkrQEgmhXCe2aKi7tY4udY4CDqj3vPVoEEPmEyCyw5x 9zP7L7WcX6B2eOgGrHaLQWUSPSKexN1IwnbITNyHtON5NONc7qdFYPXIJG2AiXzKX6lI MVTRtZzSpqR5M8qUiBknRaafh01s/jhqGblRGGp8H1/1UPEqfoHK+R0YhmMEG0acodSg jtfNa8xTXt4YM1tBEw9CGwkvKARAxmYDLagG4iK4f91rcPQQ2yJK8XXq8dBChdKElVoT az5QbbQmrdK47c4YF0fJARsbv4hR+qg+0kU+5/kdMyZIJlEDGA9EvA1cj4qFbeiNBPC8 pMFQ== X-Forwarded-Encrypted: i=1; AHgh+Rq6Dej25Cx3Bl/SyZyBq13AzmwIqo26OpWLqzUhKVkp1J9pwHTv5YjQs07GKkXhl6xbUc8VNBU/Ol1dko4=@vger.kernel.org X-Gm-Message-State: AOJu0YzD7DslothSJRk4OKTDbT8QOlaenReVdpeZdja297FBt3AJMLPD UgTG53y+/CUwNR1Mj9gxYEQ3/H6xSNfZSHBLcVx3xiCtsC/rdps5llg= X-Gm-Gg: AR+sD10L+zITu+JEWwQi94ErXL+7ibntFoPJN7mFAiqTdTDcIwCxN9iH+oUgF3CG/oj PIY5xKL1ufHhPdw90X63EvKKcFu0hv9mi/eMmdi+E1dlG+MifJyBtDYJzid4rQfEsAN6EenJ8yj EQfJ33LN/epVRmst0CDXP8VAUQP793K2YMjtr0lx3tFXhXNtVYLK9jOROy7J4ACKMLFS3YOsobp jmhvHPSK6YW6iinJwEur/3bR3zhqWVGFtqaFdlSL9XbQxirFQKlOI6jd//ds5kwqbL96++78pYN Uh+hJoV+IGuiEvuLrtcjdsHIB2KsKUN5s6HLpAWYNCBXQGRcIxWM6Fkc9AtRGMlREnC3IppNqIE iC3EBoIhaBCzOPSnWhyzXTpS7fRzXJnJF/uFouqNyT6f1kkYCGWGcpuK+sYH/w2PBYdvCSk3zIi J4HB+BqTjGyZAyq+Bw2dqgT5FQAVSHuFNYFtyYfByZ9Mp2SU1YVxN31D3Ze+uHaVaEVq1q3+ZvH J18lbMWnz9FzySLnA== X-Received: by 2002:a17:903:38c4:b0:2cc:fbf5:afaa with SMTP id d9443c01a7336-2cf348bd420mr159082955ad.20.1784564501163; Mon, 20 Jul 2026 09:21:41 -0700 (PDT) Received: from penguin.tail0a1999.ts.net (61-228-16-100.dynamic-ip.hinet.net. [61.228.16.100]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2cf3479463bsm58467385ad.80.2026.07.20.09.21.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Jul 2026 09:21:40 -0700 (PDT) From: Shih-Yuan Lee To: Mark Brown Cc: Andy Shevchenko , Mika Westerberg , Lukas Wunner , Daniel Mack , Haojian Zhuang , Robert Jarzmik , linux-arm-kernel@lists.infradead.org, linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org, Shih-Yuan Lee Subject: [PATCH v16 7/7] spi: pxa2xx: rename local status variable to ret Date: Tue, 21 Jul 2026 00:21:16 +0800 Message-Id: <20260720162117.32304-8-fourdollars@debian.org> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20260720162117.32304-1-fourdollars@debian.org> References: <20260720162117.32304-1-fourdollars@debian.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Rename the return value variable name from 'status' to 'ret' in the pxa2xx_spi_probe(), pxa2xx_spi_suspend(), pxa2xx_spi_resume(), and pxa2xx_spi_runtime_resume() functions to conform to standard Linux kernel coding conventions. Signed-off-by: Shih-Yuan Lee --- drivers/spi/spi-pxa2xx.c | 66 +++++++++++++++++++--------------------- 1 file changed, 32 insertions(+), 34 deletions(-) diff --git a/drivers/spi/spi-pxa2xx.c b/drivers/spi/spi-pxa2xx.c index 851626ead25e..9379aac82c7a 100644 --- a/drivers/spi/spi-pxa2xx.c +++ b/drivers/spi/spi-pxa2xx.c @@ -1313,7 +1313,7 @@ int pxa2xx_spi_probe(struct device *dev, struct ssp_d= evice *ssp, struct spi_controller *controller; struct driver_data *drv_data; const struct lpss_config *config; - int status; + int ret; u32 tmp; =20 if (platform_info->is_target) @@ -1372,8 +1372,8 @@ int pxa2xx_spi_probe(struct device *dev, struct ssp_d= evice *ssp, =20 /* Setup DMA if requested */ if (platform_info->enable_dma) { - status =3D pxa2xx_spi_dma_setup(drv_data); - if (status) { + ret =3D pxa2xx_spi_dma_setup(drv_data); + if (ret) { dev_warn(dev, "no DMA channels available, using PIO\n"); platform_info->enable_dma =3D false; } else { @@ -1387,16 +1387,16 @@ int pxa2xx_spi_probe(struct device *dev, struct ssp= _device *ssp, } =20 /* Enable SOC clock */ - status =3D pxa2xx_spi_clk_enable(drv_data); - if (status) + ret =3D pxa2xx_spi_clk_enable(drv_data); + if (ret) goto out_error_dma_alloc; =20 drv_data->suspended =3D false; =20 - status =3D request_irq(ssp->irq, ssp_int, IRQF_SHARED, dev_name(dev), + ret =3D request_irq(ssp->irq, ssp_int, IRQF_SHARED, dev_name(dev), drv_data); - if (status < 0) { - status =3D dev_err_probe(dev, status, "cannot get IRQ %d\n", ssp->irq); + if (ret < 0) { + ret =3D dev_err_probe(dev, ret, "cannot get IRQ %d\n", ssp->irq); goto out_error_clock_enabled; } =20 @@ -1477,23 +1477,23 @@ int pxa2xx_spi_probe(struct device *dev, struct ssp= _device *ssp, drv_data->gpiod_ready =3D devm_gpiod_get_optional(dev, "ready", GPIOD_OUT_LOW); if (IS_ERR(drv_data->gpiod_ready)) { - status =3D PTR_ERR(drv_data->gpiod_ready); + ret =3D PTR_ERR(drv_data->gpiod_ready); goto out_error_irq_alloc; } } =20 /* Register with the SPI framework */ dev_set_drvdata(dev, drv_data); - status =3D spi_register_controller(controller); - if (status) { - dev_err_probe(dev, status, "problem registering SPI controller\n"); + ret =3D spi_register_controller(controller); + if (ret) { + dev_err_probe(dev, ret, "problem registering SPI controller\n"); goto out_error_irq_alloc; } =20 if (is_lpss_ssp(drv_data) && !platform_info->enable_dma) pm_runtime_get_noresume(dev); =20 - return status; + return ret; =20 out_error_irq_alloc: free_irq(ssp->irq, drv_data); @@ -1504,7 +1504,7 @@ int pxa2xx_spi_probe(struct device *dev, struct ssp_d= evice *ssp, out_error_dma_alloc: pxa2xx_spi_dma_release(drv_data); =20 - return status; + return ret; } EXPORT_SYMBOL_NS_GPL(pxa2xx_spi_probe, "SPI_PXA2xx"); =20 @@ -1547,15 +1547,14 @@ static int pxa2xx_spi_suspend(struct device *dev) { struct driver_data *drv_data =3D dev_get_drvdata(dev); struct ssp_device *ssp =3D drv_data->ssp; - int status; - - status =3D pm_runtime_resume_and_get(dev); - if (status < 0) - return status; + int ret; =20 + ret =3D pm_runtime_resume_and_get(dev); + if (ret < 0) + return ret; =20 - status =3D spi_controller_suspend(drv_data->controller); - if (status) + ret =3D spi_controller_suspend(drv_data->controller); + if (ret) goto out_put; =20 /* Disable SSP interrupt generation on hardware level while clock is acti= ve */ @@ -1586,19 +1585,19 @@ static int pxa2xx_spi_suspend(struct device *dev) =20 out_put: pm_runtime_put_noidle(dev); - return status; + return ret; } =20 static int pxa2xx_spi_resume(struct device *dev) { struct driver_data *drv_data =3D dev_get_drvdata(dev); struct ssp_device *ssp =3D drv_data->ssp; - int status; + int ret; =20 /* Enable the SSP clock */ if (!pm_runtime_suspended(dev)) { - status =3D pxa2xx_spi_clk_enable(drv_data); - if (status) + ret =3D pxa2xx_spi_clk_enable(drv_data); + if (ret) goto out_put; } =20 @@ -1643,8 +1642,8 @@ static int pxa2xx_spi_resume(struct device *dev) drv_data->suspended =3D false; =20 /* Start the queue running */ - status =3D spi_controller_resume(drv_data->controller); - if (status) { + ret =3D spi_controller_resume(drv_data->controller); + if (ret) { drv_data->suspended =3D true; synchronize_irq(ssp->irq); pxa2xx_spi_clk_disable(drv_data); @@ -1653,7 +1652,7 @@ static int pxa2xx_spi_resume(struct device *dev) =20 out_put: if (!pm_runtime_suspended(dev)) { - if (status) + if (ret) /* * Clock is already disabled on the error path; align * the PM runtime state with hardware reality before @@ -1665,8 +1664,7 @@ static int pxa2xx_spi_resume(struct device *dev) pm_runtime_put_noidle(dev); } =20 - return status; - + return ret; } =20 static int pxa2xx_spi_runtime_suspend(struct device *dev) @@ -1683,11 +1681,11 @@ static int pxa2xx_spi_runtime_suspend(struct device= *dev) static int pxa2xx_spi_runtime_resume(struct device *dev) { struct driver_data *drv_data =3D dev_get_drvdata(dev); - int status; + int ret; =20 - status =3D pxa2xx_spi_clk_enable(drv_data); - if (status) - return status; + ret =3D pxa2xx_spi_clk_enable(drv_data); + if (ret) + return ret; =20 drv_data->suspended =3D false; return 0; --=20 2.39.5