From nobody Sat Jul 25 02:39:06 2026 Received: from mail-pl1-f182.google.com (mail-pl1-f182.google.com [209.85.214.182]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 639643D905D for ; Mon, 20 Jul 2026 10:40:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.182 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784544038; cv=none; b=Dr/iVgoPgPEN9/IYM+uXaqh0DwWgwL2OeiZ55QJWTOQ0sZAiucWsUfvHovRlT4fgDw8RFbRiEtMA9eOPJvHHDOevovQsL5zmxo+Losh8XUM8R04OYilOEDg3FMe6BayfFwKkL/lKlMzKtrT19gLolgjr9LanFWSSb0qdPTZralY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784544038; c=relaxed/simple; bh=Vdt+qeuvpREFSA5a0TrrLGGVRMBDEdjthERSl9sDPT4=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=PQHyIz0+ap2Ui8zgaMnv0RurnKuUSWRx0Ns704f0gILHULhUh2kXAclS2AiFQwsw7jOXcC8VYNSBrJfW14rJ0TQHag9FsQgKLzROM11A6YkC4F8W/EcZvg6W6eaaCSvrVsE5iBPz5dOXGGJLLYWL2xAbbG+yNVOQWBuRGROAfEc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=fail (p=none dis=none) header.from=debian.org; spf=pass smtp.mailfrom=gmail.com; arc=none smtp.client-ip=209.85.214.182 Authentication-Results: smtp.subspace.kernel.org; dmarc=fail (p=none dis=none) header.from=debian.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-pl1-f182.google.com with SMTP id d9443c01a7336-2cc891373e0so121545715ad.2 for ; Mon, 20 Jul 2026 03:40:37 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1784544037; x=1785148837; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=CRbZTqGpgqv9f3V5TsJU/zSn2sq4m20JPxg1ZUFyYfw=; b=L3bUvy92nt9Nqc+68g6lo2CxmZr9yOqAur2oKqMjlREVqvtDQQw8PK7nB2ckOKhZD5 6hQte8r8oGzNRL4UP0/fYccxy+HRM+A93sGNlIUEnbHk0lX9RK6mE1JuFCFKIj10yWLk 13S8EudwmAp1eDKURMiRCmzdTIAoMjpOyy2oOmPvhfIuWEmCADMOyj9M94mKggBpRmc9 PV2ts1yJeMnvjlQjW3l+Saq4078Af/orqXQPhTbE6DfJQ8af6N5lEP+Y3rJ7B2sQkHe6 HK5iPYongZfA3BWVs8CGxJ4NglpRcFBlOadMqv+XzeAiT6/P3Btpd+eJShB+W1WUyEL4 ZEoA== X-Forwarded-Encrypted: i=1; AHgh+RrAy1gYsv2Z0sCbGyyMvSA63oMnfhT8eYPaW9n2i39gdsdIV7R/CwpjlpYQmNwYtGhaqjWVTbbivnewslI=@vger.kernel.org X-Gm-Message-State: AOJu0YyrZ1c6FIWg6oYRYc7TiLEKskiPs962WTeoSHj5lhu9s4sIdqL4 ewmwHp8vpG1WDfQKw6krxWwJnyI0on+JWgvpmXjw67q+h9U1j0nPeiwN/hwwkMXX9sqo X-Gm-Gg: AR+sD13xVJLadZRP9rlPVxeqmqI5uBvBCjEUTx7nQE3S+aUg/MNsYqe0tOvM+NydtGX c9s6i8dDpm7G0AKI6dqhoGQ2z74at6+6lTaAaSAt4n60PcT+3TLbhb7GtrmcOZTtSOYzKgra76o 2KV1QTJYMuNiTK4VjBILiryb1edLArjuaPWcRxfW03vfdhsRyBRE5jDRwbPhWVE8ySAzvoqPOyp 25kT2NhUJIZW62r4frQU25pxpUecpR+RaxGb79rzd0faMlhehRakK68n7YLDA+CYPJKs8tiAAQ4 +vFSa31G+oI6rxUjX6+Cviz4Ipyj3Y3emT1HvTO996kHrt2ON/YUBHGVr1K0SloJOv+mJzBEhkp QIxjo1IrYg6fDX3R7AXOfYmHrpCVkrXMolQt6hnUTAHdSlRNVf2pcPtjPa0zXMqnr9oo24WchRA eqQJzOqfQDsbmUhouSCUfzAZz00i8pdoxhRiP2ANvscVqEHe+vI6Nj3iNq6Oa7k0128QPw051/a JtOf1wFaDC3EOtj6g== X-Received: by 2002:a17:903:2c05:b0:2ca:ec6f:aeca with SMTP id d9443c01a7336-2cf3481b670mr148842085ad.8.1784544036593; Mon, 20 Jul 2026 03:40:36 -0700 (PDT) Received: from penguin.tail0a1999.ts.net (61-228-16-100.dynamic-ip.hinet.net. [61.228.16.100]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2cf344f61ffsm54900325ad.33.2026.07.20.03.40.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Jul 2026 03:40:36 -0700 (PDT) From: Shih-Yuan Lee To: Mark Brown Cc: Andy Shevchenko , Daniel Mack , Haojian Zhuang , Robert Jarzmik , linux-arm-kernel@lists.infradead.org, linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org, Shih-Yuan Lee Subject: [PATCH v15 1/7] spi: pxa2xx: introduce clock enable and disable helper functions Date: Mon, 20 Jul 2026 18:40:23 +0800 Message-Id: <20260720104029.13740-2-fourdollars@debian.org> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20260720104029.13740-1-fourdollars@debian.org> References: <20260720104029.13740-1-fourdollars@debian.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The driver disables the clock during PM runtime suspend, PM system suspend, and device unbinding (remove). It also disables the clock on various error unwinding paths in pxa2xx_spi_probe(). However, if the clock is already disabled (for example, if the device is already runtime-suspended during driver unbinding), calling the common clock framework's clk_disable_unprepare() again leads to clock prepare/enab= le count underflows, generating kernel warnings. Furthermore, in the probe err= or unwinding paths, failing to request the IRQ does not disable the clock, lea= ving a clock enable leak. Introduce pxa2xx_spi_clk_enable() and pxa2xx_spi_clk_disable() helper functions that track the clock enable state using a new 'clk_enabled' boolean flag in struct driver_data. This ensures clk_disable_unprepare() is called only when the clock is active, preventing clock underflows during suspend transitions and unbind. = It also allows the probe function to safely unwind resource allocations without leaking the clock or triggering clock underflows. Signed-off-by: Shih-Yuan Lee --- drivers/spi/spi-pxa2xx.c | 37 +++++++++++++++++++++++++++++-------- drivers/spi/spi-pxa2xx.h | 3 +++ 2 files changed, 32 insertions(+), 8 deletions(-) diff --git a/drivers/spi/spi-pxa2xx.c b/drivers/spi/spi-pxa2xx.c index 6291d7c2e06f..d50152aad348 100644 --- a/drivers/spi/spi-pxa2xx.c +++ b/drivers/spi/spi-pxa2xx.c @@ -713,6 +713,28 @@ static void handle_bad_msg(struct driver_data *drv_dat= a) dev_err(drv_data->ssp->dev, "bad message state in interrupt handler\n"); } =20 +static int pxa2xx_spi_clk_enable(struct driver_data *drv_data) +{ + int ret; + + if (drv_data->clk_enabled) + return 0; + + ret =3D clk_prepare_enable(drv_data->ssp->clk); + if (ret =3D=3D 0) + drv_data->clk_enabled =3D true; + + return ret; +} + +static void pxa2xx_spi_clk_disable(struct driver_data *drv_data) +{ + if (drv_data->clk_enabled) { + clk_disable_unprepare(drv_data->ssp->clk); + drv_data->clk_enabled =3D false; + } +} + static irqreturn_t ssp_int(int irq, void *dev_id) { struct driver_data *drv_data =3D dev_id; @@ -1352,7 +1374,7 @@ int pxa2xx_spi_probe(struct device *dev, struct ssp_d= evice *ssp, } =20 /* Enable SOC clock */ - status =3D clk_prepare_enable(ssp->clk); + status =3D pxa2xx_spi_clk_enable(drv_data); if (status) goto out_error_dma_irq_alloc; =20 @@ -1449,7 +1471,7 @@ int pxa2xx_spi_probe(struct device *dev, struct ssp_d= evice *ssp, return status; =20 out_error_clock_enabled: - clk_disable_unprepare(ssp->clk); + pxa2xx_spi_clk_disable(drv_data); =20 out_error_dma_irq_alloc: pxa2xx_spi_dma_release(drv_data); @@ -1468,7 +1490,7 @@ void pxa2xx_spi_remove(struct device *dev) =20 /* Disable the SSP at the peripheral and SOC level */ pxa_ssp_disable(ssp); - clk_disable_unprepare(ssp->clk); + pxa2xx_spi_clk_disable(drv_data); =20 /* Release DMA */ if (drv_data->controller_info->enable_dma) @@ -1492,7 +1514,7 @@ static int pxa2xx_spi_suspend(struct device *dev) pxa_ssp_disable(ssp); =20 if (!pm_runtime_suspended(dev)) - clk_disable_unprepare(ssp->clk); + pxa2xx_spi_clk_disable(drv_data); =20 return 0; } @@ -1500,12 +1522,11 @@ static int pxa2xx_spi_suspend(struct device *dev) static int pxa2xx_spi_resume(struct device *dev) { struct driver_data *drv_data =3D dev_get_drvdata(dev); - struct ssp_device *ssp =3D drv_data->ssp; int status; =20 /* Enable the SSP clock */ if (!pm_runtime_suspended(dev)) { - status =3D clk_prepare_enable(ssp->clk); + status =3D pxa2xx_spi_clk_enable(drv_data); if (status) return status; } @@ -1518,7 +1539,7 @@ static int pxa2xx_spi_runtime_suspend(struct device *= dev) { struct driver_data *drv_data =3D dev_get_drvdata(dev); =20 - clk_disable_unprepare(drv_data->ssp->clk); + pxa2xx_spi_clk_disable(drv_data); return 0; } =20 @@ -1526,7 +1547,7 @@ static int pxa2xx_spi_runtime_resume(struct device *d= ev) { struct driver_data *drv_data =3D dev_get_drvdata(dev); =20 - return clk_prepare_enable(drv_data->ssp->clk); + return pxa2xx_spi_clk_enable(drv_data); } =20 EXPORT_NS_GPL_DEV_PM_OPS(pxa2xx_spi_pm_ops, SPI_PXA2xx) =3D { diff --git a/drivers/spi/spi-pxa2xx.h b/drivers/spi/spi-pxa2xx.h index 447be0369384..44f37bf9c519 100644 --- a/drivers/spi/spi-pxa2xx.h +++ b/drivers/spi/spi-pxa2xx.h @@ -72,6 +72,9 @@ struct driver_data { =20 void __iomem *lpss_base; =20 + bool suspended; + bool clk_enabled; + /* Optional slave FIFO ready signal */ struct gpio_desc *gpiod_ready; }; --=20 2.39.5 From nobody Sat Jul 25 02:39:06 2026 Received: from mail-pl1-f181.google.com (mail-pl1-f181.google.com [209.85.214.181]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B45503DB62D for ; Mon, 20 Jul 2026 10:40:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.181 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784544041; cv=none; b=IATuFrrNoXp8nzOyK+3TOiyxcxppfRXVdbgVJmTJ/hDOg/xphBDnpkJkgs0JmNFESf9tCC3XvcU9VTopLqqmY/8R0ih/GeBxKgDpPpEPiYM+6k9BONuxTXLXJe4MdFb8fBE0IaCCmCpWlZjkytMH1NBLFIPelfB29MX7uxVQY/8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784544041; c=relaxed/simple; bh=PRHUXV6tls2F/eyT19L26E36CgR4Jha3qL9Co67zKX0=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=kVyDf/uHTGgmAMAqrjzDZbWmRMc6Q2zIOJIdyiVWcPMxSyWdOv4fsgvPn1AaJIRHR+y30WgmZh8/2JCtzTemxQQx/DRa7b5wLcRaLZpPQqdEHEtv/qZbgUuxfwaq2NH/UHnklStrI6jj6YTfcNiZfiwNC2HuWbxOqE8j63ZFV+g= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=fail (p=none dis=none) header.from=debian.org; spf=pass smtp.mailfrom=gmail.com; arc=none smtp.client-ip=209.85.214.181 Authentication-Results: smtp.subspace.kernel.org; dmarc=fail (p=none dis=none) header.from=debian.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-pl1-f181.google.com with SMTP id d9443c01a7336-2ce98cb8165so37141185ad.1 for ; Mon, 20 Jul 2026 03:40:39 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1784544039; x=1785148839; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=2COBYw4BWPBdbvvAp87MLasINrhEHK6G1ompJUFtwUI=; b=T7r+PLMqsqwtsIRT2R1CWAgxejsmLkHOreIi66kpsFI4gjwcb/l5qtTE3+ksOfoAuY JRqhGsUz/Wn/OAovnkBljMZ2dMkEOgQLIwp/f2L0CyfLTwQmTF/gPWucSx6dTEEcQ/TP 1x22qHyl/PGkVBJ2NfG9jOSHdxM5bGu1yYWMWbeMC+VvoInCKSTf4DWrAgFlLMYMwXtl UhHQ7CyTMut00QSOf2LisZ/26AUL6P7crCiezhufazDYlgBHlykR9CXBphl6FDsKVsgw /v8K3AHZr5+lwmNeoOfFAP9qbH6q860awh3vHhMM0ziYdikMi6gaCeiR++tvHj8EQ538 EhpA== X-Forwarded-Encrypted: i=1; AHgh+RpuRB5R34X9eNqBnqsV4o+Ovhg/yFrr7XMo+fg1lmDMYTJTgB3Pic8AqlHIbhZVbadiZS1hHWUlF+dC6mw=@vger.kernel.org X-Gm-Message-State: AOJu0YxE3vO+ox9HX9bGxBkFX5gVtOlhTka3kgVD7iatda0P9L8Zxu91 Vd9YwxBQGnX7aPuYvmvrIp63ZTh5ML6QxsqyR/u1zM0iESJijlPpKbg= X-Gm-Gg: AR+sD13Dbw+346C0J9CMeqxTK9PmQVt/vrULFesLkEqNA0C8WWZiA5LGYBPfHvdukiR +YImKOcnno55RXtM5TdLha9ZgeReRaOjCdlOPL6HPuM+5uYuQkr24NyR0VmlznXXXmj5S7Kf3nc 4v8FjU3PEYuY7wm+BM9hBIsWgmJTCmTPOk5qbqfhuG/8vb3UFIWhXmvW0B2n4t/kOG7Org26pWT bC0359rD1Q8R8ZEj7WyRT2BIjAYnPUx8rgo3d9+ZdDnHHnWPrIUHicTzhGWgqnu3Jv89Dy+Mqf7 h1BbKgOjtkR1ZIjxo5dKMcGTfeYR7g5H3n6a5pjb4OnygYyD5eaQZ3PDDv0zY38jxYHRGG3Ob0N T+MqCVvmaHfC3hemveRCvGER2hwgvBA+F6nuJn3yJzDx3svuZ/F8lh5aZ0KvwhwxdD3Dw78wtAx XOS9E8/FXVqTw2dU7ErJkhgcmK5mOyFeuOvez50tBW+0hh/VT5lsH9w6fjQZnAEnGhDKen11Wkp qz2Yp0j1E3CwVbJTQ== X-Received: by 2002:a17:903:1986:b0:2cf:18e5:1d18 with SMTP id d9443c01a7336-2cf1f5d7491mr198894955ad.29.1784544038972; Mon, 20 Jul 2026 03:40:38 -0700 (PDT) Received: from penguin.tail0a1999.ts.net (61-228-16-100.dynamic-ip.hinet.net. [61.228.16.100]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2cf344f61ffsm54900325ad.33.2026.07.20.03.40.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Jul 2026 03:40:38 -0700 (PDT) From: Shih-Yuan Lee To: Mark Brown Cc: Andy Shevchenko , Daniel Mack , Haojian Zhuang , Robert Jarzmik , linux-arm-kernel@lists.infradead.org, linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org, Shih-Yuan Lee Subject: [PATCH v15 2/7] spi: pxa2xx: introduce suspended flag for interrupt synchronization Date: Mon, 20 Jul 2026 18:40:24 +0800 Message-Id: <20260720104029.13740-3-fourdollars@debian.org> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20260720104029.13740-1-fourdollars@debian.org> References: <20260720104029.13740-1-fourdollars@debian.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" When a shared interrupt line is used, the interrupt handler ssp_int() can be triggered by other devices sharing the line. The handler must ensure it does not access the SSP controller registers via MMIO when the device is powered down or when its clock is gated; otherwise, it will cause PCIe Completion Timeouts and system hangs. Currently, ssp_int() guards MMIO access using: if (pm_runtime_suspended(drv_data->ssp->dev)) return IRQ_NONE; However, during PM transitions (such as system suspend or runtime PM autosuspend), device callbacks execute to disable the hardware and gate the clock, but the PM state machine does not mark the device as RPM_SUSPENDED until after the suspend callback returns. During this transitional state (RPM_SUSPENDING), pm_runtime_suspended() returns false. If a shared interrupt fires after the clock has been gated but before the PM state has transitioned, ssp_int() will execute, attempt MMIO reads on the unclocked register space, and hang the system. Formal verification using Spin/PROMELA confirms that a scheduling window exists where the interrupt thread accesses MMIO when clk_enabled is false, violating safety properties. Introduce a custom 'suspended' boolean flag in struct driver_data to track the device's suspended state across all PM transitions. Check both 'drv_data->suspended' and '!drv_data->clk_enabled' in ssp_int() to return IRQ_NONE immediately before any MMIO access is attempted. This closes the state transition race condition and mathematically guarante= es deadlock-free, safe shared interrupt handling during power transitions. Signed-off-by: Shih-Yuan Lee --- drivers/spi/spi-pxa2xx.c | 37 ++++++++++++++++++++++--------------- 1 file changed, 22 insertions(+), 15 deletions(-) diff --git a/drivers/spi/spi-pxa2xx.c b/drivers/spi/spi-pxa2xx.c index d50152aad348..d4a9a48c2624 100644 --- a/drivers/spi/spi-pxa2xx.c +++ b/drivers/spi/spi-pxa2xx.c @@ -743,12 +743,12 @@ static irqreturn_t ssp_int(int irq, void *dev_id) u32 status; =20 /* - * The IRQ might be shared with other peripherals so we must first - * check that are we RPM suspended or not. If we are we assume that - * the IRQ was not for us (we shouldn't be RPM suspended when the - * interrupt is enabled). + * The IRQ might be shared with other peripherals or trigger during + * power state transitions. First check if device is suspended or if + * clock is disabled; if so, return IRQ_NONE immediately to avoid + * unclocked MMIO reads. */ - if (pm_runtime_suspended(drv_data->ssp->dev)) + if (drv_data->suspended || !drv_data->clk_enabled) return IRQ_NONE; =20 /* @@ -1310,6 +1310,7 @@ int pxa2xx_spi_probe(struct device *dev, struct ssp_d= evice *ssp, drv_data->controller =3D controller; drv_data->controller_info =3D platform_info; drv_data->ssp =3D ssp; + drv_data->suspended =3D true; =20 /* The spi->mode bits understood by this driver: */ controller->mode_bits =3D SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LOOP; @@ -1352,11 +1353,6 @@ int pxa2xx_spi_probe(struct device *dev, struct ssp_= device *ssp, | SSSR_ROR | SSSR_TUR; } =20 - status =3D request_irq(ssp->irq, ssp_int, IRQF_SHARED, dev_name(dev), - drv_data); - if (status < 0) - return dev_err_probe(dev, status, "cannot get IRQ %d\n", ssp->irq); - /* Setup DMA if requested */ if (platform_info->enable_dma) { status =3D pxa2xx_spi_dma_setup(drv_data); @@ -1376,7 +1372,16 @@ int pxa2xx_spi_probe(struct device *dev, struct ssp_= device *ssp, /* Enable SOC clock */ status =3D pxa2xx_spi_clk_enable(drv_data); if (status) - goto out_error_dma_irq_alloc; + goto out_error_dma_alloc; + + drv_data->suspended =3D false; + + status =3D request_irq(ssp->irq, ssp_int, IRQF_SHARED, dev_name(dev), + drv_data); + if (status < 0) { + status =3D dev_err_probe(dev, status, "cannot get IRQ %d\n", ssp->irq); + goto out_error_clock_enabled; + } =20 controller->max_speed_hz =3D clk_get_rate(ssp->clk); /* @@ -1456,7 +1461,7 @@ int pxa2xx_spi_probe(struct device *dev, struct ssp_d= evice *ssp, "ready", GPIOD_OUT_LOW); if (IS_ERR(drv_data->gpiod_ready)) { status =3D PTR_ERR(drv_data->gpiod_ready); - goto out_error_clock_enabled; + goto out_error_irq_alloc; } } =20 @@ -1465,17 +1470,19 @@ int pxa2xx_spi_probe(struct device *dev, struct ssp= _device *ssp, status =3D spi_register_controller(controller); if (status) { dev_err_probe(dev, status, "problem registering SPI controller\n"); - goto out_error_clock_enabled; + goto out_error_irq_alloc; } =20 return status; =20 +out_error_irq_alloc: + free_irq(ssp->irq, drv_data); + out_error_clock_enabled: pxa2xx_spi_clk_disable(drv_data); =20 -out_error_dma_irq_alloc: +out_error_dma_alloc: pxa2xx_spi_dma_release(drv_data); - free_irq(ssp->irq, drv_data); =20 return status; } --=20 2.39.5 From nobody Sat Jul 25 02:39:06 2026 Received: from mail-pl1-f180.google.com (mail-pl1-f180.google.com [209.85.214.180]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 66CB83DB31A for ; Mon, 20 Jul 2026 10:40:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.180 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784544044; cv=none; b=KyCsPGUFRme1G2ZDA2mH/1vBYQtVdDeo+5V+twm/Y1YnqeJ7WEvIODeiFtivrj+eHaOU+B1j6vZ0Sp0J71WMHhD3a4ksWr/7hgmU7fIEMqlFqXfxIlBFlFnVAvBGJ1PT/GAyhPANRcB2FkzTiJqDKm6nVOGlzy6MhVmz2yPdi68= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784544044; c=relaxed/simple; bh=UnAsh3CjibL9YdkOiPk87mzPv+ZX5WAu6yNK19PE3Es=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=Sl3vtgY8DfzTiYUG9xrRr+1fHKmtIroNfKQ2eQ8GJ7pXEdTSr8ZhkJzCMa6qrH0tluwaPgvXKUvmOCRKXwFXeLa2ZOay/RH7FTIVC2pWmFYzeyc0OyGBc3VIUMlD6GejlvyuyDi0ssRzB87o/7EMNZ2eglNRPFnwZFWAvIyXOuw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=fail (p=none dis=none) header.from=debian.org; spf=pass smtp.mailfrom=gmail.com; arc=none smtp.client-ip=209.85.214.180 Authentication-Results: smtp.subspace.kernel.org; dmarc=fail (p=none dis=none) header.from=debian.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-pl1-f180.google.com with SMTP id d9443c01a7336-2cc97653887so108682975ad.1 for ; Mon, 20 Jul 2026 03:40:42 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1784544041; x=1785148841; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=ECUv2OBEiZbNwjfMV3/65e/S6w3Th/UZLtjgLjuN8Rg=; b=AS6XqTttG1RMJTzEkpXdMHGa8RAIabf50Lwhs+dstLSxTlB1Fqe8oXQUk+qjTZ8U4A gWY+bZvhqaF63AaQDqeLLa89O4DPDVggX4/8zCZejJk0VrSGXWbvDgF/b4W9PcDGfVmx W1czhbJvmytpUFEuHHcdtHq4gKQir1SLTRvzUFJO/v5ks2v2S3/Z6dCzXV9zu5foW57t prxIFB9BXhIVOODjZrWTsXyrxVyreNys6h+yhecaOGUOVKeZoYdGAn9CoKwph5dylMCJ M0NleuiBStJUabiuJpGnKYYvlKoljryjrPtj7Xs7JpF8/3XyJ7LRsAZ6aZqWx6xHHpe+ yctQ== X-Forwarded-Encrypted: i=1; AHgh+RqPiXSJWS+8ZfgArPhfVnzJ9hKuT5PPtOI1Wr9bXzphPo62oNRgtyQ7kjhKxLs62voI7LuT2dNMQnojUuU=@vger.kernel.org X-Gm-Message-State: AOJu0YxDdtXG0bp4P06NP6+MfKccljrH1rddVnNDYYK1OtTBHaYAibQd qnLMpOot9WVYq1XEFEHIHwTxP3xMT99ZZqYUqfq8Mc4mM1Yp7aKUkYU= X-Gm-Gg: AfdE7cltBp7SnhspfovsFiaXwbHhvUzW2hkNveMkli+B327B1QIRyafH8lcEZB34npD 4k777JXutOtgIHj8RGbgMOFZ5A+9AxXIhPZygvp25O7ethJpjMYTNRV4CjTMvqI2PmKqZk/rXBA Q4272VoR/ejUeJoKUXONJJKUHOoDNnKUgVe0L0ChlPL13g2fY7SiM6mjtoKlgx1ooO78H4VbPp8 HRsGcoM5/sNnnW0b6ZadmWVsZpZUSBZr18pfXcWmO7SUutlyWRRGR0LFV1GyQ5k1wOTWwZD3Dz4 wGOYt7xWVCDmsRCI9mCTEFXS3FowgqA8o8Az3PLi2hSP9h8hveWMCH2U17tmTz6zL68rbjprHib JcYRpaoW0dUYTy8+R5GiPqJWzwaB5TPrqGIlywjY/bUlk0rFjey/FgXGoVluSb/YEsP1+fBUeXQ PyfFUnYDZQf4GAIk+ZqYZJPn9MjfPojUgX/07m5P85Ku5t1OdwSt0We17+pmDPnawmq8clfBLjo So5RMYwlcdmCOndsU65bTiDsJ4j X-Received: by 2002:a17:902:f70d:b0:2ce:bb47:6f3c with SMTP id d9443c01a7336-2cf349c262emr151302235ad.34.1784544041432; Mon, 20 Jul 2026 03:40:41 -0700 (PDT) Received: from penguin.tail0a1999.ts.net (61-228-16-100.dynamic-ip.hinet.net. [61.228.16.100]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2cf344f61ffsm54900325ad.33.2026.07.20.03.40.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Jul 2026 03:40:40 -0700 (PDT) From: Shih-Yuan Lee To: Mark Brown Cc: Andy Shevchenko , Daniel Mack , Haojian Zhuang , Robert Jarzmik , linux-arm-kernel@lists.infradead.org, linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org, Shih-Yuan Lee Subject: [PATCH v15 3/7] spi: pxa2xx: overhaul teardown and suspend sequence using pxa2xx_spi_off Date: Mon, 20 Jul 2026 18:40:25 +0800 Message-Id: <20260720104029.13740-4-fourdollars@debian.org> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20260720104029.13740-1-fourdollars@debian.org> References: <20260720104029.13740-1-fourdollars@debian.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" When removing the driver or suspending the device, the clock must not be disabled while shared interrupts are still active. Gating the clock before waiting for in-flight interrupt handlers to complete results in race conditions where the handler performs unclocked MMIO accesses, causing PCIe Completion Timeouts. Overhaul the remove, suspend, and runtime_suspend paths to use a strict synchronized teardown order: 1. Disable hardware interrupt generation at the controller level. 2. Mark the device state as suspended (suspended =3D true) to prevent subsequent interrupt handlers from attempting MMIO reads. 3. Call synchronize_irq() to wait for any active interrupt handlers to drain completely. 4. Gate the clock via pxa2xx_spi_clk_disable(). Additionally, commit 29d7e05c5f75 ("spi: pxa2xx: Avoid touching SSCR0_SSE on MMP2") documented that disabling the hardware block via SSE on MMP2 SoC platforms corrupts the RX/TX FIFO. Instead of calling pxa_ssp_disable() directly, use the helper function pxa2xx_spi_off(), which respects the MMP2 platform quirk by bypassing SSE register writes. Signed-off-by: Shih-Yuan Lee --- drivers/spi/spi-pxa2xx.c | 49 ++++++++++++++++++++++++++++++++-------- 1 file changed, 39 insertions(+), 10 deletions(-) diff --git a/drivers/spi/spi-pxa2xx.c b/drivers/spi/spi-pxa2xx.c index d4a9a48c2624..64b5ec744756 100644 --- a/drivers/spi/spi-pxa2xx.c +++ b/drivers/spi/spi-pxa2xx.c @@ -1495,16 +1495,24 @@ void pxa2xx_spi_remove(struct device *dev) =20 spi_unregister_controller(drv_data->controller); =20 - /* Disable the SSP at the peripheral and SOC level */ - pxa_ssp_disable(ssp); + /* Disable SSP interrupt generation on hardware level while clock is acti= ve */ + pxa2xx_spi_off(drv_data); + + /* Mark as suspended to prevent further IRQ handling */ + drv_data->suspended =3D true; + + /* Wait for any pending interrupt handlers to complete */ + synchronize_irq(ssp->irq); + + /* Release IRQ */ + free_irq(ssp->irq, drv_data); + + /* Safe to disable the SSP clock now */ pxa2xx_spi_clk_disable(drv_data); =20 /* Release DMA */ if (drv_data->controller_info->enable_dma) pxa2xx_spi_dma_release(drv_data); - - /* Release IRQ */ - free_irq(ssp->irq, drv_data); } EXPORT_SYMBOL_NS_GPL(pxa2xx_spi_remove, "SPI_PXA2xx"); =20 @@ -1518,10 +1526,11 @@ static int pxa2xx_spi_suspend(struct device *dev) if (status) return status; =20 - pxa_ssp_disable(ssp); + pxa2xx_spi_off(drv_data); + drv_data->suspended =3D true; + synchronize_irq(ssp->irq); =20 - if (!pm_runtime_suspended(dev)) - pxa2xx_spi_clk_disable(drv_data); + pxa2xx_spi_clk_disable(drv_data); =20 return 0; } @@ -1529,6 +1538,7 @@ static int pxa2xx_spi_suspend(struct device *dev) static int pxa2xx_spi_resume(struct device *dev) { struct driver_data *drv_data =3D dev_get_drvdata(dev); + struct ssp_device *ssp =3D drv_data->ssp; int status; =20 /* Enable the SSP clock */ @@ -1538,14 +1548,27 @@ static int pxa2xx_spi_resume(struct device *dev) return status; } =20 + drv_data->suspended =3D false; + /* Start the queue running */ - return spi_controller_resume(drv_data->controller); + status =3D spi_controller_resume(drv_data->controller); + if (status) { + drv_data->suspended =3D true; + synchronize_irq(ssp->irq); + pxa2xx_spi_clk_disable(drv_data); + return status; + } + + return 0; } =20 static int pxa2xx_spi_runtime_suspend(struct device *dev) { struct driver_data *drv_data =3D dev_get_drvdata(dev); =20 + pxa2xx_spi_off(drv_data); + drv_data->suspended =3D true; + synchronize_irq(drv_data->ssp->irq); pxa2xx_spi_clk_disable(drv_data); return 0; } @@ -1553,8 +1576,14 @@ static int pxa2xx_spi_runtime_suspend(struct device = *dev) static int pxa2xx_spi_runtime_resume(struct device *dev) { struct driver_data *drv_data =3D dev_get_drvdata(dev); + int status; + + status =3D pxa2xx_spi_clk_enable(drv_data); + if (status) + return status; =20 - return pxa2xx_spi_clk_enable(drv_data); + drv_data->suspended =3D false; + return 0; } =20 EXPORT_NS_GPL_DEV_PM_OPS(pxa2xx_spi_pm_ops, SPI_PXA2xx) =3D { --=20 2.39.5 From nobody Sat Jul 25 02:39:06 2026 Received: from mail-pl1-f174.google.com (mail-pl1-f174.google.com [209.85.214.174]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9D60C3DCD97 for ; Mon, 20 Jul 2026 10:40:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.174 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784544046; cv=none; b=ZR/aszD2PcCxjtAwGqSh1nbKv9N6fbJeU1VdDfC2vnYFBVkuZj4jCqcVmcvFSI9ypsZMIKBecBy8RpG6IelXm20X9dCA+5/FKDRSG17QsR9u0LrDoWmo8f7bxfNJPw/4n2Y05PI2hzSAKqF4RGWJVX9HOpo+xn/52BdXccukcmc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784544046; c=relaxed/simple; bh=KOg2s0aWMbLiGwvJ+2qMJwffalK7t3oBpcm6XVotiHA=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=GUI04ClQKLKwcQF5wQQHT3/AMk5bWfs2TenTwd22nMYvUKmuoJo6CDr2RVOREPT2H+Hyouhj2VKFNLB6atB6oFQ4sXUj2ESdNCT4sPyQdMVytmg2IatNzh3SpgJ0aAWWzdnYqmdrRIOBl92AlA7VOJNI5fRfDDNavs35rRxHjI4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=fail (p=none dis=none) header.from=debian.org; spf=pass smtp.mailfrom=gmail.com; arc=none smtp.client-ip=209.85.214.174 Authentication-Results: smtp.subspace.kernel.org; dmarc=fail (p=none dis=none) header.from=debian.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-pl1-f174.google.com with SMTP id d9443c01a7336-2cca0c5799eso75288445ad.0 for ; Mon, 20 Jul 2026 03:40:44 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1784544044; x=1785148844; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=Pc9Q17L9G9Tp/hTZeKzZ+mFFZkDIc4OrDplBBsBLoik=; b=THaIXNxq6xF+h+4fFJ266wtEljabl8UPaYv9UhiIIgFRfLcicyJVQ85K5CGVCA7T8Q nkArA0fsoFUIM4w0RHSRLMgQdzLJowjTvKdH2pErPuwq2b3wD2QPyFPBNRRlWqYiuacs SLR9ycnYS1BwrO5aarvaaEmkLQ8Y3n/WouLvBI+Js96E3S/cagXL9uL42YYSKNwJX0nz Tr4D6Pmz5FNzs9U2hlMlX3OpTc6tGKOLimM3fQeQfNSdY9qSQSThCmcMdtqAcXxeemZn n/E5lVU2F4bDxjFk6/hg0LB1WurwGFZQfx4fjC6lS0LrCCQZFdCyqS9U8SjKmiYMtkEi 1oww== X-Forwarded-Encrypted: i=1; AHgh+Rq6qh3Cs7Zm0CpEDi5kjZcEMRLcDZs+Ho/k0B2mhdImZhxSz9gQ3qIEBmvd/ZB5Z6Q98DHgPdSRupSvC8Y=@vger.kernel.org X-Gm-Message-State: AOJu0YysUpDbBLWtBqxYSO73PP3u2DMQaY2FBP2/MYE09FqhW5Z5+rdv x+KpgojUrgbvYcrs+0XDlHabiKShEN0xXbFmhFqngwxSDF+LPMDICFA= X-Gm-Gg: AfdE7ckvsPBCcql3tKEEKRtRyHnE2GiJAwWX12TIWGjTSSs9hXvxdP62g0VoCCl5ZN7 LunrFzM/oOE7x4QwpArZwEHdkzdbqUPB4X3wnJqmG0Oi1McAC116bUWbxE9Uv/Ek1DmPL6jkSS0 YO2fw4eOlBNJW9y2VEMj5jqZKmnM1LZbIXTx4cAixBeEIJQBks1dNMMJYoSBzlx+CI5OX4d+BBw n5vfshss7L0DKRmCXqFa8ehor3qHGtbN2kll8FAIc0S1bLL76K1L/Z+m+TzA1YtrEUSDaYSHCb+ VnxVZJ0EqJU4SMiORN46Olcg+EAhNX4kvt29WwOwpYBpgI9IO/H9JaBWsLpoSzF7MGdI7feDgIY zeaL5msksFmDiJcE5vNUjLlpUh147Lx0BPB+jNWNbrwc2ttMvSCSEOr5TmQYIk6L9j/5ASgMSIj x0iLGJcIBf1FWkjfpff1KijOfiMt8TG06+GR5KQM6le+DLV2OK6KkdbZhoGIr/dK2+pFbg05pp0 2h15Ck4VPevpYL5c1+Umw9y4JyQ X-Received: by 2002:a17:903:3c46:b0:2c9:97a8:afef with SMTP id d9443c01a7336-2cf349f4a51mr134654595ad.40.1784544043870; Mon, 20 Jul 2026 03:40:43 -0700 (PDT) Received: from penguin.tail0a1999.ts.net (61-228-16-100.dynamic-ip.hinet.net. [61.228.16.100]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2cf344f61ffsm54900325ad.33.2026.07.20.03.40.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Jul 2026 03:40:43 -0700 (PDT) From: Shih-Yuan Lee To: Mark Brown Cc: Andy Shevchenko , Daniel Mack , Haojian Zhuang , Robert Jarzmik , linux-arm-kernel@lists.infradead.org, linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org, Shih-Yuan Lee Subject: [PATCH v15 4/7] spi: pxa2xx: lock out runtime autosuspend for Intel LPSS SPI in PIO mode Date: Mon, 20 Jul 2026 18:40:26 +0800 Message-Id: <20260720104029.13740-5-fourdollars@debian.org> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20260720104029.13740-1-fourdollars@debian.org> References: <20260720104029.13740-1-fourdollars@debian.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" When operating in PIO mode on Intel LPSS SPI controllers, runtime PM autosuspend clock-gates the hardware block when idle. On subsequent transfers, MMIO accesses to trigger resume are performed before the runtime PM state machine can wake the controller, causing PCIe Completion Timeouts. This issue does not affect DMA mode, where the DMA engine holds the required resources, nor does it affect non-LPSS controllers. Lock out runtime PM autosuspend for LPSS SPI controllers specifically when operating in PIO mode. Acquire a runtime PM reference via pm_runtime_get_noresume() in pxa2xx_spi_probe() after registration, and release it via pm_runtime_put_sync() in pxa2xx_spi_remove() to ensure the runtime PM state machine transitions to RPM_SUSPENDED upon driver unbind, preventing active child count leaks on the parent LPSS power domain. Signed-off-by: Shih-Yuan Lee --- drivers/spi/spi-pxa2xx.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/spi/spi-pxa2xx.c b/drivers/spi/spi-pxa2xx.c index 64b5ec744756..88ed28096b07 100644 --- a/drivers/spi/spi-pxa2xx.c +++ b/drivers/spi/spi-pxa2xx.c @@ -1473,6 +1473,9 @@ int pxa2xx_spi_probe(struct device *dev, struct ssp_d= evice *ssp, goto out_error_irq_alloc; } =20 + if (is_lpss_ssp(drv_data) && !platform_info->enable_dma) + pm_runtime_get_noresume(dev); + return status; =20 out_error_irq_alloc: @@ -1513,6 +1516,8 @@ void pxa2xx_spi_remove(struct device *dev) /* Release DMA */ if (drv_data->controller_info->enable_dma) pxa2xx_spi_dma_release(drv_data); + else if (is_lpss_ssp(drv_data)) + pm_runtime_put_sync(dev); } EXPORT_SYMBOL_NS_GPL(pxa2xx_spi_remove, "SPI_PXA2xx"); =20 --=20 2.39.5 From nobody Sat Jul 25 02:39:06 2026 Received: from mail-pl1-f169.google.com (mail-pl1-f169.google.com [209.85.214.169]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EC66A3DC4B7 for ; Mon, 20 Jul 2026 10:40:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.169 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784544048; cv=none; b=eiw14I9HRDXPeI66sVLcqhRUhcBKJuG5CmPsW0QePP0eRvWiZdrwLvIycOGTpkw3kER08zW9byLISIFFvU4mmoIEbDklar662yq/tnFpzAvWQGevKtB50LTwvDjj+2liafRauUn2T1ZZas9lU3OCfebfKOJlCM5JrcWeeu59mgk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784544048; c=relaxed/simple; bh=vMxi0GBCmk6kSxxY3msXn6b8DUdRebKtLoidNsiWryg=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=RZueU1bB+CeUszAnJXKWEKv7j4MKgGOT/UcxFtxVgsQJeCMBz5U2Emri3/7omH2yH4R7vaKI15uV4V1AZNxAtLy3bzxbsSmzRO+DinhAGS4mE1zsvT2iMLBtq7SGfNivoQPCWBO3ipdrpbQPTJAknznaI6Rqt6Aw9r5UsW3f1AU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=fail (p=none dis=none) header.from=debian.org; spf=pass smtp.mailfrom=gmail.com; arc=none smtp.client-ip=209.85.214.169 Authentication-Results: smtp.subspace.kernel.org; dmarc=fail (p=none dis=none) header.from=debian.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-pl1-f169.google.com with SMTP id d9443c01a7336-2caf228a910so77561235ad.2 for ; Mon, 20 Jul 2026 03:40:46 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1784544046; x=1785148846; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=lgLs8NK0XHHTysnGduh8WTtXMi/Zls+hjiJh2kwYBOI=; b=hRdhsvfmjTNjM2EaK8rdgXndImpHV17JHzNt16CqFJBBWZz5DcOHSUARo5jCGip0Ic UM7gLu163NYUhabwa4EwbcCnE5bJr+JliTVPKiqqymPgTfvC+QYFxnQXmxeOsBgc3k1N H13zLk7MmrgiTr24zD/Gk9vfwLEPq1vo/nofWzJpvCpdSplbUwCX6p47hmhm80qDUToG CdtbCgM/65RYktk30W9dzreobyYOjLHbGEZs9GSkZ4KHw4syq16qLB0VnPsZJu2qIvKS cxwD4XO9Wx0uH8ex8PWhb4Cpg7KCdGAJNhMuIF06R3yUpmt9Hc8rLCbYzdOpdvGZ0IOs NHzA== X-Forwarded-Encrypted: i=1; AHgh+RrfKPi2ylrezpi0SkgGKLcpuVVBUmk9GbfziMN3cnSNE+9FJhDRikAHhqkaqWhL5bb7DiHv0Whu8EjP6zg=@vger.kernel.org X-Gm-Message-State: AOJu0Yz27/lbSOJIPo4tXZuyQfvspWJU+2RLSNL7iusJ67mEh1/EkcAZ E+svjjNTenXBzaIsnYlgJ1xQn3s7m/00X/57J6ElhJ3Vf7B5P5WWCWM= X-Gm-Gg: AfdE7ckYubZ4gcoUw0qNk+zutRRECMo/Gz3ZJ63vn8mJ28rXztF9GzEJ5o/P6CNuf6o 1YPawb/jpWtacmTlYC23lndvOtUuOx6wUCvlZ3EgoGp9lHIdeLjHULVkWH7l78KbS/RqBvK1ML1 YmA/+GK1znAY5SkHKsm1on/oyem4ZK24rXIGog//iYYA/EotOp1l46+/YLLLK/uX2cbhN5FPV0r dSD1/IRKdaOmavLIG/wT8LQBMRm6gwmzYu//aTPQIm3ZqKETsDqi69aHB0A3QmCcGr7AHLBlwCF OjoYWuacytDCXqscniMOz3Ljz/1+nITbHRj+03hrCb2hK6oRRnI/+hi1ZEcAtLNm6EN3fQYVBOo ENr7Z5mWmg31jKbeoVoeHxSp6Q8RaQqCdCqsOYVCSGlzWoJt20+NvAlyuZyFnUfy9mFwjc+sN8k K8IFdbubGDCykpfaFg3DYiBESuOqsKMEbaTXpf6hzRBX0qohK/dUx7y7+fvz2Rrk1XnRII8ZhJ3 58ot3cpwfg/5f6g+g== X-Received: by 2002:a17:903:19cc:b0:2cc:db71:4db5 with SMTP id d9443c01a7336-2cf349d3ee3mr147347175ad.37.1784544046271; Mon, 20 Jul 2026 03:40:46 -0700 (PDT) Received: from penguin.tail0a1999.ts.net (61-228-16-100.dynamic-ip.hinet.net. [61.228.16.100]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2cf344f61ffsm54900325ad.33.2026.07.20.03.40.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Jul 2026 03:40:45 -0700 (PDT) From: Shih-Yuan Lee To: Mark Brown Cc: Andy Shevchenko , Daniel Mack , Haojian Zhuang , Robert Jarzmik , linux-arm-kernel@lists.infradead.org, linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org, Shih-Yuan Lee Subject: [PATCH v15 5/7] spi: pxa2xx: disable DMA for Apple MacBook8,1 Date: Mon, 20 Jul 2026 18:40:27 +0800 Message-Id: <20260720104029.13740-6-fourdollars@debian.org> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20260720104029.13740-1-fourdollars@debian.org> References: <20260720104029.13740-1-fourdollars@debian.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" On MacBook8,1 (early 2015 12" MacBook), the LPSS SPI controller at 00:15.4 suffers from hardware DMA handshake failures and interrupt routing bugs, causing keyboard/touchpad transactions to fail when DMA is enabled. Move the forced PIO mode DMI quirk to spi-pxa2xx-pci.c (the LPSS host controller PCI glue driver) to avoid layering violations in client drivers (such as applespi). Add an explicit DMI match table for MacBook8,1 and a module parameter spi_pxa2xx_force_pio to allow forcing PIO mode on demand. Link: https://bugzilla.kernel.org/show_bug.cgi?id=3D108331 Signed-off-by: Shih-Yuan Lee --- drivers/spi/spi-pxa2xx-pci.c | 35 +++++++++++++++++++++++++++++++++-- 1 file changed, 33 insertions(+), 2 deletions(-) diff --git a/drivers/spi/spi-pxa2xx-pci.c b/drivers/spi/spi-pxa2xx-pci.c index cae77ac18520..31bdaa096d9e 100644 --- a/drivers/spi/spi-pxa2xx-pci.c +++ b/drivers/spi/spi-pxa2xx-pci.c @@ -18,9 +18,14 @@ =20 #include #include +#include =20 #include "spi-pxa2xx.h" =20 +static bool spi_pxa2xx_force_pio; +module_param_named(force_pio, spi_pxa2xx_force_pio, bool, 0444); +MODULE_PARM_DESC(force_pio, "Force PIO mode (disables DMA) for SPI transfe= rs. ([0] =3D disabled, 1 =3D enabled)"); + #define PCI_DEVICE_ID_INTEL_QUARK_X1000 0x0935 #define PCI_DEVICE_ID_INTEL_BYT 0x0f0e #define PCI_DEVICE_ID_INTEL_MRFLD 0x1194 @@ -93,6 +98,32 @@ static void lpss_dma_put_device(void *dma_dev) pci_dev_put(dma_dev); } =20 +static const struct dmi_system_id pxa2xx_spi_pci_dmi_table[] =3D { + { + .ident =3D "Apple MacBook8,1", + .matches =3D { + DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."), + DMI_MATCH(DMI_PRODUCT_NAME, "MacBook8,1"), + }, + }, + { } +}; + +static bool pxa2xx_spi_pci_can_dma(struct pci_dev *dev) +{ + if (spi_pxa2xx_force_pio) { + pci_info(dev, "Forcing PIO mode (disabling DMA)\n"); + return false; + } + + if (dmi_check_system(pxa2xx_spi_pci_dmi_table)) { + pci_info(dev, "MacBook8,1 detected: disabling DMA to force PIO mode\n"); + return false; + } + + return true; +} + static int lpss_spi_setup(struct pci_dev *dev, struct pxa2xx_spi_controlle= r *c) { struct ssp_device *ssp =3D &c->ssp; @@ -166,7 +197,7 @@ static int lpss_spi_setup(struct pci_dev *dev, struct p= xa2xx_spi_controller *c) =20 c->dma_filter =3D lpss_dma_filter; c->dma_burst_size =3D 1; - c->enable_dma =3D 1; + c->enable_dma =3D pxa2xx_spi_pci_can_dma(dev); return 0; } =20 @@ -238,7 +269,7 @@ static int mrfld_spi_setup(struct pci_dev *dev, struct = pxa2xx_spi_controller *c) =20 c->dma_filter =3D lpss_dma_filter; c->dma_burst_size =3D 8; - c->enable_dma =3D 1; + c->enable_dma =3D pxa2xx_spi_pci_can_dma(dev); return 0; } =20 --=20 2.39.5 From nobody Sat Jul 25 02:39:06 2026 Received: from mail-pl1-f177.google.com (mail-pl1-f177.google.com [209.85.214.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 866D62FD68B for ; Mon, 20 Jul 2026 10:40:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.177 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784544055; cv=none; b=FHAQY5iNPAyQ7RkeeP6sSq+LPQBwNbLOBdWG9xd7A8RoGgMp6cJBqAQOYsA2QPHQ6Ci0zZOKutsZagw5lmkqOxa1rSzC3NxY/SYVmmxk7PcFKzL4Q9KPm00TjRGiF5CXtaIApbNcM1CHTFi+mJrNaqMXcPUREy5RVBh4Pm7hQyY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784544055; c=relaxed/simple; bh=3g+3xi7SKONTJUBylpqN2msZG7y/rNb3leszdhJKwh4=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=blo4dyPJpyAD5f7soumEkbheeLvwx2t/h+whVnnsy3t4yUprT82RYMdOPYxHo7BWlSvvEZxCw82Sguyxogts2UWPZCUi2NgUOCokezSL/jSSEnCHzslBzGezU0XS0YjS74wtHaWQL/ZtNyxeIM1LAlJWTk/mJUjeUnuBtnovqkc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=fail (p=none dis=none) header.from=debian.org; spf=pass smtp.mailfrom=gmail.com; arc=none smtp.client-ip=209.85.214.177 Authentication-Results: smtp.subspace.kernel.org; dmarc=fail (p=none dis=none) header.from=debian.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-pl1-f177.google.com with SMTP id d9443c01a7336-2ce87c7e3bbso111510825ad.1 for ; Mon, 20 Jul 2026 03:40:50 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1784544049; x=1785148849; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=4fOErW4W0huqYOzMta6lrgtyUPK1eaYnpCDX3YPECv0=; b=Ad/RUGu24TlspAEaOKXF9P0oHUcGgaKOzB344EMwfeNjKpqL9ad5v6A6p5IFBfvyHl GF27ZNc1VueRIl4VYLDo5pygQOVaeJLZNkQxgn8sEI/V3Nank9O7KAWqkrM48i4QjX5N 5S3fGQBHtCIQQYYuNjn9T4XAtOLMb8dBPVonOHBrR/5zfBMPO5biRFC27gMRT2fhvixY OYbtOVlXPBH+bfIjVgowc05j1YIno4cR0C+T6sNTlhyVcMZ8cXW49pn6bOZZNfA0yIxq Wwct3fhwtHRL0/daSfeJWLC+8zwf8+PcVYMPOX4W/CS5UjyCkyRpH/fOBKbsd94KOXHV x1oA== X-Forwarded-Encrypted: i=1; AHgh+RqNl1WgpBqZt0B92B06AQZQ55ptvFfIjOOP27tuDhfFshQgrFYLlS5oMPzt96eGCv0LJsuo6eci4TeQ6aM=@vger.kernel.org X-Gm-Message-State: AOJu0YwGPAujgnOccoGJXiWlUX5Qidd5jBpzjw/k5F0qw0sWuX0I6XLE 8uFTRDzmGYrBXTeymOg22OE8hOw9qqiKwUDADxGJTO2b90cr7yzgyK4= X-Gm-Gg: AfdE7ck3R9nZFFzQTZ9f1Lswfcqj9e0wOhW87Zqh+33J9VZwyrjDPxaoN+ExUUE0xMf 5eYllmRCvrbBiF16meLAyHLFMW9UfhdjuGda8QdzR1g3+8pxyesO5DeOWBGImcwJD95MKobfUVm Mw8xhUH+jjBrD0PWGJ+1lRbdJLWyij0ffEHe7PSF8gKpF6JH17GN1n/2170ZRzW6E5q0cFmzVJu BhQByqZ7chfqkI4Z7THWZPI3Y93R2HL7Qp7Ri74dWZvuMHu4rfql+Vv5ix1VR880Lcd4ZYPPlZm yjJKTs2HyLOPpiSphtNFDC7C9vzHSz+PCvluYplaE+KwGEUu+S3Iob/f7Dv/AUcNMy6cfM6QT+L aNkF7LZEOVnR3UhdCCRuNv2Y/W+g2AImDRa8rodayvIlgxeKlYnO4w6hhTd84Ai+OF7wX6sYNp7 jJ3nKKwmf3MAxvz4GoLj14NRi0AHrkPQI2z1MNMiwPX0F6xI7A0SoO35LMW4pWfhussiPZkcuGL aH91m04a2P36PKvag== X-Received: by 2002:a17:902:f688:b0:2ca:5d24:720b with SMTP id d9443c01a7336-2cf349caff7mr152740295ad.39.1784544048693; Mon, 20 Jul 2026 03:40:48 -0700 (PDT) Received: from penguin.tail0a1999.ts.net (61-228-16-100.dynamic-ip.hinet.net. [61.228.16.100]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2cf344f61ffsm54900325ad.33.2026.07.20.03.40.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Jul 2026 03:40:48 -0700 (PDT) From: Shih-Yuan Lee To: Mark Brown Cc: Andy Shevchenko , Daniel Mack , Haojian Zhuang , Robert Jarzmik , linux-arm-kernel@lists.infradead.org, linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org, Shih-Yuan Lee Subject: [PATCH v15 6/7] spi: pxa2xx: restore LPSS private register state on S3 resume Date: Mon, 20 Jul 2026 18:40:28 +0800 Message-Id: <20260720104029.13740-7-fourdollars@debian.org> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20260720104029.13740-1-fourdollars@debian.org> References: <20260720104029.13740-1-fourdollars@debian.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Intel LPSS SPI controllers lose all private register state across S3 suspend because the LPSS power domain is fully removed. On resume the driver only re-enables the SSP clock, leaving the LPSS private registers in their power-on-reset state, which causes two problems: 1. LPSS_PRIV_RESETS (offset 0x04 within the LPSS private space) stays zero, keeping the functional block in reset. Any MMIO access while the block is held in reset causes a PCIe Completion Timeout and a watchdog-triggered system reset. LPSS_PRIV_RESETS_FUNC and LPSS_PRIV_RESETS_IDMA must be de-asserted before any other register access on resume. 2. The LPSS software chip-select control register must not be blindly restored from its suspend-time snapshot: if CS was asserted at the moment of suspend, restoring that state corrupts the first post-resume SPI transaction. Instead, call lpss_ssp_setup() which unconditionally writes SW_MODE | CS_HIGH (idle/deasserted), matching the state established at probe time. To resolve these issues safely: - Wrap S3 suspend/resume with pm_runtime_resume_and_get() and pm_runtime_put_autosuspend() to guarantee active clocks during MMIO access and preserve PM reference counting. - Restrict LPSS private register save/restore to LPT, BYT, and BSW platforms via pxa2xx_spi_need_lpss_restore() (newer platforms are handled by intel-lpss.c). - Save only the first 6 LPSS private registers (offsets 0x00..0x14) in drv_data during suspend, avoiding reserved offsets beyond 0x14. - On resume, de-assert resets first, restore saved registers, call lpss_ssp_setup(), and clear drv_data->suspended to prevent unclocked IRQ access. - Add error recovery paths for spi_controller_suspend/resume failures. Link: https://bugzilla.kernel.org/show_bug.cgi?id=3D108331 Signed-off-by: Shih-Yuan Lee --- drivers/spi/spi-pxa2xx.c | 95 ++++++++++++++++++++++++++++++++++++++-- drivers/spi/spi-pxa2xx.h | 1 + 2 files changed, 92 insertions(+), 4 deletions(-) diff --git a/drivers/spi/spi-pxa2xx.c b/drivers/spi/spi-pxa2xx.c index 88ed28096b07..56e434f6e794 100644 --- a/drivers/spi/spi-pxa2xx.c +++ b/drivers/spi/spi-pxa2xx.c @@ -72,6 +72,11 @@ struct chip_data { #define LPSS_CAPS_CS_EN_SHIFT 9 #define LPSS_CAPS_CS_EN_MASK (0xf << LPSS_CAPS_CS_EN_SHIFT) =20 +/* Offsets from drv_data->lpss_base */ +#define LPSS_PRIV_RESETS 0x04 +#define LPSS_PRIV_RESETS_IDMA BIT(2) +#define LPSS_PRIV_RESETS_FUNC 0x3 + #define LPSS_PRIV_CLOCK_GATE 0x38 #define LPSS_PRIV_CLOCK_GATE_CLK_CTL_MASK 0x3 #define LPSS_PRIV_CLOCK_GATE_CLK_CTL_FORCE_ON 0x3 @@ -189,6 +194,18 @@ static bool is_lpss_ssp(const struct driver_data *drv_= data) } } =20 +static bool pxa2xx_spi_need_lpss_restore(const struct driver_data *drv_dat= a) +{ + switch (drv_data->ssp_type) { + case LPSS_LPT_SSP: + case LPSS_BYT_SSP: + case LPSS_BSW_SSP: + return true; + default: + return false; + } +} + static bool is_quark_x1000_ssp(const struct driver_data *drv_data) { return drv_data->ssp_type =3D=3D QUARK_X1000_SSP; @@ -1527,17 +1544,45 @@ static int pxa2xx_spi_suspend(struct device *dev) struct ssp_device *ssp =3D drv_data->ssp; int status; =20 + status =3D pm_runtime_resume_and_get(dev); + if (status < 0) + return status; + status =3D spi_controller_suspend(drv_data->controller); if (status) - return status; + goto out_put; =20 + /* Disable SSP interrupt generation on hardware level while clock is acti= ve */ pxa2xx_spi_off(drv_data); + + /* Mark as suspended and synchronize IRQ before disabling clock */ drv_data->suspended =3D true; synchronize_irq(ssp->irq); =20 + if (pxa2xx_spi_need_lpss_restore(drv_data)) { + unsigned int i; + + /* + * Save the first 6 LPSS private registers (offsets 0x00 to 0x14) + * while the clock is still enabled. They are lost when the LPSS + * power domain is removed across S3 and must be restored on resume. + * Use drv_data->lpss_base so the correct per-platform offset + * is applied regardless of LPSS IP revision. + * Registers beyond 0x14 (except CS control at 0x18) are reserved + * or unimplemented on LPT, and accessing them triggers a PCIe + * Completion Timeout causing a system halt. + */ + for (i =3D 0; i < 6; i++) + drv_data->lpss_priv_ctx[i] =3D readl(drv_data->lpss_base + i * 4); + } + pxa2xx_spi_clk_disable(drv_data); =20 return 0; + +out_put: + pm_runtime_put_noidle(dev); + return status; } =20 static int pxa2xx_spi_resume(struct device *dev) @@ -1550,9 +1595,47 @@ static int pxa2xx_spi_resume(struct device *dev) if (!pm_runtime_suspended(dev)) { status =3D pxa2xx_spi_clk_enable(drv_data); if (status) - return status; + goto out_put; } =20 + if (pxa2xx_spi_need_lpss_restore(drv_data)) { + unsigned int i; + + /* + * The LPSS power domain is removed across S3, taking + * all private registers with it. De-assert the + * functional block and IDMA resets first; any MMIO + * access while the block is held in reset causes a + * PCIe Completion Timeout and a watchdog-triggered + * system reset. + */ + writel(LPSS_PRIV_RESETS_FUNC | LPSS_PRIV_RESETS_IDMA, + drv_data->lpss_base + LPSS_PRIV_RESETS); + + /* Restore the other 5 saved private registers */ + for (i =3D 0; i < 6; i++) { + if (i =3D=3D LPSS_PRIV_RESETS / 4) + continue; + writel(drv_data->lpss_priv_ctx[i], + drv_data->lpss_base + i * 4); + } + } + + if (is_lpss_ssp(drv_data)) { + /* + * Re-initialise the SW chip-select control register so + * CS starts deasserted (SW_MODE | CS_HIGH), regardless + * of the state it was in at suspend time. A stale + * asserted CS on the first post-resume transaction + * corrupts the write-status response from the device. + */ + lpss_ssp_setup(drv_data); + } + + /* + * Now that resets are de-asserted and registers are restored, + * it is safe to handle interrupts. + */ drv_data->suspended =3D false; =20 /* Start the queue running */ @@ -1561,10 +1644,14 @@ static int pxa2xx_spi_resume(struct device *dev) drv_data->suspended =3D true; synchronize_irq(ssp->irq); pxa2xx_spi_clk_disable(drv_data); - return status; + goto out_put; } =20 - return 0; +out_put: + if (!pm_runtime_suspended(dev)) + pm_runtime_put_noidle(dev); + + return status; } =20 static int pxa2xx_spi_runtime_suspend(struct device *dev) diff --git a/drivers/spi/spi-pxa2xx.h b/drivers/spi/spi-pxa2xx.h index 44f37bf9c519..48169494f74e 100644 --- a/drivers/spi/spi-pxa2xx.h +++ b/drivers/spi/spi-pxa2xx.h @@ -71,6 +71,7 @@ struct driver_data { irqreturn_t (*transfer_handler)(struct driver_data *drv_data); =20 void __iomem *lpss_base; + u32 lpss_priv_ctx[6]; =20 bool suspended; bool clk_enabled; --=20 2.39.5 From nobody Sat Jul 25 02:39:06 2026 Received: from mail-pl1-f181.google.com (mail-pl1-f181.google.com [209.85.214.181]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3AEF73DDB19 for ; Mon, 20 Jul 2026 10:40:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.181 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784544054; cv=none; b=O33ogvhMGCRTSGI3l0HEA+rfKDMvovgU+M+jGpkNvkjRKiUJmUI4fUKD73Zvb5TVONLzDLEse3uvBaq3f83QJue7u5CD6FKIFBmKn/Q9vigpJdM5b5PBELDBDe/tyKjYlyE71rYWvtN1EGWDyjcvsYhPKsUYxEdAFj5N0ePoAfQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784544054; c=relaxed/simple; bh=1VOB5qihoLYvUrKgDurvNJnb5E6H9r/MCX/C1s4p2D8=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=CmmArjPtjKKyTLIEzyHYqyMCKNEqx7nS780juVYDZUP2kMnaCXsQJY6fL/JEdpkYPmPSZx2o3lLxUsSkGoWer5IPWDY6NOXJqR0h6PRF0byxrFvr4xy5YCzy7GRyUbSbEIg/96csUG7UyexXOsOMWV/5MQ0yaZITadHFFkz3gTU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=fail (p=none dis=none) header.from=debian.org; spf=pass smtp.mailfrom=gmail.com; arc=none smtp.client-ip=209.85.214.181 Authentication-Results: smtp.subspace.kernel.org; dmarc=fail (p=none dis=none) header.from=debian.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-pl1-f181.google.com with SMTP id d9443c01a7336-2ced3386430so62751045ad.1 for ; Mon, 20 Jul 2026 03:40:51 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1784544051; x=1785148851; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=5cHJ+v/E14jZBDLKhft+LTxzEaKtkH3VvD3xnlIFMVc=; b=StfGof2j1RYtnADd7fO3b4km3yIjri6cgK1BF6W/QvxjbP+sqLJEtnVPP+KHQC2xOS 7gA4N4f17CBA3DZIzvIaTU1zsB4jueFYe4zw97DUO4KvZEaPmbAmN63tclryhSxwlaz5 F+YFIpgLRQNj36p19J6M+68JHxPNf42Av0UruJsa7Kyz9KPASpTyK/Tp2OnLc4sd78st RPm95nTxHa03CReCanbJCGetv+wGby7xk5VIJ5lqnLK7mGbs2qb9rFj/WxP5LJ/iAkAQ mmE7JQADJeRaJ2q5y8oJsN6u83kjw2jU48sNDwj6Kas7+3Ab0Koxyes8MidHrdP/Fu+m H/fg== X-Forwarded-Encrypted: i=1; AHgh+Rr3UVGHGUeG26ksVcx8iiaYNhe1AO3/BjL8MnR5Pl2zb6sMTZS5W2MB2UKYyDt1s6gtq8rIvjV2cii2020=@vger.kernel.org X-Gm-Message-State: AOJu0Yxn2jlSta2IHj37/DrvXzYxfWhPww2Z8h6u983G9lJ6PM6nZEvj WOc1KJN6S0wWq0DNrUj5GRZKZaA/VRatJIACtXm254jYQwHoA0b5jCI= X-Gm-Gg: AR+sD13VTHbgBed3k1c+3bd1CJqRUjYkQ//+s6G2X9cj/jNovocbBLmZQyMgEoe0Hj8 H/vRFZt5qw0HPsV3C43KKTQoBNIAJhGv8CdYEvlVfkZu18aAWUdpRbzb9k+uONVfBxVcZyQVJyp ErCQFD1YhBFUT9tm+M15UFgo4meEiRQnrgO7rcFzA0hvjCu+pkJC4XDC0A6F6WkodRZ2CjrCS5g U+as7XHSWBA7pRauLqzgRW30f3HXpRWIHXuv4Lp0ascg4rNxbdzjg3QCmexPZKTFqesxvBC2afn Jk64vxZv/NvPnsD2vDTPvYUHJ2Ab6AlTx5graCm4Gon/06ikKZ9+r2d6SDM77ugvcIN4JWoX0bG oMQ9ly97MuGr/UtMiijFbVzHJyYMdUNR709BE+xPIQLu86cN8YUpVGtcJVNS926gxWpdgADCZAK 3ek3HuntcG8widdmkoZbc11wZXfovXGFj64xscFALQ/arMktLzWX5DSOLPtphER6w13lB5oQ4+l hz6W7bsuVcH+pXzew== X-Received: by 2002:a17:902:e80a:b0:2c9:fc14:588f with SMTP id d9443c01a7336-2cf3494afc3mr150265455ad.29.1784544051064; Mon, 20 Jul 2026 03:40:51 -0700 (PDT) Received: from penguin.tail0a1999.ts.net (61-228-16-100.dynamic-ip.hinet.net. [61.228.16.100]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2cf344f61ffsm54900325ad.33.2026.07.20.03.40.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Jul 2026 03:40:50 -0700 (PDT) From: Shih-Yuan Lee To: Mark Brown Cc: Andy Shevchenko , Daniel Mack , Haojian Zhuang , Robert Jarzmik , linux-arm-kernel@lists.infradead.org, linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org, Shih-Yuan Lee Subject: [PATCH v15 7/7] spi: pxa2xx: rename local status variable to ret Date: Mon, 20 Jul 2026 18:40:29 +0800 Message-Id: <20260720104029.13740-8-fourdollars@debian.org> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20260720104029.13740-1-fourdollars@debian.org> References: <20260720104029.13740-1-fourdollars@debian.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Rename the return value variable name from 'status' to 'ret' in the pxa2xx_spi_probe(), pxa2xx_spi_suspend(), pxa2xx_spi_resume(), and pxa2xx_spi_runtime_resume() functions to conform to standard Linux kernel coding conventions. Signed-off-by: Shih-Yuan Lee --- drivers/spi/spi-pxa2xx.c | 62 ++++++++++++++++++++-------------------- 1 file changed, 31 insertions(+), 31 deletions(-) diff --git a/drivers/spi/spi-pxa2xx.c b/drivers/spi/spi-pxa2xx.c index 56e434f6e794..612361ffe6dc 100644 --- a/drivers/spi/spi-pxa2xx.c +++ b/drivers/spi/spi-pxa2xx.c @@ -1313,7 +1313,7 @@ int pxa2xx_spi_probe(struct device *dev, struct ssp_d= evice *ssp, struct spi_controller *controller; struct driver_data *drv_data; const struct lpss_config *config; - int status; + int ret; u32 tmp; =20 if (platform_info->is_target) @@ -1372,8 +1372,8 @@ int pxa2xx_spi_probe(struct device *dev, struct ssp_d= evice *ssp, =20 /* Setup DMA if requested */ if (platform_info->enable_dma) { - status =3D pxa2xx_spi_dma_setup(drv_data); - if (status) { + ret =3D pxa2xx_spi_dma_setup(drv_data); + if (ret) { dev_warn(dev, "no DMA channels available, using PIO\n"); platform_info->enable_dma =3D false; } else { @@ -1387,16 +1387,16 @@ int pxa2xx_spi_probe(struct device *dev, struct ssp= _device *ssp, } =20 /* Enable SOC clock */ - status =3D pxa2xx_spi_clk_enable(drv_data); - if (status) + ret =3D pxa2xx_spi_clk_enable(drv_data); + if (ret) goto out_error_dma_alloc; =20 drv_data->suspended =3D false; =20 - status =3D request_irq(ssp->irq, ssp_int, IRQF_SHARED, dev_name(dev), + ret =3D request_irq(ssp->irq, ssp_int, IRQF_SHARED, dev_name(dev), drv_data); - if (status < 0) { - status =3D dev_err_probe(dev, status, "cannot get IRQ %d\n", ssp->irq); + if (ret < 0) { + ret =3D dev_err_probe(dev, ret, "cannot get IRQ %d\n", ssp->irq); goto out_error_clock_enabled; } =20 @@ -1477,23 +1477,23 @@ int pxa2xx_spi_probe(struct device *dev, struct ssp= _device *ssp, drv_data->gpiod_ready =3D devm_gpiod_get_optional(dev, "ready", GPIOD_OUT_LOW); if (IS_ERR(drv_data->gpiod_ready)) { - status =3D PTR_ERR(drv_data->gpiod_ready); + ret =3D PTR_ERR(drv_data->gpiod_ready); goto out_error_irq_alloc; } } =20 /* Register with the SPI framework */ dev_set_drvdata(dev, drv_data); - status =3D spi_register_controller(controller); - if (status) { - dev_err_probe(dev, status, "problem registering SPI controller\n"); + ret =3D spi_register_controller(controller); + if (ret) { + dev_err_probe(dev, ret, "problem registering SPI controller\n"); goto out_error_irq_alloc; } =20 if (is_lpss_ssp(drv_data) && !platform_info->enable_dma) pm_runtime_get_noresume(dev); =20 - return status; + return ret; =20 out_error_irq_alloc: free_irq(ssp->irq, drv_data); @@ -1504,7 +1504,7 @@ int pxa2xx_spi_probe(struct device *dev, struct ssp_d= evice *ssp, out_error_dma_alloc: pxa2xx_spi_dma_release(drv_data); =20 - return status; + return ret; } EXPORT_SYMBOL_NS_GPL(pxa2xx_spi_probe, "SPI_PXA2xx"); =20 @@ -1542,14 +1542,14 @@ static int pxa2xx_spi_suspend(struct device *dev) { struct driver_data *drv_data =3D dev_get_drvdata(dev); struct ssp_device *ssp =3D drv_data->ssp; - int status; + int ret; =20 - status =3D pm_runtime_resume_and_get(dev); - if (status < 0) - return status; + ret =3D pm_runtime_resume_and_get(dev); + if (ret < 0) + return ret; =20 - status =3D spi_controller_suspend(drv_data->controller); - if (status) + ret =3D spi_controller_suspend(drv_data->controller); + if (ret) goto out_put; =20 /* Disable SSP interrupt generation on hardware level while clock is acti= ve */ @@ -1582,19 +1582,19 @@ static int pxa2xx_spi_suspend(struct device *dev) =20 out_put: pm_runtime_put_noidle(dev); - return status; + return ret; } =20 static int pxa2xx_spi_resume(struct device *dev) { struct driver_data *drv_data =3D dev_get_drvdata(dev); struct ssp_device *ssp =3D drv_data->ssp; - int status; + int ret; =20 /* Enable the SSP clock */ if (!pm_runtime_suspended(dev)) { - status =3D pxa2xx_spi_clk_enable(drv_data); - if (status) + ret =3D pxa2xx_spi_clk_enable(drv_data); + if (ret) goto out_put; } =20 @@ -1639,8 +1639,8 @@ static int pxa2xx_spi_resume(struct device *dev) drv_data->suspended =3D false; =20 /* Start the queue running */ - status =3D spi_controller_resume(drv_data->controller); - if (status) { + ret =3D spi_controller_resume(drv_data->controller); + if (ret) { drv_data->suspended =3D true; synchronize_irq(ssp->irq); pxa2xx_spi_clk_disable(drv_data); @@ -1651,7 +1651,7 @@ static int pxa2xx_spi_resume(struct device *dev) if (!pm_runtime_suspended(dev)) pm_runtime_put_noidle(dev); =20 - return status; + return ret; } =20 static int pxa2xx_spi_runtime_suspend(struct device *dev) @@ -1668,11 +1668,11 @@ static int pxa2xx_spi_runtime_suspend(struct device= *dev) static int pxa2xx_spi_runtime_resume(struct device *dev) { struct driver_data *drv_data =3D dev_get_drvdata(dev); - int status; + int ret; =20 - status =3D pxa2xx_spi_clk_enable(drv_data); - if (status) - return status; + ret =3D pxa2xx_spi_clk_enable(drv_data); + if (ret) + return ret; =20 drv_data->suspended =3D false; return 0; --=20 2.39.5