From nobody Sat Jul 25 03:20:49 2026 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A8A3121CC5A; Mon, 20 Jul 2026 01:21:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.61.82.184 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784510478; cv=none; b=dfZjrZ0o5Hor/ocZzyopOJ2XyI2xoeB76jqPM6Gw1LsAy6wD5sEtKMvKK+Fp0QwGhtg1JH9rBmanZQ8wnHuAJ5inkS6UJrEHRb0+tR4n4aHcaPPVRAVPNWqHVQ29cpP4vM8UXL5SiftyGuuE6bW4JVAHAzgyOh3Ml0My1eiA058= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784510478; c=relaxed/simple; bh=VKAdPioCCfQA5teFwiJrBKL1niTlVxjS7/KOavsA6RY=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=Vcz0H3SAIudN8kE3XM/isgx63GH4sF1k02bO56y05Kq/BLllJUJfGacU9fypfVN00JZI5HuPzxflqp4veqtXSfhiMse33FkLU0SoVFwinLKUkSERVY7+WefAXdyJloMdm7cfoW7N8j9+gbC8zapd4q96ETEjBKddf/CbkUKVtk8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com; spf=pass smtp.mailfrom=mediatek.com; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b=L7s2CnIn; arc=none smtp.client-ip=210.61.82.184 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mediatek.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="L7s2CnIn" X-UUID: 458cc37483d911f18dc8c9802ae25ab1-20260720 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=jiRmxrVCjtma/TiMMsUv4OSDpKz2DrsaQ0JhzrRisyw=; b=L7s2CnInEt/9fKnSMPtEBnnahNZ1nclrVv10u21I1iTRowddc3l+lLfArPNMH2ekzaX+ZaoD5GO8oH1pnMmWm81KgWnbX9C3t1TSj9tKApPSHTkZmoSDer8y0JJkaBACqnSpjVTvomtDDELEk8IL1Q5Zm1ulrXpr8yMTtLVcsbc=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.3.18,REQID:a439edda-95ac-491b-968c-f8f1459c5224,IP:0,U RL:0,TC:0,Content:-5,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION :release,TS:-5 X-CID-META: VersionHash:8a735a6,CLOUDID:82e8f99b-75c7-410a-a98f-13895d3131d4,B ulkID:nil,BulkQuantity:0,SF:81|82|102|136|836|865|888|898,TC:-5,Content:0| 15|50|99,EDM:-3|-100,IP:nil,URL:0,File:130,RT:0,Bulk:nil,QS:nil,BEC:-1,COL :0,OSI:0,OSA:0,AV:0,LES:1,SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0,ARC:0 X-CID-BVR: 2,SSN|SDN X-CID-BAS: 2,SSN|SDN,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-CID-RHF: D41D8CD98F00B204E9800998ECF8427E X-UUID: 458cc37483d911f18dc8c9802ae25ab1-20260720 Received: from mtkmbs14n1.mediatek.inc [(172.21.101.75)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 236442700; Mon, 20 Jul 2026 09:21:02 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by MTKMBS14N1.mediatek.inc (172.21.101.75) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.29; Mon, 20 Jul 2026 09:21:01 +0800 Received: from gcnsap21.gcn.mediatek.inc (10.17.81.22) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.2562.29 via Frontend Transport; Mon, 20 Jul 2026 09:21:00 +0800 From: Kyrie Wu To: Tiffany Lin , Andrew-CT Chen , Yunfei Dong , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Kyrie Wu , Nicolas Dufresne , Ricardo Ribalda , Kees Cook , Hans Verkuil , Fei Shao , Haoxiang Li , Chen-Yu Tsai , Laurent Pinchart , Tomasz Figa , Sebastian Fricke , Philipp Zabel , Benjamin Gaignard , Qianfeng Rong , Irui Wang , Jacopo Mondi , Fan Wu , , , , , CC: Sakari Ailus Subject: [PATCH v6 01/14] media: mediatek: vcodec: support vcp architecture Date: Mon, 20 Jul 2026 09:20:43 +0800 Message-ID: <20260720012056.1026551-2-kyrie.wu@mediatek.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260720012056.1026551-1-kyrie.wu@mediatek.com> References: <20260720012056.1026551-1-kyrie.wu@mediatek.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-MTK: N Content-Type: text/plain; charset="utf-8" Some platforms expose the video codec through the VCP coprocessor. Use the VCP architecture when the VCP coprocessor is found. Signed-off-by: Kyrie Wu Reviewed-by: Nicolas Dufresne --- drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw.h | 1 + .../platform/mediatek/vcodec/decoder/mtk_vcodec_dec_drv.c | 3 +++ 2 files changed, 4 insertions(+) diff --git a/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw.h = b/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw.h index 300363a40..c1642fb09 100644 --- a/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw.h +++ b/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw.h @@ -14,6 +14,7 @@ struct mtk_vcodec_enc_dev; enum mtk_vcodec_fw_type { VPU, SCP, + VCP, }; =20 enum mtk_vcodec_fw_use { diff --git a/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_= drv.c b/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_drv.c index e936ed8df..d220b645e 100644 --- a/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_drv.c +++ b/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_drv.c @@ -379,6 +379,9 @@ static int mtk_vcodec_probe(struct platform_device *pde= v) } else if (!of_property_read_u32(pdev->dev.of_node, "mediatek,scp", &rproc_phandle)) { fw_type =3D SCP; + } else if (!of_property_read_u32(pdev->dev.of_node, "mediatek,vcp", + &rproc_phandle)) { + fw_type =3D VCP; } else { dev_dbg(&pdev->dev, "Could not get vdec IPI device"); return -ENODEV; --=20 2.51.0.windows.2 From nobody Sat Jul 25 03:20:49 2026 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 65E12218E91; Mon, 20 Jul 2026 01:21:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.61.82.184 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784510479; cv=none; b=fcO9r7EqCWBxKl4FZSEFmsi75KQBOWh7Pzuxq+VWqHpodDHrKbP0QpqsFPCwVnT4kIPoQih6PPA0fdQkUlhV91wC7fvEJ6dAxOOq67Ir0fl8RLpImLSIwQheKjVhlinvukoIJ8YbrzPXem9JoYJkM86oMn0KHImYTCI27puGLMY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784510479; c=relaxed/simple; bh=eeyyIsHP2fg4ocf2tZvBzF7ND9GMncIFoG9ghZpID40=; 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Mon, 20 Jul 2026 09:21:04 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by mtkmbs11n2.mediatek.inc (172.21.101.187) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.29; Mon, 20 Jul 2026 09:21:03 +0800 Received: from gcnsap21.gcn.mediatek.inc (10.17.81.22) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.2562.29 via Frontend Transport; Mon, 20 Jul 2026 09:21:02 +0800 From: Kyrie Wu To: Tiffany Lin , Andrew-CT Chen , Yunfei Dong , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Kyrie Wu , Nicolas Dufresne , Ricardo Ribalda , Kees Cook , Hans Verkuil , Fei Shao , Haoxiang Li , Chen-Yu Tsai , Laurent Pinchart , Tomasz Figa , Sebastian Fricke , Philipp Zabel , Benjamin Gaignard , Qianfeng Rong , Irui Wang , Jacopo Mondi , Fan Wu , , , , , CC: Sakari Ailus Subject: [PATCH v6 02/14] media: mediatek: vcodec: add driver to support vcp Date: Mon, 20 Jul 2026 09:20:44 +0800 Message-ID: <20260720012056.1026551-3-kyrie.wu@mediatek.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260720012056.1026551-1-kyrie.wu@mediatek.com> References: <20260720012056.1026551-1-kyrie.wu@mediatek.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-MTK: N Content-Type: text/plain; charset="utf-8" The processor is changed from scp to vcp in mt8196 platform. Adding new firmware interface to communicate kernel with vcp for the communication method is changed. Signed-off-by: Kyrie Wu --- .../media/platform/mediatek/vcodec/Kconfig | 4 + .../platform/mediatek/vcodec/common/Makefile | 4 + .../mediatek/vcodec/common/mtk_vcodec_fw.c | 23 +- .../mediatek/vcodec/common/mtk_vcodec_fw.h | 6 +- .../vcodec/common/mtk_vcodec_fw_priv.h | 12 + .../vcodec/common/mtk_vcodec_fw_scp.c | 1 + .../vcodec/common/mtk_vcodec_fw_vcp.c | 571 ++++++++++++++++++ .../vcodec/common/mtk_vcodec_fw_vcp.h | 152 +++++ .../vcodec/common/mtk_vcodec_fw_vpu.c | 1 + .../vcodec/decoder/mtk_vcodec_dec_drv.c | 5 +- .../vcodec/decoder/mtk_vcodec_dec_drv.h | 2 + .../vcodec/encoder/mtk_vcodec_enc_drv.c | 4 +- .../vcodec/encoder/mtk_vcodec_enc_drv.h | 2 + 13 files changed, 768 insertions(+), 19 deletions(-) create mode 100644 drivers/media/platform/mediatek/vcodec/common/mtk_vcode= c_fw_vcp.c create mode 100644 drivers/media/platform/mediatek/vcodec/common/mtk_vcode= c_fw_vcp.h diff --git a/drivers/media/platform/mediatek/vcodec/Kconfig b/drivers/media= /platform/mediatek/vcodec/Kconfig index bc8292232..d23dad5c7 100644 --- a/drivers/media/platform/mediatek/vcodec/Kconfig +++ b/drivers/media/platform/mediatek/vcodec/Kconfig @@ -1,4 +1,7 @@ # SPDX-License-Identifier: GPL-2.0-only +config VIDEO_MEDIATEK_VCODEC_VCP + bool + config VIDEO_MEDIATEK_VCODEC_SCP bool =20 @@ -21,6 +24,7 @@ config VIDEO_MEDIATEK_VCODEC select V4L2_MEM2MEM_DEV select VIDEO_MEDIATEK_VCODEC_VPU if VIDEO_MEDIATEK_VPU select VIDEO_MEDIATEK_VCODEC_SCP if MTK_SCP + select VIDEO_MEDIATEK_VCODEC_VCP if MTK_VCP_RPROC select V4L2_H264 select V4L2_VP9 select MEDIA_CONTROLLER diff --git a/drivers/media/platform/mediatek/vcodec/common/Makefile b/drive= rs/media/platform/mediatek/vcodec/common/Makefile index d0479914d..2f68692e8 100644 --- a/drivers/media/platform/mediatek/vcodec/common/Makefile +++ b/drivers/media/platform/mediatek/vcodec/common/Makefile @@ -14,6 +14,10 @@ ifneq ($(CONFIG_VIDEO_MEDIATEK_VCODEC_SCP),) mtk-vcodec-common-y +=3D mtk_vcodec_fw_scp.o endif =20 +ifneq ($(CONFIG_VIDEO_MEDIATEK_VCODEC_VCP),) +mtk-vcodec-common-y +=3D mtk_vcodec_fw_vcp.o +endif + ifneq ($(CONFIG_DEBUG_FS),) obj-$(CONFIG_VIDEO_MEDIATEK_VCODEC) +=3D mtk-vcodec-dbgfs.o =20 diff --git a/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw.c = b/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw.c index 08949b08f..552d0d8a8 100644 --- a/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw.c +++ b/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw.c @@ -4,25 +4,18 @@ #include "../encoder/mtk_vcodec_enc_drv.h" #include "mtk_vcodec_fw_priv.h" =20 -struct mtk_vcodec_fw *mtk_vcodec_fw_select(void *priv, enum mtk_vcodec_fw_= type type, - enum mtk_vcodec_fw_use fw_use) +struct mtk_vcodec_fw *mtk_vcodec_fw_select(void *priv, enum mtk_vcodec_fw_= use fw_use, + mtk_vcodec_fw_init_func fw_init) { - struct platform_device *plat_dev; - - if (fw_use =3D=3D ENCODER) - plat_dev =3D ((struct mtk_vcodec_enc_dev *)priv)->plat_dev; - else - plat_dev =3D ((struct mtk_vcodec_dec_dev *)priv)->plat_dev; + if (!fw_init) + return ERR_PTR(-EINVAL); =20 - switch (type) { - case VPU: - return mtk_vcodec_fw_vpu_init(priv, fw_use); - case SCP: - return mtk_vcodec_fw_scp_init(priv, fw_use); - default: - dev_err(&plat_dev->dev, "Invalid vcodec fw type"); + if (fw_use !=3D ENCODER && fw_use !=3D DECODER) { + pr_err("Invalid firmware use %d\n", fw_use); return ERR_PTR(-EINVAL); } + + return fw_init(priv, fw_use); } EXPORT_SYMBOL_GPL(mtk_vcodec_fw_select); =20 diff --git a/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw.h = b/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw.h index c1642fb09..50d93d47b 100644 --- a/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw.h +++ b/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw.h @@ -24,11 +24,13 @@ enum mtk_vcodec_fw_use { =20 struct mtk_vcodec_fw; =20 +typedef struct mtk_vcodec_fw *(*mtk_vcodec_fw_init_func)(void *priv, + enum mtk_vcodec_fw_use fw_use); typedef void (*mtk_vcodec_ipi_handler) (void *data, unsigned int len, void *priv); =20 -struct mtk_vcodec_fw *mtk_vcodec_fw_select(void *priv, enum mtk_vcodec_fw_= type type, - enum mtk_vcodec_fw_use fw_use); +struct mtk_vcodec_fw *mtk_vcodec_fw_select(void *priv, enum mtk_vcodec_fw_= use fw_use, + mtk_vcodec_fw_init_func fw_init); void mtk_vcodec_fw_release(struct mtk_vcodec_fw *fw); =20 int mtk_vcodec_fw_load_firmware(struct mtk_vcodec_fw *fw); diff --git a/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw_pr= iv.h b/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw_priv.h index 99603accd..0a2a9b010 100644 --- a/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw_priv.h +++ b/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw_priv.h @@ -4,6 +4,7 @@ #define _MTK_VCODEC_FW_PRIV_H_ =20 #include "mtk_vcodec_fw.h" +#include "mtk_vcodec_fw_vcp.h" =20 struct mtk_vcodec_dec_dev; struct mtk_vcodec_enc_dev; @@ -13,6 +14,7 @@ struct mtk_vcodec_fw { const struct mtk_vcodec_fw_ops *ops; struct platform_device *pdev; struct mtk_scp *scp; + struct mtk_vcp *vcp; enum mtk_vcodec_fw_use fw_use; }; =20 @@ -49,4 +51,14 @@ mtk_vcodec_fw_scp_init(void *priv, enum mtk_vcodec_fw_us= e fw_use) } #endif /* CONFIG_VIDEO_MEDIATEK_VCODEC_SCP */ =20 +#if IS_ENABLED(CONFIG_VIDEO_MEDIATEK_VCODEC_VCP) +struct mtk_vcodec_fw *mtk_vcodec_fw_vcp_init(void *priv, enum mtk_vcodec_f= w_use fw_use); +#else +static inline struct mtk_vcodec_fw * +mtk_vcodec_fw_vcp_init(void *priv, enum mtk_vcodec_fw_use fw_use) +{ + return ERR_PTR(-ENODEV); +} +#endif /* CONFIG_VIDEO_MEDIATEK_VCODEC_VCP */ + #endif /* _MTK_VCODEC_FW_PRIV_H_ */ diff --git a/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw_sc= p.c b/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw_scp.c index 1b0bc4735..1aad5c3ef 100644 --- a/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw_scp.c +++ b/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw_scp.c @@ -90,3 +90,4 @@ struct mtk_vcodec_fw *mtk_vcodec_fw_scp_init(void *priv, = enum mtk_vcodec_fw_use =20 return fw; } +EXPORT_SYMBOL_GPL(mtk_vcodec_fw_scp_init); diff --git a/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw_vc= p.c b/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw_vcp.c new file mode 100644 index 000000000..150d842c7 --- /dev/null +++ b/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw_vcp.c @@ -0,0 +1,571 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2025 MediaTek Inc. + * Author: Kyrie Wu + */ + +#include +#include +#include +#include +#include +#include + +#include "../decoder/mtk_vcodec_dec_drv.h" +#include "../decoder/vdec_ipi_msg.h" +#include "mtk_vcodec_fw_priv.h" + +#define IPI_SEND_TIMEOUT_MS 100U +#define IPI_TIMEOUT_MS 100U + +#define VCP_IPI_HEADER_SIZE (sizeof(u32) * 2) +#define VCP_IPI_ALIGN (4) + +static bool mtk_vcodec_vcp_ipi_id_valid(unsigned int ipi_id) +{ + return ipi_id < VCP_IPI_MAX; +} + +static void mtk_vcodec_vcp_ipi_lock(struct mtk_vcp *vcp, u32 ipi_id) +{ + mutex_lock(&vcp->ipi_desc[ipi_id].lock); +} + +static void mtk_vcodec_vcp_ipi_unlock(struct mtk_vcp *vcp, u32 ipi_id) +{ + lockdep_assert_held(&vcp->ipi_desc[ipi_id].lock); + mutex_unlock(&vcp->ipi_desc[ipi_id].lock); +} + +static void mtk_vcodec_vcp_msq_queue_lock(struct mtk_vcodec_fw *fw, unsign= ed long *flags) +{ + spin_lock_irqsave(&fw->vcp->msg_queue.lock, *flags); +} + +static void mtk_vcodec_vcp_msq_queue_unlock(struct mtk_vcodec_fw *fw, unsi= gned long *flags) +{ + spin_unlock_irqrestore(&fw->vcp->msg_queue.lock, *flags); +} + +static int mtk_vcodec_vcp_notifier(struct notifier_block *nb, unsigned lon= g event, void *ptr) +{ + struct mtk_vcp *vcp =3D container_of(nb, struct mtk_vcp, vcp_notify); + + switch (event) { + case VCP_EVENT_SUSPEND: + case VCP_EVENT_STOP: + dev_dbg(&vcp->pdev->dev, "vcp notifier suspend"); + break; + case VCP_EVENT_READY: + case VCP_EVENT_RESUME: + dev_dbg(&vcp->pdev->dev, "vcp notifier ready"); + break; + } + + return NOTIFY_DONE; +} + +static void mtk_vcodec_vcp_free_msg_node(struct mtk_vcodec_fw *fw, + struct mtk_vcp_msg_node *msg_node) +{ + unsigned long flags; + + mtk_vcodec_vcp_msq_queue_lock(fw, &flags); + list_add(&msg_node->list, &fw->vcp->msg_queue.node_list); + mtk_vcodec_vcp_msq_queue_unlock(fw, &flags); +} + +static int mtk_vcodec_vcp_ipi_register(struct mtk_vcp *vcp, u32 ipi_id, vc= p_ipi_handler_t handler, + void *priv) +{ + if (!vcp) + return -EPROBE_DEFER; + + if (WARN_ON(!mtk_vcodec_vcp_ipi_id_valid(ipi_id)) || WARN_ON(!handler)) + return -EINVAL; + + mtk_vcodec_vcp_ipi_lock(vcp, ipi_id); + vcp->ipi_desc[ipi_id].handler =3D handler; + vcp->ipi_desc[ipi_id].priv =3D priv; + mtk_vcodec_vcp_ipi_unlock(vcp, ipi_id); + + return 0; +} + +static int mtk_vcodec_vcp_msg_process_thread(void *arg) +{ + struct mtk_vcodec_fw *fw =3D arg; + struct vdec_vpu_ipi_ack *msg =3D NULL; + struct mtk_vcp_share_obj *obj; + struct mtk_vcp_msg_node *msg_node; + vcp_ipi_handler_t handler; + unsigned long flags; + int ret =3D 0; + + do { + ret =3D wait_event_interruptible(fw->vcp->msg_queue.wq, + atomic_read(&fw->vcp->msg_queue.cnt) > 0 || + kthread_should_stop()); + if (ret < 0) { + dev_err(&fw->pdev->dev, "wait msg queue ack timeout %d %d\n", + ret, atomic_read(&fw->vcp->msg_queue.cnt)); + continue; + } + if (kthread_should_stop()) + break; + + mtk_vcodec_vcp_msq_queue_lock(fw, &flags); + msg_node =3D list_entry(fw->vcp->msg_queue.msg_list.next, + struct mtk_vcp_msg_node, list); + list_del(&msg_node->list); + atomic_dec(&fw->vcp->msg_queue.cnt); + mtk_vcodec_vcp_msq_queue_unlock(fw, &flags); + + obj =3D &msg_node->ipi_data; + msg =3D (struct vdec_vpu_ipi_ack *)obj->share_buf; + + if (!msg->ap_inst_addr) { + dev_err(&fw->pdev->dev, "invalid message address\n"); + mtk_vcodec_vcp_free_msg_node(fw, msg_node); + continue; + } + + dev_dbg(&fw->pdev->dev, "msg ack id %d len %d msg_id 0x%x\n", obj->id, o= bj->len, + msg->msg_id); + + if (!mtk_vcodec_vcp_ipi_id_valid(obj->id)) { + dev_err(&fw->pdev->dev, "invalid ack ipi id %u\n", obj->id); + mtk_vcodec_vcp_free_msg_node(fw, msg_node); + continue; + } + + mtk_vcodec_vcp_ipi_lock(fw->vcp, obj->id); + handler =3D fw->vcp->ipi_desc[obj->id].handler; + if (!handler) { + dev_err(&fw->pdev->dev, "invalid ack ipi handler id =3D %d\n", obj->id); + mtk_vcodec_vcp_ipi_unlock(fw->vcp, obj->id); + mtk_vcodec_vcp_free_msg_node(fw, msg_node); + continue; + } + + handler(msg, obj->len, fw->vcp->ipi_desc[obj->id].priv); + mtk_vcodec_vcp_ipi_unlock(fw->vcp, obj->id); + + fw->vcp->msg_signaled[obj->id] =3D true; + wake_up(&fw->vcp->msg_wq[obj->id]); + + mtk_vcodec_vcp_free_msg_node(fw, msg_node); + } while (!kthread_should_stop()); + + return ret; +} + +static int mtk_vcodec_vcp_msg_ack_isr(unsigned int id, void *prdata, void = *data, unsigned int len) +{ + struct mtk_vcodec_fw *fw =3D prdata; + struct mtk_vcp_msg_queue *msg_queue =3D &fw->vcp->msg_queue; + struct mtk_vcp_msg_node *msg_node; + struct vdec_vpu_ipi_ack *msg =3D NULL; + struct mtk_vcp_share_obj *obj =3D data; + unsigned long flags; + + msg =3D (struct vdec_vpu_ipi_ack *)obj->share_buf; + + if (!mtk_vcodec_vcp_ipi_id_valid(obj->id)) { + dev_err(&fw->pdev->dev, "invalid ack ipi id %u\n", obj->id); + return -EINVAL; + } + + mtk_vcodec_vcp_msq_queue_lock(fw, &flags); + if (!list_empty(&msg_queue->node_list)) { + msg_node =3D list_entry(msg_queue->node_list.next, struct mtk_vcp_msg_no= de, list); + + memcpy(&msg_node->ipi_data, obj, sizeof(*obj)); + list_move_tail(&msg_node->list, &msg_queue->msg_list); + atomic_inc(&msg_queue->cnt); + mtk_vcodec_vcp_msq_queue_unlock(fw, &flags); + + dev_dbg(&fw->pdev->dev, "push ipi_id %x msg_id %x, msg cnt %d\n", + obj->id, msg->msg_id, atomic_read(&msg_queue->cnt)); + + wake_up(&msg_queue->wq); + } else { + mtk_vcodec_vcp_msq_queue_unlock(fw, &flags); + dev_err(&fw->pdev->dev, "no free nodes in msg queue\n"); + } + + return 0; +} + +static int mtk_vcodec_vcp_msg_ipi_send(struct mtk_vcodec_fw *fw, int id, v= oid *buf, + unsigned int len, unsigned int wait) +{ + struct mtk_vcp *vcp =3D fw->vcp; + struct mtk_vcp_device *vcp_device =3D vcp->vcp_device; + bool *msg_signaled; + wait_queue_head_t *msg_wq; + int ret, ipi_size, feature_id, mailbox_id, retry_cnt =3D 0; + unsigned long timeout_jiffies =3D 0; + struct mtk_vcp_share_obj obj =3D {0}; + unsigned int *data; + + if (id < 0 || !mtk_vcodec_vcp_ipi_id_valid(id)) { + dev_err(&fw->pdev->dev, "invalid ipi id %d\n", id); + return -EINVAL; + } + + msg_signaled =3D &vcp->msg_signaled[id]; + msg_wq =3D &vcp->msg_wq[id]; + + if (!vcp_device) { + dev_dbg(&fw->pdev->dev, "vcp device is null\n"); + return -EINVAL; + } + + mutex_lock(&vcp->ipi_mutex); + feature_id =3D VDEC_FEATURE_ID; + mailbox_id =3D IPI_OUT_VDEC_1; + + timeout_jiffies =3D jiffies + msecs_to_jiffies(VCP_SYNC_TIMEOUT_MS); + while (!vcp_device->ops->vcp_is_ready(vcp_device, feature_id)) { + if (time_after(jiffies, timeout_jiffies)) { + vcp->ipi_id_ack[id] =3D -EINVAL; + ret =3D -EINVAL; + goto error; + } + usleep_range(1000, 2000); + } + + if (len > VCP_SHARE_BUF_SIZE) { + vcp->ipi_id_ack[id] =3D -EINVAL; + ret =3D -EINVAL; + goto error; + } + + obj.id =3D id; + obj.len =3D len; + memcpy(obj.share_buf, buf, len); + + ipi_size =3D round_up(VCP_IPI_HEADER_SIZE + len, VCP_IPI_ALIGN); + data =3D (unsigned int *)obj.share_buf; + dev_dbg(&fw->pdev->dev, "vcp send message: id %d len %d data 0x%x\n", + obj.id, obj.len, data[0]); + + *msg_signaled =3D false; + vcp->ipi_id_ack[id] =3D VCODEC_IPI_MSG_STATUS_OK; + + ret =3D mtk_vcp_ipc_send(vcp_get_ipidev(vcp_device), mailbox_id, &obj, ip= i_size); + if (ret !=3D IPI_ACTION_DONE) { + vcp->ipi_id_ack[id] =3D -EIO; + ret =3D -EIO; + goto error; + } + +wait_ack: + /* wait for VCP's ACK */ + ret =3D wait_event_interruptible_timeout(*msg_wq, *msg_signaled, + msecs_to_jiffies(IPI_TIMEOUT_MS)); + if (!ret) { + vcp->ipi_id_ack[id] =3D VCODEC_IPI_MSG_STATUS_FAIL; + dev_err(&fw->pdev->dev, "wait ipi ack timeout! %d %d\n", ret, vcp->ipi_i= d_ack[id]); + } else if (ret =3D=3D -ERESTARTSYS) { + if (retry_cnt++ < 5) + goto wait_ack; + + dev_err(&fw->pdev->dev, "wait ipi ack err (%d)\n", vcp->ipi_id_ack[id]); + vcp->ipi_id_ack[id] =3D VCODEC_IPI_MSG_STATUS_FAIL; + } else if (ret < 0) { + dev_err(&fw->pdev->dev, "wait ipi ack fail ret %d %d\n", ret, vcp->ipi_i= d_ack[id]); + vcp->ipi_id_ack[id] =3D VCODEC_IPI_MSG_STATUS_FAIL; + } + + dev_dbg(&fw->pdev->dev, "receive message: id %d len %d data 0x%x\n", + obj.id, obj.len, data[0]); + + mutex_unlock(&vcp->ipi_mutex); + + return vcp->ipi_id_ack[id]; + +error: + mutex_unlock(&vcp->ipi_mutex); + dev_err(&fw->pdev->dev, "send msg error type:%d msg:%d > %d ret:%d\n", fw= ->type, len, + VCP_SHARE_BUF_SIZE, ret); + + return ret; +} + +static bool mtk_vcodec_vcp_driver_loaded(struct mtk_vcodec_fw *fw) +{ + struct device *dev =3D &fw->pdev->dev; + struct device_driver *drv; + + drv =3D driver_find("mtk-vcp", &platform_bus_type); + if (!drv) { + dev_dbg(dev, "find mtk-vcp driver failed, need to reload."); + return false; + } + + return true; +} + +static int mtk_vcodec_vcp_get_vcp_device(struct mtk_vcodec_fw *fw) +{ + struct device *dev =3D &fw->pdev->dev; + int retry =3D 0, retry_cnt =3D 10000; + phandle vcp_phandle; + + while (!try_then_request_module(mtk_vcodec_vcp_driver_loaded(fw), "mtk-vc= p")) { + if (++retry > retry_cnt) { + dev_err(dev, "failed to load mtk-vcp module"); + return -EPROBE_DEFER; + } + usleep_range(1000, 2000); + } + + if (of_property_read_u32(dev->of_node, "mediatek,vcp", &vcp_phandle)) { + dev_err(dev, "can't get vcp handle.\n"); + return -ENODEV; + } + + fw->vcp->vcp_device =3D mtk_vcp_get_by_phandle(vcp_phandle); + if (!fw->vcp->vcp_device) { + dev_err(dev, "get vcp device failed\n"); + return -ENODEV; + } + + return 0; +} + +static void mtk_vcodec_vcp_put_device(struct mtk_vcodec_fw *fw) +{ + if (!fw->vcp->vcp_device) + return; + + rproc_put(fw->vcp->vcp_device->rproc); + fw->vcp->vcp_device =3D NULL; +} + +static int mtk_vcodec_vcp_load_firmware(struct mtk_vcodec_fw *fw) +{ + struct mtk_vcp_device *vcp_device; + int ret, feature_id, mem_id, mailbox_id, ipi_id; + int i; + + if (fw->vcp->is_init_done) { + dev_dbg(&fw->pdev->dev, "vcp has already been initialized done.\n"); + return 0; + } + + if (mtk_vcodec_vcp_get_vcp_device(fw) < 0) { + dev_err(&fw->pdev->dev, "vcp device is null.\n"); + return -EINVAL; + } + + vcp_device =3D fw->vcp->vcp_device; + + feature_id =3D VDEC_FEATURE_ID; + mem_id =3D VDEC_MEM_ID; + mailbox_id =3D IPI_IN_VDEC_1; + ipi_id =3D VCP_IPI_LAT_DECODER; + + ret =3D mtk_vcp_mbox_ipc_register(vcp_get_ipidev(vcp_device), mailbox_id, + mtk_vcodec_vcp_msg_ack_isr, fw, &fw->vcp->share_data); + if (ret) { + dev_dbg(&fw->pdev->dev, "ipi register fail %d %d %d %d\n", ret, feature_= id, + mem_id, mailbox_id); + ret =3D -EINVAL; + goto err_put_device; + } + fw->vcp->feature_id =3D feature_id; + fw->vcp->mailbox_id =3D mailbox_id; + fw->vcp->is_ipi_registered =3D true; + + fw->vcp->vcp_notify.notifier_call =3D mtk_vcodec_vcp_notifier; + fw->vcp->vcp_notify.priority =3D 1; + vcp_device->ops->register_notify(vcp_device, feature_id, &fw->vcp->vcp_no= tify); + fw->vcp->is_notify_registered =3D true; + + if (!fw->vcp->is_register_done) { + ret =3D vcp_device->ops->register_feature(vcp_device, feature_id); + if (ret < 0) { + dev_err(&fw->pdev->dev, "%d register to vcp fail(%d)\n", feature_id, re= t); + ret =3D -EINVAL; + goto err_unregister_notify; + } + + fw->vcp->is_register_done =3D true; + } + + fw->vcp->is_init_done =3D true; + + for (i =3D 0; i < VCP_IPI_MAX; i++) + mutex_init(&fw->vcp->ipi_desc[i].lock); + mutex_init(&fw->vcp->ipi_mutex); + + init_waitqueue_head(&fw->vcp->msg_wq[VCP_IPI_LAT_DECODER]); + init_waitqueue_head(&fw->vcp->msg_wq[VCP_IPI_CORE_DECODER]); + fw->vcp->msg_thread =3D + kthread_run(mtk_vcodec_vcp_msg_process_thread, fw, "vcp_vdec_msq_thread"= ); + if (IS_ERR(fw->vcp->msg_thread)) { + ret =3D PTR_ERR(fw->vcp->msg_thread); + fw->vcp->msg_thread =3D NULL; + goto err_deregister_feature; + } + + fw->vcp->vsi_addr =3D vcp_device->ops->get_mem_virt(vcp_device, mem_id); + fw->vcp->vsi_core_addr =3D fw->vcp->vsi_addr + VCODEC_VSI_LEN; + fw->vcp->vsi_size =3D vcp_device->ops->get_mem_size(vcp_device, mem_id); + fw->vcp->iova_addr =3D vcp_device->ops->get_mem_iova(vcp_device, mem_id); + + dev_dbg(&fw->pdev->dev, "vdec vcp init done =3D> va: %p size:0x%x iova:%p= .\n", + fw->vcp->vsi_addr, fw->vcp->vsi_size, &fw->vcp->iova_addr); + + return 0; + +err_deregister_feature: + if (fw->vcp->is_register_done) { + vcp_device->ops->deregister_feature(vcp_device, feature_id); + fw->vcp->is_register_done =3D false; + } +err_unregister_notify: + if (fw->vcp->is_notify_registered) { + vcp_device->ops->unregister_notify(vcp_device, feature_id, + &fw->vcp->vcp_notify); + fw->vcp->is_notify_registered =3D false; + } + if (fw->vcp->is_ipi_registered) { + mtk_vcp_mbox_ipc_unregister(vcp_get_ipidev(vcp_device), mailbox_id); + fw->vcp->is_ipi_registered =3D false; + } + fw->vcp->is_init_done =3D false; + +err_put_device: + mtk_vcodec_vcp_put_device(fw); + return ret; +} + +static unsigned int mtk_vcodec_vcp_get_vdec_capa(struct mtk_vcodec_fw *fw) +{ + return MTK_VDEC_FORMAT_MM21 | MTK_VDEC_FORMAT_H264_SLICE | MTK_VDEC_FORMA= T_VP9_FRAME | + MTK_VDEC_FORMAT_AV1_FRAME | MTK_VDEC_FORMAT_HEVC_FRAME | + MTK_VDEC_IS_SUPPORT_10BIT | MTK_VDEC_IS_SUPPORT_EXT; +} + +static void *mtk_vcodec_vcp_dm_addr(struct mtk_vcodec_fw *fw, u32 dtcm_dme= m_addr) +{ + return NULL; +} + +static int mtk_vcodec_vcp_set_ipi_register(struct mtk_vcodec_fw *fw, int i= d, + mtk_vcodec_ipi_handler handler, + const char *name, void *priv) +{ + return mtk_vcodec_vcp_ipi_register(fw->vcp, id, handler, priv); +} + +static int mtk_vcodec_vcp_ipi_send(struct mtk_vcodec_fw *fw, int id, void = *buf, + unsigned int len, unsigned int wait) +{ + return mtk_vcodec_vcp_msg_ipi_send(fw, id, buf, len, wait); +} + +static void mtk_vcodec_vcp_release(struct mtk_vcodec_fw *fw) +{ + struct mtk_vcp_device *vcp_device =3D fw->vcp->vcp_device; + struct device *dev =3D &fw->pdev->dev; + int ret; + + if (!fw->vcp->vcp_device) { + dev_err(dev, "vcp device is null\n"); + return; + } + + if (fw->vcp->is_ipi_registered) { + mtk_vcp_mbox_ipc_unregister(vcp_get_ipidev(vcp_device), fw->vcp->mailbox= _id); + fw->vcp->is_ipi_registered =3D false; + } + + if (fw->vcp->msg_thread) { + kthread_stop(fw->vcp->msg_thread); + fw->vcp->msg_thread =3D NULL; + } + + if (fw->vcp->is_notify_registered) { + vcp_device->ops->unregister_notify(vcp_device, fw->vcp->feature_id, + &fw->vcp->vcp_notify); + fw->vcp->is_notify_registered =3D false; + } + + if (!fw->vcp->is_register_done) { + fw->vcp->is_init_done =3D false; + goto put_device; + } + + ret =3D vcp_device->ops->deregister_feature(vcp_device, fw->vcp->feature_= id); + if (ret < 0) { + dev_err(dev, "deregister feature_id(%d) fail(%d)\n", fw->vcp->feature_id= , ret); + return; + } + + fw->vcp->is_register_done =3D false; + fw->vcp->is_init_done =3D false; + +put_device: + mtk_vcodec_vcp_put_device(fw); +} + +static const struct mtk_vcodec_fw_ops mtk_vcodec_vcp_msg =3D { + .load_firmware =3D mtk_vcodec_vcp_load_firmware, + .get_vdec_capa =3D mtk_vcodec_vcp_get_vdec_capa, + .map_dm_addr =3D mtk_vcodec_vcp_dm_addr, + .ipi_register =3D mtk_vcodec_vcp_set_ipi_register, + .ipi_send =3D mtk_vcodec_vcp_ipi_send, + .release =3D mtk_vcodec_vcp_release, +}; + +struct mtk_vcodec_fw *mtk_vcodec_fw_vcp_init(void *priv, enum mtk_vcodec_f= w_use fw_use) +{ + struct mtk_vcp_msg_node *msg_node; + struct platform_device *plat_dev; + struct mtk_vcodec_fw *fw; + int i; + + if (fw_use =3D=3D DECODER) { + struct mtk_vcodec_dec_dev *dec_dev =3D priv; + + plat_dev =3D dec_dev->plat_dev; + } else { + pr_err("Invalid fw_use %d (use a reasonable fw id here)\n", fw_use); + return ERR_PTR(-EINVAL); + } + + fw =3D devm_kzalloc(&plat_dev->dev, sizeof(*fw), GFP_KERNEL); + if (!fw) + return ERR_PTR(-ENOMEM); + + fw->type =3D VCP; + fw->pdev =3D plat_dev; + fw->fw_use =3D fw_use; + fw->ops =3D &mtk_vcodec_vcp_msg; + fw->vcp =3D devm_kzalloc(&plat_dev->dev, sizeof(*fw->vcp), GFP_KERNEL); + if (!fw->vcp) + return ERR_PTR(-ENOMEM); + + INIT_LIST_HEAD(&fw->vcp->msg_queue.msg_list); + INIT_LIST_HEAD(&fw->vcp->msg_queue.node_list); + spin_lock_init(&fw->vcp->msg_queue.lock); + init_waitqueue_head(&fw->vcp->msg_queue.wq); + atomic_set(&fw->vcp->msg_queue.cnt, 0); + fw->vcp->pdev =3D plat_dev; + + for (i =3D 0; i < VCP_MAX_MQ_NODE_CNT; i++) { + msg_node =3D devm_kzalloc(&plat_dev->dev, sizeof(*msg_node), GFP_KERNEL); + if (!msg_node) + return ERR_PTR(-ENOMEM); + + list_add(&msg_node->list, &fw->vcp->msg_queue.node_list); + } + + return fw; +} +EXPORT_SYMBOL_GPL(mtk_vcodec_fw_vcp_init); diff --git a/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw_vc= p.h b/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw_vcp.h new file mode 100644 index 000000000..83742096e --- /dev/null +++ b/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw_vcp.h @@ -0,0 +1,152 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2025 MediaTek Inc. + * Author: Kyrie Wu + */ + +#ifndef _MTK_VCODEC_FW_VCP_H_ +#define _MTK_VCODEC_FW_VCP_H_ + +typedef void (*vcp_ipi_handler_t) (void *data, unsigned int len, void *pri= v); + +#define VCP_MAX_MQ_NODE_CNT 6 +#define VCP_SHARE_BUF_SIZE 64 + +#define VCODEC_VSI_LEN (0x2000) + +/* enum mtk_vcp_ipi_index - index used to separate different hardware */ +enum mtk_vcp_ipi_index { + VCP_IPI_LAT_DECODER, + VCP_IPI_CORE_DECODER, + VCP_IPI_MAX, +}; + +/** + * struct mtk_vcp_msg_queue - process the vcp message between kernel with = vcp + * + * @msg_list: store share buffer list which from vcp to kernel + * @wq: waitqueue that can be used to wait for vcp message + * @lock: protect msg list + * @cnt: the count of share obj in msg list + * @node_list: share obj list + */ +struct mtk_vcp_msg_queue { + struct list_head msg_list; + wait_queue_head_t wq; + /* protect msg_list and node_list */ + spinlock_t lock; + atomic_t cnt; + struct list_head node_list; +}; + +/** + * struct mtk_vcp_ipi_desc - store the ack handler + * + * @lock: protect ack handler data + * @handler: calling this handler when kernel receive ack + * @priv: private data when calling handler to process + */ +struct mtk_vcp_ipi_desc { + /* protect handler and priv */ + struct mutex lock; + vcp_ipi_handler_t handler; + void *priv; +}; + +/** + * struct mtk_vcp_share_obj - share buffer used to send data to vcp + * + * @id: message index + * @len: message size + * @share_buf: message data + */ +struct mtk_vcp_share_obj { + unsigned int id; + unsigned int len; + unsigned char share_buf[VCP_SHARE_BUF_SIZE]; +}; + +/* enum mtk_vcp_ipi_msg_status - the status when send message to vcp */ +enum mtk_vcp_ipi_msg_status { + VCODEC_IPI_MSG_STATUS_OK =3D 0, + VCODEC_IPI_MSG_STATUS_FAIL =3D -1, + VCODEC_IPI_MSG_STATUS_MAX_INST =3D -2, + VCODEC_IPI_MSG_STATUS_ILSEQ =3D -3, + VCODEC_IPI_MSG_STATUS_INVALID_ID =3D -4, + VCODEC_IPI_MSG_STATUS_DMA_FAIL =3D -5, +}; + +/** + * struct mtk_vcp_msg_node - share buffer used to send data to vcp + * + * @ipi_data: share obj data + * @list: list to store msg node + */ +struct mtk_vcp_msg_node { + struct mtk_vcp_share_obj ipi_data; + struct list_head list; +}; + +/** + * struct mtk_vcp - vcp firmware private data + * + * @is_init_done: vcp is ready to use + * + * @ipi_mutex: used to protect ipi data + * @msg_signaled: whether receive ack from vcp + * @msg_wq: wake message queue + * + * @ipi_desc: store ack handler + * @ipi_id_ack: the ack handler status + * + * @msg_queue: process vcp message + * @share_data: temp share obj data + * + * @vcp_notify: register notifier to vcp + * @msg_thread: process VCP message queue + * + * @vsi_addr: vsi virtual data address + * @vsi_core_addr: vsi core virtual data address + * @iova_addr: vsi iova address + * @vsi_size: vsi size + * + * @pdev: platform device + * @vcp_device: vcp private data + * @feature_id: registered VCP feature id + * @mailbox_id: registered VCP mailbox id + * @is_register_done: feature registration state + * @is_ipi_registered: mailbox IPC registration state + * @is_notify_registered: notifier registration state + */ +struct mtk_vcp { + bool is_init_done; + + /* serialize ipi message send/receive */ + struct mutex ipi_mutex; + bool msg_signaled[VCP_IPI_MAX]; + wait_queue_head_t msg_wq[VCP_IPI_MAX]; + + struct mtk_vcp_ipi_desc ipi_desc[VCP_IPI_MAX]; + int ipi_id_ack[VCP_IPI_MAX]; + + struct mtk_vcp_msg_queue msg_queue; + struct mtk_vcp_share_obj share_data; + + struct notifier_block vcp_notify; + struct task_struct *msg_thread; + + void *vsi_addr; + void *vsi_core_addr; + dma_addr_t iova_addr; + int vsi_size; + + struct platform_device *pdev; + struct mtk_vcp_device *vcp_device; + int feature_id; + int mailbox_id; + bool is_register_done; + bool is_ipi_registered; + bool is_notify_registered; +}; + +#endif diff --git a/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw_vp= u.c b/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw_vpu.c index 3632037f7..41643db9f 100644 --- a/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw_vpu.c +++ b/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw_vpu.c @@ -130,3 +130,4 @@ struct mtk_vcodec_fw *mtk_vcodec_fw_vpu_init(void *priv= , enum mtk_vcodec_fw_use =20 return fw; } +EXPORT_SYMBOL_GPL(mtk_vcodec_fw_vpu_init); diff --git a/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_= drv.c b/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_drv.c index d220b645e..ab5f6c01f 100644 --- a/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_drv.c +++ b/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_drv.c @@ -376,19 +376,22 @@ static int mtk_vcodec_probe(struct platform_device *p= dev) if (!of_property_read_u32(pdev->dev.of_node, "mediatek,vpu", &rproc_phandle)) { fw_type =3D VPU; + dev->fw_init =3D mtk_vcodec_fw_vpu_init; } else if (!of_property_read_u32(pdev->dev.of_node, "mediatek,scp", &rproc_phandle)) { fw_type =3D SCP; + dev->fw_init =3D mtk_vcodec_fw_scp_init; } else if (!of_property_read_u32(pdev->dev.of_node, "mediatek,vcp", &rproc_phandle)) { fw_type =3D VCP; + dev->fw_init =3D mtk_vcodec_fw_vcp_init; } else { dev_dbg(&pdev->dev, "Could not get vdec IPI device"); return -ENODEV; } dma_set_max_seg_size(&pdev->dev, UINT_MAX); =20 - dev->fw_handler =3D mtk_vcodec_fw_select(dev, fw_type, DECODER); + dev->fw_handler =3D mtk_vcodec_fw_select(dev, DECODER, dev->fw_init); if (IS_ERR(dev->fw_handler)) return PTR_ERR(dev->fw_handler); =20 diff --git a/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_= drv.h b/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_drv.h index c9d27534c..15e437323 100644 --- a/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_drv.h +++ b/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_drv.h @@ -251,6 +251,7 @@ struct mtk_vcodec_dec_ctx { * @vdecsys_regmap: VDEC_SYS register space passed through syscon * * @fw_handler: used to communicate with the firmware. + * @fw_init: firmware-specific init callback selected at probe time * @id_counter: used to identify current opened instance * * @dec_mutex: decoder hardware lock @@ -292,6 +293,7 @@ struct mtk_vcodec_dec_dev { struct regmap *vdecsys_regmap; =20 struct mtk_vcodec_fw *fw_handler; + struct mtk_vcodec_fw *(*fw_init)(void *priv, enum mtk_vcodec_fw_use fw_us= e); u64 id_counter; =20 /* decoder hardware mutex lock */ diff --git a/drivers/media/platform/mediatek/vcodec/encoder/mtk_vcodec_enc_= drv.c b/drivers/media/platform/mediatek/vcodec/encoder/mtk_vcodec_enc_drv.c index 4e4541b2f..811bc62a1 100644 --- a/drivers/media/platform/mediatek/vcodec/encoder/mtk_vcodec_enc_drv.c +++ b/drivers/media/platform/mediatek/vcodec/encoder/mtk_vcodec_enc_drv.c @@ -259,16 +259,18 @@ static int mtk_vcodec_probe(struct platform_device *p= dev) if (!of_property_read_u32(pdev->dev.of_node, "mediatek,vpu", &rproc_phandle)) { fw_type =3D VPU; + dev->fw_init =3D mtk_vcodec_fw_vpu_init; } else if (!of_property_read_u32(pdev->dev.of_node, "mediatek,scp", &rproc_phandle)) { fw_type =3D SCP; + dev->fw_init =3D mtk_vcodec_fw_scp_init; } else { dev_err(&pdev->dev, "[MTK VCODEC] Could not get venc IPI device"); return -ENODEV; } dma_set_max_seg_size(&pdev->dev, UINT_MAX); =20 - dev->fw_handler =3D mtk_vcodec_fw_select(dev, fw_type, ENCODER); + dev->fw_handler =3D mtk_vcodec_fw_select(dev, ENCODER, dev->fw_init); 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Mon, 20 Jul 2026 09:21:05 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by MTKMBS14N1.mediatek.inc (172.21.101.75) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.29; Mon, 20 Jul 2026 09:21:05 +0800 Received: from gcnsap21.gcn.mediatek.inc (10.17.81.22) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.2562.29 via Frontend Transport; Mon, 20 Jul 2026 09:21:03 +0800 From: Kyrie Wu To: Tiffany Lin , Andrew-CT Chen , Yunfei Dong , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Kyrie Wu , Nicolas Dufresne , Ricardo Ribalda , Kees Cook , Hans Verkuil , Fei Shao , Haoxiang Li , Chen-Yu Tsai , Laurent Pinchart , Tomasz Figa , Sebastian Fricke , Philipp Zabel , Benjamin Gaignard , Qianfeng Rong , Irui Wang , Jacopo Mondi , Fan Wu , , , , , CC: Sakari Ailus Subject: [PATCH v6 03/14] media: mediatek: vcodec: add driver to support vcp encoder Date: Mon, 20 Jul 2026 09:20:45 +0800 Message-ID: <20260720012056.1026551-4-kyrie.wu@mediatek.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260720012056.1026551-1-kyrie.wu@mediatek.com> References: <20260720012056.1026551-1-kyrie.wu@mediatek.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-MTK: N Content-Type: text/plain; charset="utf-8" Encoder also need to call vcp interface to communicate with vcp, add driver to support encoder. Signed-off-by: Kyrie Wu --- .../vcodec/common/mtk_vcodec_fw_vcp.c | 52 ++++++++++++++++--- .../vcodec/common/mtk_vcodec_fw_vcp.h | 1 + .../mediatek/vcodec/encoder/mtk_vcodec_enc.c | 1 - .../mediatek/vcodec/encoder/mtk_vcodec_enc.h | 2 + 4 files changed, 47 insertions(+), 9 deletions(-) diff --git a/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw_vc= p.c b/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw_vcp.c index 150d842c7..ece4e3e87 100644 --- a/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw_vcp.c +++ b/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw_vcp.c @@ -13,6 +13,8 @@ =20 #include "../decoder/mtk_vcodec_dec_drv.h" #include "../decoder/vdec_ipi_msg.h" +#include "../encoder/mtk_vcodec_enc.h" +#include "../encoder/mtk_vcodec_enc_drv.h" #include "mtk_vcodec_fw_priv.h" =20 #define IPI_SEND_TIMEOUT_MS 100U @@ -223,8 +225,13 @@ static int mtk_vcodec_vcp_msg_ipi_send(struct mtk_vcod= ec_fw *fw, int id, void *b } =20 mutex_lock(&vcp->ipi_mutex); - feature_id =3D VDEC_FEATURE_ID; - mailbox_id =3D IPI_OUT_VDEC_1; + if (fw->fw_use =3D=3D ENCODER) { + feature_id =3D VENC_FEATURE_ID; + mailbox_id =3D IPI_OUT_VENC_0; + } else { + feature_id =3D VDEC_FEATURE_ID; + mailbox_id =3D IPI_OUT_VDEC_1; + } =20 timeout_jiffies =3D jiffies + msecs_to_jiffies(VCP_SYNC_TIMEOUT_MS); while (!vcp_device->ops->vcp_is_ready(vcp_device, feature_id)) { @@ -348,7 +355,7 @@ static void mtk_vcodec_vcp_put_device(struct mtk_vcodec= _fw *fw) static int mtk_vcodec_vcp_load_firmware(struct mtk_vcodec_fw *fw) { struct mtk_vcp_device *vcp_device; - int ret, feature_id, mem_id, mailbox_id, ipi_id; + int ret, feature_id, mem_id, mailbox_id; int i; =20 if (fw->vcp->is_init_done) { @@ -363,10 +370,15 @@ static int mtk_vcodec_vcp_load_firmware(struct mtk_vc= odec_fw *fw) =20 vcp_device =3D fw->vcp->vcp_device; =20 - feature_id =3D VDEC_FEATURE_ID; - mem_id =3D VDEC_MEM_ID; - mailbox_id =3D IPI_IN_VDEC_1; - ipi_id =3D VCP_IPI_LAT_DECODER; + if (fw->fw_use =3D=3D ENCODER) { + feature_id =3D VENC_FEATURE_ID; + mem_id =3D VENC_MEM_ID; + mailbox_id =3D IPI_IN_VENC_0; + } else { + feature_id =3D VDEC_FEATURE_ID; + mem_id =3D VDEC_MEM_ID; + mailbox_id =3D IPI_IN_VDEC_1; + } =20 ret =3D mtk_vcp_mbox_ipc_register(vcp_get_ipidev(vcp_device), mailbox_id, mtk_vcodec_vcp_msg_ack_isr, fw, &fw->vcp->share_data); @@ -402,6 +414,26 @@ static int mtk_vcodec_vcp_load_firmware(struct mtk_vco= dec_fw *fw) mutex_init(&fw->vcp->ipi_desc[i].lock); mutex_init(&fw->vcp->ipi_mutex); =20 + if (fw->fw_use =3D=3D ENCODER) { + init_waitqueue_head(&fw->vcp->msg_wq[VCP_IPI_ENCODER]); + fw->vcp->msg_thread =3D + kthread_run(mtk_vcodec_vcp_msg_process_thread, fw, "vcp_enc_msq_thread"= ); + if (IS_ERR(fw->vcp->msg_thread)) { + ret =3D PTR_ERR(fw->vcp->msg_thread); + fw->vcp->msg_thread =3D NULL; + goto err_deregister_feature; + } + + fw->vcp->vsi_addr =3D vcp_device->ops->get_mem_virt(vcp_device, mem_id); + fw->vcp->vsi_size =3D vcp_device->ops->get_mem_size(vcp_device, mem_id); + fw->vcp->iova_addr =3D vcp_device->ops->get_mem_iova(vcp_device, mem_id); + + dev_dbg(&fw->pdev->dev, "enc vcp init done =3D> va: %p size:0x%x iova:%p= ad.\n", + fw->vcp->vsi_addr, fw->vcp->vsi_size, &fw->vcp->iova_addr); + + return 0; + } + init_waitqueue_head(&fw->vcp->msg_wq[VCP_IPI_LAT_DECODER]); init_waitqueue_head(&fw->vcp->msg_wq[VCP_IPI_CORE_DECODER]); fw->vcp->msg_thread =3D @@ -530,7 +562,11 @@ struct mtk_vcodec_fw *mtk_vcodec_fw_vcp_init(void *pri= v, enum mtk_vcodec_fw_use struct mtk_vcodec_fw *fw; int i; =20 - if (fw_use =3D=3D DECODER) { + if (fw_use =3D=3D ENCODER) { + struct mtk_vcodec_enc_dev *enc_dev =3D priv; + + plat_dev =3D enc_dev->plat_dev; + } else if (fw_use =3D=3D DECODER) { struct mtk_vcodec_dec_dev *dec_dev =3D priv; =20 plat_dev =3D dec_dev->plat_dev; diff --git a/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw_vc= p.h b/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw_vcp.h index 83742096e..97ba642dc 100644 --- a/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw_vcp.h +++ b/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw_vcp.h @@ -16,6 +16,7 @@ typedef void (*vcp_ipi_handler_t) (void *data, unsigned i= nt len, void *priv); =20 /* enum mtk_vcp_ipi_index - index used to separate different hardware */ enum mtk_vcp_ipi_index { + VCP_IPI_ENCODER, VCP_IPI_LAT_DECODER, VCP_IPI_CORE_DECODER, VCP_IPI_MAX, diff --git a/drivers/media/platform/mediatek/vcodec/encoder/mtk_vcodec_enc.= c b/drivers/media/platform/mediatek/vcodec/encoder/mtk_vcodec_enc.c index 0d4e94463..48cb5dded 100644 --- a/drivers/media/platform/mediatek/vcodec/encoder/mtk_vcodec_enc.c +++ b/drivers/media/platform/mediatek/vcodec/encoder/mtk_vcodec_enc.c @@ -26,7 +26,6 @@ =20 #define MTK_DEFAULT_FRAMERATE_NUM 1001 #define MTK_DEFAULT_FRAMERATE_DENOM 30000 -#define MTK_VENC_4K_CAPABILITY_ENABLE BIT(0) =20 static void mtk_venc_worker(struct work_struct *work); =20 diff --git a/drivers/media/platform/mediatek/vcodec/encoder/mtk_vcodec_enc.= h b/drivers/media/platform/mediatek/vcodec/encoder/mtk_vcodec_enc.h index 908d8179b..84156c102 100644 --- a/drivers/media/platform/mediatek/vcodec/encoder/mtk_vcodec_enc.h +++ b/drivers/media/platform/mediatek/vcodec/encoder/mtk_vcodec_enc.h @@ -23,6 +23,8 @@ #define MTK_VENC_IRQ_STATUS_OFFSET 0x05C #define MTK_VENC_IRQ_ACK_OFFSET 0x060 =20 +#define MTK_VENC_4K_CAPABILITY_ENABLE BIT(0) + /** * struct mtk_video_enc_buf - Private data related to each VB2 buffer. * @m2m_buf: M2M buffer --=20 2.51.0.windows.2 From nobody Sat Jul 25 03:20:49 2026 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 65DAF212FAD; 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Mon, 20 Jul 2026 09:21:07 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.29; Mon, 20 Jul 2026 09:21:06 +0800 Received: from gcnsap21.gcn.mediatek.inc (10.17.81.22) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.2562.29 via Frontend Transport; Mon, 20 Jul 2026 09:21:05 +0800 From: Kyrie Wu To: Tiffany Lin , Andrew-CT Chen , Yunfei Dong , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Kyrie Wu , Nicolas Dufresne , Ricardo Ribalda , Kees Cook , Hans Verkuil , Fei Shao , Haoxiang Li , Chen-Yu Tsai , Laurent Pinchart , Tomasz Figa , Sebastian Fricke , Philipp Zabel , Benjamin Gaignard , Qianfeng Rong , Irui Wang , Jacopo Mondi , Fan Wu , , , , , CC: Sakari Ailus Subject: [PATCH v6 04/14] media: mediatek: vcodec: get different firmware ipi id Date: Mon, 20 Jul 2026 09:20:46 +0800 Message-ID: <20260720012056.1026551-5-kyrie.wu@mediatek.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260720012056.1026551-1-kyrie.wu@mediatek.com> References: <20260720012056.1026551-1-kyrie.wu@mediatek.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-MTK: N Content-Type: text/plain; charset="utf-8" Getting ipi(inter-processor interrupt) id according to firmware type and hardware index for different architecture. Signed-off-by: Kyrie Wu --- .../mediatek/vcodec/common/mtk_vcodec_fw.c | 14 ++++++++++++++ .../mediatek/vcodec/common/mtk_vcodec_fw.h | 1 + .../vcodec/decoder/vdec/vdec_av1_req_lat_if.c | 5 +++-- .../vcodec/decoder/vdec/vdec_h264_req_multi_if.c | 5 +++-- .../vcodec/decoder/vdec/vdec_hevc_req_multi_if.c | 5 +++-- .../mediatek/vcodec/decoder/vdec/vdec_vp8_req_if.c | 5 +++-- .../vcodec/decoder/vdec/vdec_vp9_req_lat_if.c | 5 +++-- 7 files changed, 30 insertions(+), 10 deletions(-) diff --git a/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw.c = b/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw.c index 552d0d8a8..8630e871d 100644 --- a/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw.c +++ b/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw.c @@ -3,6 +3,20 @@ #include "../decoder/mtk_vcodec_dec_drv.h" #include "../encoder/mtk_vcodec_enc_drv.h" #include "mtk_vcodec_fw_priv.h" +#include "mtk_vcodec_fw_vcp.h" + +int mtk_vcodec_fw_get_ipi(enum mtk_vcodec_fw_type type, int hw_id) +{ + switch (type) { + case SCP: + return hw_id =3D=3D MTK_VDEC_LAT0 ? SCP_IPI_VDEC_LAT : SCP_IPI_VDEC_CORE; + case VCP: + return hw_id =3D=3D MTK_VDEC_LAT0 ? VCP_IPI_LAT_DECODER : VCP_IPI_CORE_D= ECODER; + default: + return -EINVAL; + } +} +EXPORT_SYMBOL_GPL(mtk_vcodec_fw_get_ipi); =20 struct mtk_vcodec_fw *mtk_vcodec_fw_select(void *priv, enum mtk_vcodec_fw_= use fw_use, mtk_vcodec_fw_init_func fw_init) diff --git a/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw.h = b/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw.h index 50d93d47b..005ac9969 100644 --- a/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw.h +++ b/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw.h @@ -43,5 +43,6 @@ int mtk_vcodec_fw_ipi_register(struct mtk_vcodec_fw *fw, = int id, int mtk_vcodec_fw_ipi_send(struct mtk_vcodec_fw *fw, int id, void *buf, unsigned int len, unsigned int wait); int mtk_vcodec_fw_get_type(struct mtk_vcodec_fw *fw); +int mtk_vcodec_fw_get_ipi(enum mtk_vcodec_fw_type type, int hw_id); =20 #endif /* _MTK_VCODEC_FW_H_ */ diff --git a/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_av1_r= eq_lat_if.c b/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_av1_= req_lat_if.c index 2d622e85f..756fbb777 100644 --- a/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_av1_req_lat_= if.c +++ b/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_av1_req_lat_= if.c @@ -1877,6 +1877,7 @@ static int vdec_av1_slice_init(struct mtk_vcodec_dec_= ctx *ctx) { struct vdec_av1_slice_instance *instance; struct vdec_av1_slice_init_vsi *vsi; + enum mtk_vcodec_fw_type fw_type =3D ctx->dev->fw_handler->type; int ret; =20 instance =3D kzalloc_obj(*instance); @@ -1884,8 +1885,8 @@ static int vdec_av1_slice_init(struct mtk_vcodec_dec_= ctx *ctx) return -ENOMEM; =20 instance->ctx =3D ctx; - instance->vpu.id =3D SCP_IPI_VDEC_LAT; - instance->vpu.core_id =3D SCP_IPI_VDEC_CORE; + instance->vpu.id =3D mtk_vcodec_fw_get_ipi(fw_type, MTK_VDEC_LAT0); + instance->vpu.core_id =3D mtk_vcodec_fw_get_ipi(fw_type, MTK_VDEC_CORE); instance->vpu.ctx =3D ctx; instance->vpu.codec_type =3D ctx->current_codec; =20 diff --git a/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_h264_= req_multi_if.c b/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_h= 264_req_multi_if.c index 10359ce9b..69d607171 100644 --- a/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_h264_req_mul= ti_if.c +++ b/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_h264_req_mul= ti_if.c @@ -1204,6 +1204,7 @@ static int vdec_h264_slice_single_decode(void *h_vdec= , struct mtk_vcodec_mem *bs =20 static int vdec_h264_slice_init(struct mtk_vcodec_dec_ctx *ctx) { + enum mtk_vcodec_fw_type fw_type =3D ctx->dev->fw_handler->type; struct vdec_h264_slice_inst *inst; int err, vsi_size; unsigned char *temp; @@ -1214,8 +1215,8 @@ static int vdec_h264_slice_init(struct mtk_vcodec_dec= _ctx *ctx) =20 inst->ctx =3D ctx; =20 - inst->vpu.id =3D SCP_IPI_VDEC_LAT; - inst->vpu.core_id =3D SCP_IPI_VDEC_CORE; + inst->vpu.id =3D mtk_vcodec_fw_get_ipi(fw_type, MTK_VDEC_LAT0); + inst->vpu.core_id =3D mtk_vcodec_fw_get_ipi(fw_type, MTK_VDEC_CORE); inst->vpu.ctx =3D ctx; inst->vpu.codec_type =3D ctx->current_codec; inst->vpu.capture_type =3D ctx->capture_fourcc; diff --git a/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_hevc_= req_multi_if.c b/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_h= evc_req_multi_if.c index 02f39954a..dd638ef44 100644 --- a/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_hevc_req_mul= ti_if.c +++ b/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_hevc_req_mul= ti_if.c @@ -855,6 +855,7 @@ static int vdec_hevc_slice_setup_core_buffer(struct vde= c_hevc_slice_inst *inst, =20 static int vdec_hevc_slice_init(struct mtk_vcodec_dec_ctx *ctx) { + enum mtk_vcodec_fw_type fw_type =3D ctx->dev->fw_handler->type; struct vdec_hevc_slice_inst *inst; int err, vsi_size; =20 @@ -864,8 +865,8 @@ static int vdec_hevc_slice_init(struct mtk_vcodec_dec_c= tx *ctx) =20 inst->ctx =3D ctx; =20 - inst->vpu.id =3D SCP_IPI_VDEC_LAT; - inst->vpu.core_id =3D SCP_IPI_VDEC_CORE; + inst->vpu.id =3D mtk_vcodec_fw_get_ipi(fw_type, MTK_VDEC_LAT0); + inst->vpu.core_id =3D mtk_vcodec_fw_get_ipi(fw_type, MTK_VDEC_CORE); inst->vpu.ctx =3D ctx; inst->vpu.codec_type =3D ctx->current_codec; inst->vpu.capture_type =3D ctx->capture_fourcc; diff --git a/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_vp8_r= eq_if.c b/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_vp8_req_= if.c index 391e789a5..d65e276f6 100644 --- a/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_vp8_req_if.c +++ b/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_vp8_req_if.c @@ -272,6 +272,7 @@ static int vdec_vp8_slice_get_decode_parameters(struct = vdec_vp8_slice_inst *inst =20 static int vdec_vp8_slice_init(struct mtk_vcodec_dec_ctx *ctx) { + enum mtk_vcodec_fw_type fw_type =3D ctx->dev->fw_handler->type; struct vdec_vp8_slice_inst *inst; int err; =20 @@ -281,8 +282,8 @@ static int vdec_vp8_slice_init(struct mtk_vcodec_dec_ct= x *ctx) =20 inst->ctx =3D ctx; =20 - inst->vpu.id =3D SCP_IPI_VDEC_LAT; - inst->vpu.core_id =3D SCP_IPI_VDEC_CORE; + inst->vpu.id =3D mtk_vcodec_fw_get_ipi(fw_type, MTK_VDEC_LAT0); + inst->vpu.core_id =3D mtk_vcodec_fw_get_ipi(fw_type, MTK_VDEC_CORE); inst->vpu.ctx =3D ctx; inst->vpu.codec_type =3D ctx->current_codec; inst->vpu.capture_type =3D ctx->capture_fourcc; diff --git a/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_vp9_r= eq_lat_if.c b/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_vp9_= req_lat_if.c index adbacabdb..1f0479a8f 100644 --- a/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_vp9_req_lat_= if.c +++ b/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_vp9_req_lat_= if.c @@ -1844,6 +1844,7 @@ static int vdec_vp9_slice_update_core(struct vdec_vp9= _slice_instance *instance, =20 static int vdec_vp9_slice_init(struct mtk_vcodec_dec_ctx *ctx) { + enum mtk_vcodec_fw_type fw_type =3D ctx->dev->fw_handler->type; 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Mon, 20 Jul 2026 09:21:09 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by mtkmbs13n1.mediatek.inc (172.21.101.193) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.29; Mon, 20 Jul 2026 09:21:08 +0800 Received: from gcnsap21.gcn.mediatek.inc (10.17.81.22) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.2562.29 via Frontend Transport; Mon, 20 Jul 2026 09:21:06 +0800 From: Kyrie Wu To: Tiffany Lin , Andrew-CT Chen , Yunfei Dong , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Kyrie Wu , Nicolas Dufresne , Ricardo Ribalda , Kees Cook , Hans Verkuil , Fei Shao , Haoxiang Li , Chen-Yu Tsai , Laurent Pinchart , Tomasz Figa , Sebastian Fricke , Philipp Zabel , Benjamin Gaignard , Qianfeng Rong , Irui Wang , Jacopo Mondi , Fan Wu , , , , , CC: Sakari Ailus Subject: [PATCH v6 05/14] media: mediatek: vcodec: get share memory address Date: Mon, 20 Jul 2026 09:20:47 +0800 Message-ID: <20260720012056.1026551-6-kyrie.wu@mediatek.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260720012056.1026551-1-kyrie.wu@mediatek.com> References: <20260720012056.1026551-1-kyrie.wu@mediatek.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-MTK: N Content-Type: text/plain; charset="utf-8" There is only one share memory for vcp architecture, need to divide it into many different functions. Signed-off-by: Kyrie Wu --- .../vcodec/common/mtk_vcodec_fw_vcp.c | 26 +++++++++++++- .../vcodec/common/mtk_vcodec_fw_vcp.h | 13 +++++++ .../vcodec/decoder/vdec/vdec_av1_req_lat_if.c | 35 ++++++++++++++++--- .../decoder/vdec/vdec_h264_req_multi_if.c | 6 +++- .../decoder/vdec/vdec_hevc_req_multi_if.c | 7 ++-- .../vcodec/decoder/vdec/vdec_vp9_req_lat_if.c | 22 ++++++++++-- .../mediatek/vcodec/decoder/vdec_vpu_if.c | 10 +++++- 7 files changed, 108 insertions(+), 11 deletions(-) diff --git a/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw_vc= p.c b/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw_vcp.c index ece4e3e87..468c4bf4e 100644 --- a/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw_vcp.c +++ b/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw_vcp.c @@ -483,8 +483,31 @@ static unsigned int mtk_vcodec_vcp_get_vdec_capa(struc= t mtk_vcodec_fw *fw) MTK_VDEC_IS_SUPPORT_10BIT | MTK_VDEC_IS_SUPPORT_EXT; } =20 -static void *mtk_vcodec_vcp_dm_addr(struct mtk_vcodec_fw *fw, u32 dtcm_dme= m_addr) +static unsigned int mtk_vcodec_vcp_get_venc_capa(struct mtk_vcodec_fw *fw) { + return 0; +} + +static void *mtk_vcodec_vcp_dm_addr(struct mtk_vcodec_fw *fw, u32 mem_type) +{ + unsigned char *vsi_core =3D fw->vcp->vsi_core_addr; + + switch (mem_type) { + case ENCODER_MEM: + case VCODEC_LAT_MEM: + return fw->vcp->vsi_addr; + case VCODEC_CORE_MEM: + return vsi_core; + case VP9_FRAME_MEM: + return vsi_core + VCODEC_VSI_LEN; + case AV1_CDF_MEM: + return vsi_core + VCODEC_VSI_LEN + VP9_FRAME_SIZE; + case AV1_IQ_MEM: + return vsi_core + VCODEC_VSI_LEN + VP9_FRAME_SIZE + AV1_CDF_SIZE; + default: + break; + } + return NULL; } =20 @@ -549,6 +572,7 @@ static void mtk_vcodec_vcp_release(struct mtk_vcodec_fw= *fw) static const struct mtk_vcodec_fw_ops mtk_vcodec_vcp_msg =3D { .load_firmware =3D mtk_vcodec_vcp_load_firmware, .get_vdec_capa =3D mtk_vcodec_vcp_get_vdec_capa, + .get_venc_capa =3D mtk_vcodec_vcp_get_venc_capa, .map_dm_addr =3D mtk_vcodec_vcp_dm_addr, .ipi_register =3D mtk_vcodec_vcp_set_ipi_register, .ipi_send =3D mtk_vcodec_vcp_ipi_send, diff --git a/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw_vc= p.h b/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw_vcp.h index 97ba642dc..79504bb2d 100644 --- a/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw_vcp.h +++ b/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw_vcp.h @@ -13,6 +13,19 @@ typedef void (*vcp_ipi_handler_t) (void *data, unsigned = int len, void *priv); #define VCP_SHARE_BUF_SIZE 64 =20 #define VCODEC_VSI_LEN (0x2000) +#define VP9_FRAME_SIZE (0x1000) +#define AV1_CDF_SIZE (0xFE80) +#define AV1_IQ_TABLE_SIZE (0x12200) + +/* enum mtk_vcp_mem_type - memory type for different hardware */ +enum mtk_vcp_mem_type { + ENCODER_MEM, + VCODEC_LAT_MEM, + VCODEC_CORE_MEM, + VP9_FRAME_MEM, + AV1_CDF_MEM, + AV1_IQ_MEM, +}; =20 /* enum mtk_vcp_ipi_index - index used to separate different hardware */ enum mtk_vcp_ipi_index { diff --git a/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_av1_r= eq_lat_if.c b/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_av1_= req_lat_if.c index 756fbb777..4932ef469 100644 --- a/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_av1_req_lat_= if.c +++ b/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_av1_req_lat_= if.c @@ -765,6 +765,15 @@ static void *vdec_av1_get_ctrl_ptr(struct mtk_vcodec_d= ec_ctx *ctx, int id) return ctrl->p_cur.p; } =20 +static u32 vdec_av1_get_cdf_table_addr(struct mtk_vcodec_dec_ctx *ctx, + struct vdec_av1_slice_init_vsi *vsi) +{ + if (mtk_vcodec_fw_get_type(ctx->dev->fw_handler) =3D=3D VCP) + return AV1_CDF_MEM; + else + return (u32)vsi->cdf_table_addr; +} + static int vdec_av1_slice_init_cdf_table(struct vdec_av1_slice_instance *i= nstance) { u8 *remote_cdf_table; @@ -775,7 +784,7 @@ static int vdec_av1_slice_init_cdf_table(struct vdec_av= 1_slice_instance *instanc ctx =3D instance->ctx; vsi =3D instance->vpu.vsi; remote_cdf_table =3D mtk_vcodec_fw_map_dm_addr(ctx->dev->fw_handler, - (u32)vsi->cdf_table_addr); + vdec_av1_get_cdf_table_addr(ctx, vsi)); if (IS_ERR(remote_cdf_table)) { mtk_vdec_err(ctx, "failed to map cdf table\n"); return PTR_ERR(remote_cdf_table); @@ -796,6 +805,15 @@ static int vdec_av1_slice_init_cdf_table(struct vdec_a= v1_slice_instance *instanc return 0; } =20 +static u32 vdec_av1_get_iq_table_addr(struct mtk_vcodec_dec_ctx *ctx, + struct vdec_av1_slice_init_vsi *vsi) +{ + if (mtk_vcodec_fw_get_type(ctx->dev->fw_handler) =3D=3D VCP) + return AV1_IQ_MEM; + else + return (u32)vsi->iq_table_addr; +} + static int vdec_av1_slice_init_iq_table(struct vdec_av1_slice_instance *in= stance) { u8 *remote_iq_table; @@ -806,7 +824,7 @@ static int vdec_av1_slice_init_iq_table(struct vdec_av1= _slice_instance *instance ctx =3D instance->ctx; vsi =3D instance->vpu.vsi; remote_iq_table =3D mtk_vcodec_fw_map_dm_addr(ctx->dev->fw_handler, - (u32)vsi->iq_table_addr); + vdec_av1_get_iq_table_addr(ctx, vsi)); if (IS_ERR(remote_iq_table)) { mtk_vdec_err(ctx, "failed to map iq table\n"); return PTR_ERR(remote_iq_table); @@ -1873,6 +1891,15 @@ static int vdec_av1_slice_update_core(struct vdec_av= 1_slice_instance *instance, return 0; } =20 +static u32 vdec_av1_get_core_vsi_addr(struct mtk_vcodec_dec_ctx *ctx, + struct vdec_av1_slice_init_vsi *vsi) +{ + if (mtk_vcodec_fw_get_type(ctx->dev->fw_handler) =3D=3D VCP) + return VCODEC_CORE_MEM; + else + return (u32)vsi->core_vsi; +} + static int vdec_av1_slice_init(struct mtk_vcodec_dec_ctx *ctx) { struct vdec_av1_slice_instance *instance; @@ -1904,8 +1931,8 @@ static int vdec_av1_slice_init(struct mtk_vcodec_dec_= ctx *ctx) goto error_vsi; } instance->init_vsi =3D vsi; - instance->core_vsi =3D mtk_vcodec_fw_map_dm_addr(ctx->dev->fw_handler, (u= 32)vsi->core_vsi); - + instance->core_vsi =3D mtk_vcodec_fw_map_dm_addr(ctx->dev->fw_handler, + vdec_av1_get_core_vsi_addr(ctx, vsi)); if (!instance->core_vsi) { mtk_vdec_err(ctx, "failed to get AV1 core vsi\n"); ret =3D -EINVAL; diff --git a/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_h264_= req_multi_if.c b/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_h= 264_req_multi_if.c index 69d607171..544d3bc06 100644 --- a/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_h264_req_mul= ti_if.c +++ b/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_h264_req_mul= ti_if.c @@ -1233,7 +1233,11 @@ static int vdec_h264_slice_init(struct mtk_vcodec_de= c_ctx *ctx) vsi_size =3D round_up(vsi_size, VCODEC_DEC_ALIGNED_64); inst->vsi_ext =3D inst->vpu.vsi; temp =3D (unsigned char *)inst->vsi_ext; - inst->vsi_core_ext =3D (struct vdec_h264_slice_vsi_ext *)(temp + vsi_siz= e); + if (mtk_vcodec_fw_get_type(ctx->dev->fw_handler) =3D=3D VCP) + inst->vsi_core_ext =3D + mtk_vcodec_fw_map_dm_addr(ctx->dev->fw_handler, VCODEC_CORE_MEM); + else + inst->vsi_core_ext =3D (struct vdec_h264_slice_vsi_ext *)(temp + vsi_si= ze); =20 if (inst->ctx->dev->vdec_pdata->hw_arch =3D=3D MTK_VDEC_PURE_SINGLE_CORE) inst->decode =3D vdec_h264_slice_single_decode_ext; diff --git a/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_hevc_= req_multi_if.c b/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_h= evc_req_multi_if.c index dd638ef44..a5dd42987 100644 --- a/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_hevc_req_mul= ti_if.c +++ b/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_hevc_req_mul= ti_if.c @@ -879,8 +879,11 @@ static int vdec_hevc_slice_init(struct mtk_vcodec_dec_= ctx *ctx) =20 vsi_size =3D round_up(sizeof(struct vdec_hevc_slice_vsi), VCODEC_DEC_ALIG= NED_64); inst->vsi =3D inst->vpu.vsi; - inst->vsi_core =3D - (struct vdec_hevc_slice_vsi *)(((char *)inst->vpu.vsi) + vsi_size); + if (mtk_vcodec_fw_get_type(ctx->dev->fw_handler) =3D=3D VCP) + inst->vsi_core =3D mtk_vcodec_fw_map_dm_addr(ctx->dev->fw_handler, VCODE= C_CORE_MEM); + else + inst->vsi_core =3D + (struct vdec_hevc_slice_vsi *)(((char *)inst->vpu.vsi) + vsi_size); =20 inst->resolution_changed =3D true; inst->realloc_mv_buf =3D true; diff --git a/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_vp9_r= eq_lat_if.c b/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_vp9_= req_lat_if.c index 1f0479a8f..3f4b70526 100644 --- a/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_vp9_req_lat_= if.c +++ b/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_vp9_req_lat_= if.c @@ -500,6 +500,15 @@ static DEFINE_MUTEX(vdec_vp9_slice_frame_ctx_lock); =20 static int vdec_vp9_slice_core_decode(struct vdec_lat_buf *lat_buf); =20 +static u32 vdec_vp9_get_frame_ctx_addr(struct mtk_vcodec_dec_ctx *ctx, + struct vdec_vp9_slice_init_vsi *vsi) +{ + if (mtk_vcodec_fw_get_type(ctx->dev->fw_handler) =3D=3D VCP) + return VP9_FRAME_MEM; + else + return (u32)vsi->default_frame_ctx; +} + static int vdec_vp9_slice_init_default_frame_ctx(struct vdec_vp9_slice_ins= tance *instance) { struct vdec_vp9_slice_frame_ctx *remote_frame_ctx; @@ -514,7 +523,7 @@ static int vdec_vp9_slice_init_default_frame_ctx(struct= vdec_vp9_slice_instance return -EINVAL; =20 remote_frame_ctx =3D mtk_vcodec_fw_map_dm_addr(ctx->dev->fw_handler, - (u32)vsi->default_frame_ctx); + vdec_vp9_get_frame_ctx_addr(ctx, vsi)); if (!remote_frame_ctx) { mtk_vdec_err(ctx, "failed to map default frame ctx\n"); return -EINVAL; @@ -1842,6 +1851,15 @@ static int vdec_vp9_slice_update_core(struct vdec_vp= 9_slice_instance *instance, return 0; } =20 +static u32 vdec_vp9_get_core_vsi_addr(struct mtk_vcodec_dec_ctx *ctx, + struct vdec_vp9_slice_init_vsi *vsi) +{ + if (mtk_vcodec_fw_get_type(ctx->dev->fw_handler) =3D=3D VCP) + return VCODEC_CORE_MEM; + else + return (u32)vsi->core_vsi; +} + static int vdec_vp9_slice_init(struct mtk_vcodec_dec_ctx *ctx) { enum mtk_vcodec_fw_type fw_type =3D ctx->dev->fw_handler->type; @@ -1875,7 +1893,7 @@ static int vdec_vp9_slice_init(struct mtk_vcodec_dec_= ctx *ctx) } instance->init_vsi =3D vsi; instance->core_vsi =3D mtk_vcodec_fw_map_dm_addr(ctx->dev->fw_handler, - (u32)vsi->core_vsi); + vdec_vp9_get_core_vsi_addr(ctx, vsi)); if (!instance->core_vsi) { mtk_vdec_err(ctx, "failed to get VP9 core vsi\n"); ret =3D -EINVAL; diff --git a/drivers/media/platform/mediatek/vcodec/decoder/vdec_vpu_if.c b= /drivers/media/platform/mediatek/vcodec/decoder/vdec_vpu_if.c index b35759a0b..cdb673e6b 100644 --- a/drivers/media/platform/mediatek/vcodec/decoder/vdec_vpu_if.c +++ b/drivers/media/platform/mediatek/vcodec/decoder/vdec_vpu_if.c @@ -9,6 +9,14 @@ #include "vdec_ipi_msg.h" #include "vdec_vpu_if.h" =20 +static u32 vpu_dec_get_vsi_addr(struct vdec_vpu_inst *vpu, const struct vd= ec_vpu_ipi_init_ack *msg) +{ + if (mtk_vcodec_fw_get_type(vpu->ctx->dev->fw_handler) =3D=3D VCP) + return VCODEC_LAT_MEM; + else + return msg->vpu_inst_addr; +} + static void handle_init_ack_msg(const struct vdec_vpu_ipi_init_ack *msg) { struct vdec_vpu_inst *vpu =3D (struct vdec_vpu_inst *) @@ -19,7 +27,7 @@ static void handle_init_ack_msg(const struct vdec_vpu_ipi= _init_ack *msg) /* mapping VPU address to kernel virtual address */ /* the content in vsi is initialized to 0 in VPU */ vpu->vsi =3D mtk_vcodec_fw_map_dm_addr(vpu->ctx->dev->fw_handler, - msg->vpu_inst_addr); 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charset="utf-8" Print hevc/av1 output format and 10bit capture format information to debug. Signed-off-by: Kyrie Wu Reviewed-by: Nicolas Dufresne --- .../mediatek/vcodec/common/mtk_vcodec_dbgfs.c | 21 +++++++++++++++++-- 1 file changed, 19 insertions(+), 2 deletions(-) diff --git a/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_dbgfs= .c b/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_dbgfs.c index 2da11521f..a9e52a320 100644 --- a/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_dbgfs.c +++ b/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_dbgfs.c @@ -29,6 +29,14 @@ static void mtk_vdec_dbgfs_get_format_type(struct mtk_vc= odec_dec_ctx *ctx, char curr_len =3D snprintf(buf + *used, total - *used, "\toutput format: vp9 slice\n"); break; + case V4L2_PIX_FMT_HEVC_SLICE: + curr_len =3D snprintf(buf + *used, total - *used, + "\toutput format: hevc slice\n"); + break; + case V4L2_PIX_FMT_AV1_FRAME: + curr_len =3D snprintf(buf + *used, total - *used, + "\toutput format: av1 slice\n"); + break; default: curr_len =3D snprintf(buf + *used, total - *used, "\tunsupported output format: 0x%x\n", @@ -45,6 +53,14 @@ static void mtk_vdec_dbgfs_get_format_type(struct mtk_vc= odec_dec_ctx *ctx, char curr_len =3D snprintf(buf + *used, total - *used, "\tcapture format: MT21C\n"); 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Mon, 20 Jul 2026 09:21:12 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.29; Mon, 20 Jul 2026 09:21:11 +0800 Received: from gcnsap21.gcn.mediatek.inc (10.17.81.22) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.2562.29 via Frontend Transport; Mon, 20 Jul 2026 09:21:10 +0800 From: Kyrie Wu To: Tiffany Lin , Andrew-CT Chen , Yunfei Dong , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Kyrie Wu , Nicolas Dufresne , Ricardo Ribalda , Kees Cook , Hans Verkuil , Fei Shao , Haoxiang Li , Chen-Yu Tsai , Laurent Pinchart , Tomasz Figa , Sebastian Fricke , Philipp Zabel , Benjamin Gaignard , Qianfeng Rong , Irui Wang , Jacopo Mondi , Fan Wu , , , , , CC: Sakari Ailus Subject: [PATCH v6 07/14] media: mediatek: vcodec: send share memory address to vcp Date: Mon, 20 Jul 2026 09:20:49 +0800 Message-ID: <20260720012056.1026551-8-kyrie.wu@mediatek.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260720012056.1026551-1-kyrie.wu@mediatek.com> References: <20260720012056.1026551-1-kyrie.wu@mediatek.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-MTK: N Content-Type: text/plain; charset="utf-8" The share memory is allocated in kernel for vcp architecture, it's different with vpu which share memors is reserved in vpu micro processor. Need to send share memory address to vcp. Signed-off-by: Kyrie Wu --- drivers/media/platform/mediatek/vcodec/decoder/vdec_ipi_msg.h | 2 ++ drivers/media/platform/mediatek/vcodec/decoder/vdec_vpu_if.c | 2 ++ 2 files changed, 4 insertions(+) diff --git a/drivers/media/platform/mediatek/vcodec/decoder/vdec_ipi_msg.h = b/drivers/media/platform/mediatek/vcodec/decoder/vdec_ipi_msg.h index 47070be2a..097561a1e 100644 --- a/drivers/media/platform/mediatek/vcodec/decoder/vdec_ipi_msg.h +++ b/drivers/media/platform/mediatek/vcodec/decoder/vdec_ipi_msg.h @@ -67,11 +67,13 @@ struct vdec_vpu_ipi_ack { * @msg_id : AP_IPIMSG_DEC_INIT * @codec_type : codec fourcc * @ap_inst_addr : AP video decoder instance address + * @shared_iova : reserved share memory address */ struct vdec_ap_ipi_init { uint32_t msg_id; u32 codec_type; uint64_t ap_inst_addr; + u64 shared_iova; }; =20 /** diff --git a/drivers/media/platform/mediatek/vcodec/decoder/vdec_vpu_if.c b= /drivers/media/platform/mediatek/vcodec/decoder/vdec_vpu_if.c index cdb673e6b..3a10b32be 100644 --- a/drivers/media/platform/mediatek/vcodec/decoder/vdec_vpu_if.c +++ b/drivers/media/platform/mediatek/vcodec/decoder/vdec_vpu_if.c @@ -236,6 +236,8 @@ int vpu_dec_init(struct vdec_vpu_inst *vpu) msg.msg_id =3D AP_IPIMSG_DEC_INIT; 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Mon, 20 Jul 2026 09:21:14 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by mtkmbs13n2.mediatek.inc (172.21.101.108) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.29; Mon, 20 Jul 2026 09:21:13 +0800 Received: from gcnsap21.gcn.mediatek.inc (10.17.81.22) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.2562.29 via Frontend Transport; Mon, 20 Jul 2026 09:21:11 +0800 From: Kyrie Wu To: Tiffany Lin , Andrew-CT Chen , Yunfei Dong , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Kyrie Wu , Nicolas Dufresne , Ricardo Ribalda , Kees Cook , Hans Verkuil , Fei Shao , Haoxiang Li , Chen-Yu Tsai , Laurent Pinchart , Tomasz Figa , Sebastian Fricke , Philipp Zabel , Benjamin Gaignard , Qianfeng Rong , Irui Wang , Jacopo Mondi , Fan Wu , , , , , CC: Sakari Ailus Subject: [PATCH v6 08/14] dt-bindings: media: mediatek: vcodec: add decoder dt-bindings for mt8196 Date: Mon, 20 Jul 2026 09:20:50 +0800 Message-ID: <20260720012056.1026551-9-kyrie.wu@mediatek.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260720012056.1026551-1-kyrie.wu@mediatek.com> References: <20260720012056.1026551-1-kyrie.wu@mediatek.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-MTK: N Content-Type: text/plain; charset="utf-8" Add the MT8196 compatible string to the MediaTek vcodec subdev decoder binding. Compared to previous ICs, the MT8196 supports a 10-bit decoder and has a decoding capability of 4K@120fps. It also supports 36-bit DRAM IOVA address and Video Power Control to optimize bandwidth and voltage usage. Signed-off-by: Kyrie Wu Acked-by: Nicolas Dufresne Acked-by: Krzysztof Kozlowski --- .../bindings/media/mediatek,vcodec-subdev-decoder.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev= -decoder.yaml b/Documentation/devicetree/bindings/media/mediatek,vcodec-sub= dev-decoder.yaml index d1d209cbb..4e11d4aad 100644 --- a/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decode= r.yaml +++ b/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decode= r.yaml @@ -76,6 +76,7 @@ properties: - mediatek,mt8186-vcodec-dec - mediatek,mt8188-vcodec-dec - mediatek,mt8195-vcodec-dec + - mediatek,mt8196-vcodec-dec =20 reg: minItems: 1 --=20 2.51.0.windows.2 From nobody Sat Jul 25 03:20:49 2026 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 47C242517A5; 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charset="utf-8" MT8196 is lat single core architecture. Support its compatible and use `mtk_lat_sig_core_pdata` to initialize platform data. Signed-off-by: Kyrie Wu --- .../platform/mediatek/vcodec/decoder/mtk_vcodec_dec_drv.c | 6 ++++++ .../platform/mediatek/vcodec/decoder/mtk_vcodec_dec_drv.h | 1 + 2 files changed, 7 insertions(+) diff --git a/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_= drv.c b/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_drv.c index ab5f6c01f..0d27adbf3 100644 --- a/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_drv.c +++ b/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_drv.c @@ -347,6 +347,8 @@ static void mtk_vcodec_dec_get_chip_name(struct mtk_vco= dec_dec_dev *vdec_dev) vdec_dev->chip_name =3D MTK_VDEC_MT8186; else if (of_device_is_compatible(dev->of_node, "mediatek,mt8188-vcodec-de= c")) vdec_dev->chip_name =3D MTK_VDEC_MT8188; + else if (of_device_is_compatible(dev->of_node, "mediatek,mt8196-vcodec-de= c")) + vdec_dev->chip_name =3D MTK_VDEC_MT8196; else vdec_dev->chip_name =3D MTK_VDEC_INVAL; } @@ -566,6 +568,10 @@ static const struct of_device_id mtk_vcodec_match[] = =3D { .compatible =3D "mediatek,mt8188-vcodec-dec", .data =3D &mtk_lat_sig_core_pdata, }, + { + .compatible =3D "mediatek,mt8196-vcodec-dec", + .data =3D &mtk_lat_sig_core_pdata, + }, {}, }; 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Mon, 20 Jul 2026 09:21:16 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.29; Mon, 20 Jul 2026 09:21:16 +0800 Received: from gcnsap21.gcn.mediatek.inc (10.17.81.22) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.2562.29 via Frontend Transport; Mon, 20 Jul 2026 09:21:14 +0800 From: Kyrie Wu To: Tiffany Lin , Andrew-CT Chen , Yunfei Dong , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Kyrie Wu , Nicolas Dufresne , Ricardo Ribalda , Kees Cook , Hans Verkuil , Fei Shao , Haoxiang Li , Chen-Yu Tsai , Laurent Pinchart , Tomasz Figa , Sebastian Fricke , Philipp Zabel , Benjamin Gaignard , Qianfeng Rong , Irui Wang , Jacopo Mondi , Fan Wu , , , , , CC: Sakari Ailus Subject: [PATCH v6 10/14] media: mediatek: vcodec: define MT8196 vcodec levels. Date: Mon, 20 Jul 2026 09:20:52 +0800 Message-ID: <20260720012056.1026551-11-kyrie.wu@mediatek.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260720012056.1026551-1-kyrie.wu@mediatek.com> References: <20260720012056.1026551-1-kyrie.wu@mediatek.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-MTK: N Content-Type: text/plain; charset="utf-8" The supported level and profile are not the same for different codecs and architecture. Select the correct one. Signed-off-by: Kyrie Wu Reviewed-by: Nicolas Dufresne --- .../mediatek/vcodec/decoder/mtk_vcodec_dec_stateless.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_= stateless.c b/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec= _stateless.c index ab1894fba..472ece571 100644 --- a/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_statele= ss.c +++ b/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_statele= ss.c @@ -577,6 +577,7 @@ static void mtk_vcodec_dec_fill_h264_level(struct v4l2_= ctrl_config *cfg, cfg->max =3D V4L2_MPEG_VIDEO_H264_LEVEL_5_2; break; case MTK_VDEC_MT8195: + case MTK_VDEC_MT8196: cfg->max =3D V4L2_MPEG_VIDEO_H264_LEVEL_6_0; break; case MTK_VDEC_MT8183: @@ -595,6 +596,7 @@ static void mtk_vcodec_dec_fill_h264_profile(struct v4l= 2_ctrl_config *cfg, switch (ctx->dev->chip_name) { case MTK_VDEC_MT8188: case MTK_VDEC_MT8195: + case MTK_VDEC_MT8196: cfg->max =3D V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_10; break; default: @@ -611,6 +613,7 @@ static void mtk_vcodec_dec_fill_h265_level(struct v4l2_= ctrl_config *cfg, cfg->max =3D V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1; break; case MTK_VDEC_MT8195: + case MTK_VDEC_MT8196: cfg->max =3D V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2; break; default: @@ -625,6 +628,7 @@ static void mtk_vcodec_dec_fill_h265_profile(struct v4l= 2_ctrl_config *cfg, switch (ctx->dev->chip_name) { case MTK_VDEC_MT8188: case MTK_VDEC_MT8195: + case MTK_VDEC_MT8196: cfg->max =3D V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10; break; default: @@ -642,6 +646,7 @@ static void mtk_vcodec_dec_fill_vp9_level(struct v4l2_c= trl_config *cfg, cfg->max =3D V4L2_MPEG_VIDEO_VP9_LEVEL_5_1; break; case MTK_VDEC_MT8195: + case MTK_VDEC_MT8196: cfg->max =3D V4L2_MPEG_VIDEO_VP9_LEVEL_5_2; break; case MTK_VDEC_MT8186: @@ -659,6 +664,7 @@ static void mtk_vcodec_dec_fill_vp9_profile(struct v4l2= _ctrl_config *cfg, switch (ctx->dev->chip_name) { case MTK_VDEC_MT8188: case MTK_VDEC_MT8195: + case MTK_VDEC_MT8196: cfg->max =3D V4L2_MPEG_VIDEO_VP9_PROFILE_2; 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charset="utf-8" Need to set dma mask to support 36bit iova address for decoder hardware can use 36bit address to decode for mt8196. Signed-off-by: Kyrie Wu Reviewed-by: Nicolas Dufresne --- .../platform/mediatek/vcodec/decoder/mtk_vcodec_dec_drv.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_= drv.c b/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_drv.c index 0d27adbf3..4d65c1025 100644 --- a/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_drv.c +++ b/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_drv.c @@ -392,6 +392,13 @@ static int mtk_vcodec_probe(struct platform_device *pd= ev) return -ENODEV; } dma_set_max_seg_size(&pdev->dev, UINT_MAX); + if (dev->chip_name =3D=3D MTK_VDEC_MT8196) { + ret =3D dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(36)); + if (ret) { + dev_err(&pdev->dev, "Failed to enable 36-bit DMA: %d\n", ret); + return ret; + } + } =20 dev->fw_handler =3D mtk_vcodec_fw_select(dev, DECODER, dev->fw_init); if (IS_ERR(dev->fw_handler)) --=20 2.51.0.windows.2 From nobody Sat Jul 25 03:20:49 2026 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E29AD21CC5A; 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Mon, 20 Jul 2026 09:21:20 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.29; Mon, 20 Jul 2026 09:21:19 +0800 Received: from gcnsap21.gcn.mediatek.inc (10.17.81.22) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.2562.29 via Frontend Transport; Mon, 20 Jul 2026 09:21:18 +0800 From: Kyrie Wu To: Tiffany Lin , Andrew-CT Chen , Yunfei Dong , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Kyrie Wu , Nicolas Dufresne , Ricardo Ribalda , Kees Cook , Hans Verkuil , Fei Shao , Haoxiang Li , Chen-Yu Tsai , Laurent Pinchart , Tomasz Figa , Sebastian Fricke , Philipp Zabel , Benjamin Gaignard , Qianfeng Rong , Irui Wang , Jacopo Mondi , Fan Wu , , , , , CC: Sakari Ailus Subject: [PATCH v6 12/14] media: mediatek: vcodec: clean xpc status Date: Mon, 20 Jul 2026 09:20:54 +0800 Message-ID: <20260720012056.1026551-13-kyrie.wu@mediatek.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260720012056.1026551-1-kyrie.wu@mediatek.com> References: <20260720012056.1026551-1-kyrie.wu@mediatek.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-MTK: N Content-Type: text/plain; charset="utf-8" The driver need to clean xpc status when receive decoder hardware interrupt for mt8196 platform. Signed-off-by: Kyrie Wu Reviewed-by: Nicolas Dufresne --- .../vcodec/decoder/mtk_vcodec_dec_hw.c | 31 +++++++++++++++++++ .../vcodec/decoder/mtk_vcodec_dec_hw.h | 13 ++++++-- 2 files changed, 42 insertions(+), 2 deletions(-) diff --git a/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_= hw.c b/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_hw.c index 881d5de41..46ac3e41c 100644 --- a/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_hw.c +++ b/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_hw.c @@ -61,6 +61,34 @@ static int mtk_vdec_hw_prob_done(struct mtk_vcodec_dec_d= ev *vdec_dev) return 0; } =20 +static void mtk_vdec_hw_write_reg_mask(void __iomem *reg_base, u32 reg_off= set, u32 val, u32 mask) +{ + void __iomem *reg_addr =3D reg_base + reg_offset; + u32 reg_val; + + reg_val =3D readl(reg_addr); + reg_val &=3D ~mask; + reg_val |=3D (val & mask); + writel(reg_val, reg_addr); +} + +static void mtk_vdec_hw_clean_xpc(struct mtk_vdec_hw_dev *dev) +{ + unsigned long flags; + u32 val, mask, addr =3D VDEC_XPC_CLEAN_ADDR; + + if (dev->main_dev->chip_name !=3D MTK_VDEC_MT8196) + return; + + val =3D dev->hw_idx =3D=3D MTK_VDEC_LAT0 ? VDEC_XPC_LAT_VAL : VDEC_XPC_CO= RE_VAL; + mask =3D dev->hw_idx =3D=3D MTK_VDEC_LAT0 ? VDEC_XPC_LAT_MASK : VDEC_XPC_= CORE_MASK; + + spin_lock_irqsave(&dev->main_dev->irqlock, flags); + mtk_vdec_hw_write_reg_mask(dev->reg_base[VDEC_HW_XPC], addr, val, mask); + mtk_vdec_hw_write_reg_mask(dev->reg_base[VDEC_HW_XPC], addr, 0, mask); + spin_unlock_irqrestore(&dev->main_dev->irqlock, flags); +} + static irqreturn_t mtk_vdec_hw_irq_handler(int irq, void *priv) { struct mtk_vdec_hw_dev *dev =3D priv; @@ -88,6 +116,8 @@ static irqreturn_t mtk_vdec_hw_irq_handler(int irq, void= *priv) writel(dec_done_status | VDEC_IRQ_CFG, vdec_misc_addr); writel(dec_done_status & ~VDEC_IRQ_CLR, vdec_misc_addr); =20 + mtk_vdec_hw_clean_xpc(dev); + wake_up_dec_ctx(ctx, MTK_INST_IRQ_RECEIVED, dev->hw_idx); =20 mtk_v4l2_vdec_dbg(3, ctx, "wake up ctx %d, dec_done_status=3D%x", @@ -166,6 +196,7 @@ static int mtk_vdec_hw_probe(struct platform_device *pd= ev) subdev_dev->hw_idx =3D hw_idx; subdev_dev->main_dev =3D main_dev; subdev_dev->reg_base[VDEC_HW_SYS] =3D main_dev->reg_base[VDEC_HW_SYS]; + subdev_dev->reg_base[VDEC_HW_XPC] =3D main_dev->reg_base[VDEC_HW_MISC]; set_bit(subdev_dev->hw_idx, main_dev->subdev_bitmap); =20 if (IS_SUPPORT_VDEC_HW_IRQ(hw_idx)) { diff --git a/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_= hw.h b/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_hw.h index 83fe8b942..5c906143c 100644 --- a/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_hw.h +++ b/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_hw.h @@ -18,17 +18,26 @@ #define VDEC_IRQ_CLR 0x10 #define VDEC_IRQ_CFG_REG 0xa4 =20 +#define VDEC_XPC_CLEAN_ADDR 0xc +#define VDEC_XPC_LAT_VAL BIT(0) +#define VDEC_XPC_LAT_MASK BIT(0) + +#define VDEC_XPC_CORE_VAL BIT(4) +#define VDEC_XPC_CORE_MASK BIT(4) + #define IS_SUPPORT_VDEC_HW_IRQ(hw_idx) ((hw_idx) !=3D MTK_VDEC_LAT_SOC) =20 /** * enum mtk_vdec_hw_reg_idx - subdev hardware register base index - * @VDEC_HW_SYS : vdec soc register index + * @VDEC_HW_SYS: vdec soc register index * @VDEC_HW_MISC: vdec misc register index - * @VDEC_HW_MAX : vdec supported max register index + * @VDEC_HW_XPC: vdec xpc register index + * @VDEC_HW_MAX: vdec supported max register index */ enum mtk_vdec_hw_reg_idx { VDEC_HW_SYS, VDEC_HW_MISC, + VDEC_HW_XPC, VDEC_HW_MAX }; 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charset="utf-8" The buffer size of y and c plane has been calculated in vcp/scp, can fill each frame buffer size with picinfo directly. Signed-off-by: Kyrie Wu Reviewed-by: Nicolas Dufresne --- .../vcodec/decoder/vdec/vdec_av1_req_lat_if.c | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-) diff --git a/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_av1_r= eq_lat_if.c b/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_av1_= req_lat_if.c index 4932ef469..14639098f 100644 --- a/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_av1_req_lat_= if.c +++ b/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_av1_req_lat_= if.c @@ -1811,18 +1811,19 @@ static int vdec_av1_slice_setup_core_buffer(struct = vdec_av1_slice_instance *inst { struct vb2_buffer *vb; struct vb2_queue *vq; - int w, h, plane, size; + int plane; int i; =20 plane =3D instance->ctx->q_data[MTK_Q_DATA_DST].fmt->num_planes; - w =3D vsi->frame.uh.upscaled_width; - h =3D vsi->frame.uh.frame_height; - size =3D ALIGN(w, VCODEC_DEC_ALIGNED_64) * ALIGN(h, VCODEC_DEC_ALIGNED_64= ); =20 /* frame buffer */ vsi->fb.y.dma_addr =3D fb->base_y.dma_addr; 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Mon, 20 Jul 2026 09:21:24 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by MTKMBS14N1.mediatek.inc (172.21.101.75) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.29; Mon, 20 Jul 2026 09:21:22 +0800 Received: from gcnsap21.gcn.mediatek.inc (10.17.81.22) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.2562.29 via Frontend Transport; Mon, 20 Jul 2026 09:21:21 +0800 From: Kyrie Wu To: Tiffany Lin , Andrew-CT Chen , Yunfei Dong , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Kyrie Wu , Nicolas Dufresne , Ricardo Ribalda , Kees Cook , Hans Verkuil , Fei Shao , Haoxiang Li , Chen-Yu Tsai , Laurent Pinchart , Tomasz Figa , Sebastian Fricke , Philipp Zabel , Benjamin Gaignard , Qianfeng Rong , Irui Wang , Jacopo Mondi , Fan Wu , , , , , CC: Sakari Ailus Subject: [PATCH v6 14/14] media: mediatek: decoder: support av1 extend vsi Date: Mon, 20 Jul 2026 09:20:56 +0800 Message-ID: <20260720012056.1026551-15-kyrie.wu@mediatek.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260720012056.1026551-1-kyrie.wu@mediatek.com> References: <20260720012056.1026551-1-kyrie.wu@mediatek.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-MTK: N Content-Type: text/plain; charset="utf-8" The driver can't access tile buffer address for extend architecture, set tile group information in vcp and share it with kernel. Signed-off-by: Kyrie Wu --- .../vcodec/decoder/vdec/vdec_av1_req_lat_if.c | 59 ++++++++++++++++--- 1 file changed, 52 insertions(+), 7 deletions(-) diff --git a/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_av1_r= eq_lat_if.c b/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_av1_= req_lat_if.c index 14639098f..1ef561dae 100644 --- a/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_av1_req_lat_= if.c +++ b/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_av1_req_lat_= if.c @@ -25,6 +25,9 @@ =20 #define AV1_INVALID_IDX -1 =20 +#define AV1_NON_EXT_VSI_SIZE 0xD50 +#define AV1_TILE_SIZE 64 + #define AV1_DIV_ROUND_UP_POW2(value, n) \ ({ \ typeof(n) _n =3D n; \ @@ -641,6 +644,8 @@ struct vdec_av1_slice_fb { * @frame: current frame info * @state: status after decode done * @cur_lst_tile_id: tile id for large scale + * @tile_group: tile group info + * @reserved: reserved */ struct vdec_av1_slice_vsi { /* lat */ @@ -665,6 +670,8 @@ struct vdec_av1_slice_vsi { struct vdec_av1_slice_frame frame; struct vdec_av1_slice_state state; u32 cur_lst_tile_id; + struct vdec_av1_slice_tile_group tile_group; + unsigned int reserved[4]; }; =20 /** @@ -1402,17 +1409,29 @@ static void vdec_av1_slice_setup_uh(struct vdec_av1= _slice_instance *instance, vdec_av1_slice_setup_tile(frame, &ctrl_fh->tile_info); } =20 +static +struct vdec_av1_slice_tile_group *vdec_av1_get_tile_group(struct vdec_av1_= slice_instance *instance, + struct vdec_av1_slice_vsi *vsi) +{ + if (IS_VDEC_SUPPORT_EXT(instance->ctx->dev->dec_capability)) + return &vsi->tile_group; + else + return &instance->tile_group; +} + static int vdec_av1_slice_setup_tile_group(struct vdec_av1_slice_instance = *instance, struct vdec_av1_slice_vsi *vsi) { struct v4l2_ctrl_av1_tile_group_entry *ctrl_tge; - struct vdec_av1_slice_tile_group *tile_group =3D &instance->tile_group; + struct vdec_av1_slice_tile_group *tile_group; struct vdec_av1_slice_uncompressed_header *uh =3D &vsi->frame.uh; struct vdec_av1_slice_tile *tile =3D &uh->tile; struct v4l2_ctrl *ctrl; u32 tge_size; int i; =20 + tile_group =3D vdec_av1_get_tile_group(instance, vsi); + ctrl =3D v4l2_ctrl_find(&instance->ctx->ctrl_hdl, V4L2_CID_STATELESS_AV1_= TILE_GROUP_ENTRY); if (!ctrl) return -EINVAL; @@ -1607,6 +1626,15 @@ static int vdec_av1_slice_setup_pfc(struct vdec_av1_= slice_instance *instance, return ret; } =20 +static u32 vdec_av1_get_tiles_num(struct vdec_av1_slice_instance *instance, + struct vdec_av1_slice_vsi *vsi) +{ + if (IS_VDEC_SUPPORT_EXT(instance->ctx->dev->dec_capability)) + return vsi->tile_group.num_tiles; + else + return instance->tile_group.num_tiles; +} + static void vdec_av1_slice_setup_lat_buffer(struct vdec_av1_slice_instance= *instance, struct vdec_av1_slice_vsi *vsi, struct mtk_vcodec_mem *bs, @@ -1647,12 +1675,18 @@ static void vdec_av1_slice_setup_lat_buffer(struct = vdec_av1_slice_instance *inst =20 vsi->tile.buf =3D instance->tile.dma_addr; vsi->tile.size =3D instance->tile.size; - memcpy(lat_buf->tile_addr.va, instance->tile.va, 64 * instance->tile_grou= p.num_tiles); =20 vsi->cdf_table.buf =3D instance->cdf_table.dma_addr; vsi->cdf_table.size =3D instance->cdf_table.size; vsi->iq_table.buf =3D instance->iq_table.dma_addr; vsi->iq_table.size =3D instance->iq_table.size; + + /* lat_buf is used to share hardware decoder syntax between lat and core, + * there isn't only one. But there is only one tile.va for each instance. + * Need to copy tile information to lat_buf every time. + */ + memcpy(lat_buf->tile_addr.va, instance->tile.va, + AV1_TILE_SIZE * vdec_av1_get_tiles_num(instance, vsi)); } =20 static void vdec_av1_slice_setup_seg_buffer(struct vdec_av1_slice_instance= *instance, @@ -1675,7 +1709,7 @@ static void vdec_av1_slice_setup_tile_buffer(struct v= dec_av1_slice_instance *ins struct vdec_av1_slice_vsi *vsi, struct mtk_vcodec_mem *bs) { - struct vdec_av1_slice_tile_group *tile_group =3D &instance->tile_group; + struct vdec_av1_slice_tile_group *tile_group; struct vdec_av1_slice_uncompressed_header *uh =3D &vsi->frame.uh; struct vdec_av1_slice_tile *tile =3D &uh->tile; u32 tile_num, tile_row, tile_col; @@ -1686,6 +1720,8 @@ static void vdec_av1_slice_setup_tile_buffer(struct v= dec_av1_slice_instance *ins u32 *tile_info_buf =3D instance->tile.va; u64 pa =3D (u64)bs->dma_addr; =20 + tile_group =3D vdec_av1_get_tile_group(instance, vsi); + if (uh->disable_cdf_update =3D=3D 0) allow_update_cdf =3D 1; =20 @@ -1908,7 +1944,7 @@ static int vdec_av1_slice_init(struct mtk_vcodec_dec_= ctx *ctx) struct vdec_av1_slice_instance *instance; struct vdec_av1_slice_init_vsi *vsi; enum mtk_vcodec_fw_type fw_type =3D ctx->dev->fw_handler->type; - int ret; + int ret, vsi_size =3D AV1_NON_EXT_VSI_SIZE; =20 instance =3D kzalloc_obj(*instance); if (!instance) @@ -1942,9 +1978,18 @@ static int vdec_av1_slice_init(struct mtk_vcodec_dec= _ctx *ctx) goto error_vsi; } =20 - if (vsi->vsi_size !=3D sizeof(struct vdec_av1_slice_vsi)) - mtk_vdec_err(ctx, "remote vsi size 0x%x mismatch! expected: 0x%zx\n", - vsi->vsi_size, sizeof(struct vdec_av1_slice_vsi)); + if (IS_VDEC_SUPPORT_EXT(ctx->dev->dec_capability)) { + vsi_size =3D sizeof(struct vdec_av1_slice_vsi); + vsi->iq_table_size =3D AV1_IQ_TABLE_SIZE; + vsi->cdf_table_size =3D AV1_CDF_SIZE; + } + + if (vsi->vsi_size !=3D vsi_size) { + mtk_vdec_err(ctx, "remote vsi size 0x%x mismatch! expected: 0x%x\n", + vsi->vsi_size, vsi_size); + ret =3D -EINVAL; + goto error_vsi; + } =20 instance->irq_enabled =3D 1; instance->inneracing_mode =3D IS_VDEC_INNER_RACING(instance->ctx->dev->de= c_capability); --=20 2.51.0.windows.2