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Fri, 17 Jul 2026 23:59:11 -0700 (PDT) From: Hrushiraj Gandhi To: heiko@sntech.de Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, Hrushiraj Gandhi Subject: [PATCH v2 1/2] dt-bindings: arm: rockchip: Add Vicharak Vaaman board Date: Sat, 18 Jul 2026 12:28:59 +0530 Message-ID: <20260718065900.755631-2-hrushirajg23@gmail.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260718065900.755631-1-hrushirajg23@gmail.com> References: <20260718065900.755631-1-hrushirajg23@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Document the compatible string for the Vicharak Vaaman, an RK3399-based single-board computer. Signed-off-by: Hrushiraj Gandhi Acked-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/arm/rockchip.yaml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Document= ation/devicetree/bindings/arm/rockchip.yaml index 1a9dde18626d..7cfd3687768c 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -1306,6 +1306,11 @@ properties: - const: turing,rk1 - const: rockchip,rk3588 =20 + - description: Vicharak Vaaman + items: + - const: vicharak,vaaman + - const: rockchip,rk3399 + - description: WolfVision PF5 mainboard items: - const: wolfvision,rk3568-pf5 --=20 2.47.3 From nobody Sat Jul 25 04:30:17 2026 Received: from mail-pg1-f170.google.com (mail-pg1-f170.google.com [209.85.215.170]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DAB4D37CD39 for ; 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Fri, 17 Jul 2026 23:59:15 -0700 (PDT) Received: from i386.168.1.127 ([2402:a00:163:2ce9:6882:91b7:8e79:7958]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-31429f9bb62sm13426133eec.2.2026.07.17.23.59.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 Jul 2026 23:59:15 -0700 (PDT) From: Hrushiraj Gandhi To: heiko@sntech.de Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, Hrushiraj Gandhi Subject: [PATCH v2 2/2] arm64: dts: rockchip: Add Vicharak Vaaman board Date: Sat, 18 Jul 2026 12:29:00 +0530 Message-ID: <20260718065900.755631-3-hrushirajg23@gmail.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260718065900.755631-1-hrushirajg23@gmail.com> References: <20260718065900.755631-1-hrushirajg23@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add initial devicetree support for the Vicharak Vaaman, an RK3399-based single-board computer. Supported peripherals: - RK808 PMIC with core/logic/IO regulators - SYR827/SYR828 (vdd_cpu_b/vdd_gpu) CPU-big and GPU regulators - Mali GPU - Gigabit Ethernet (RGMII, via &gmac) - eMMC (HS400, enhanced strobe) - microSD card slot - SARADC and TSADC - PWM-based vdd_log regulator - UART2 serial console Signed-off-by: Hrushiraj Gandhi --- Changes in v2: - Fix fixed-regulator node naming to use 'regulator-[voltage]' prefix consistently throughout --- arch/arm64/boot/dts/rockchip/Makefile | 1 + .../dts/rockchip/rk3399-vicharak-vaaman.dts | 438 ++++++++++++++++++ 2 files changed, 439 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-vicharak-vaaman.dts diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/ro= ckchip/Makefile index 761d82b4f4f2..e1b974502915 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -90,6 +90,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3399-rockpro64.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3399-rockpro64-screen.dtbo dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3399-sapphire.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3399-sapphire-excavator.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3399-vicharak-vaaman.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3399pro-rock-pi-n10.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3528-armsom-sige1.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3528-nanopi-zero2.dtb diff --git a/arch/arm64/boot/dts/rockchip/rk3399-vicharak-vaaman.dts b/arch= /arm64/boot/dts/rockchip/rk3399-vicharak-vaaman.dts new file mode 100644 index 000000000000..dbf79b996500 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3399-vicharak-vaaman.dts @@ -0,0 +1,438 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2026 Vicharak Computers Pvt Ltd + */ + +/dts-v1/; +#include "rk3399.dtsi" + +/ { + model =3D "Vicharak Vaaman"; + compatible =3D "vicharak,vaaman", "rockchip,rk3399"; + + aliases { + ethernet0 =3D &gmac; + mmc0 =3D &sdhci; + mmc1 =3D &sdmmc; + }; + + chosen { + stdout-path =3D "serial2:1500000n8"; + }; + + clkin_gmac: external-gmac-clock { + compatible =3D "fixed-clock"; + clock-frequency =3D <125000000>; + clock-output-names =3D "clkin_gmac"; + #clock-cells =3D <0>; + }; + + vcc12v_dcin: regulator-dc-12v { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc12v_dcin"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <12000000>; + regulator-max-microvolt =3D <12000000>; + }; + + vcc3v3_lan: regulator-vcc3v3-lan { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc3v3_lan"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + vin-supply =3D <&vcc3v3_sys>; + }; + + vcc3v3_sys: regulator-vcc3v3-sys { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc3v3_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + vin-supply =3D <&vcc5v0_sys>; + }; + + vcc5v0_sys: regulator-vcc-sys { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc5v0_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + vin-supply =3D <&vcc12v_dcin>; + }; + + vdd_log: regulator-vdd-log { + compatible =3D "pwm-regulator"; + pwms =3D <&pwm2 0 25000 1>; + pwm-supply =3D <&vcc5v0_sys>; + regulator-name =3D "vdd_log"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <800000>; + regulator-max-microvolt =3D <1400000>; + }; +}; + +&cpu_l0 { + cpu-supply =3D <&vdd_cpu_l>; +}; + +&cpu_l1 { + cpu-supply =3D <&vdd_cpu_l>; +}; + +&cpu_l2 { + cpu-supply =3D <&vdd_cpu_l>; +}; + +&cpu_l3 { + cpu-supply =3D <&vdd_cpu_l>; +}; + +&cpu_b0 { + cpu-supply =3D <&vdd_cpu_b>; +}; + +&cpu_b1 { + cpu-supply =3D <&vdd_cpu_b>; +}; + +&emmc_phy { + rockchip,enable-strobe-pulldown; + status =3D "okay"; +}; + +&gmac { + assigned-clocks =3D <&cru SCLK_RMII_SRC>; + assigned-clock-parents =3D <&clkin_gmac>; + clock_in_out =3D "input"; + phy-supply =3D <&vcc3v3_lan>; + /* TX/RX delays tuned for the Vaaman board PCB trace lengths */ + phy-mode =3D "rgmii"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&rgmii_pins>; + snps,reset-gpio =3D <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; + snps,reset-active-low; + snps,reset-delays-us =3D <0 10000 50000>; + tx_delay =3D <0x28>; + rx_delay =3D <0x11>; + status =3D "okay"; +}; + +&gpu { + mali-supply =3D <&vdd_gpu>; + status =3D "okay"; +}; + +&i2c0 { + clock-frequency =3D <400000>; + i2c-scl-rising-time-ns =3D <168>; + i2c-scl-falling-time-ns =3D <4>; + status =3D "okay"; + + rk808: pmic@1b { + compatible =3D "rockchip,rk808"; + reg =3D <0x1b>; + interrupt-parent =3D <&gpio1>; + interrupts =3D ; + #clock-cells =3D <1>; + clock-output-names =3D "xin32k", "rk808-clkout2"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pmic_int_l>; + system-power-controller; + wakeup-source; + + vcc1-supply =3D <&vcc5v0_sys>; + vcc2-supply =3D <&vcc5v0_sys>; + vcc3-supply =3D <&vcc5v0_sys>; + vcc4-supply =3D <&vcc5v0_sys>; + vcc6-supply =3D <&vcc5v0_sys>; + vcc7-supply =3D <&vcc5v0_sys>; + vcc8-supply =3D <&vcc3v3_sys>; + vcc9-supply =3D <&vcc5v0_sys>; + vcc10-supply =3D <&vcc5v0_sys>; + vcc11-supply =3D <&vcc5v0_sys>; + vcc12-supply =3D <&vcc3v3_sys>; + vddio-supply =3D <&vcc_3v0>; + + regulators { + vdd_center: DCDC_REG1 { + regulator-name =3D "vdd_center"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <750000>; + regulator-max-microvolt =3D <1350000>; + regulator-ramp-delay =3D <6001>; + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt =3D <900000>; + }; + }; + + vdd_cpu_l: DCDC_REG2 { + regulator-name =3D "vdd_cpu_l"; + regulator-always-on; + regulator-boot-on; + regulator-initial-mode =3D <0x2>; + regulator-min-microvolt =3D <750000>; + regulator-max-microvolt =3D <1350000>; + regulator-ramp-delay =3D <6001>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_ddr: DCDC_REG3 { + regulator-name =3D "vcc_ddr"; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc_1v8: DCDC_REG4 { + regulator-name =3D "vcc_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt =3D <1800000>; + }; + }; + + vcca1v8_codec: LDO_REG1 { + regulator-name =3D "vcca1v8_codec"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt =3D <1800000>; + }; + }; + + vcca1v8_hdmi: LDO_REG2 { + regulator-name =3D "vcca1v8_hdmi"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcca_1v8: LDO_REG3 { + regulator-name =3D "vcca_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt =3D <1800000>; + }; + }; + + vcc_sdio: LDO_REG4 { + regulator-name =3D "vcc_sdio"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <3000000>; + regulator-max-microvolt =3D <3000000>; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt =3D <3000000>; + }; + }; + + vcca3v0_codec: LDO_REG5 { + regulator-name =3D "vcca3v0_codec"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <3000000>; + regulator-max-microvolt =3D <3000000>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_1v5: LDO_REG6 { + regulator-name =3D "vcc_1v5"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1500000>; + regulator-max-microvolt =3D <1500000>; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt =3D <1500000>; + }; + }; + + vcca0v9_hdmi: LDO_REG7 { + regulator-name =3D "vcca0v9_hdmi"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <900000>; + regulator-max-microvolt =3D <900000>; + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt =3D <900000>; + }; + }; + + vcc_3v0: LDO_REG8 { + regulator-name =3D "vcc_3v0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <3000000>; + regulator-max-microvolt =3D <3000000>; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt =3D <3000000>; + }; + }; + + vcc_cam: SWITCH_REG1 { + regulator-name =3D "vcc_cam"; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_mipi: SWITCH_REG2 { + regulator-name =3D "vcc_mipi"; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + }; + + vdd_cpu_b: regulator@40 { + compatible =3D "silergy,syr827"; + reg =3D <0x40>; + fcs,suspend-voltage-selector =3D <1>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&vsel1_pin>; + regulator-name =3D "vdd_cpu_b"; + regulator-min-microvolt =3D <712500>; + regulator-max-microvolt =3D <1500000>; + regulator-ramp-delay =3D <1000>; + regulator-always-on; + regulator-boot-on; + vin-supply =3D <&vcc5v0_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_gpu: regulator@41 { + compatible =3D "silergy,syr828"; + reg =3D <0x41>; + fcs,suspend-voltage-selector =3D <1>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&vsel2_pin>; + regulator-name =3D "vdd_gpu"; + regulator-min-microvolt =3D <712500>; + regulator-max-microvolt =3D <1500000>; + regulator-ramp-delay =3D <1000>; + regulator-always-on; + regulator-boot-on; + vin-supply =3D <&vcc5v0_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; +}; + +&io_domains { + audio-supply =3D <&vcca1v8_codec>; + bt656-supply =3D <&vcc_3v0>; + gpio1830-supply =3D <&vcc_3v0>; + sdmmc-supply =3D <&vcc_sdio>; + status =3D "okay"; +}; + +&pinctrl { + pmic { + pmic_int_l: pmic-int-l { + rockchip,pins =3D + <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + vsel1_pin: vsel1-pin { + rockchip,pins =3D + <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>; + }; + + vsel2_pin: vsel2-pin { + rockchip,pins =3D + <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; + }; + }; +}; + +&pmu_io_domains { + pmu1830-supply =3D <&vcc_3v0>; + status =3D "okay"; +}; + +&pwm2 { + status =3D "okay"; +}; + +&saradc { + vref-supply =3D <&vcc_1v8>; + status =3D "okay"; +}; + +&sdhci { + max-frequency =3D <150000000>; + bus-width =3D <8>; + mmc-hs400-1_8v; + mmc-hs400-enhanced-strobe; + non-removable; + status =3D "okay"; +}; + +&sdmmc { + bus-width =3D <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + cd-gpios =3D <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>; + disable-wp; + max-frequency =3D <150000000>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&sdmmc_clk &sdmmc_cd &sdmmc_cmd &sdmmc_bus4>; + status =3D "okay"; +}; + +&tsadc { + /* tshut mode 0:CRU 1:GPIO */ + rockchip,hw-tshut-mode =3D <1>; + /* tshut polarity 0:LOW 1:HIGH */ + rockchip,hw-tshut-polarity =3D <1>; + status =3D "okay"; +}; + +&uart2 { + status =3D "okay"; +}; --=20 2.47.3