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Fri, 17 Jul 2026 20:31:23 -0700 (PDT) From: Rosen Penev To: dmaengine@vger.kernel.org Cc: Vinod Koul , Frank Li , linux-kernel@vger.kernel.org (open list) Subject: [PATCH] dmaengine: fsl_raid: replace in_be32/out_be32 with ioread32be/iowrite32be Date: Fri, 17 Jul 2026 20:31:22 -0700 Message-ID: <20260718033122.2372985-1-rosenp@gmail.com> X-Mailer: git-send-email 2.55.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Mechanical conversion of the ppc4xx-specific accessors to the generic portable helpers. As a result, enable COMPILE_TEST for extra compile coverage. Assisted-by: opencode:big-pickle Signed-off-by: Rosen Penev Reviewed-by: Frank Li --- drivers/dma/Kconfig | 2 +- drivers/dma/fsl_raid.c | 50 ++++++++++++++++++------------------------ 2 files changed, 22 insertions(+), 30 deletions(-) diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig index cb92687294c3..dbdb35f6610a 100644 --- a/drivers/dma/Kconfig +++ b/drivers/dma/Kconfig @@ -242,7 +242,7 @@ config FSL_QDMA =20 config FSL_RAID tristate "Freescale RAID engine Support" - depends on FSL_SOC && !ASYNC_TX_ENABLE_CHANNEL_SWITCH + depends on (FSL_SOC && !ASYNC_TX_ENABLE_CHANNEL_SWITCH) || COMPILE_TEST select DMA_ENGINE select DMA_ENGINE_RAID help diff --git a/drivers/dma/fsl_raid.c b/drivers/dma/fsl_raid.c index 2d86f61105e5..e559c636bf55 100644 --- a/drivers/dma/fsl_raid.c +++ b/drivers/dma/fsl_raid.c @@ -114,7 +114,7 @@ static void fsl_re_issue_pending(struct dma_chan *chan) =20 spin_lock_irqsave(&re_chan->desc_lock, flags); avail =3D FSL_RE_SLOT_AVAIL( - in_be32(&re_chan->jrregs->inbring_slot_avail)); + ioread32be(&re_chan->jrregs->inbring_slot_avail)); =20 list_for_each_entry_safe(desc, _desc, &re_chan->submit_q, node) { if (!avail) @@ -127,7 +127,7 @@ static void fsl_re_issue_pending(struct dma_chan *chan) =20 re_chan->inb_count =3D (re_chan->inb_count + 1) & FSL_RE_RING_SIZE_MASK; - out_be32(&re_chan->jrregs->inbring_add_job, FSL_RE_ADD_JOB(1)); + iowrite32be(FSL_RE_ADD_JOB(1), &re_chan->jrregs->inbring_add_job); avail--; } spin_unlock_irqrestore(&re_chan->desc_lock, flags); @@ -167,7 +167,7 @@ static void fsl_re_dequeue(struct tasklet_struct *t) fsl_re_cleanup_descs(re_chan); =20 spin_lock_irqsave(&re_chan->desc_lock, flags); - count =3D FSL_RE_SLOT_FULL(in_be32(&re_chan->jrregs->oubring_slot_full)); + count =3D FSL_RE_SLOT_FULL(ioread32be(&re_chan->jrregs->oubring_slot_full= )); while (count--) { found =3D 0; hwdesc =3D &re_chan->oub_ring_virt_addr[re_chan->oub_count]; @@ -192,8 +192,7 @@ static void fsl_re_dequeue(struct tasklet_struct *t) oub_count =3D (re_chan->oub_count + 1) & FSL_RE_RING_SIZE_MASK; re_chan->oub_count =3D oub_count; =20 - out_be32(&re_chan->jrregs->oubring_job_rmvd, - FSL_RE_RMVD_JOB(1)); + iowrite32be(FSL_RE_RMVD_JOB(1), &re_chan->jrregs->oubring_job_rmvd); } spin_unlock_irqrestore(&re_chan->desc_lock, flags); } @@ -206,7 +205,7 @@ static irqreturn_t fsl_re_isr(int irq, void *data) =20 re_chan =3D dev_get_drvdata((struct device *)data); =20 - irqstate =3D in_be32(&re_chan->jrregs->jr_interrupt_status); + irqstate =3D ioread32be(&re_chan->jrregs->jr_interrupt_status); if (!irqstate) return IRQ_NONE; =20 @@ -216,13 +215,13 @@ static irqreturn_t fsl_re_isr(int irq, void *data) * need to do something more than just crashing */ if (irqstate & FSL_RE_ERROR) { - status =3D in_be32(&re_chan->jrregs->jr_status); + status =3D ioread32be(&re_chan->jrregs->jr_status); dev_err(re_chan->dev, "chan error irqstate: %x, status: %x\n", irqstate, status); } =20 /* Clear interrupt */ - out_be32(&re_chan->jrregs->jr_interrupt_status, FSL_RE_CLR_INTR); + iowrite32be(FSL_RE_CLR_INTR, &re_chan->jrregs->jr_interrupt_status); =20 tasklet_schedule(&re_chan->irqtask); =20 @@ -708,30 +707,23 @@ static int fsl_re_chan_probe(struct platform_device *= ofdev, } =20 /* Program the Inbound/Outbound ring base addresses and size */ - out_be32(&chan->jrregs->inbring_base_h, - chan->inb_phys_addr & FSL_RE_ADDR_BIT_MASK); - out_be32(&chan->jrregs->oubring_base_h, - chan->oub_phys_addr & FSL_RE_ADDR_BIT_MASK); - out_be32(&chan->jrregs->inbring_base_l, - chan->inb_phys_addr >> FSL_RE_ADDR_BIT_SHIFT); - out_be32(&chan->jrregs->oubring_base_l, - chan->oub_phys_addr >> FSL_RE_ADDR_BIT_SHIFT); - out_be32(&chan->jrregs->inbring_size, - FSL_RE_RING_SIZE << FSL_RE_RING_SIZE_SHIFT); - out_be32(&chan->jrregs->oubring_size, - FSL_RE_RING_SIZE << FSL_RE_RING_SIZE_SHIFT); + iowrite32be(chan->inb_phys_addr & FSL_RE_ADDR_BIT_MASK, &chan->jrregs->in= bring_base_h); + iowrite32be(chan->oub_phys_addr & FSL_RE_ADDR_BIT_MASK, &chan->jrregs->ou= bring_base_h); + iowrite32be(chan->inb_phys_addr >> FSL_RE_ADDR_BIT_SHIFT, &chan->jrregs->= inbring_base_l); + iowrite32be(chan->oub_phys_addr >> FSL_RE_ADDR_BIT_SHIFT, &chan->jrregs->= oubring_base_l); + iowrite32be(FSL_RE_RING_SIZE << FSL_RE_RING_SIZE_SHIFT, &chan->jrregs->in= bring_size); + iowrite32be(FSL_RE_RING_SIZE << FSL_RE_RING_SIZE_SHIFT, &chan->jrregs->ou= bring_size); =20 /* Read LIODN value from u-boot */ - status =3D in_be32(&chan->jrregs->jr_config_1) & FSL_RE_REG_LIODN_MASK; + status =3D ioread32be(&chan->jrregs->jr_config_1) & FSL_RE_REG_LIODN_MASK; =20 /* Program the CFG reg */ - out_be32(&chan->jrregs->jr_config_1, - FSL_RE_CFG1_CBSI | FSL_RE_CFG1_CBS0 | status); + iowrite32be(FSL_RE_CFG1_CBSI | FSL_RE_CFG1_CBS0 | status, &chan->jrregs->= jr_config_1); =20 dev_set_drvdata(chandev, chan); =20 /* Enable RE/CHAN */ - out_be32(&chan->jrregs->jr_command, FSL_RE_ENABLE); + iowrite32be(FSL_RE_ENABLE, &chan->jrregs->jr_command); =20 return 0; =20 @@ -766,15 +758,15 @@ static int fsl_re_probe(struct platform_device *ofdev) re_priv->base =3D re_regs; =20 /* Program the RE mode */ - out_be32(&re_regs->global_config, FSL_RE_NON_DPAA_MODE); + iowrite32be(FSL_RE_NON_DPAA_MODE, &re_regs->global_config); =20 /* Program Galois Field polynomial */ - out_be32(&re_regs->galois_field_config, FSL_RE_GFM_POLY); + iowrite32be(FSL_RE_GFM_POLY, &re_regs->galois_field_config); =20 dev_info(dev, "version %x, mode %x, gfp %x\n", - in_be32(&re_regs->re_version_id), - in_be32(&re_regs->global_config), - in_be32(&re_regs->galois_field_config)); + ioread32be(&re_regs->re_version_id), + ioread32be(&re_regs->global_config), + ioread32be(&re_regs->galois_field_config)); =20 dma_dev =3D &re_priv->dma_dev; dma_dev->dev =3D dev; --=20 2.55.0