From nobody Sat Jul 25 15:25:03 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E3ECC3314B7; Thu, 16 Jul 2026 19:51:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784231496; cv=none; b=U/e9uI1UWWvN6UUGiAnGeVugyutz4ZhkdokKVddHo0AxjiS3JlghXVN8Ox/W0gX+V5Q9Cjjcqo0HL3YhtE0kZML8/zQfo3ItkSxKR7SJoj0sRBSQ1t5oqBbnXg2UBzHX6fwEWqk0RfNiy3hENLRKe9CdhHLDboKFq5wS5TwXLyw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784231496; c=relaxed/simple; bh=5xh8In4T0B+e6FRwZmqeK+VMgCQ2uzOm3zsUrgFp6WA=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=UDTIXYjNOVXwO9tYeOtH2I1SPNGONCCmh02Tzrz9e5UxXTZYQfU5OnglRJgb7MBXGdRz6HtjYrxHfCMsveEUoRYyW/9pL2s3o/3zPZEdhWah91TH2ukATap2ZJreOr1pu1q69pdLSclj3lwdUUKG6jWsgPfsgcYcVR7KV+3Kqpc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=VxX21xdf; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="VxX21xdf" Received: by smtp.kernel.org (Postfix) with ESMTPS id 98D83C2BCC9; Thu, 16 Jul 2026 19:51:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1784231495; bh=5xh8In4T0B+e6FRwZmqeK+VMgCQ2uzOm3zsUrgFp6WA=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=VxX21xdfWUAxkqGLKEWhTj1JyCgfcyw7ZrgHg1JngytTD4IzxWzvxNAS9Jo8Bpf6f e/tMXmDadp/AnnUVQmT+U7cKqgQ6BIVfiYaGAaBFJdYLSLR1B+jPs2PiKgw2NxHwX/ ogT27IP3xjmugb/127y9rN0GyOnryJR7VoLXj5hnliiuadCRcklDWDsuq6BpwyKXnO tQf9xUZgPUJl3wR/pBFIn0YQNLHZdht2EI86m0GtggJmRYyG3OTQGkPyrtIL6JSe1k J/QZSePk7+6ohBvWvdMkWUbAgDa+bDiw89D3wi9qT7TfiyFxbFjh19OfyPXoQ3+Z+n Zz4gYUq6slvIA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 79CB9C44512; Thu, 16 Jul 2026 19:51:35 +0000 (UTC) From: Sarath Ganapathiraju via B4 Relay Date: Fri, 17 Jul 2026 01:21:15 +0530 Subject: [PATCH v2 1/3] ASoC: dt-bindings: qcom,lpass-va-csr: Add HeartBeat pulse clock Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260717-master-v2-1-ae200627ad62@oss.qualcomm.com> References: <20260717-master-v2-0-ae200627ad62@oss.qualcomm.com> In-Reply-To: <20260717-master-v2-0-ae200627ad62@oss.qualcomm.com> To: Srinivas Kandagatla , Liam Girdwood , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jaroslav Kysela , Takashi Iwai Cc: Srinivas Kandagatla , linux-sound@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, prasad.kumpatla@oss.qualcomm.com, Konrad Dybcio , Sarath Ganapathiraju X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1784231493; l=2245; i=sarath.ganapathiraju@oss.qualcomm.com; s=default; h=from:subject:message-id; bh=T7zITenaLQ9Lrl6goebTesyTMddGvt+a0ZHdbi6L3fU=; b=FV3jm2e+mCBnFDWB8NR67V8GBPxEM1HNiCySFYpUWUd90ENy/Gnt1/ZMbvoBjOrRLUZdkL8D1 iJRUnE1h7O/BcQnGGNnuZyaL+eHRoADGR+o7TyqDiF/qRc5E0xBNc2F X-Developer-Key: i=sarath.ganapathiraju@oss.qualcomm.com; a=ed25519; pk=4p2FWGXM+F2sir13Lu5stw5aKX5trUymK/ttESvgxQg= X-Endpoint-Received: by B4 Relay for sarath.ganapathiraju@oss.qualcomm.com/default with auth_id=870 X-Original-From: Sarath Ganapathiraju Reply-To: sarath.ganapathiraju@oss.qualcomm.com From: Sarath Ganapathiraju Add Qualcomm LPASS VA CSR rate generator node that exposes the lpass_heartbeat_pulse clock on hawi. The HeartBeat Pulse (also known as RateGen Pulse) synchronizes the start of the DMAs and Codec Interfaces for the audio usecase and can serve as a periodic wakeup source for the DSP. Signed-off-by: Sarath Ganapathiraju --- .../bindings/sound/qcom,lpass-va-csr.yaml | 52 ++++++++++++++++++= ++++ 1 file changed, 52 insertions(+) diff --git a/Documentation/devicetree/bindings/sound/qcom,lpass-va-csr.yaml= b/Documentation/devicetree/bindings/sound/qcom,lpass-va-csr.yaml new file mode 100644 index 0000000000..131debb04f --- /dev/null +++ b/Documentation/devicetree/bindings/sound/qcom,lpass-va-csr.yaml @@ -0,0 +1,52 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/qcom,lpass-va-csr.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm LPASS VA CSR heartbeat pulse clock provider + +maintainers: + - Srinivas Kandagatla + - Sarath Ganapathiraju + +description: + The LPASS VA CSR block contains the rate generator hardware which + produces the heartbeatpulse consumed by the Bolero codec macros + (rx, tx, wsa, va). It is modelled as a clock provider + so consumers can reference it by name in their clocks list. + +properties: + compatible: + enum: + - qcom,hawi-lpass-va-csr + + reg: + maxItems: 1 + description: Must cover the full VA CSR block (base 0x7EE0000, size 0x= E000). + + "#clock-cells": + const: 0 + description: + Single clock output "lpass_heartbeat_pulse". Consumers reference + it by clock-name "heartbeatpulse" in their clocks list. + +required: + - compatible + - reg + - "#clock-cells" + +unevaluatedProperties: false + +examples: + - | + soc { + #address-cells =3D <2>; + #size-cells =3D <2>; + + va-csr@7ee0000 { + compatible =3D "qcom,hawi-lpass-va-csr"; + reg =3D <0x0 0x07ee0000 0x0 0xe000>; + #clock-cells =3D <0>; + }; + }; --=20 2.34.1 From nobody Sat Jul 25 15:25:03 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E3E442F546D; Thu, 16 Jul 2026 19:51:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784231496; cv=none; b=Ed+733WmuKo51lkAzu1QXbAI2+Ikzpg07OxhQfzwioAgEc1lownkVkhXHDgnzuIr0UTqiQv0540MBX2d5CUoRTaoQ2s1/B+JNnD0irxTJudLY7Zt3Va9LBeH02+Palh5fvjXggatl4BAruLByy0MhI9NqIqs8Y+1S8CYwuzYRcM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784231496; c=relaxed/simple; bh=G4bnGmOO5plEsBfAujTOmpUkEStvPYgl6gKTH4QdAro=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=ISvCIl8u6shSEobH+9CaFEzsgR6DJNRlxLSpExJQgk9bf7PSppT5zh0S+DbEgNk6VqW8erNuRINGYAC8qWjF2rS/0bp4r63MW+qQBIMynh4K1KH0TnOxnRZQFJeNR9j7OjTEaJTZtI+L35S6XfGpCIrgBjeyCcQEUTxtW+AsaAI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=OrMbzcrm; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="OrMbzcrm" Received: by smtp.kernel.org (Postfix) with ESMTPS id A4D34C2BCC7; Thu, 16 Jul 2026 19:51:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1784231495; bh=G4bnGmOO5plEsBfAujTOmpUkEStvPYgl6gKTH4QdAro=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=OrMbzcrm03GAuul9UD6cBF28DHbmPnBkxWaJioLgXIRjUy9fLYUUwdJ17X21CXIFS C/BzKTVj3Jn1+8dW88rTjis9pOfe6mYv3O9zjncQ1RmNRb1Ox1RPF3jxEGD8Bur/PG k3I2oSLqeRvjVAijiG5KIKJD8/kgA6zE6jy06Df46IT0TCzj5XXKaD7ccoDquTNqgK rOl3Y97G8bxxyTpFYV+3gp/rivhNi4XM1xAlWDvLDY+Fdx30jHhMwUNHU0duB9D43t G755pRZxG/gAznH/I8rrt2UxNlD4olBUnJUGVA+HRU7PfVBhO8l2lg+4yMAmXdQS8a 3vy17ZqVmX3fA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 89A06C44514; Thu, 16 Jul 2026 19:51:35 +0000 (UTC) From: Sarath Ganapathiraju via B4 Relay Date: Fri, 17 Jul 2026 01:21:16 +0530 Subject: [PATCH v2 2/3] ASoC: dt-bindings: qcom,lpass-va-macro: Add hawi heartbeatpulse clock Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260717-master-v2-2-ae200627ad62@oss.qualcomm.com> References: <20260717-master-v2-0-ae200627ad62@oss.qualcomm.com> In-Reply-To: <20260717-master-v2-0-ae200627ad62@oss.qualcomm.com> To: Srinivas Kandagatla , Liam Girdwood , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jaroslav Kysela , Takashi Iwai Cc: Srinivas Kandagatla , linux-sound@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, prasad.kumpatla@oss.qualcomm.com, Konrad Dybcio , Sarath Ganapathiraju X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1784231493; l=1568; i=sarath.ganapathiraju@oss.qualcomm.com; s=default; h=from:subject:message-id; bh=wmQ8OjdIV+ggh2217ROVouCyWwoJQ4NDy6vn2YVHcG0=; b=yySkd+ybybOOPR+Mp3EHCeg9BsMlxA9Lg/+eMnDvleD0k2A+Ak8sH8VWTcrKuk48lLIU1enCw lEJ1RMVlw7eAKE6m79Q6W0dH7yhvTqQLyugQGM6q05LDZg8MSL0gjZJ X-Developer-Key: i=sarath.ganapathiraju@oss.qualcomm.com; a=ed25519; pk=4p2FWGXM+F2sir13Lu5stw5aKX5trUymK/ttESvgxQg= X-Endpoint-Received: by B4 Relay for sarath.ganapathiraju@oss.qualcomm.com/default with auth_id=870 X-Original-From: Sarath Ganapathiraju Reply-To: sarath.ganapathiraju@oss.qualcomm.com From: Sarath Ganapathiraju Extend the qcom,lpass-va-macro to add the qcom,hawi-lpass-va-macro compatible, which consumes an additional heartbeatpulse clock alongside its existing mclk, macro, and dcodec clocks, for a total four-clock constraint. Signed-off-by: Sarath Ganapathiraju --- .../devicetree/bindings/sound/qcom,lpass-va-macro.yaml | 18 ++++++++++++++= ++++ 1 file changed, 18 insertions(+) diff --git a/Documentation/devicetree/bindings/sound/qcom,lpass-va-macro.ya= ml b/Documentation/devicetree/bindings/sound/qcom,lpass-va-macro.yaml index aea31fbdad..ae4df89678 100644 --- a/Documentation/devicetree/bindings/sound/qcom,lpass-va-macro.yaml +++ b/Documentation/devicetree/bindings/sound/qcom,lpass-va-macro.yaml @@ -19,6 +19,7 @@ properties: - qcom,sm8450-lpass-va-macro - qcom,sm8550-lpass-va-macro - qcom,sc8280xp-lpass-va-macro + - qcom,hawi-lpass-va-macro - items: - enum: - qcom,eliza-lpass-va-macro @@ -168,6 +169,23 @@ allOf: - const: macro - const: dcodec =20 + - if: + properties: + compatible: + contains: + const: qcom,hawi-lpass-va-macro + then: + properties: + clocks: + minItems: 4 + maxItems: 4 + clock-names: + items: + - const: mclk + - const: macro + - const: dcodec + - const: heartbeatpulse + unevaluatedProperties: false =20 examples: --=20 2.34.1 From nobody Sat Jul 25 15:25:03 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EC0D63370EA; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260717-master-v2-3-ae200627ad62@oss.qualcomm.com> References: <20260717-master-v2-0-ae200627ad62@oss.qualcomm.com> In-Reply-To: <20260717-master-v2-0-ae200627ad62@oss.qualcomm.com> To: Srinivas Kandagatla , Liam Girdwood , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jaroslav Kysela , Takashi Iwai Cc: Srinivas Kandagatla , linux-sound@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, prasad.kumpatla@oss.qualcomm.com, Konrad Dybcio , Sarath Ganapathiraju X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1784231493; l=6974; i=sarath.ganapathiraju@oss.qualcomm.com; s=default; h=from:subject:message-id; bh=DnVdQ9J5AHrIxPxYmGG+p8yZwISdgbHZpP4wxV2R65s=; b=O8dR1PjzSazMAT0yzdBZMtGqWPmkFN23wULOAFjlW9iwNWpy5YcfxbE7CANzKT24B/EQrY5MY BtKR3m4QSlBDMy9WgrK9Xg11SVUPp7uboRSikm5ylKbnTokt6i4KVVc X-Developer-Key: i=sarath.ganapathiraju@oss.qualcomm.com; a=ed25519; pk=4p2FWGXM+F2sir13Lu5stw5aKX5trUymK/ttESvgxQg= X-Endpoint-Received: by B4 Relay for sarath.ganapathiraju@oss.qualcomm.com/default with auth_id=870 X-Original-From: Sarath Ganapathiraju Reply-To: sarath.ganapathiraju@oss.qualcomm.com From: Sarath Ganapathiraju The HeartBeat Pulse (also known as RateGen Pulse) synchronizes the start of the DMAs and Codec Interfaces for the audio usecases and can serve as a periodic wakeup source for the DSP. Add the LPASS VA CSR driver that models the rate generator as a clock provider so it is enabled and disabled automatically alongside the other clocks during runtime PM resume and suspend. Signed-off-by: Sarath Ganapathiraju --- sound/soc/codecs/Kconfig | 13 ++++ sound/soc/codecs/Makefile | 2 + sound/soc/codecs/lpass-va-csr.c | 143 ++++++++++++++++++++++++++++++++++++= ++++ 3 files changed, 158 insertions(+) diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig index 76e90144ea..5dbfa77d0e 100644 --- a/sound/soc/codecs/Kconfig +++ b/sound/soc/codecs/Kconfig @@ -2902,11 +2902,24 @@ config SND_SOC_LPASS_WSA_MACRO select SND_SOC_LPASS_MACRO_COMMON tristate "Qualcomm WSA Macro in LPASS(Low Power Audio SubSystem)" =20 +config SND_SOC_LPASS_VA_CSR + depends on COMMON_CLK + select REGMAP_MMIO + tristate "Qualcomm LPASS VA CSR heartbeat pulse clock provider" + help + Qualcomm LPASS VA CSR block contains the rate generator hardware + that produces the HeartBeat Pulse (also known as RateGen Pulse). + This driver models the rate generator as a clock provider so + that consumers can enable or disable it via the common clock + framework, and it can be used to synchronize the start of DMAs + and Codec Interfaces or as a periodic wakeup source for the DSP. + config SND_SOC_LPASS_VA_MACRO depends on COMMON_CLK depends on PM_CLK select REGMAP_MMIO select SND_SOC_LPASS_MACRO_COMMON + select SND_SOC_LPASS_VA_CSR tristate "Qualcomm VA Macro in LPASS(Low Power Audio SubSystem)" =20 config SND_SOC_LPASS_RX_MACRO diff --git a/sound/soc/codecs/Makefile b/sound/soc/codecs/Makefile index aa0396e5b5..3e86c1bbf9 100644 --- a/sound/soc/codecs/Makefile +++ b/sound/soc/codecs/Makefile @@ -163,6 +163,7 @@ snd-soc-lpass-rx-macro-y :=3D lpass-rx-macro.o snd-soc-lpass-tx-macro-y :=3D lpass-tx-macro.o snd-soc-lpass-wsa-macro-y :=3D lpass-wsa-macro.o snd-soc-lpass-va-macro-y :=3D lpass-va-macro.o +snd-soc-lpass-va-csr-y :=3D lpass-va-csr.o snd-soc-madera-y :=3D madera.o snd-soc-max9759-y :=3D max9759.o snd-soc-max9768-y :=3D max9768.o @@ -886,6 +887,7 @@ obj-$(CONFIG_SND_SOC_TPA6130A2) +=3D snd-soc-tpa6130a2.o obj-$(CONFIG_SND_SOC_LPASS_MACRO_COMMON) +=3D snd-soc-lpass-macro-common.o obj-$(CONFIG_SND_SOC_LPASS_WSA_MACRO) +=3D snd-soc-lpass-wsa-macro.o obj-$(CONFIG_SND_SOC_LPASS_VA_MACRO) +=3D snd-soc-lpass-va-macro.o +obj-$(CONFIG_SND_SOC_LPASS_VA_CSR) +=3D snd-soc-lpass-va-csr.o obj-$(CONFIG_SND_SOC_LPASS_RX_MACRO) +=3D snd-soc-lpass-rx-macro.o obj-$(CONFIG_SND_SOC_LPASS_TX_MACRO) +=3D snd-soc-lpass-tx-macro.o =20 diff --git a/sound/soc/codecs/lpass-va-csr.c b/sound/soc/codecs/lpass-va-cs= r.c new file mode 100644 index 0000000000..1d0805789e --- /dev/null +++ b/sound/soc/codecs/lpass-va-csr.c @@ -0,0 +1,143 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#include +#include +#include +#include +#include +#include + +#define LPASS_RATE_GEN_CTRL 0xd000 +#define LPASS_RATE_GEN_COUNTER_0 0xd004 +#define LPASS_RATE_GEN_DELAY 0xd010 + +#define LPASS_RATE_GEN_MAX_REG LPASS_RATE_GEN_DELAY + +#define LPASS_RG_CTRL_EN BIT(0) + +struct lpass_va_csr_data { + u32 counter_0; + u32 delay; +}; + +static const struct lpass_va_csr_data hawi_csr_data =3D { + .counter_0 =3D 0x960, + .delay =3D 0x16, +}; + +static const struct regmap_config lpass_rate_gen_regmap_config =3D { + .name =3D "lpass_rate_gen", + .reg_bits =3D 32, + .val_bits =3D 32, + .reg_stride =3D 4, + .max_register =3D LPASS_RATE_GEN_MAX_REG, + .cache_type =3D REGCACHE_MAPLE, +}; + +struct lpass_va_csr { + struct regmap *regmap; + const struct lpass_va_csr_data *data; + struct clk_hw hb_hw; +}; + +#define to_lpass_va_csr(_hw) container_of(_hw, struct lpass_va_csr, hb_hw) + +static int heartbeat_pulse_prepare(struct clk_hw *hw) +{ + struct lpass_va_csr *csr =3D to_lpass_va_csr(hw); + int ret; + + ret =3D regmap_write(csr->regmap, LPASS_RATE_GEN_COUNTER_0, csr->data->co= unter_0); + if (ret) + return ret; + + ret =3D regmap_write(csr->regmap, LPASS_RATE_GEN_DELAY, csr->data->delay); + if (ret) + return ret; + + return regmap_set_bits(csr->regmap, LPASS_RATE_GEN_CTRL, LPASS_RG_CTRL_EN= ); +} + +static void heartbeat_pulse_unprepare(struct clk_hw *hw) +{ + struct lpass_va_csr *csr =3D to_lpass_va_csr(hw); + + regmap_clear_bits(csr->regmap, LPASS_RATE_GEN_CTRL, LPASS_RG_CTRL_EN); +} + +static int heartbeat_pulse_is_prepared(struct clk_hw *hw) +{ + struct lpass_va_csr *csr =3D to_lpass_va_csr(hw); + + return regmap_test_bits(csr->regmap, LPASS_RATE_GEN_CTRL, LPASS_RG_CTRL_E= N); +} + +static const struct clk_ops heartbeat_pulse_ops =3D { + .prepare =3D heartbeat_pulse_prepare, + .unprepare =3D heartbeat_pulse_unprepare, + .is_prepared =3D heartbeat_pulse_is_prepared, +}; + +static int lpass_va_csr_probe(struct platform_device *pdev) +{ + struct device *dev =3D &pdev->dev; + struct lpass_va_csr *csr; + struct clk_init_data init =3D { + .name =3D "lpass_heartbeat_pulse", + .ops =3D &heartbeat_pulse_ops, + }; + void __iomem *base; + int ret; + + csr =3D devm_kzalloc(dev, sizeof(*csr), GFP_KERNEL); + if (!csr) + return -ENOMEM; + + csr->data =3D of_device_get_match_data(dev); + if (!csr->data) + return dev_err_probe(dev, -EINVAL, "no variant data for compatible\n"); + + base =3D devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(base)) + return PTR_ERR(base); + + csr->regmap =3D devm_regmap_init_mmio(dev, base, + &lpass_rate_gen_regmap_config); + if (IS_ERR(csr->regmap)) + return dev_err_probe(dev, PTR_ERR(csr->regmap), + "failed to init regmap\n"); + + csr->hb_hw.init =3D &init; + + ret =3D devm_clk_hw_register(dev, &csr->hb_hw); + if (ret) + return dev_err_probe(dev, ret, "failed to register heartbeat clock\n"); + + ret =3D devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get, &csr->hb_h= w); + if (ret) + return dev_err_probe(dev, ret, "failed to add clock provider\n"); + + return 0; +} + +static const struct of_device_id lpass_va_csr_dt_match[] =3D { + { .compatible =3D "qcom,hawi-lpass-va-csr", .data =3D &hawi_csr_data }, + {} +}; +MODULE_DEVICE_TABLE(of, lpass_va_csr_dt_match); + +static struct platform_driver lpass_va_csr_driver =3D { + .driver =3D { + .name =3D "qcom-lpass-va-csr", + .of_match_table =3D lpass_va_csr_dt_match, + }, + .probe =3D lpass_va_csr_probe, +}; + +module_platform_driver(lpass_va_csr_driver); + +MODULE_DESCRIPTION("Qualcomm LPASS VA CSR heartbeat pulse clock provider"); +MODULE_LICENSE("GPL"); --=20 2.34.1