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Fri, 17 Jul 2026 06:20:15 -0700 (PDT) From: Luca Weiss Date: Fri, 17 Jul 2026 15:19:32 +0200 Subject: [PATCH v2 1/3] arm64: dts: qcom: kodiak: Sort pinctrl subnodes by pins Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260717-kodiak-cam-mclk-v2-1-04451f1374bd@fairphone.com> References: <20260717-kodiak-cam-mclk-v2-0-04451f1374bd@fairphone.com> In-Reply-To: <20260717-kodiak-cam-mclk-v2-0-04451f1374bd@fairphone.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Luca Weiss , Dmitry Baryshkov X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1784294383; l=31467; i=luca.weiss@fairphone.com; s=20250611; h=from:subject:message-id; bh=Lh1yjlAX8esXdYueaYWyiSDs//SfZxXLwLueck9yyAI=; b=08TAy6R/lJRlvGyubmdsZ2HGcinl4m7KF1/Vmgl25Twg6A1+yjHt4snujKYflDaiZZ1nYd0kt Gny0xEZAufsDP7f+GCGEWe0XTTuQUc51YKp6mIdxLgehCB7gM4lJ8uy X-Developer-Key: i=luca.weiss@fairphone.com; a=ed25519; pk=O1aw+AAust5lEmgrNJ1Bs7PTY0fEsJm+mdkjExA69q8= As documented in the "Devicetree Sources (DTS) Coding Style" document, pinctrl subnodes should be sorted by the pins property. Do this once for kodiak.dtsi so that future additions can be added at the right places. No functional change intended, verified with dtx_diff. Reviewed-by: Dmitry Baryshkov Signed-off-by: Luca Weiss --- arch/arm64/boot/dts/qcom/kodiak.dtsi | 1382 +++++++++++++++++-------------= ---- 1 file changed, 691 insertions(+), 691 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/kodiak.dtsi b/arch/arm64/boot/dts/qco= m/kodiak.dtsi index 7e73348fe0d0..d5fc38fc10ed 100644 --- a/arch/arm64/boot/dts/qcom/kodiak.dtsi +++ b/arch/arm64/boot/dts/qcom/kodiak.dtsi @@ -5851,6 +5851,676 @@ tlmm: pinctrl@f100000 { gpio-ranges =3D <&tlmm 0 0 175>; wakeup-parent =3D <&pdc>; =20 + qup_i2c0_data_clk: qup-i2c0-data-clk-state { + pins =3D "gpio0", "gpio1"; + function =3D "qup00"; + }; + + qup_spi0_data_clk: qup-spi0-data-clk-state { + pins =3D "gpio0", "gpio1", "gpio2"; + function =3D "qup00"; + }; + + qup_uart0_cts: qup-uart0-cts-state { + pins =3D "gpio0"; + function =3D "qup00"; + }; + + qup_uart0_rts: qup-uart0-rts-state { + pins =3D "gpio1"; + function =3D "qup00"; + }; + + qup_uart0_tx: qup-uart0-tx-state { + pins =3D "gpio2"; + function =3D "qup00"; + }; + + qup_spi0_cs: qup-spi0-cs-state { + pins =3D "gpio3"; + function =3D "qup00"; + }; + + qup_spi0_cs_gpio: qup-spi0-cs-gpio-state { + pins =3D "gpio3"; + function =3D "gpio"; + }; + + qup_uart0_rx: qup-uart0-rx-state { + pins =3D "gpio3"; + function =3D "qup00"; + }; + + qup_i2c1_data_clk: qup-i2c1-data-clk-state { + pins =3D "gpio4", "gpio5"; + function =3D "qup01"; + }; + + qup_spi1_data_clk: qup-spi1-data-clk-state { + pins =3D "gpio4", "gpio5", "gpio6"; + function =3D "qup01"; + }; + + qup_uart1_cts: qup-uart1-cts-state { + pins =3D "gpio4"; + function =3D "qup01"; + }; + + qup_uart1_rts: qup-uart1-rts-state { + pins =3D "gpio5"; + function =3D "qup01"; + }; + + qup_uart1_tx: qup-uart1-tx-state { + pins =3D "gpio6"; + function =3D "qup01"; + }; + + qup_spi1_cs: qup-spi1-cs-state { + pins =3D "gpio7"; + function =3D "qup01"; + }; + + qup_spi1_cs_gpio: qup-spi1-cs-gpio-state { + pins =3D "gpio7"; + function =3D "gpio"; + }; + + qup_uart1_rx: qup-uart1-rx-state { + pins =3D "gpio7"; + function =3D "qup01"; + }; + + qup_i2c2_data_clk: qup-i2c2-data-clk-state { + pins =3D "gpio8", "gpio9"; + function =3D "qup02"; + }; + + qup_spi2_data_clk: qup-spi2-data-clk-state { + pins =3D "gpio8", "gpio9", "gpio10"; + function =3D "qup02"; + }; + + qup_uart2_cts: qup-uart2-cts-state { + pins =3D "gpio8"; + function =3D "qup02"; + }; + + qup_uart2_rts: qup-uart2-rts-state { + pins =3D "gpio9"; + function =3D "qup02"; + }; + + qup_uart2_tx: qup-uart2-tx-state { + pins =3D "gpio10"; + function =3D "qup02"; + }; + + qup_spi2_cs: qup-spi2-cs-state { + pins =3D "gpio11"; + function =3D "qup02"; + }; + + qup_spi2_cs_gpio: qup-spi2-cs-gpio-state { + pins =3D "gpio11"; + function =3D "gpio"; + }; + + qup_uart2_rx: qup-uart2-rx-state { + pins =3D "gpio11"; + function =3D "qup02"; + }; + + qspi_data0: qspi-data0-state { + pins =3D "gpio12"; + function =3D "qspi_data"; + }; + + qup_i2c3_data_clk: qup-i2c3-data-clk-state { + pins =3D "gpio12", "gpio13"; + function =3D "qup03"; + }; + + qup_spi3_data_clk: qup-spi3-data-clk-state { + pins =3D "gpio12", "gpio13", "gpio14"; + function =3D "qup03"; + }; + + qup_uart3_cts: qup-uart3-cts-state { + pins =3D "gpio12"; + function =3D "qup03"; + }; + + qspi_data1: qspi-data1-state { + pins =3D "gpio13"; + function =3D "qspi_data"; + }; + + qup_uart3_rts: qup-uart3-rts-state { + pins =3D "gpio13"; + function =3D "qup03"; + }; + + qspi_clk: qspi-clk-state { + pins =3D "gpio14"; + function =3D "qspi_clk"; + }; + + qup_uart3_tx: qup-uart3-tx-state { + pins =3D "gpio14"; + function =3D "qup03"; + }; + + qspi_cs0: qspi-cs0-state { + pins =3D "gpio15"; + function =3D "qspi_cs"; + }; + + qup_spi3_cs: qup-spi3-cs-state { + pins =3D "gpio15"; + function =3D "qup03"; + }; + + qup_spi3_cs_gpio: qup-spi3-cs-gpio-state { + pins =3D "gpio15"; + function =3D "gpio"; + }; + + qup_uart3_rx: qup-uart3-rx-state { + pins =3D "gpio15"; + function =3D "qup03"; + }; + + qspi_data23: qspi-data23-state { + pins =3D "gpio16", "gpio17"; + function =3D "qspi_data"; + }; + + qup_i2c4_data_clk: qup-i2c4-data-clk-state { + pins =3D "gpio16", "gpio17"; + function =3D "qup04"; + }; + + qup_spi4_data_clk: qup-spi4-data-clk-state { + pins =3D "gpio16", "gpio17", "gpio18"; + function =3D "qup04"; + }; + + qup_uart4_cts: qup-uart4-cts-state { + pins =3D "gpio16"; + function =3D "qup04"; + }; + + qup_uart4_rts: qup-uart4-rts-state { + pins =3D "gpio17"; + function =3D "qup04"; + }; + + qup_uart4_tx: qup-uart4-tx-state { + pins =3D "gpio18"; + function =3D "qup04"; + }; + + qspi_cs1: qspi-cs1-state { + pins =3D "gpio19"; + function =3D "qspi_cs"; + }; + + qup_spi4_cs: qup-spi4-cs-state { + pins =3D "gpio19"; + function =3D "qup04"; + }; + + qup_spi4_cs_gpio: qup-spi4-cs-gpio-state { + pins =3D "gpio19"; + function =3D "gpio"; + }; + + qup_uart4_rx: qup-uart4-rx-state { + pins =3D "gpio19"; + function =3D "qup04"; + }; + + qup_i2c5_data_clk: qup-i2c5-data-clk-state { + pins =3D "gpio20", "gpio21"; + function =3D "qup05"; + }; + + qup_spi5_data_clk: qup-spi5-data-clk-state { + pins =3D "gpio20", "gpio21", "gpio22"; + function =3D "qup05"; + }; + + qup_uart5_tx: qup-uart5-tx-state { + pins =3D "gpio22"; + function =3D "qup05"; + }; + + qup_spi5_cs: qup-spi5-cs-state { + pins =3D "gpio23"; + function =3D "qup05"; + }; + + qup_spi5_cs_gpio: qup-spi5-cs-gpio-state { + pins =3D "gpio23"; + function =3D "gpio"; + }; + + qup_uart5_rx: qup-uart5-rx-state { + pins =3D "gpio23"; + function =3D "qup05"; + }; + + qup_i2c6_data_clk: qup-i2c6-data-clk-state { + pins =3D "gpio24", "gpio25"; + function =3D "qup06"; + }; + + qup_spi6_data_clk: qup-spi6-data-clk-state { + pins =3D "gpio24", "gpio25", "gpio26"; + function =3D "qup06"; + }; + + qup_uart6_cts: qup-uart6-cts-state { + pins =3D "gpio24"; + function =3D "qup06"; + }; + + qup_uart6_rts: qup-uart6-rts-state { + pins =3D "gpio25"; + function =3D "qup06"; + }; + + qup_uart6_tx: qup-uart6-tx-state { + pins =3D "gpio26"; + function =3D "qup06"; + }; + + qup_spi6_cs: qup-spi6-cs-state { + pins =3D "gpio27"; + function =3D "qup06"; + }; + + qup_spi6_cs_gpio: qup-spi6-cs-gpio-state { + pins =3D "gpio27"; + function =3D "gpio"; + }; + + qup_uart6_rx: qup-uart6-rx-state { + pins =3D "gpio27"; + function =3D "qup06"; + }; + + qup_i2c7_data_clk: qup-i2c7-data-clk-state { + pins =3D "gpio28", "gpio29"; + function =3D "qup07"; + }; + + qup_spi7_data_clk: qup-spi7-data-clk-state { + pins =3D "gpio28", "gpio29", "gpio30"; + function =3D "qup07"; + }; + + qup_uart7_cts: qup-uart7-cts-state { + pins =3D "gpio28"; + function =3D "qup07"; + }; + + qup_uart7_rts: qup-uart7-rts-state { + pins =3D "gpio29"; + function =3D "qup07"; + }; + + qup_uart7_tx: qup-uart7-tx-state { + pins =3D "gpio30"; + function =3D "qup07"; + }; + + qup_spi7_cs: qup-spi7-cs-state { + pins =3D "gpio31"; + function =3D "qup07"; + }; + + qup_spi7_cs_gpio: qup-spi7-cs-gpio-state { + pins =3D "gpio31"; + function =3D "gpio"; + }; + + qup_uart7_rx: qup-uart7-rx-state { + pins =3D "gpio31"; + function =3D "qup07"; + }; + + qup_i2c8_data_clk: qup-i2c8-data-clk-state { + pins =3D "gpio32", "gpio33"; + function =3D "qup10"; + }; + + qup_spi8_data_clk: qup-spi8-data-clk-state { + pins =3D "gpio32", "gpio33", "gpio34"; + function =3D "qup10"; + }; + + qup_uart8_cts: qup-uart8-cts-state { + pins =3D "gpio32"; + function =3D "qup10"; + }; + + qup_uart8_rts: qup-uart8-rts-state { + pins =3D "gpio33"; + function =3D "qup10"; + }; + + qup_uart8_tx: qup-uart8-tx-state { + pins =3D "gpio34"; + function =3D "qup10"; + }; + + qup_spi8_cs: qup-spi8-cs-state { + pins =3D "gpio35"; + function =3D "qup10"; + }; + + qup_spi8_cs_gpio: qup-spi8-cs-gpio-state { + pins =3D "gpio35"; + function =3D "gpio"; + }; + + qup_uart8_rx: qup-uart8-rx-state { + pins =3D "gpio35"; + function =3D "qup10"; + }; + + qup_i2c9_data_clk: qup-i2c9-data-clk-state { + pins =3D "gpio36", "gpio37"; + function =3D "qup11"; + }; + + qup_spi9_data_clk: qup-spi9-data-clk-state { + pins =3D "gpio36", "gpio37", "gpio38"; + function =3D "qup11"; + }; + + qup_uart9_cts: qup-uart9-cts-state { + pins =3D "gpio36"; + function =3D "qup11"; + }; + + qup_uart9_rts: qup-uart9-rts-state { + pins =3D "gpio37"; + function =3D "qup11"; + }; + + qup_uart9_tx: qup-uart9-tx-state { + pins =3D "gpio38"; + function =3D "qup11"; + }; + + qup_spi9_cs: qup-spi9-cs-state { + pins =3D "gpio39"; + function =3D "qup11"; + }; + + qup_spi9_cs_gpio: qup-spi9-cs-gpio-state { + pins =3D "gpio39"; + function =3D "gpio"; + }; + + qup_uart9_rx: qup-uart9-rx-state { + pins =3D "gpio39"; + function =3D "qup11"; + }; + + qup_i2c10_data_clk: qup-i2c10-data-clk-state { + pins =3D "gpio40", "gpio41"; + function =3D "qup12"; + }; + + qup_spi10_data_clk: qup-spi10-data-clk-state { + pins =3D "gpio40", "gpio41", "gpio42"; + function =3D "qup12"; + }; + + qup_uart10_cts: qup-uart10-cts-state { + pins =3D "gpio40"; + function =3D "qup12"; + }; + + qup_uart10_rts: qup-uart10-rts-state { + pins =3D "gpio41"; + function =3D "qup12"; + }; + + qup_uart10_tx: qup-uart10-tx-state { + pins =3D "gpio42"; + function =3D "qup12"; + }; + + qup_spi10_cs: qup-spi10-cs-state { + pins =3D "gpio43"; + function =3D "qup12"; + }; + + qup_spi10_cs_gpio: qup-spi10-cs-gpio-state { + pins =3D "gpio43"; + function =3D "gpio"; + }; + + qup_uart10_rx: qup-uart10-rx-state { + pins =3D "gpio43"; + function =3D "qup12"; + }; + + qup_i2c11_data_clk: qup-i2c11-data-clk-state { + pins =3D "gpio44", "gpio45"; + function =3D "qup13"; + }; + + qup_spi11_data_clk: qup-spi11-data-clk-state { + pins =3D "gpio44", "gpio45", "gpio46"; + function =3D "qup13"; + }; + + qup_uart11_cts: qup-uart11-cts-state { + pins =3D "gpio44"; + function =3D "qup13"; + }; + + qup_uart11_rts: qup-uart11-rts-state { + pins =3D "gpio45"; + function =3D "qup13"; + }; + + qup_uart11_tx: qup-uart11-tx-state { + pins =3D "gpio46"; + function =3D "qup13"; + }; + + dp_hot_plug_det: dp-hot-plug-det-state { + pins =3D "gpio47"; + function =3D "dp_hot"; + }; + + qup_spi11_cs: qup-spi11-cs-state { + pins =3D "gpio47"; + function =3D "qup13"; + }; + + qup_spi11_cs_gpio: qup-spi11-cs-gpio-state { + pins =3D "gpio47"; + function =3D "gpio"; + }; + + qup_uart11_rx: qup-uart11-rx-state { + pins =3D "gpio47"; + function =3D "qup13"; + }; + + qup_i2c12_data_clk: qup-i2c12-data-clk-state { + pins =3D "gpio48", "gpio49"; + function =3D "qup14"; + }; + + qup_spi12_data_clk: qup-spi12-data-clk-state { + pins =3D "gpio48", "gpio49", "gpio50"; + function =3D "qup14"; + }; + + qup_uart12_cts: qup-uart12-cts-state { + pins =3D "gpio48"; + function =3D "qup14"; + }; + + qup_uart12_rts: qup-uart12-rts-state { + pins =3D "gpio49"; + function =3D "qup14"; + }; + + qup_uart12_tx: qup-uart12-tx-state { + pins =3D "gpio50"; + function =3D "qup14"; + }; + + qup_spi12_cs: qup-spi12-cs-state { + pins =3D "gpio51"; + function =3D "qup14"; + }; + + qup_spi12_cs_gpio: qup-spi12-cs-gpio-state { + pins =3D "gpio51"; + function =3D "gpio"; + }; + + qup_uart12_rx: qup-uart12-rx-state { + pins =3D "gpio51"; + function =3D "qup14"; + }; + + qup_i2c13_data_clk: qup-i2c13-data-clk-state { + pins =3D "gpio52", "gpio53"; + function =3D "qup15"; + }; + + qup_spi13_data_clk: qup-spi13-data-clk-state { + pins =3D "gpio52", "gpio53", "gpio54"; + function =3D "qup15"; + }; + + qup_uart13_cts: qup-uart13-cts-state { + pins =3D "gpio52"; + function =3D "qup15"; + }; + + qup_uart13_rts: qup-uart13-rts-state { + pins =3D "gpio53"; + function =3D "qup15"; + }; + + qup_uart13_tx: qup-uart13-tx-state { + pins =3D "gpio54"; + function =3D "qup15"; + }; + + qup_spi13_cs: qup-spi13-cs-state { + pins =3D "gpio55"; + function =3D "qup15"; + }; + + qup_spi13_cs_gpio: qup-spi13-cs-gpio-state { + pins =3D "gpio55"; + function =3D "gpio"; + }; + + qup_uart13_rx: qup-uart13-rx-state { + pins =3D "gpio55"; + function =3D "qup15"; + }; + + qup_i2c14_data_clk: qup-i2c14-data-clk-state { + pins =3D "gpio56", "gpio57"; + function =3D "qup16"; + }; + + qup_spi14_data_clk: qup-spi14-data-clk-state { + pins =3D "gpio56", "gpio57", "gpio58"; + function =3D "qup16"; + }; + + qup_uart14_cts: qup-uart14-cts-state { + pins =3D "gpio56"; + function =3D "qup16"; + }; + + qup_uart14_rts: qup-uart14-rts-state { + pins =3D "gpio57"; + function =3D "qup16"; + }; + + qup_uart14_tx: qup-uart14-tx-state { + pins =3D "gpio58"; + function =3D "qup16"; + }; + + qup_spi14_cs: qup-spi14-cs-state { + pins =3D "gpio59"; + function =3D "qup16"; + }; + + qup_spi14_cs_gpio: qup-spi14-cs-gpio-state { + pins =3D "gpio59"; + function =3D "gpio"; + }; + + qup_uart14_rx: qup-uart14-rx-state { + pins =3D "gpio59"; + function =3D "qup16"; + }; + + edp_hot_plug_det: edp-hot-plug-det-state { + pins =3D "gpio60"; + function =3D "edp_hot"; + }; + + qup_i2c15_data_clk: qup-i2c15-data-clk-state { + pins =3D "gpio60", "gpio61"; + function =3D "qup17"; + }; + + qup_spi15_data_clk: qup-spi15-data-clk-state { + pins =3D "gpio60", "gpio61", "gpio62"; + function =3D "qup17"; + }; + + qup_uart15_cts: qup-uart15-cts-state { + pins =3D "gpio60"; + function =3D "qup17"; + }; + + qup_uart15_rts: qup-uart15-rts-state { + pins =3D "gpio61"; + function =3D "qup17"; + }; + + qup_uart15_tx: qup-uart15-tx-state { + pins =3D "gpio62"; + function =3D "qup17"; + }; + + qup_spi15_cs: qup-spi15-cs-state { + pins =3D "gpio63"; + function =3D "qup17"; + }; + + qup_spi15_cs_gpio: qup-spi15-cs-gpio-state { + pins =3D "gpio63"; + function =3D "gpio"; + }; + + qup_uart15_rx: qup-uart15-rx-state { + pins =3D "gpio63"; + function =3D "qup17"; + }; + cam_mclk3_default: cam-mclk3-default-state { pins =3D "gpio67"; function =3D "cam_mclk"; @@ -5914,24 +6584,14 @@ cci3_sleep: cci3-sleep-state { bias-pull-down; }; =20 - dp_hot_plug_det: dp-hot-plug-det-state { - pins =3D "gpio47"; - function =3D "dp_hot"; + pcie1_clkreq_n: pcie1-clkreq-n-state { + pins =3D "gpio79"; + function =3D "pcie1_clkreqn"; }; =20 - edp_hot_plug_det: edp-hot-plug-det-state { - pins =3D "gpio60"; - function =3D "edp_hot"; - }; - - mi2s0_data0: mi2s0-data0-state { - pins =3D "gpio98"; - function =3D "mi2s0_data0"; - }; - - mi2s0_data1: mi2s0-data1-state { - pins =3D "gpio99"; - function =3D "mi2s0_data1"; + pcie0_clkreq_n: pcie0-clkreq-n-state { + pins =3D "gpio88"; + function =3D "pcie0_clkreqn"; }; =20 mi2s0_mclk: mi2s0-mclk-state { @@ -5944,696 +6604,36 @@ mi2s0_sclk: mi2s0-sclk-state { function =3D "mi2s0_sck"; }; =20 + mi2s0_data0: mi2s0-data0-state { + pins =3D "gpio98"; + function =3D "mi2s0_data0"; + }; + + mi2s0_data1: mi2s0-data1-state { + pins =3D "gpio99"; + function =3D "mi2s0_data1"; + }; + mi2s0_ws: mi2s0-ws-state { pins =3D "gpio100"; function =3D "mi2s0_ws"; }; =20 - mi2s1_data0: mi2s1-data0-state { - pins =3D "gpio107"; - function =3D "mi2s1_data0"; - }; - mi2s1_sclk: mi2s1-sclk-state { pins =3D "gpio106"; function =3D "mi2s1_sck"; }; =20 + mi2s1_data0: mi2s1-data0-state { + pins =3D "gpio107"; + function =3D "mi2s1_data0"; + }; + mi2s1_ws: mi2s1-ws-state { pins =3D "gpio108"; function =3D "mi2s1_ws"; }; =20 - pcie0_clkreq_n: pcie0-clkreq-n-state { - pins =3D "gpio88"; - function =3D "pcie0_clkreqn"; - }; - - pcie1_clkreq_n: pcie1-clkreq-n-state { - pins =3D "gpio79"; - function =3D "pcie1_clkreqn"; - }; - - qspi_clk: qspi-clk-state { - pins =3D "gpio14"; - function =3D "qspi_clk"; - }; - - qspi_cs0: qspi-cs0-state { - pins =3D "gpio15"; - function =3D "qspi_cs"; - }; - - qspi_cs1: qspi-cs1-state { - pins =3D "gpio19"; - function =3D "qspi_cs"; - }; - - qspi_data0: qspi-data0-state { - pins =3D "gpio12"; - function =3D "qspi_data"; - }; - - qspi_data1: qspi-data1-state { - pins =3D "gpio13"; - function =3D "qspi_data"; - }; - - qspi_data23: qspi-data23-state { - pins =3D "gpio16", "gpio17"; - function =3D "qspi_data"; - }; - - qup_i2c0_data_clk: qup-i2c0-data-clk-state { - pins =3D "gpio0", "gpio1"; - function =3D "qup00"; - }; - - qup_i2c1_data_clk: qup-i2c1-data-clk-state { - pins =3D "gpio4", "gpio5"; - function =3D "qup01"; - }; - - qup_i2c2_data_clk: qup-i2c2-data-clk-state { - pins =3D "gpio8", "gpio9"; - function =3D "qup02"; - }; - - qup_i2c3_data_clk: qup-i2c3-data-clk-state { - pins =3D "gpio12", "gpio13"; - function =3D "qup03"; - }; - - qup_i2c4_data_clk: qup-i2c4-data-clk-state { - pins =3D "gpio16", "gpio17"; - function =3D "qup04"; - }; - - qup_i2c5_data_clk: qup-i2c5-data-clk-state { - pins =3D "gpio20", "gpio21"; - function =3D "qup05"; - }; - - qup_i2c6_data_clk: qup-i2c6-data-clk-state { - pins =3D "gpio24", "gpio25"; - function =3D "qup06"; - }; - - qup_i2c7_data_clk: qup-i2c7-data-clk-state { - pins =3D "gpio28", "gpio29"; - function =3D "qup07"; - }; - - qup_i2c8_data_clk: qup-i2c8-data-clk-state { - pins =3D "gpio32", "gpio33"; - function =3D "qup10"; - }; - - qup_i2c9_data_clk: qup-i2c9-data-clk-state { - pins =3D "gpio36", "gpio37"; - function =3D "qup11"; - }; - - qup_i2c10_data_clk: qup-i2c10-data-clk-state { - pins =3D "gpio40", "gpio41"; - function =3D "qup12"; - }; - - qup_i2c11_data_clk: qup-i2c11-data-clk-state { - pins =3D "gpio44", "gpio45"; - function =3D "qup13"; - }; - - qup_i2c12_data_clk: qup-i2c12-data-clk-state { - pins =3D "gpio48", "gpio49"; - function =3D "qup14"; - }; - - qup_i2c13_data_clk: qup-i2c13-data-clk-state { - pins =3D "gpio52", "gpio53"; - function =3D "qup15"; - }; - - qup_i2c14_data_clk: qup-i2c14-data-clk-state { - pins =3D "gpio56", "gpio57"; - function =3D "qup16"; - }; - - qup_i2c15_data_clk: qup-i2c15-data-clk-state { - pins =3D "gpio60", "gpio61"; - function =3D "qup17"; - }; - - qup_spi0_data_clk: qup-spi0-data-clk-state { - pins =3D "gpio0", "gpio1", "gpio2"; - function =3D "qup00"; - }; - - qup_spi0_cs: qup-spi0-cs-state { - pins =3D "gpio3"; - function =3D "qup00"; - }; - - qup_spi0_cs_gpio: qup-spi0-cs-gpio-state { - pins =3D "gpio3"; - function =3D "gpio"; - }; - - qup_spi1_data_clk: qup-spi1-data-clk-state { - pins =3D "gpio4", "gpio5", "gpio6"; - function =3D "qup01"; - }; - - qup_spi1_cs: qup-spi1-cs-state { - pins =3D "gpio7"; - function =3D "qup01"; - }; - - qup_spi1_cs_gpio: qup-spi1-cs-gpio-state { - pins =3D "gpio7"; - function =3D "gpio"; - }; - - qup_spi2_data_clk: qup-spi2-data-clk-state { - pins =3D "gpio8", "gpio9", "gpio10"; - function =3D "qup02"; - }; - - qup_spi2_cs: qup-spi2-cs-state { - pins =3D "gpio11"; - function =3D "qup02"; - }; - - qup_spi2_cs_gpio: qup-spi2-cs-gpio-state { - pins =3D "gpio11"; - function =3D "gpio"; - }; - - qup_spi3_data_clk: qup-spi3-data-clk-state { - pins =3D "gpio12", "gpio13", "gpio14"; - function =3D "qup03"; - }; - - qup_spi3_cs: qup-spi3-cs-state { - pins =3D "gpio15"; - function =3D "qup03"; - }; - - qup_spi3_cs_gpio: qup-spi3-cs-gpio-state { - pins =3D "gpio15"; - function =3D "gpio"; - }; - - qup_spi4_data_clk: qup-spi4-data-clk-state { - pins =3D "gpio16", "gpio17", "gpio18"; - function =3D "qup04"; - }; - - qup_spi4_cs: qup-spi4-cs-state { - pins =3D "gpio19"; - function =3D "qup04"; - }; - - qup_spi4_cs_gpio: qup-spi4-cs-gpio-state { - pins =3D "gpio19"; - function =3D "gpio"; - }; - - qup_spi5_data_clk: qup-spi5-data-clk-state { - pins =3D "gpio20", "gpio21", "gpio22"; - function =3D "qup05"; - }; - - qup_spi5_cs: qup-spi5-cs-state { - pins =3D "gpio23"; - function =3D "qup05"; - }; - - qup_spi5_cs_gpio: qup-spi5-cs-gpio-state { - pins =3D "gpio23"; - function =3D "gpio"; - }; - - qup_spi6_data_clk: qup-spi6-data-clk-state { - pins =3D "gpio24", "gpio25", "gpio26"; - function =3D "qup06"; - }; - - qup_spi6_cs: qup-spi6-cs-state { - pins =3D "gpio27"; - function =3D "qup06"; - }; - - qup_spi6_cs_gpio: qup-spi6-cs-gpio-state { - pins =3D "gpio27"; - function =3D "gpio"; - }; - - qup_spi7_data_clk: qup-spi7-data-clk-state { - pins =3D "gpio28", "gpio29", "gpio30"; - function =3D "qup07"; - }; - - qup_spi7_cs: qup-spi7-cs-state { - pins =3D "gpio31"; - function =3D "qup07"; - }; - - qup_spi7_cs_gpio: qup-spi7-cs-gpio-state { - pins =3D "gpio31"; - function =3D "gpio"; - }; - - qup_spi8_data_clk: qup-spi8-data-clk-state { - pins =3D "gpio32", "gpio33", "gpio34"; - function =3D "qup10"; - }; - - qup_spi8_cs: qup-spi8-cs-state { - pins =3D "gpio35"; - function =3D "qup10"; - }; - - qup_spi8_cs_gpio: qup-spi8-cs-gpio-state { - pins =3D "gpio35"; - function =3D "gpio"; - }; - - qup_spi9_data_clk: qup-spi9-data-clk-state { - pins =3D "gpio36", "gpio37", "gpio38"; - function =3D "qup11"; - }; - - qup_spi9_cs: qup-spi9-cs-state { - pins =3D "gpio39"; - function =3D "qup11"; - }; - - qup_spi9_cs_gpio: qup-spi9-cs-gpio-state { - pins =3D "gpio39"; - function =3D "gpio"; - }; - - qup_spi10_data_clk: qup-spi10-data-clk-state { - pins =3D "gpio40", "gpio41", "gpio42"; - function =3D "qup12"; - }; - - qup_spi10_cs: qup-spi10-cs-state { - pins =3D "gpio43"; - function =3D "qup12"; - }; - - qup_spi10_cs_gpio: qup-spi10-cs-gpio-state { - pins =3D "gpio43"; - function =3D "gpio"; - }; - - qup_spi11_data_clk: qup-spi11-data-clk-state { - pins =3D "gpio44", "gpio45", "gpio46"; - function =3D "qup13"; - }; - - qup_spi11_cs: qup-spi11-cs-state { - pins =3D "gpio47"; - function =3D "qup13"; - }; - - qup_spi11_cs_gpio: qup-spi11-cs-gpio-state { - pins =3D "gpio47"; - function =3D "gpio"; - }; - - qup_spi12_data_clk: qup-spi12-data-clk-state { - pins =3D "gpio48", "gpio49", "gpio50"; - function =3D "qup14"; - }; - - qup_spi12_cs: qup-spi12-cs-state { - pins =3D "gpio51"; - function =3D "qup14"; - }; - - qup_spi12_cs_gpio: qup-spi12-cs-gpio-state { - pins =3D "gpio51"; - function =3D "gpio"; - }; - - qup_spi13_data_clk: qup-spi13-data-clk-state { - pins =3D "gpio52", "gpio53", "gpio54"; - function =3D "qup15"; - }; - - qup_spi13_cs: qup-spi13-cs-state { - pins =3D "gpio55"; - function =3D "qup15"; - }; - - qup_spi13_cs_gpio: qup-spi13-cs-gpio-state { - pins =3D "gpio55"; - function =3D "gpio"; - }; - - qup_spi14_data_clk: qup-spi14-data-clk-state { - pins =3D "gpio56", "gpio57", "gpio58"; - function =3D "qup16"; - }; - - qup_spi14_cs: qup-spi14-cs-state { - pins =3D "gpio59"; - function =3D "qup16"; - }; - - qup_spi14_cs_gpio: qup-spi14-cs-gpio-state { - pins =3D "gpio59"; - function =3D "gpio"; - }; - - qup_spi15_data_clk: qup-spi15-data-clk-state { - pins =3D "gpio60", "gpio61", "gpio62"; - function =3D "qup17"; - }; - - qup_spi15_cs: qup-spi15-cs-state { - pins =3D "gpio63"; - function =3D "qup17"; - }; - - qup_spi15_cs_gpio: qup-spi15-cs-gpio-state { - pins =3D "gpio63"; - function =3D "gpio"; - }; - - qup_uart0_cts: qup-uart0-cts-state { - pins =3D "gpio0"; - function =3D "qup00"; - }; - - qup_uart0_rts: qup-uart0-rts-state { - pins =3D "gpio1"; - function =3D "qup00"; - }; - - qup_uart0_tx: qup-uart0-tx-state { - pins =3D "gpio2"; - function =3D "qup00"; - }; - - qup_uart0_rx: qup-uart0-rx-state { - pins =3D "gpio3"; - function =3D "qup00"; - }; - - qup_uart1_cts: qup-uart1-cts-state { - pins =3D "gpio4"; - function =3D "qup01"; - }; - - qup_uart1_rts: qup-uart1-rts-state { - pins =3D "gpio5"; - function =3D "qup01"; - }; - - qup_uart1_tx: qup-uart1-tx-state { - pins =3D "gpio6"; - function =3D "qup01"; - }; - - qup_uart1_rx: qup-uart1-rx-state { - pins =3D "gpio7"; - function =3D "qup01"; - }; - - qup_uart2_cts: qup-uart2-cts-state { - pins =3D "gpio8"; - function =3D "qup02"; - }; - - qup_uart2_rts: qup-uart2-rts-state { - pins =3D "gpio9"; - function =3D "qup02"; - }; - - qup_uart2_tx: qup-uart2-tx-state { - pins =3D "gpio10"; - function =3D "qup02"; - }; - - qup_uart2_rx: qup-uart2-rx-state { - pins =3D "gpio11"; - function =3D "qup02"; - }; - - qup_uart3_cts: qup-uart3-cts-state { - pins =3D "gpio12"; - function =3D "qup03"; - }; - - qup_uart3_rts: qup-uart3-rts-state { - pins =3D "gpio13"; - function =3D "qup03"; - }; - - qup_uart3_tx: qup-uart3-tx-state { - pins =3D "gpio14"; - function =3D "qup03"; - }; - - qup_uart3_rx: qup-uart3-rx-state { - pins =3D "gpio15"; - function =3D "qup03"; - }; - - qup_uart4_cts: qup-uart4-cts-state { - pins =3D "gpio16"; - function =3D "qup04"; - }; - - qup_uart4_rts: qup-uart4-rts-state { - pins =3D "gpio17"; - function =3D "qup04"; - }; - - qup_uart4_tx: qup-uart4-tx-state { - pins =3D "gpio18"; - function =3D "qup04"; - }; - - qup_uart4_rx: qup-uart4-rx-state { - pins =3D "gpio19"; - function =3D "qup04"; - }; - - qup_uart5_tx: qup-uart5-tx-state { - pins =3D "gpio22"; - function =3D "qup05"; - }; - - qup_uart5_rx: qup-uart5-rx-state { - pins =3D "gpio23"; - function =3D "qup05"; - }; - - qup_uart6_cts: qup-uart6-cts-state { - pins =3D "gpio24"; - function =3D "qup06"; - }; - - qup_uart6_rts: qup-uart6-rts-state { - pins =3D "gpio25"; - function =3D "qup06"; - }; - - qup_uart6_tx: qup-uart6-tx-state { - pins =3D "gpio26"; - function =3D "qup06"; - }; - - qup_uart6_rx: qup-uart6-rx-state { - pins =3D "gpio27"; - function =3D "qup06"; - }; - - qup_uart7_cts: qup-uart7-cts-state { - pins =3D "gpio28"; - function =3D "qup07"; - }; - - qup_uart7_rts: qup-uart7-rts-state { - pins =3D "gpio29"; - function =3D "qup07"; - }; - - qup_uart7_tx: qup-uart7-tx-state { - pins =3D "gpio30"; - function =3D "qup07"; - }; - - qup_uart7_rx: qup-uart7-rx-state { - pins =3D "gpio31"; - function =3D "qup07"; - }; - - qup_uart8_cts: qup-uart8-cts-state { - pins =3D "gpio32"; - function =3D "qup10"; - }; - - qup_uart8_rts: qup-uart8-rts-state { - pins =3D "gpio33"; - function =3D "qup10"; - }; - - qup_uart8_tx: qup-uart8-tx-state { - pins =3D "gpio34"; - function =3D "qup10"; - }; - - qup_uart8_rx: qup-uart8-rx-state { - pins =3D "gpio35"; - function =3D "qup10"; - }; - - qup_uart9_cts: qup-uart9-cts-state { - pins =3D "gpio36"; - function =3D "qup11"; - }; - - qup_uart9_rts: qup-uart9-rts-state { - pins =3D "gpio37"; - function =3D "qup11"; - }; - - qup_uart9_tx: qup-uart9-tx-state { - pins =3D "gpio38"; - function =3D "qup11"; - }; - - qup_uart9_rx: qup-uart9-rx-state { - pins =3D "gpio39"; - function =3D "qup11"; - }; - - qup_uart10_cts: qup-uart10-cts-state { - pins =3D "gpio40"; - function =3D "qup12"; - }; - - qup_uart10_rts: qup-uart10-rts-state { - pins =3D "gpio41"; - function =3D "qup12"; - }; - - qup_uart10_tx: qup-uart10-tx-state { - pins =3D "gpio42"; - function =3D "qup12"; - }; - - qup_uart10_rx: qup-uart10-rx-state { - pins =3D "gpio43"; - function =3D "qup12"; - }; - - qup_uart11_cts: qup-uart11-cts-state { - pins =3D "gpio44"; - function =3D "qup13"; - }; - - qup_uart11_rts: qup-uart11-rts-state { - pins =3D "gpio45"; - function =3D "qup13"; - }; - - qup_uart11_tx: qup-uart11-tx-state { - pins =3D "gpio46"; - function =3D "qup13"; - }; - - qup_uart11_rx: qup-uart11-rx-state { - pins =3D "gpio47"; - function =3D "qup13"; - }; - - qup_uart12_cts: qup-uart12-cts-state { - pins =3D "gpio48"; - function =3D "qup14"; - }; - - qup_uart12_rts: qup-uart12-rts-state { - pins =3D "gpio49"; - function =3D "qup14"; - }; - - qup_uart12_tx: qup-uart12-tx-state { - pins =3D "gpio50"; - function =3D "qup14"; - }; - - qup_uart12_rx: qup-uart12-rx-state { - pins =3D "gpio51"; - function =3D "qup14"; - }; - - qup_uart13_cts: qup-uart13-cts-state { - pins =3D "gpio52"; - function =3D "qup15"; - }; - - qup_uart13_rts: qup-uart13-rts-state { - pins =3D "gpio53"; - function =3D "qup15"; - }; - - qup_uart13_tx: qup-uart13-tx-state { - pins =3D "gpio54"; - function =3D "qup15"; - }; - - qup_uart13_rx: qup-uart13-rx-state { - pins =3D "gpio55"; - function =3D "qup15"; - }; - - qup_uart14_cts: qup-uart14-cts-state { - pins =3D "gpio56"; - function =3D "qup16"; - }; - - qup_uart14_rts: qup-uart14-rts-state { - pins =3D "gpio57"; - function =3D "qup16"; - }; - - qup_uart14_tx: qup-uart14-tx-state { - pins =3D "gpio58"; - function =3D "qup16"; - }; - - qup_uart14_rx: qup-uart14-rx-state { - pins =3D "gpio59"; - function =3D "qup16"; - }; - - qup_uart15_cts: qup-uart15-cts-state { - pins =3D "gpio60"; - function =3D "qup17"; - }; - - qup_uart15_rts: qup-uart15-rts-state { - pins =3D "gpio61"; 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Fri, 17 Jul 2026 06:20:17 -0700 (PDT) Received: from [172.18.170.139] ([185.104.138.147]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4954ba2abd0sm28220295e9.15.2026.07.17.06.20.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 Jul 2026 06:20:16 -0700 (PDT) From: Luca Weiss Date: Fri, 17 Jul 2026 15:19:33 +0200 Subject: [PATCH v2 2/3] arm64: dts: qcom: kodiak: Add camera mclk pinctrl definitions Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260717-kodiak-cam-mclk-v2-2-04451f1374bd@fairphone.com> References: <20260717-kodiak-cam-mclk-v2-0-04451f1374bd@fairphone.com> In-Reply-To: <20260717-kodiak-cam-mclk-v2-0-04451f1374bd@fairphone.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Luca Weiss , Konrad Dybcio , Vladimir Zapolskiy X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1784294383; l=2083; i=luca.weiss@fairphone.com; s=20250611; h=from:subject:message-id; bh=MjO6W5A/ltxThJlXkQzLygLqnAy6JNPNXtynrMtwLvA=; b=DSoOCC3WuHY30B0RIdsNbSAtF7tvRPttoam9maR6JfzoDwOPxy7JTSUp/wteGfeCJ8yis312K lvEq+2jgcsqDyEyZSm1iZqQd0rCYOoLdyL+a67yrsw/hGBOQX6+fSug X-Developer-Key: i=luca.weiss@fairphone.com; a=ed25519; pk=O1aw+AAust5lEmgrNJ1Bs7PTY0fEsJm+mdkjExA69q8= On different boards the cameras are connected to different pins with the cam_mclk function. Add the definitions so that mclk0-5 are covered. Reviewed-by: Konrad Dybcio Reviewed-by: Vladimir Zapolskiy Signed-off-by: Luca Weiss --- arch/arm64/boot/dts/qcom/kodiak.dtsi | 35 ++++++++++++++++++++++++++++++++= +++ 1 file changed, 35 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/kodiak.dtsi b/arch/arm64/boot/dts/qco= m/kodiak.dtsi index d5fc38fc10ed..13f1c205c07e 100644 --- a/arch/arm64/boot/dts/qcom/kodiak.dtsi +++ b/arch/arm64/boot/dts/qcom/kodiak.dtsi @@ -6521,6 +6521,27 @@ qup_uart15_rx: qup-uart15-rx-state { function =3D "qup17"; }; =20 + cam_mclk0_default: cam-mclk0-default-state { + pins =3D "gpio64"; + function =3D "cam_mclk"; + drive-strength =3D <2>; + bias-disable; + }; + + cam_mclk1_default: cam-mclk1-default-state { + pins =3D "gpio65"; + function =3D "cam_mclk"; + drive-strength =3D <2>; + bias-disable; + }; + + cam_mclk2_default: cam-mclk2-default-state { + pins =3D "gpio66"; + function =3D "cam_mclk"; + drive-strength =3D <2>; + bias-disable; + }; + cam_mclk3_default: cam-mclk3-default-state { pins =3D "gpio67"; function =3D "cam_mclk"; @@ -6528,6 +6549,13 @@ cam_mclk3_default: cam-mclk3-default-state { bias-disable; }; =20 + cam_mclk4_default: cam-mclk4-default-state { + pins =3D "gpio68"; + function =3D "cam_mclk"; + drive-strength =3D <2>; + bias-disable; + }; + cci0_default: cci0-default-state { pins =3D "gpio69", "gpio70"; function =3D "cci_i2c"; @@ -6594,6 +6622,13 @@ pcie0_clkreq_n: pcie0-clkreq-n-state { function =3D "pcie0_clkreqn"; }; =20 + cam_mclk5_default: cam-mclk5-default-state { + pins =3D "gpio93"; + function =3D "cam_mclk"; + drive-strength =3D <2>; + bias-disable; + }; + mi2s0_mclk: mi2s0-mclk-state { pins =3D "gpio96"; function =3D "pri_mi2s"; --=20 2.55.0 From nobody Sat Jul 25 05:28:11 2026 Received: from mail-wr1-f52.google.com (mail-wr1-f52.google.com [209.85.221.52]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 076F63FD140 for ; Fri, 17 Jul 2026 13:20:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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Fri, 17 Jul 2026 06:20:30 -0700 (PDT) Received: from [172.18.170.139] ([185.104.138.147]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4954ba2abd0sm28220295e9.15.2026.07.17.06.20.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 Jul 2026 06:20:30 -0700 (PDT) From: Luca Weiss Date: Fri, 17 Jul 2026 15:19:34 +0200 Subject: [PATCH v2 3/3] arm64: dts: qcom: qcs6490-rb3gen2-vision-mezzanine: Use common pinctrl Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260717-kodiak-cam-mclk-v2-3-04451f1374bd@fairphone.com> References: <20260717-kodiak-cam-mclk-v2-0-04451f1374bd@fairphone.com> In-Reply-To: <20260717-kodiak-cam-mclk-v2-0-04451f1374bd@fairphone.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Luca Weiss X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1784294383; l=1451; i=luca.weiss@fairphone.com; s=20250611; h=from:subject:message-id; bh=4tg7Tw9YFwtuTaNFXfaHJYmypQcA98LC9ovUCSBOML8=; b=jn/P0MbHPLHJEwkXoOznJmDcj62GIY+xc3oyTXDgT6bxcM6l0FG4aHB4MlI4ZJHIuVm01DwUG UricQafvBmjDhgy2FIMwjTYFK54nEngYu9Pm3CFo6fsT1tqQfMTaNZG X-Developer-Key: i=luca.weiss@fairphone.com; a=ed25519; pk=O1aw+AAust5lEmgrNJ1Bs7PTY0fEsJm+mdkjExA69q8= Since there's already a define for gpio67 (mclk3) in kodiak.dtsi, use that instead of defining an extra pinctrl state. Also rename the suspend state to match naming. No functional change intended. Signed-off-by: Luca Weiss --- .../boot/dts/qcom/qcs6490-rb3gen2-vision-mezzanine.dtso | 13 +++------= ---- 1 file changed, 3 insertions(+), 10 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2-vision-mezzanine.dtso= b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2-vision-mezzanine.dtso index b9e4a5214f70..aceafea45343 100644 --- a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2-vision-mezzanine.dtso +++ b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2-vision-mezzanine.dtso @@ -51,8 +51,8 @@ camera@1a { =20 reset-gpios =3D <&tlmm 78 GPIO_ACTIVE_LOW>; pinctrl-names =3D "default", "suspend"; - pinctrl-0 =3D <&cam2_default>; - pinctrl-1 =3D <&cam2_suspend>; + pinctrl-0 =3D <&cam_mclk3_default>; + pinctrl-1 =3D <&cam_mclk3_suspend>; =20 clocks =3D <&camcc CAM_CC_MCLK3_CLK>; assigned-clocks =3D <&camcc CAM_CC_MCLK3_CLK>; @@ -73,14 +73,7 @@ imx577_ep: endpoint { }; =20 &tlmm { - cam2_default: cam2-default-state { - pins =3D "gpio67"; - function =3D "cam_mclk"; - drive-strength =3D <2>; - bias-disable; - }; - - cam2_suspend: cam2-suspend-state { + cam_mclk3_suspend: cam-mclk3-suspend-state { pins =3D "gpio67"; function =3D "cam_mclk"; drive-strength =3D <2>; --=20 2.55.0