From nobody Sat Jul 25 06:11:12 2026 Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4964E331A66; Fri, 17 Jul 2026 05:12:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=92.121.34.21 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784265130; cv=none; b=VxnFxHok8va2NYPR6O+P8S/vy2GauI2xUNUh3c5HT0AKsYbKHvpUNP3eEffUyZIv151rajNCpBuQk7UasMDDu/sMCdoWKPK96HDrpNu3NcK3CeZeUlB7uUIdkqGgdo0twwhEmmRVjt/kq4pbin/oIedn4tzoXQMuoP9rNojbmOg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784265130; c=relaxed/simple; bh=TI5UsdfuhZ22fPeZntTrTTwBUNDfK4iqi0MCp4CfgoE=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=qNT+zVte1d0mO6gBaijBNVUW7ZqHq9RG/1HLZrlr7RJqkzNUHDGc4+DXgbpyoRaXo2WayN5DADAXytCPefHUNGOgzl0HzFQp/9hFCxHRAEwjBfd47kL1v6lchx6M4BIcqMcgJphr2o2IH0PMddPLv6mEfq0ZevHuTsdtQYKttgU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=nxp.com; spf=pass smtp.mailfrom=nxp.com; arc=none smtp.client-ip=92.121.34.21 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=nxp.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=nxp.com Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 8BE0F200164; Fri, 17 Jul 2026 07:11:58 +0200 (CEST) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 01EA720018A; Fri, 17 Jul 2026 07:11:58 +0200 (CEST) Received: from lsvm11u0000395.swis.ap-northeast-2.aws.nxp.com (lsvm11u0000395.swis.ap-northeast-2.aws.nxp.com [10.52.9.99]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id 0C0931800226; Fri, 17 Jul 2026 13:11:55 +0800 (+08) From: Joseph Guo Date: Fri, 17 Jul 2026 14:11:52 +0900 Subject: [PATCH 1/3] arm64: dts: imx93-11x11-frdm: factor out common parts into dtsi Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260717-imx93w_frdm-v1-1-0cca6c0ba2f5@nxp.com> References: <20260717-imx93w_frdm-v1-0-0cca6c0ba2f5@nxp.com> In-Reply-To: <20260717-imx93w_frdm-v1-0-0cca6c0ba2f5@nxp.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Shawn Guo Cc: devicetree@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Joseph Guo X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1784265114; l=39395; i=qijian.guo@nxp.com; s=20250519; h=from:subject:message-id; bh=TI5UsdfuhZ22fPeZntTrTTwBUNDfK4iqi0MCp4CfgoE=; b=QbSs/HBNlz27CiwnscZIkwihUmXRcefeHDoHTel/MKah69CtPTKtw0b5D7aB7+QW11hZGLdUM KDlcog8ppZZAPeNFGneyGNfqi5ziku0yxuNo8OMkdHk0l/7vh49/TOk X-Developer-Key: i=qijian.guo@nxp.com; a=ed25519; pk=VRjOOFhVecTRwBzK4mt/k3JBnHoYfuXKCm9FM+hHQhs= X-Virus-Scanned: ClamAV using ClamSMTP The i.MX93 Wireless FRDM board reuses most of the i.MX93 FRDM board. To avoid duplication and DTS-to-DTS includes, extract common hardware definitions from imx93-11x11-frdm.dts into imx93-11x11-frdm-common.dtsi to allow the common description shared by both boards. The FRDM-IMX93 board-specific .dts now includes the common dtsi and only contains board-specific overrides. Signed-off-by: Joseph Guo --- .../dts/freescale/imx93-11x11-frdm-common.dtsi | 692 +++++++++++++++++= ++++ arch/arm64/boot/dts/freescale/imx93-11x11-frdm.dts | 686 +----------------= --- 2 files changed, 694 insertions(+), 684 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx93-11x11-frdm-common.dtsi b/a= rch/arm64/boot/dts/freescale/imx93-11x11-frdm-common.dtsi new file mode 100644 index 0000000000000000000000000000000000000000..69e23570f71f40a3f3517d31e16= a9ca1d3dfb1f2 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx93-11x11-frdm-common.dtsi @@ -0,0 +1,692 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +#include + +/ { + + aliases { + can0 =3D &flexcan2; + ethernet0 =3D &fec; + ethernet1 =3D &eqos; + i2c0 =3D &lpi2c1; + i2c1 =3D &lpi2c2; + i2c2 =3D &lpi2c3; + mmc0 =3D &usdhc1; /* EMMC */ + mmc1 =3D &usdhc2; /* uSD */ + rtc0 =3D &pcf2131; + serial0 =3D &lpuart1; + serial4 =3D &lpuart5; + }; + + chosen { + stdout-path =3D &lpuart1; + }; + + flexcan2_phy: can-phy { + compatible =3D "nxp,tja1051"; + #phy-cells =3D <0>; + max-bitrate =3D <5000000>; + silent-gpios =3D <&pcal6524 23 GPIO_ACTIVE_HIGH>; + }; + + gpio-keys { + compatible =3D "gpio-keys"; + + button-k2 { + label =3D "Button K2"; + linux,code =3D ; + gpios =3D <&pcal6524 5 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; + interrupt-parent =3D <&pcal6524>; + interrupts =3D <5 IRQ_TYPE_EDGE_FALLING>; + }; + + button-k3 { + label =3D "Button K3"; + linux,code =3D ; + gpios =3D <&pcal6524 6 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; + interrupt-parent =3D <&pcal6524>; + interrupts =3D <6 IRQ_TYPE_EDGE_FALLING>; + }; + }; + + reg_usdhc2_vmmc: regulator-usdhc2 { + compatible =3D "regulator-fixed"; + off-on-delay-us =3D <12000>; + pinctrl-0 =3D <&pinctrl_reg_usdhc2_vmmc>; + pinctrl-names =3D "default"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + regulator-name =3D "VSD_3V3"; + vin-supply =3D <&buck4>; + gpio =3D <&gpio3 7 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + reserved-memory { + ranges; + #address-cells =3D <2>; + #size-cells =3D <2>; + + linux,cma { + compatible =3D "shared-dma-pool"; + alloc-ranges =3D <0 0x80000000 0 0x30000000>; + reusable; + size =3D <0 0x10000000>; + linux,cma-default; + }; + + rsc_table: rsc-table@2021e000 { + reg =3D <0 0x2021e000 0 0x1000>; + no-map; + }; + + vdev0vring0: vdev0vring0@a4000000 { + reg =3D <0 0xa4000000 0 0x8000>; + no-map; + }; + + vdev0vring1: vdev0vring1@a4008000 { + reg =3D <0 0xa4008000 0 0x8000>; + no-map; + }; + + vdev1vring0: vdev1vring0@a4010000 { + reg =3D <0 0xa4010000 0 0x8000>; + no-map; + }; + + vdev1vring1: vdev1vring1@a4018000 { + reg =3D <0 0xa4018000 0 0x8000>; + no-map; + }; + + vdevbuffer: vdevbuffer@a4020000 { + compatible =3D "shared-dma-pool"; + reg =3D <0 0xa4020000 0 0x100000>; + no-map; + }; + }; +}; + +&adc1 { + vref-supply =3D <&buck5>; + status =3D "okay"; +}; + +&mu1 { + status =3D "okay"; +}; + +&cm33 { + mboxes =3D <&mu1 0 1>, + <&mu1 1 1>, + <&mu1 3 1>; + mbox-names =3D "tx", "rx", "rxdb"; + memory-region =3D <&vdevbuffer>, <&vdev0vring0>, <&vdev0vring1>, + <&vdev1vring0>, <&vdev1vring1>, <&rsc_table>; + status =3D "okay"; +}; + +&eqos { + pinctrl-names =3D "default", "sleep"; + pinctrl-0 =3D <&pinctrl_eqos>; + pinctrl-1 =3D <&pinctrl_eqos_sleep>; + phy-handle =3D <ðphy1>; + phy-mode =3D "rgmii-id"; + status =3D "okay"; + + mdio { + compatible =3D "snps,dwmac-mdio"; + #address-cells =3D <1>; + #size-cells =3D <0>; + clock-frequency =3D <5000000>; + + ethphy1: ethernet-phy@1 { + reg =3D <1>; + reset-assert-us =3D <10000>; + reset-deassert-us =3D <80000>; + reset-gpios =3D <&pcal6524 15 GPIO_ACTIVE_LOW>; + realtek,clkout-disable; + }; + }; +}; + +&fec { + pinctrl-names =3D "default", "sleep"; + pinctrl-0 =3D <&pinctrl_fec>; + pinctrl-1 =3D <&pinctrl_fec_sleep>; + phy-mode =3D "rgmii-id"; + phy-handle =3D <ðphy2>; + fsl,magic-packet; + status =3D "okay"; + + mdio { + #address-cells =3D <1>; + #size-cells =3D <0>; + clock-frequency =3D <5000000>; + + ethphy2: ethernet-phy@2 { + reg =3D <2>; + reset-assert-us =3D <10000>; + reset-deassert-us =3D <80000>; + reset-gpios =3D <&pcal6524 16 GPIO_ACTIVE_LOW>; + realtek,clkout-disable; + }; + }; +}; + +&flexcan2 { + phys =3D <&flexcan2_phy>; + pinctrl-0 =3D <&pinctrl_flexcan2>; + pinctrl-1 =3D <&pinctrl_flexcan2_sleep>; + pinctrl-names =3D "default", "sleep"; + status =3D "okay"; +}; + +&lpi2c1 { + clock-frequency =3D <400000>; + pinctrl-0 =3D <&pinctrl_lpi2c1>; + pinctrl-names =3D "default"; + status =3D "okay"; + + pcal6408: gpio@20 { + compatible =3D "nxp,pcal6408"; + reg =3D <0x20>; + #gpio-cells =3D <2>; + gpio-controller; + reset-gpios =3D <&pcal6524 20 GPIO_ACTIVE_LOW>; + }; +}; + +&lpi2c2 { + clock-frequency =3D <400000>; + pinctrl-0 =3D <&pinctrl_lpi2c2>; + pinctrl-names =3D "default"; + status =3D "okay"; + + pcal6524: gpio@22 { + compatible =3D "nxp,pcal6524"; + reg =3D <0x22>; + #interrupt-cells =3D <2>; + interrupt-controller; + interrupt-parent =3D <&gpio3>; + interrupts =3D <27 IRQ_TYPE_LEVEL_LOW>; + #gpio-cells =3D <2>; + gpio-controller; + pinctrl-0 =3D <&pinctrl_pcal6524>; + pinctrl-names =3D "default"; + /* does not boot with supplier set, because it is the bucks interrupt pa= rent */ + /* vcc-supply =3D <&buck4>; */ + }; + + pmic@25 { + compatible =3D "nxp,pca9451a"; + reg =3D <0x25>; + interrupt-parent =3D <&pcal6524>; + interrupts =3D <11 IRQ_TYPE_EDGE_FALLING>; + + regulators { + + buck1: BUCK1 { + regulator-name =3D "VDD_SOC_0V8"; + regulator-min-microvolt =3D <610000>; + regulator-max-microvolt =3D <950000>; + regulator-always-on; + regulator-boot-on; + regulator-ramp-delay =3D <3125>; + }; + + buck2: BUCK2 { + regulator-name =3D "LPD4_x_VDDQ_0V6"; + regulator-min-microvolt =3D <600000>; + regulator-max-microvolt =3D <670000>; + regulator-always-on; + regulator-boot-on; + regulator-ramp-delay =3D <3125>; + }; + + buck4: BUCK4 { + regulator-name =3D "VDD_3V3"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + regulator-always-on; + regulator-boot-on; + }; + + buck5: BUCK5 { + regulator-name =3D "VDD_1V8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-always-on; + regulator-boot-on; + }; + + buck6: BUCK6 { + regulator-name =3D "LPD4_x_VDD2_1V1"; + regulator-min-microvolt =3D <1060000>; + regulator-max-microvolt =3D <1140000>; + regulator-always-on; + regulator-boot-on; + }; + + ldo1: LDO1 { + regulator-name =3D "NVCC_BBSM_1V8"; + regulator-min-microvolt =3D <1620000>; + regulator-max-microvolt =3D <1980000>; + regulator-always-on; + regulator-boot-on; + }; + + ldo4: LDO4 { + regulator-name =3D "VDD_ANA_0V8"; + regulator-min-microvolt =3D <800000>; + regulator-max-microvolt =3D <840000>; + regulator-always-on; + regulator-boot-on; + }; + + ldo5: LDO5 { + regulator-name =3D "NVCC_SD"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <3300000>; + regulator-always-on; + regulator-boot-on; + }; + }; + }; + + eeprom: eeprom@50 { + compatible =3D "atmel,24c256"; + reg =3D <0x50>; + pagesize =3D <64>; + vcc-supply =3D <&buck4>; + }; +}; + +&lpi2c3 { + clock-frequency =3D <400000>; + pinctrl-0 =3D <&pinctrl_lpi2c3>; + pinctrl-names =3D "default"; + status =3D "okay"; + + ptn5110: tcpc@50 { + compatible =3D "nxp,ptn5110", "tcpci"; + reg =3D <0x50>; + interrupt-parent =3D <&gpio3>; + interrupts =3D <27 IRQ_TYPE_LEVEL_LOW>; + + typec1_con: connector { + compatible =3D "usb-c-connector"; + data-role =3D "dual"; + label =3D "USB-C"; + op-sink-microwatt =3D <15000000>; + power-role =3D "dual"; + self-powered; + sink-pdos =3D ; + source-pdos =3D ; + try-power-role =3D "sink"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + + typec1_dr_sw: endpoint { + remote-endpoint =3D <&usb1_drd_sw>; + }; + }; + }; + }; + }; + + pcf2131: rtc@53 { + compatible =3D "nxp,pcf2131"; + reg =3D <0x53>; + interrupt-parent =3D <&pcal6524>; + interrupts =3D <1 IRQ_TYPE_EDGE_FALLING>; + }; +}; + +&lpuart1 { /* console */ + pinctrl-0 =3D <&pinctrl_uart1>; + pinctrl-names =3D "default"; + status =3D "okay"; +}; + +&lpuart5 { + pinctrl-0 =3D <&pinctrl_uart5>; + pinctrl-names =3D "default"; + status =3D "okay"; + + uart-has-rtscts; + + bluetooth { + compatible =3D "nxp,88w8987-bt"; + device-wakeup-gpios =3D <&pcal6408 3 GPIO_ACTIVE_HIGH>; + reset-gpios =3D <&pcal6524 19 GPIO_ACTIVE_LOW>; + vcc-supply =3D <®_usdhc3_vmmc>; + }; +}; + +&usbotg1 { + adp-disable; + disable-over-current; + dr_mode =3D "otg"; + hnp-disable; + srp-disable; + usb-role-switch; + samsung,picophy-dc-vol-level-adjust =3D <7>; + samsung,picophy-pre-emp-curr-control =3D <3>; + status =3D "okay"; + + port { + usb1_drd_sw: endpoint { + remote-endpoint =3D <&typec1_dr_sw>; + }; + }; +}; + +&usbotg2 { + disable-over-current; + dr_mode =3D "host"; + samsung,picophy-dc-vol-level-adjust =3D <7>; + samsung,picophy-pre-emp-curr-control =3D <3>; + status =3D "okay"; +}; + +&usdhc1 { + bus-width =3D <8>; + non-removable; + pinctrl-0 =3D <&pinctrl_usdhc1>; + pinctrl-1 =3D <&pinctrl_usdhc1_100mhz>; + pinctrl-2 =3D <&pinctrl_usdhc1_200mhz>; + pinctrl-names =3D "default", "state_100mhz", "state_200mhz"; + vmmc-supply =3D <&buck4>; + status =3D "okay"; +}; + +&usdhc2 { + bus-width =3D <4>; + cd-gpios =3D <&gpio3 00 GPIO_ACTIVE_LOW>; + no-mmc; + no-sdio; + pinctrl-0 =3D <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; + pinctrl-1 =3D <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>; + pinctrl-2 =3D <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>; + pinctrl-3 =3D <&pinctrl_usdhc2_sleep>, <&pinctrl_usdhc2_gpio_sleep>; + pinctrl-names =3D "default", "state_100mhz", "state_200mhz", "sleep"; + vmmc-supply =3D <®_usdhc2_vmmc>; + status =3D "okay"; +}; + +&wdog3 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_wdog>; + fsl,ext-reset-output; + status =3D "okay"; +}; + +&iomuxc { + + pinctrl_eqos: eqosgrp { + fsl,pins =3D < + MX93_PAD_ENET1_MDC__ENET_QOS_MDC 0x57e + MX93_PAD_ENET1_MDIO__ENET_QOS_MDIO 0x57e + MX93_PAD_ENET1_RD0__ENET_QOS_RGMII_RD0 0x57e + MX93_PAD_ENET1_RD1__ENET_QOS_RGMII_RD1 0x57e + MX93_PAD_ENET1_RD2__ENET_QOS_RGMII_RD2 0x57e + MX93_PAD_ENET1_RD3__ENET_QOS_RGMII_RD3 0x57e + MX93_PAD_ENET1_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK 0x58e + MX93_PAD_ENET1_RX_CTL__ENET_QOS_RGMII_RX_CTL 0x57e + MX93_PAD_ENET1_TD0__ENET_QOS_RGMII_TD0 0x57e + MX93_PAD_ENET1_TD1__ENET_QOS_RGMII_TD1 0x57e + MX93_PAD_ENET1_TD2__ENET_QOS_RGMII_TD2 0x57e + MX93_PAD_ENET1_TD3__ENET_QOS_RGMII_TD3 0x57e + MX93_PAD_ENET1_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK 0x58e + MX93_PAD_ENET1_TX_CTL__ENET_QOS_RGMII_TX_CTL 0x57e + >; + }; + + pinctrl_eqos_sleep: eqossleepgrp { + fsl,pins =3D < + MX93_PAD_ENET1_MDC__GPIO4_IO00 0x31e + MX93_PAD_ENET1_MDIO__GPIO4_IO01 0x31e + MX93_PAD_ENET1_RD0__GPIO4_IO10 0x31e + MX93_PAD_ENET1_RD1__GPIO4_IO11 0x31e + MX93_PAD_ENET1_RD2__GPIO4_IO12 0x31e + MX93_PAD_ENET1_RD3__GPIO4_IO13 0x31e + MX93_PAD_ENET1_RXC__GPIO4_IO09 0x31e + MX93_PAD_ENET1_RX_CTL__GPIO4_IO08 0x31e + MX93_PAD_ENET1_TD0__GPIO4_IO05 0x31e + MX93_PAD_ENET1_TD1__GPIO4_IO04 0x31e + MX93_PAD_ENET1_TD2__GPIO4_IO03 0x31e + MX93_PAD_ENET1_TD3__GPIO4_IO02 0x31e + MX93_PAD_ENET1_TXC__GPIO4_IO07 0x31e + MX93_PAD_ENET1_TX_CTL__GPIO4_IO06 0x31e + >; + }; + + pinctrl_fec: fecgrp { + fsl,pins =3D < + MX93_PAD_ENET2_MDC__ENET1_MDC 0x57e + MX93_PAD_ENET2_MDIO__ENET1_MDIO 0x57e + MX93_PAD_ENET2_RD0__ENET1_RGMII_RD0 0x57e + MX93_PAD_ENET2_RD1__ENET1_RGMII_RD1 0x57e + MX93_PAD_ENET2_RD2__ENET1_RGMII_RD2 0x57e + MX93_PAD_ENET2_RD3__ENET1_RGMII_RD3 0x57e + MX93_PAD_ENET2_RXC__ENET1_RGMII_RXC 0x58e + MX93_PAD_ENET2_RX_CTL__ENET1_RGMII_RX_CTL 0x57e + MX93_PAD_ENET2_TD0__ENET1_RGMII_TD0 0x57e + MX93_PAD_ENET2_TD1__ENET1_RGMII_TD1 0x57e + MX93_PAD_ENET2_TD2__ENET1_RGMII_TD2 0x57e + MX93_PAD_ENET2_TD3__ENET1_RGMII_TD3 0x57e + MX93_PAD_ENET2_TXC__ENET1_RGMII_TXC 0x58e + MX93_PAD_ENET2_TX_CTL__ENET1_RGMII_TX_CTL 0x57e + >; + }; + + pinctrl_fec_sleep: fecsleepgrp { + fsl,pins =3D < + MX93_PAD_ENET2_MDC__GPIO4_IO14 0x51e + MX93_PAD_ENET2_MDIO__GPIO4_IO15 0x51e + MX93_PAD_ENET2_RD0__GPIO4_IO24 0x51e + MX93_PAD_ENET2_RD1__GPIO4_IO25 0x51e + MX93_PAD_ENET2_RD2__GPIO4_IO26 0x51e + MX93_PAD_ENET2_RD3__GPIO4_IO27 0x51e + MX93_PAD_ENET2_RXC__GPIO4_IO23 0x51e + MX93_PAD_ENET2_RX_CTL__GPIO4_IO22 0x51e + MX93_PAD_ENET2_TD0__GPIO4_IO19 0x51e + MX93_PAD_ENET2_TD1__GPIO4_IO18 0x51e + MX93_PAD_ENET2_TD2__GPIO4_IO17 0x51e + MX93_PAD_ENET2_TD3__GPIO4_IO16 0x51e + MX93_PAD_ENET2_TXC__GPIO4_IO21 0x51e + MX93_PAD_ENET2_TX_CTL__GPIO4_IO20 0x51e + >; + }; + + pinctrl_flexcan2: flexcan2grp { + fsl,pins =3D < + MX93_PAD_GPIO_IO25__CAN2_TX 0x139e + MX93_PAD_GPIO_IO27__CAN2_RX 0x139e + >; + }; + + pinctrl_flexcan2_sleep: flexcan2sleepgrp { + fsl,pins =3D < + MX93_PAD_GPIO_IO25__GPIO2_IO25 0x31e + MX93_PAD_GPIO_IO27__GPIO2_IO27 0x31e + >; + }; + + pinctrl_lpi2c1: lpi2c1grp { + fsl,pins =3D < + MX93_PAD_I2C1_SCL__LPI2C1_SCL 0x40000b9e + MX93_PAD_I2C1_SDA__LPI2C1_SDA 0x40000b9e + >; + }; + + pinctrl_lpi2c2: lpi2c2grp { + fsl,pins =3D < + MX93_PAD_I2C2_SCL__LPI2C2_SCL 0x40000b9e + MX93_PAD_I2C2_SDA__LPI2C2_SDA 0x40000b9e + >; + }; + + pinctrl_lpi2c3: lpi2c3grp { + fsl,pins =3D < + MX93_PAD_GPIO_IO28__LPI2C3_SDA 0x40000b9e + MX93_PAD_GPIO_IO29__LPI2C3_SCL 0x40000b9e + >; + }; + + pinctrl_pcal6524: pcal6524grp { + fsl,pins =3D < + MX93_PAD_CCM_CLKO2__GPIO3_IO27 0x31e + >; + }; + + pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp { + fsl,pins =3D < + MX93_PAD_SD2_RESET_B__GPIO3_IO07 0x31e + >; + }; + + pinctrl_uart1: uart1grp { + fsl,pins =3D < + MX93_PAD_UART1_RXD__LPUART1_RX 0x31e + MX93_PAD_UART1_TXD__LPUART1_TX 0x31e + >; + }; + + pinctrl_uart5: uart5grp { + fsl,pins =3D < + MX93_PAD_DAP_TDO_TRACESWO__LPUART5_TX 0x31e + MX93_PAD_DAP_TDI__LPUART5_RX 0x31e + MX93_PAD_DAP_TMS_SWDIO__LPUART5_RTS_B 0x31e + MX93_PAD_DAP_TCLK_SWCLK__LPUART5_CTS_B 0x31e + >; + }; + + /* need to config the SION for data and cmd pad, refer to ERR052021 */ + pinctrl_usdhc1: usdhc1grp { + fsl,pins =3D < + MX93_PAD_SD1_CLK__USDHC1_CLK 0x1582 + MX93_PAD_SD1_CMD__USDHC1_CMD 0x40001382 + MX93_PAD_SD1_DATA0__USDHC1_DATA0 0x40001382 + MX93_PAD_SD1_DATA1__USDHC1_DATA1 0x40001382 + MX93_PAD_SD1_DATA2__USDHC1_DATA2 0x40001382 + MX93_PAD_SD1_DATA3__USDHC1_DATA3 0x40001382 + MX93_PAD_SD1_DATA4__USDHC1_DATA4 0x40001382 + MX93_PAD_SD1_DATA5__USDHC1_DATA5 0x40001382 + MX93_PAD_SD1_DATA6__USDHC1_DATA6 0x40001382 + MX93_PAD_SD1_DATA7__USDHC1_DATA7 0x40001382 + MX93_PAD_SD1_STROBE__USDHC1_STROBE 0x1582 + >; + }; + + /* need to config the SION for data and cmd pad, refer to ERR052021 */ + pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp { + fsl,pins =3D < + MX93_PAD_SD1_CLK__USDHC1_CLK 0x158e + MX93_PAD_SD1_CMD__USDHC1_CMD 0x4000138e + MX93_PAD_SD1_DATA0__USDHC1_DATA0 0x4000138e + MX93_PAD_SD1_DATA1__USDHC1_DATA1 0x4000138e + MX93_PAD_SD1_DATA2__USDHC1_DATA2 0x4000138e + MX93_PAD_SD1_DATA3__USDHC1_DATA3 0x4000138e + MX93_PAD_SD1_DATA4__USDHC1_DATA4 0x4000138e + MX93_PAD_SD1_DATA5__USDHC1_DATA5 0x4000138e + MX93_PAD_SD1_DATA6__USDHC1_DATA6 0x4000138e + MX93_PAD_SD1_DATA7__USDHC1_DATA7 0x4000138e + MX93_PAD_SD1_STROBE__USDHC1_STROBE 0x158e + >; + }; + + /* need to config the SION for data and cmd pad, refer to ERR052021 */ + pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp { + fsl,pins =3D < + MX93_PAD_SD1_CLK__USDHC1_CLK 0x15fe + MX93_PAD_SD1_CMD__USDHC1_CMD 0x400013fe + MX93_PAD_SD1_DATA0__USDHC1_DATA0 0x400013fe + MX93_PAD_SD1_DATA1__USDHC1_DATA1 0x400013fe + MX93_PAD_SD1_DATA2__USDHC1_DATA2 0x400013fe + MX93_PAD_SD1_DATA3__USDHC1_DATA3 0x400013fe + MX93_PAD_SD1_DATA4__USDHC1_DATA4 0x400013fe + MX93_PAD_SD1_DATA5__USDHC1_DATA5 0x400013fe + MX93_PAD_SD1_DATA6__USDHC1_DATA6 0x400013fe + MX93_PAD_SD1_DATA7__USDHC1_DATA7 0x400013fe + MX93_PAD_SD1_STROBE__USDHC1_STROBE 0x15fe + >; + }; + + pinctrl_usdhc2_gpio: usdhc2gpiogrp { + fsl,pins =3D < + MX93_PAD_SD2_CD_B__GPIO3_IO00 0x31e + >; + }; + + pinctrl_usdhc2_gpio_sleep: usdhc2gpiosleepgrp { + fsl,pins =3D < + MX93_PAD_SD2_CD_B__GPIO3_IO00 0x51e + >; + }; + + /* need to config the SION for data and cmd pad, refer to ERR052021 */ + pinctrl_usdhc2: usdhc2grp { + fsl,pins =3D < + MX93_PAD_SD2_CLK__USDHC2_CLK 0x1582 + MX93_PAD_SD2_CMD__USDHC2_CMD 0x40001382 + MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x40001382 + MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x40001382 + MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x40001382 + MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x40001382 + MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e + >; + }; + + /* need to config the SION for data and cmd pad, refer to ERR052021 */ + pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp { + fsl,pins =3D < + MX93_PAD_SD2_CLK__USDHC2_CLK 0x158e + MX93_PAD_SD2_CMD__USDHC2_CMD 0x4000138e + MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x4000138e + MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x4000138e + MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x4000138e + MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x4000138e + MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e + >; + }; + + /* need to config the SION for data and cmd pad, refer to ERR052021 */ + pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp { + fsl,pins =3D < + MX93_PAD_SD2_CLK__USDHC2_CLK 0x15fe + MX93_PAD_SD2_CMD__USDHC2_CMD 0x400013fe + MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x400013fe + MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x400013fe + MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x400013fe + MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x400013fe + MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e + >; + }; + + pinctrl_usdhc2_sleep: usdhc2-sleepgrp { + fsl,pins =3D < + MX93_PAD_SD2_CLK__GPIO3_IO01 0x51e + MX93_PAD_SD2_CMD__GPIO3_IO02 0x51e + MX93_PAD_SD2_DATA0__GPIO3_IO03 0x51e + MX93_PAD_SD2_DATA1__GPIO3_IO04 0x51e + MX93_PAD_SD2_DATA2__GPIO3_IO05 0x51e + MX93_PAD_SD2_DATA3__GPIO3_IO06 0x51e + MX93_PAD_SD2_VSELECT__GPIO3_IO19 0x51e + >; + }; + + pinctrl_wdog: wdoggrp { + fsl,pins =3D < + MX93_PAD_WDOG_ANY__WDOG1_WDOG_ANY 0x31e + >; + }; +}; diff --git a/arch/arm64/boot/dts/freescale/imx93-11x11-frdm.dts b/arch/arm6= 4/boot/dts/freescale/imx93-11x11-frdm.dts index bd14ba28690c081817111aaabef12fb56a7c56a4..f2a31a0eacabff07532aee989ee= bd75a0c3e22e0 100644 --- a/arch/arm64/boot/dts/freescale/imx93-11x11-frdm.dts +++ b/arch/arm64/boot/dts/freescale/imx93-11x11-frdm.dts @@ -1,71 +1,14 @@ // SPDX-License-Identifier: (GPL-2.0+ OR MIT) + /dts-v1/; =20 -#include #include "imx93.dtsi" +#include "imx93-11x11-frdm-common.dtsi" =20 / { compatible =3D "fsl,imx93-11x11-frdm", "fsl,imx93"; model =3D "NXP i.MX93 11X11 FRDM board"; =20 - aliases { - can0 =3D &flexcan2; - ethernet0 =3D &fec; - ethernet1 =3D &eqos; - i2c0 =3D &lpi2c1; - i2c1 =3D &lpi2c2; - i2c2 =3D &lpi2c3; - mmc0 =3D &usdhc1; /* EMMC */ - mmc1 =3D &usdhc2; /* uSD */ - rtc0 =3D &pcf2131; - serial0 =3D &lpuart1; - serial4 =3D &lpuart5; - }; - - chosen { - stdout-path =3D &lpuart1; - }; - - flexcan2_phy: can-phy { - compatible =3D "nxp,tja1051"; - #phy-cells =3D <0>; - max-bitrate =3D <5000000>; - silent-gpios =3D <&pcal6524 23 GPIO_ACTIVE_HIGH>; - }; - - gpio-keys { - compatible =3D "gpio-keys"; - - button-k2 { - label =3D "Button K2"; - linux,code =3D ; - gpios =3D <&pcal6524 5 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; - interrupt-parent =3D <&pcal6524>; - interrupts =3D <5 IRQ_TYPE_EDGE_FALLING>; - }; - - button-k3 { - label =3D "Button K3"; - linux,code =3D ; - gpios =3D <&pcal6524 6 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; - interrupt-parent =3D <&pcal6524>; - interrupts =3D <6 IRQ_TYPE_EDGE_FALLING>; - }; - }; - - reg_usdhc2_vmmc: regulator-usdhc2 { - compatible =3D "regulator-fixed"; - off-on-delay-us =3D <12000>; - pinctrl-0 =3D <&pinctrl_reg_usdhc2_vmmc>; - pinctrl-names =3D "default"; - regulator-min-microvolt =3D <3300000>; - regulator-max-microvolt =3D <3300000>; - regulator-name =3D "VSD_3V3"; - vin-supply =3D <&buck4>; - gpio =3D <&gpio3 7 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; - reg_usdhc3_vmmc: regulator-usdhc3 { compatible =3D "regulator-fixed"; regulator-name =3D "VPCIe_3V3"; @@ -76,51 +19,6 @@ reg_usdhc3_vmmc: regulator-usdhc3 { enable-active-high; }; =20 - reserved-memory { - ranges; - #address-cells =3D <2>; - #size-cells =3D <2>; - - linux,cma { - compatible =3D "shared-dma-pool"; - alloc-ranges =3D <0 0x80000000 0 0x30000000>; - reusable; - size =3D <0 0x10000000>; - linux,cma-default; - }; - - rsc_table: rsc-table@2021e000 { - reg =3D <0 0x2021e000 0 0x1000>; - no-map; - }; - - vdev0vring0: vdev0vring0@a4000000 { - reg =3D <0 0xa4000000 0 0x8000>; - no-map; - }; - - vdev0vring1: vdev0vring1@a4008000 { - reg =3D <0 0xa4008000 0 0x8000>; - no-map; - }; - - vdev1vring0: vdev1vring0@a4010000 { - reg =3D <0 0xa4010000 0 0x8000>; - no-map; - }; - - vdev1vring1: vdev1vring1@a4018000 { - reg =3D <0 0xa4018000 0 0x8000>; - no-map; - }; - - vdevbuffer: vdevbuffer@a4020000 { - compatible =3D "shared-dma-pool"; - reg =3D <0 0xa4020000 0 0x100000>; - no-map; - }; - }; - sound-mqs { compatible =3D "fsl,imx-audio-mqs"; model =3D "mqs-audio"; @@ -134,269 +32,6 @@ usdhc3_pwrseq: mmc-pwrseq { }; }; =20 -&adc1 { - vref-supply =3D <&buck5>; - status =3D "okay"; -}; - -&mu1 { - status =3D "okay"; -}; - -&cm33 { - mboxes =3D <&mu1 0 1>, - <&mu1 1 1>, - <&mu1 3 1>; - mbox-names =3D "tx", "rx", "rxdb"; - memory-region =3D <&vdevbuffer>, <&vdev0vring0>, <&vdev0vring1>, - <&vdev1vring0>, <&vdev1vring1>, <&rsc_table>; - status =3D "okay"; -}; - -&eqos { - pinctrl-names =3D "default", "sleep"; - pinctrl-0 =3D <&pinctrl_eqos>; - pinctrl-1 =3D <&pinctrl_eqos_sleep>; - phy-handle =3D <ðphy1>; - phy-mode =3D "rgmii-id"; - status =3D "okay"; - - mdio { - compatible =3D "snps,dwmac-mdio"; - #address-cells =3D <1>; - #size-cells =3D <0>; - clock-frequency =3D <5000000>; - - ethphy1: ethernet-phy@1 { - reg =3D <1>; - reset-assert-us =3D <10000>; - reset-deassert-us =3D <80000>; - reset-gpios =3D <&pcal6524 15 GPIO_ACTIVE_LOW>; - realtek,clkout-disable; - }; - }; -}; - -&fec { - pinctrl-names =3D "default", "sleep"; - pinctrl-0 =3D <&pinctrl_fec>; - pinctrl-1 =3D <&pinctrl_fec_sleep>; - phy-mode =3D "rgmii-id"; - phy-handle =3D <ðphy2>; - fsl,magic-packet; - status =3D "okay"; - - mdio { - #address-cells =3D <1>; - #size-cells =3D <0>; - clock-frequency =3D <5000000>; - - ethphy2: ethernet-phy@2 { - reg =3D <2>; - reset-assert-us =3D <10000>; - reset-deassert-us =3D <80000>; - reset-gpios =3D <&pcal6524 16 GPIO_ACTIVE_LOW>; - realtek,clkout-disable; - }; - }; -}; - -&flexcan2 { - phys =3D <&flexcan2_phy>; - pinctrl-0 =3D <&pinctrl_flexcan2>; - pinctrl-1 =3D <&pinctrl_flexcan2_sleep>; - pinctrl-names =3D "default", "sleep"; - status =3D "okay"; -}; - -&lpi2c1 { - clock-frequency =3D <400000>; - pinctrl-0 =3D <&pinctrl_lpi2c1>; - pinctrl-names =3D "default"; - status =3D "okay"; - - pcal6408: gpio@20 { - compatible =3D "nxp,pcal6408"; - reg =3D <0x20>; - #gpio-cells =3D <2>; - gpio-controller; - reset-gpios =3D <&pcal6524 20 GPIO_ACTIVE_LOW>; - }; -}; - -&lpi2c2 { - clock-frequency =3D <400000>; - pinctrl-0 =3D <&pinctrl_lpi2c2>; - pinctrl-names =3D "default"; - status =3D "okay"; - - pcal6524: gpio@22 { - compatible =3D "nxp,pcal6524"; - reg =3D <0x22>; - #interrupt-cells =3D <2>; - interrupt-controller; - interrupt-parent =3D <&gpio3>; - interrupts =3D <27 IRQ_TYPE_LEVEL_LOW>; - #gpio-cells =3D <2>; - gpio-controller; - pinctrl-0 =3D <&pinctrl_pcal6524>; - pinctrl-names =3D "default"; - /* does not boot with supplier set, because it is the bucks interrupt pa= rent */ - /* vcc-supply =3D <&buck4>; */ - }; - - pmic@25 { - compatible =3D "nxp,pca9451a"; - reg =3D <0x25>; - interrupt-parent =3D <&pcal6524>; - interrupts =3D <11 IRQ_TYPE_EDGE_FALLING>; - - regulators { - - buck1: BUCK1 { - regulator-name =3D "VDD_SOC_0V8"; - regulator-min-microvolt =3D <610000>; - regulator-max-microvolt =3D <950000>; - regulator-always-on; - regulator-boot-on; - regulator-ramp-delay =3D <3125>; - }; - - buck2: BUCK2 { - regulator-name =3D "LPD4_x_VDDQ_0V6"; - regulator-min-microvolt =3D <600000>; - regulator-max-microvolt =3D <670000>; - regulator-always-on; - regulator-boot-on; - regulator-ramp-delay =3D <3125>; - }; - - buck4: BUCK4 { - regulator-name =3D "VDD_3V3"; - regulator-min-microvolt =3D <3300000>; - regulator-max-microvolt =3D <3300000>; - regulator-always-on; - regulator-boot-on; - }; - - buck5: BUCK5 { - regulator-name =3D "VDD_1V8"; - regulator-min-microvolt =3D <1800000>; - regulator-max-microvolt =3D <1800000>; - regulator-always-on; - regulator-boot-on; - }; - - buck6: BUCK6 { - regulator-name =3D "LPD4_x_VDD2_1V1"; - regulator-min-microvolt =3D <1060000>; - regulator-max-microvolt =3D <1140000>; - regulator-always-on; - regulator-boot-on; - }; - - ldo1: LDO1 { - regulator-name =3D "NVCC_BBSM_1V8"; - regulator-min-microvolt =3D <1620000>; - regulator-max-microvolt =3D <1980000>; - regulator-always-on; - regulator-boot-on; - }; - - ldo4: LDO4 { - regulator-name =3D "VDD_ANA_0V8"; - regulator-min-microvolt =3D <800000>; - regulator-max-microvolt =3D <840000>; - regulator-always-on; - regulator-boot-on; - }; - - ldo5: LDO5 { - regulator-name =3D "NVCC_SD"; - regulator-min-microvolt =3D <1800000>; - regulator-max-microvolt =3D <3300000>; - regulator-always-on; - regulator-boot-on; - }; - }; - }; - - eeprom: eeprom@50 { - compatible =3D "atmel,24c256"; - reg =3D <0x50>; - pagesize =3D <64>; - vcc-supply =3D <&buck4>; - }; -}; - -&lpi2c3 { - clock-frequency =3D <400000>; - pinctrl-0 =3D <&pinctrl_lpi2c3>; - pinctrl-names =3D "default"; - status =3D "okay"; - - ptn5110: tcpc@50 { - compatible =3D "nxp,ptn5110", "tcpci"; - reg =3D <0x50>; - interrupt-parent =3D <&gpio3>; - interrupts =3D <27 IRQ_TYPE_LEVEL_LOW>; - - typec1_con: connector { - compatible =3D "usb-c-connector"; - data-role =3D "dual"; - label =3D "USB-C"; - op-sink-microwatt =3D <15000000>; - power-role =3D "dual"; - self-powered; - sink-pdos =3D ; - source-pdos =3D ; - try-power-role =3D "sink"; - - ports { - #address-cells =3D <1>; - #size-cells =3D <0>; - - port@0 { - reg =3D <0>; - - typec1_dr_sw: endpoint { - remote-endpoint =3D <&usb1_drd_sw>; - }; - }; - }; - }; - }; - - pcf2131: rtc@53 { - compatible =3D "nxp,pcf2131"; - reg =3D <0x53>; - interrupt-parent =3D <&pcal6524>; - interrupts =3D <1 IRQ_TYPE_EDGE_FALLING>; - }; -}; - -&lpuart1 { /* console */ - pinctrl-0 =3D <&pinctrl_uart1>; - pinctrl-names =3D "default"; - status =3D "okay"; -}; - -&lpuart5 { - pinctrl-0 =3D <&pinctrl_uart5>; - pinctrl-names =3D "default"; - status =3D "okay"; - - uart-has-rtscts; - - bluetooth { - compatible =3D "nxp,88w8987-bt"; - device-wakeup-gpios =3D <&pcal6408 3 GPIO_ACTIVE_HIGH>; - reset-gpios =3D <&pcal6524 19 GPIO_ACTIVE_LOW>; - vcc-supply =3D <®_usdhc3_vmmc>; - }; -}; - &mqs1 { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_mqs1>; @@ -418,57 +53,6 @@ &sai1 { status =3D "okay"; }; =20 -&usbotg1 { - adp-disable; - disable-over-current; - dr_mode =3D "otg"; - hnp-disable; - srp-disable; - usb-role-switch; - samsung,picophy-dc-vol-level-adjust =3D <7>; - samsung,picophy-pre-emp-curr-control =3D <3>; - status =3D "okay"; - - port { - usb1_drd_sw: endpoint { - remote-endpoint =3D <&typec1_dr_sw>; - }; - }; -}; - -&usbotg2 { - disable-over-current; - dr_mode =3D "host"; - samsung,picophy-dc-vol-level-adjust =3D <7>; - samsung,picophy-pre-emp-curr-control =3D <3>; - status =3D "okay"; -}; - -&usdhc1 { - bus-width =3D <8>; - non-removable; - pinctrl-0 =3D <&pinctrl_usdhc1>; - pinctrl-1 =3D <&pinctrl_usdhc1_100mhz>; - pinctrl-2 =3D <&pinctrl_usdhc1_200mhz>; - pinctrl-names =3D "default", "state_100mhz", "state_200mhz"; - vmmc-supply =3D <&buck4>; - status =3D "okay"; -}; - -&usdhc2 { - bus-width =3D <4>; - cd-gpios =3D <&gpio3 00 GPIO_ACTIVE_LOW>; - no-mmc; - no-sdio; - pinctrl-0 =3D <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; - pinctrl-1 =3D <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>; - pinctrl-2 =3D <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>; - pinctrl-3 =3D <&pinctrl_usdhc2_sleep>, <&pinctrl_usdhc2_gpio_sleep>; - pinctrl-names =3D "default", "state_100mhz", "state_200mhz", "sleep"; - vmmc-supply =3D <®_usdhc2_vmmc>; - status =3D "okay"; -}; - &usdhc3 { bus-width =3D <4>; keep-power-in-suspend; @@ -483,126 +67,8 @@ &usdhc3 { status =3D "okay"; }; =20 -&wdog3 { - pinctrl-names =3D "default"; - pinctrl-0 =3D <&pinctrl_wdog>; - fsl,ext-reset-output; - status =3D "okay"; -}; =20 &iomuxc { - - pinctrl_eqos: eqosgrp { - fsl,pins =3D < - MX93_PAD_ENET1_MDC__ENET_QOS_MDC 0x57e - MX93_PAD_ENET1_MDIO__ENET_QOS_MDIO 0x57e - MX93_PAD_ENET1_RD0__ENET_QOS_RGMII_RD0 0x57e - MX93_PAD_ENET1_RD1__ENET_QOS_RGMII_RD1 0x57e - MX93_PAD_ENET1_RD2__ENET_QOS_RGMII_RD2 0x57e - MX93_PAD_ENET1_RD3__ENET_QOS_RGMII_RD3 0x57e - MX93_PAD_ENET1_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK 0x58e - MX93_PAD_ENET1_RX_CTL__ENET_QOS_RGMII_RX_CTL 0x57e - MX93_PAD_ENET1_TD0__ENET_QOS_RGMII_TD0 0x57e - MX93_PAD_ENET1_TD1__ENET_QOS_RGMII_TD1 0x57e - MX93_PAD_ENET1_TD2__ENET_QOS_RGMII_TD2 0x57e - MX93_PAD_ENET1_TD3__ENET_QOS_RGMII_TD3 0x57e - MX93_PAD_ENET1_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK 0x58e - MX93_PAD_ENET1_TX_CTL__ENET_QOS_RGMII_TX_CTL 0x57e - >; - }; - - pinctrl_eqos_sleep: eqossleepgrp { - fsl,pins =3D < - MX93_PAD_ENET1_MDC__GPIO4_IO00 0x31e - MX93_PAD_ENET1_MDIO__GPIO4_IO01 0x31e - MX93_PAD_ENET1_RD0__GPIO4_IO10 0x31e - MX93_PAD_ENET1_RD1__GPIO4_IO11 0x31e - MX93_PAD_ENET1_RD2__GPIO4_IO12 0x31e - MX93_PAD_ENET1_RD3__GPIO4_IO13 0x31e - MX93_PAD_ENET1_RXC__GPIO4_IO09 0x31e - MX93_PAD_ENET1_RX_CTL__GPIO4_IO08 0x31e - MX93_PAD_ENET1_TD0__GPIO4_IO05 0x31e - MX93_PAD_ENET1_TD1__GPIO4_IO04 0x31e - MX93_PAD_ENET1_TD2__GPIO4_IO03 0x31e - MX93_PAD_ENET1_TD3__GPIO4_IO02 0x31e - MX93_PAD_ENET1_TXC__GPIO4_IO07 0x31e - MX93_PAD_ENET1_TX_CTL__GPIO4_IO06 0x31e - >; - }; - - pinctrl_fec: fecgrp { - fsl,pins =3D < - MX93_PAD_ENET2_MDC__ENET1_MDC 0x57e - MX93_PAD_ENET2_MDIO__ENET1_MDIO 0x57e - MX93_PAD_ENET2_RD0__ENET1_RGMII_RD0 0x57e - MX93_PAD_ENET2_RD1__ENET1_RGMII_RD1 0x57e - MX93_PAD_ENET2_RD2__ENET1_RGMII_RD2 0x57e - MX93_PAD_ENET2_RD3__ENET1_RGMII_RD3 0x57e - MX93_PAD_ENET2_RXC__ENET1_RGMII_RXC 0x58e - MX93_PAD_ENET2_RX_CTL__ENET1_RGMII_RX_CTL 0x57e - MX93_PAD_ENET2_TD0__ENET1_RGMII_TD0 0x57e - MX93_PAD_ENET2_TD1__ENET1_RGMII_TD1 0x57e - MX93_PAD_ENET2_TD2__ENET1_RGMII_TD2 0x57e - MX93_PAD_ENET2_TD3__ENET1_RGMII_TD3 0x57e - MX93_PAD_ENET2_TXC__ENET1_RGMII_TXC 0x58e - MX93_PAD_ENET2_TX_CTL__ENET1_RGMII_TX_CTL 0x57e - >; - }; - - pinctrl_fec_sleep: fecsleepgrp { - fsl,pins =3D < - MX93_PAD_ENET2_MDC__GPIO4_IO14 0x51e - MX93_PAD_ENET2_MDIO__GPIO4_IO15 0x51e - MX93_PAD_ENET2_RD0__GPIO4_IO24 0x51e - MX93_PAD_ENET2_RD1__GPIO4_IO25 0x51e - MX93_PAD_ENET2_RD2__GPIO4_IO26 0x51e - MX93_PAD_ENET2_RD3__GPIO4_IO27 0x51e - MX93_PAD_ENET2_RXC__GPIO4_IO23 0x51e - MX93_PAD_ENET2_RX_CTL__GPIO4_IO22 0x51e - MX93_PAD_ENET2_TD0__GPIO4_IO19 0x51e - MX93_PAD_ENET2_TD1__GPIO4_IO18 0x51e - MX93_PAD_ENET2_TD2__GPIO4_IO17 0x51e - MX93_PAD_ENET2_TD3__GPIO4_IO16 0x51e - MX93_PAD_ENET2_TXC__GPIO4_IO21 0x51e - MX93_PAD_ENET2_TX_CTL__GPIO4_IO20 0x51e - >; - }; - - pinctrl_flexcan2: flexcan2grp { - fsl,pins =3D < - MX93_PAD_GPIO_IO25__CAN2_TX 0x139e - MX93_PAD_GPIO_IO27__CAN2_RX 0x139e - >; - }; - - pinctrl_flexcan2_sleep: flexcan2sleepgrp { - fsl,pins =3D < - MX93_PAD_GPIO_IO25__GPIO2_IO25 0x31e - MX93_PAD_GPIO_IO27__GPIO2_IO27 0x31e - >; - }; - - pinctrl_lpi2c1: lpi2c1grp { - fsl,pins =3D < - MX93_PAD_I2C1_SCL__LPI2C1_SCL 0x40000b9e - MX93_PAD_I2C1_SDA__LPI2C1_SDA 0x40000b9e - >; - }; - - pinctrl_lpi2c2: lpi2c2grp { - fsl,pins =3D < - MX93_PAD_I2C2_SCL__LPI2C2_SCL 0x40000b9e - MX93_PAD_I2C2_SDA__LPI2C2_SDA 0x40000b9e - >; - }; - - pinctrl_lpi2c3: lpi2c3grp { - fsl,pins =3D < - MX93_PAD_GPIO_IO28__LPI2C3_SDA 0x40000b9e - MX93_PAD_GPIO_IO29__LPI2C3_SCL 0x40000b9e - >; - }; - pinctrl_mqs1: mqs1grp { fsl,pins =3D < MX93_PAD_PDM_CLK__MQS1_LEFT 0x31e @@ -610,149 +76,7 @@ MX93_PAD_PDM_BIT_STREAM0__MQS1_RIGHT 0x31e >; }; =20 - pinctrl_pcal6524: pcal6524grp { - fsl,pins =3D < - MX93_PAD_CCM_CLKO2__GPIO3_IO27 0x31e - >; - }; - - pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp { - fsl,pins =3D < - MX93_PAD_SD2_RESET_B__GPIO3_IO07 0x31e - >; - }; - - pinctrl_uart1: uart1grp { - fsl,pins =3D < - MX93_PAD_UART1_RXD__LPUART1_RX 0x31e - MX93_PAD_UART1_TXD__LPUART1_TX 0x31e - >; - }; - - pinctrl_uart5: uart5grp { - fsl,pins =3D < - MX93_PAD_DAP_TDO_TRACESWO__LPUART5_TX 0x31e - MX93_PAD_DAP_TDI__LPUART5_RX 0x31e - MX93_PAD_DAP_TMS_SWDIO__LPUART5_RTS_B 0x31e - MX93_PAD_DAP_TCLK_SWCLK__LPUART5_CTS_B 0x31e - >; - }; - - /* need to config the SION for data and cmd pad, refer to ERR052021 */ - pinctrl_usdhc1: usdhc1grp { - fsl,pins =3D < - MX93_PAD_SD1_CLK__USDHC1_CLK 0x1582 - MX93_PAD_SD1_CMD__USDHC1_CMD 0x40001382 - MX93_PAD_SD1_DATA0__USDHC1_DATA0 0x40001382 - MX93_PAD_SD1_DATA1__USDHC1_DATA1 0x40001382 - MX93_PAD_SD1_DATA2__USDHC1_DATA2 0x40001382 - MX93_PAD_SD1_DATA3__USDHC1_DATA3 0x40001382 - MX93_PAD_SD1_DATA4__USDHC1_DATA4 0x40001382 - MX93_PAD_SD1_DATA5__USDHC1_DATA5 0x40001382 - MX93_PAD_SD1_DATA6__USDHC1_DATA6 0x40001382 - MX93_PAD_SD1_DATA7__USDHC1_DATA7 0x40001382 - MX93_PAD_SD1_STROBE__USDHC1_STROBE 0x1582 - >; - }; - - /* need to config the SION for data and cmd pad, refer to ERR052021 */ - pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp { - fsl,pins =3D < - MX93_PAD_SD1_CLK__USDHC1_CLK 0x158e - MX93_PAD_SD1_CMD__USDHC1_CMD 0x4000138e - MX93_PAD_SD1_DATA0__USDHC1_DATA0 0x4000138e - MX93_PAD_SD1_DATA1__USDHC1_DATA1 0x4000138e - MX93_PAD_SD1_DATA2__USDHC1_DATA2 0x4000138e - MX93_PAD_SD1_DATA3__USDHC1_DATA3 0x4000138e - MX93_PAD_SD1_DATA4__USDHC1_DATA4 0x4000138e - MX93_PAD_SD1_DATA5__USDHC1_DATA5 0x4000138e - MX93_PAD_SD1_DATA6__USDHC1_DATA6 0x4000138e - MX93_PAD_SD1_DATA7__USDHC1_DATA7 0x4000138e - MX93_PAD_SD1_STROBE__USDHC1_STROBE 0x158e - >; - }; - - /* need to config the SION for data and cmd pad, refer to ERR052021 */ - pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp { - fsl,pins =3D < - MX93_PAD_SD1_CLK__USDHC1_CLK 0x15fe - MX93_PAD_SD1_CMD__USDHC1_CMD 0x400013fe - MX93_PAD_SD1_DATA0__USDHC1_DATA0 0x400013fe - MX93_PAD_SD1_DATA1__USDHC1_DATA1 0x400013fe - MX93_PAD_SD1_DATA2__USDHC1_DATA2 0x400013fe - MX93_PAD_SD1_DATA3__USDHC1_DATA3 0x400013fe - MX93_PAD_SD1_DATA4__USDHC1_DATA4 0x400013fe - MX93_PAD_SD1_DATA5__USDHC1_DATA5 0x400013fe - MX93_PAD_SD1_DATA6__USDHC1_DATA6 0x400013fe - MX93_PAD_SD1_DATA7__USDHC1_DATA7 0x400013fe - MX93_PAD_SD1_STROBE__USDHC1_STROBE 0x15fe - >; - }; - - pinctrl_usdhc2_gpio: usdhc2gpiogrp { - fsl,pins =3D < - MX93_PAD_SD2_CD_B__GPIO3_IO00 0x31e - >; - }; - - pinctrl_usdhc2_gpio_sleep: usdhc2gpiosleepgrp { - fsl,pins =3D < - MX93_PAD_SD2_CD_B__GPIO3_IO00 0x51e - >; - }; - - /* need to config the SION for data and cmd pad, refer to ERR052021 */ - pinctrl_usdhc2: usdhc2grp { - fsl,pins =3D < - MX93_PAD_SD2_CLK__USDHC2_CLK 0x1582 - MX93_PAD_SD2_CMD__USDHC2_CMD 0x40001382 - MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x40001382 - MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x40001382 - MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x40001382 - MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x40001382 - MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e - >; - }; - /* need to config the SION for data and cmd pad, refer to ERR052021 */ - pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp { - fsl,pins =3D < - MX93_PAD_SD2_CLK__USDHC2_CLK 0x158e - MX93_PAD_SD2_CMD__USDHC2_CMD 0x4000138e - MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x4000138e - MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x4000138e - MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x4000138e - MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x4000138e - MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e - >; - }; - - /* need to config the SION for data and cmd pad, refer to ERR052021 */ - pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp { - fsl,pins =3D < - MX93_PAD_SD2_CLK__USDHC2_CLK 0x15fe - MX93_PAD_SD2_CMD__USDHC2_CMD 0x400013fe - MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x400013fe - MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x400013fe - MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x400013fe - MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x400013fe - MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e - >; - }; - - pinctrl_usdhc2_sleep: usdhc2-sleepgrp { - fsl,pins =3D < - MX93_PAD_SD2_CLK__GPIO3_IO01 0x51e - MX93_PAD_SD2_CMD__GPIO3_IO02 0x51e - MX93_PAD_SD2_DATA0__GPIO3_IO03 0x51e - MX93_PAD_SD2_DATA1__GPIO3_IO04 0x51e - MX93_PAD_SD2_DATA2__GPIO3_IO05 0x51e - MX93_PAD_SD2_DATA3__GPIO3_IO06 0x51e - MX93_PAD_SD2_VSELECT__GPIO3_IO19 0x51e - >; - }; - - /* need to config the SION for data and cmd pad, refer to ERR052021 */ pinctrl_usdhc3: usdhc3grp { fsl,pins =3D < MX93_PAD_SD3_CLK__USDHC3_CLK 0x1582 @@ -798,10 +122,4 @@ MX93_PAD_SD3_DATA2__GPIO3_IO24 0x31e MX93_PAD_SD3_DATA3__GPIO3_IO25 0x31e >; }; - - pinctrl_wdog: wdoggrp { - fsl,pins =3D < - MX93_PAD_WDOG_ANY__WDOG1_WDOG_ANY 0x31e - >; - }; }; --=20 2.34.1 From nobody Sat Jul 25 06:11:12 2026 Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 65B03377016; Fri, 17 Jul 2026 05:12:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=92.121.34.21 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784265130; cv=none; b=NWAdu5IXJxGfJ8StX5mPqDcYbwp0zjnLT3+Z4+qVt7yN5ZE+6EMEpP8FtWE8Ey33RBxAhIeEtro4pnD/V197rCdmItyjPS42/hQtH4OJqE5FuMR35awhzU6qtB0NuhakhFY3TvXZRkWJeAeDr2ysVrHRbfFCg0Rw8QTPJvLDQSo= ARC-Message-Signature: i=1; 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Fri, 17 Jul 2026 07:11:59 +0200 (CEST) Received: from lsvm11u0000395.swis.ap-northeast-2.aws.nxp.com (lsvm11u0000395.swis.ap-northeast-2.aws.nxp.com [10.52.9.99]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id 8CD7B18000B0; Fri, 17 Jul 2026 13:11:57 +0800 (+08) From: Joseph Guo Date: Fri, 17 Jul 2026 14:11:53 +0900 Subject: [PATCH 2/3] dt-bindings: arm: fsl: Add i.MX93 Wireless FRDM board Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260717-imx93w_frdm-v1-2-0cca6c0ba2f5@nxp.com> References: <20260717-imx93w_frdm-v1-0-0cca6c0ba2f5@nxp.com> In-Reply-To: <20260717-imx93w_frdm-v1-0-0cca6c0ba2f5@nxp.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Shawn Guo Cc: devicetree@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Joseph Guo X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1784265114; l=1272; i=qijian.guo@nxp.com; s=20250519; h=from:subject:message-id; bh=Ymma+ccm4S0berqOzybvR9sNfmMtutF/oYLFF+cWTDs=; b=kwKiZuqV5B1EXnRLWzugN2GW9NQB79ME75Fg92uDHnTRPRbqcU7Ax1uY7umdgBDaRc7MXKEFG T4Gxd36rficB32GOo1+3cRKxyk9gTCVtYFQA80TuGimJGK5SAWQvU/9 X-Developer-Key: i=qijian.guo@nxp.com; a=ed25519; pk=VRjOOFhVecTRwBzK4mt/k3JBnHoYfuXKCm9FM+hHQhs= X-Virus-Scanned: ClamAV using ClamSMTP Add DT compatible string for NXP i.MX93 Wireless FRDM board. i.MX93 Wireless SiP is created by integrating i.MX93 and IW610 WLCSP (Wi-Fi + BLE + 802.15.4). And i.MX93 Wireless FRDM board with the i.MX93 Wireless SiP basically reuse the i.MX93 11x11 FRDM board, with some minor functional and pin connection differences. Signed-off-by: Joseph Guo Acked-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/arm/fsl.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation= /devicetree/bindings/arm/fsl.yaml index 7b57a6ee1b50dc22ece292d6d9b53b5aa834ee96..9ab7af8c02d68c7f95cccfb5071= 662eafc8f93a0 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -1513,6 +1513,7 @@ properties: - fsl,imx93-11x11-frdm # i.MX93 11x11 FRDM Board - fsl,imx93-14x14-evk # i.MX93 14x14 EVK Board - fsl,imx93-wireless-evk # i.MX93 and IW610G WLCSP (Wi-Fi= + BLE + 802.15.4) SiP EVK Board + - fsl,imx93-wireless-frdm # i.MX93 and IW610G WLCSP (Wi-Fi= + BLE + 802.15.4) SiP FRDM Board - const: fsl,imx93 =20 - description: i.MX94 based Boards --=20 2.34.1 From nobody Sat Jul 25 06:11:12 2026 Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 66C262F8EA5; Fri, 17 Jul 2026 05:12:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=92.121.34.21 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784265130; cv=none; b=ZVDX7wfk0v+JXvJLSG1SrJUq/kJkceDDLdM1gGI7+SSCA3lRrQsz8OGWhwVPgN03avozUx63W0gtQsbbAhhcmQjBmc1lXfrk7wqQTJlfKqbpERt0uWHkPkUZdNy461BbLa1XvqNsXISfRK9/4TdNQw/PgSrxZTqOtG9zB1snRxA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784265130; c=relaxed/simple; bh=rFR1VSayt2OVJUkDppwqa9ZiDJIiRa4WVrFcRZEYjAE=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=HFAeB2jN+hrVLCeS4aTIAWpmN81wTGne09ldWOURNb0HrtsyD341/X+tNpxaNP5dD9csv1wkf8jVqUMA/bNnVc0oUhj/qZ0y53FfNtRNz+CmURMj0Z5KdRc04vx8mlLkQz7rbHFoixIP2zhZxfHLlD/pErUJiq4kKkQSbQziHDM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=nxp.com; spf=pass smtp.mailfrom=nxp.com; arc=none smtp.client-ip=92.121.34.21 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=nxp.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=nxp.com Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id F325F20019A; Fri, 17 Jul 2026 07:12:00 +0200 (CEST) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id BBE9B200181; Fri, 17 Jul 2026 07:12:00 +0200 (CEST) Received: from lsvm11u0000395.swis.ap-northeast-2.aws.nxp.com (lsvm11u0000395.swis.ap-northeast-2.aws.nxp.com [10.52.9.99]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id ED71E18000B5; Fri, 17 Jul 2026 13:11:58 +0800 (+08) From: Joseph Guo Date: Fri, 17 Jul 2026 14:11:54 +0900 Subject: [PATCH 3/3] arm64: dts: imx93: Add i.MX93 Wireless FRDM board support Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260717-imx93w_frdm-v1-3-0cca6c0ba2f5@nxp.com> References: <20260717-imx93w_frdm-v1-0-0cca6c0ba2f5@nxp.com> In-Reply-To: <20260717-imx93w_frdm-v1-0-0cca6c0ba2f5@nxp.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Shawn Guo Cc: devicetree@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Joseph Guo X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1784265114; l=3045; i=qijian.guo@nxp.com; s=20250519; h=from:subject:message-id; bh=rFR1VSayt2OVJUkDppwqa9ZiDJIiRa4WVrFcRZEYjAE=; b=JLaIS9ghT8hTEVbVqATesK26tuc3lNCXY1XHm0V88s2IkrBnD1SwlWMiaFODLzFV/nvpYYiIx DUXrbJ0Zj3jD5LvxnhoHqFK7STC5JzR0XgMy9dEqRBu+tpG4ourdvWu X-Developer-Key: i=qijian.guo@nxp.com; a=ed25519; pk=VRjOOFhVecTRwBzK4mt/k3JBnHoYfuXKCm9FM+hHQhs= X-Virus-Scanned: ClamAV using ClamSMTP i.MX93 Wireless FRDM board(FRDM-IMX93W) is a low-cost and compact board fea= turing the i.MX93W applications processor:https://www.nxp.com/products/IMX93W FRDM-IMX93W board basically reuse the FRDM-IMX93 board, with some minor functional and pin connection differences. Reuse the imx93-11x11-frdm-common.dtsi and add the board-specific changes. Here are the detailed differences between FRDM-IMX93 and FRDM-IMX93W board. Function differences: Function FRDM-IMX93W FRDM-IMX93 WIFI/BT IW610 in i.MX93W IW612 M.2 module MQS N Y M.2 N Y RPi 40-pin HDR Limited support(pin conflict) Y Pin connection differences: Function Signal name i.MX93W EVK i.MX93 EVK WIFI/BT SPI_FRM SAI1_TXFS (spi1.PCS0) GPIO_IO08 (spi3.PCS0) SPI_TXD SAI1_TXC (spi1.SIN) GPIO_IO09 (spi3.SIN) SPI_RXD SAI1_RXD0 (spi1.SOUT) GPIO_IO10 (spi3.SOUT) SPI_CLK SAI1_TXD0 (spi1.SCK) GPIO_IO11 (spi3.SCK) SPI_INT CCM_CLKO1 on-board IO expander NB_WAKE_IN PDM_CLK on-module IO expander WL_WAKE_IN PDM_BIT_STREAM0 on-module IO expander IND_RST_WL PDM_BIT_STREAM1 on-module IO expander IND_RST_NB GPIO_IO28 on-module IO expander PDn GPIO_IO29 on-module IO expander NB_WAKE_OUT GPIO_IO14 on-board IO expander WL_WAKE_OUT GPIO_IO15 CCM_CLKO1 I2C3 I2C3_SDA GPIO_IO00 GPIO_IO28 I2C3_SCL GPIO_IO01 GPIO_IO29 Signed-off-by: Joseph Guo --- arch/arm64/boot/dts/freescale/Makefile | 1 + arch/arm64/boot/dts/freescale/imx93w-frdm.dts | 23 +++++++++++++++++++++++ 2 files changed, 24 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/f= reescale/Makefile index be3c858f1eeb1a807cb8ac36269c581143f755df..d48ba7dee1861e0b39ab025c4b8= 108ffa68c9bf3 100644 --- a/arch/arm64/boot/dts/freescale/Makefile +++ b/arch/arm64/boot/dts/freescale/Makefile @@ -655,6 +655,7 @@ dtb-$(CONFIG_ARCH_MXC) +=3D imx93-tqma9352-mba93xxla-mi= ni-lvds-tm070jvhg33.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx93-var-dart-sonata.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx93-var-som-symphony.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx93w-evk.dtb +dtb-$(CONFIG_ARCH_MXC) +=3D imx93w-frdm.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx943-evk.dtb =20 imx943-evk-pcie0-ep-dtbs +=3D imx943-evk.dtb imx-pcie0-ep.dtbo diff --git a/arch/arm64/boot/dts/freescale/imx93w-frdm.dts b/arch/arm64/boo= t/dts/freescale/imx93w-frdm.dts new file mode 100644 index 0000000000000000000000000000000000000000..766e942fe6638330b602577c541= d93f3526afe51 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx93w-frdm.dts @@ -0,0 +1,23 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2026 NXP + */ + +/dts-v1/; + +#include "imx93w.dtsi" +#include "imx93-11x11-frdm-common.dtsi" + +/ { + model =3D "NXP i.MX93W FRDM board"; + compatible =3D "fsl,imx93-wireless-frdm", "fsl,imx93"; +}; + +&iomuxc { + pinctrl_lpi2c3: lpi2c3grp { + fsl,pins =3D < + MX93_PAD_GPIO_IO00__LPI2C3_SDA 0x40000b9e + MX93_PAD_GPIO_IO01__LPI2C3_SCL 0x40000b9e + >; + }; +}; --=20 2.34.1