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[35.194.220.176]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-3142a1bb8a4sm5100856eec.14.2026.07.17.01.41.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 Jul 2026 01:41:33 -0700 (PDT) From: Hsin-Te Yuan Date: Fri, 17 Jul 2026 08:41:26 +0000 Subject: [PATCH v2] firmware: google: coreboot_table: skip no-map CBMEM entries Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260717-coreboot-v2-1-8f8b389e3758@chromium.org> X-B4-Tracking: v=1; b=H4sIALbqWWoC/23MQQ6CMBCF4auQWVtDSyvqynsYFjAUOgsYMsVGQ 7i7lbXL/+Xl2yB6IR/hXmwgPlEknnOYUwEY2nn0ivrcYEpzKWttFbL4jnlVVrfYWqyuVYeQ74v 4gd4H9WxyB4ory+eQk/6tf5CklVaDu9XO9rXunHtgEJ7oNZ1ZRmj2ff8CMHQeJqMAAAA= X-Change-ID: 20260714-coreboot-41aca4c383bc To: Tzung-Bi Shih , Brian Norris , Julius Werner Cc: chrome-platform@lists.linux.dev, linux-kernel@vger.kernel.org, Yidi Lin , Hsin-Te Yuan X-Mailer: b4 0.14.3 From: Yidi Lin On ARM64 platforms, certain reserved memory regions (like those used by pKVM) are marked with the 'no-map' property. This indicates that the host kernel is forbidden from creating a structural mapping for these regions. The coreboot table may describe CBMEM entries that overlap with or are entirely contained within these no-map regions. Attempting to populate these entries as devices and subsequently remapping them can lead to system crashes or security violations. Refine the coreboot table population logic to verify that each CBMEM entry resides in 'Known Good' memory before creating a device. An entry is only considered safe if it is entirely System RAM or entirely standard Reserved memory (tagged with IORES_DESC_RESERVED). This dual-check ensures that: 1. On ARM64, no-map regions are filtered out as they are IORESOURCE_MEM (see request_standard_resources() in arch/arm64/kernel/setup.c). 2. On x86, standard reserved regions (IORES_DESC_RESERVED) remain supported. Signed-off-by: Yidi Lin Signed-off-by: Hsin-Te Yuan --- Changes in v2: - Rephrase the commit message and code comment to be clear. - Link to v1: https://lore.kernel.org/r/20260714-coreboot-v1-1-f59754d71b55= @chromium.org --- drivers/firmware/google/coreboot_table.c | 26 +++++++++++++++++++++++--- 1 file changed, 23 insertions(+), 3 deletions(-) diff --git a/drivers/firmware/google/coreboot_table.c b/drivers/firmware/go= ogle/coreboot_table.c index e63933ff6747..993056a739ad 100644 --- a/drivers/firmware/google/coreboot_table.c +++ b/drivers/firmware/google/coreboot_table.c @@ -13,8 +13,10 @@ #include #include #include +#include #include #include +#include #include #include #include @@ -123,7 +125,7 @@ static int coreboot_table_populate(struct device *dev, = void *ptr, resource_size_ =20 ptr_end =3D ptr + len; ptr_entry =3D ptr + header->header_bytes; - for (i =3D 0; i < header->table_entries; i++) { + for (i =3D 0; i < header->table_entries; i++, ptr_entry +=3D entry->size)= { if (ptr_entry + sizeof(*entry) > ptr_end) return -EINVAL; entry =3D ptr_entry; @@ -147,6 +149,26 @@ static int coreboot_table_populate(struct device *dev,= void *ptr, resource_size_ =20 switch (device->entry.tag) { case LB_TAG_CBMEM_ENTRY: + /* + * Skip entries that are not exclusively System RAM or + * Reserved memory. + * On ARM64, no-map regions are filtered out as they are + * IORESOURCE_MEM (see request_standard_resources() in + * arch/arm64/kernel/setup.c). + * On x86, CBMEM often resides in standard reserved regions + * (IORES_DESC_RESERVED). + */ + if (region_intersects(device->cbmem_entry.address, + device->cbmem_entry.entry_size, + IORESOURCE_SYSTEM_RAM, + IORES_DESC_NONE) !=3D REGION_INTERSECTS && + region_intersects(device->cbmem_entry.address, + device->cbmem_entry.entry_size, + IORESOURCE_MEM, + IORES_DESC_RESERVED) !=3D REGION_INTERSECTS) { + kfree(device); + continue; + } dev_set_name(&device->dev, "cbmem-%08x", device->cbmem_entry.id); break; @@ -155,8 +177,6 @@ static int coreboot_table_populate(struct device *dev, = void *ptr, resource_size_ break; } =20 - ptr_entry +=3D entry->size; - ret =3D device_register(&device->dev); if (ret) { dev_warn(dev, "failed to register coreboot device: %d\n", ret); --- base-commit: 3b029c035b34bbc693405ddf759f0e9b920c27f1 change-id: 20260714-coreboot-41aca4c383bc Best regards, --=20 Hsin-Te Yuan