From nobody Sat Jul 25 16:22:56 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 63D56346FC0 for ; Thu, 16 Jul 2026 06:39:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784183944; cv=none; b=h/1PLly+0+hWkn98jnj6SfgeeAOX+K5eU4jrWVk00izItKSq51MBcRkcmzqt8NKhVMK6v5iQ0MEO8idokAvIHUQdstKduGmt63DhxjR34mkBZxpP8Ty+N6sntIC9J1yyEWQS1/Arr84kpeSuV/sgTY0ciFu7GMb6BdtTdNQ8/uQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784183944; c=relaxed/simple; bh=fUysjhNtvV8X/Ql+qqACuezU5OdURq9AJeR3Khazz4E=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=SBdeO6bGh82hGcX1PdSQINpzcjVfpAGsO0n5y0qIjpOtPT8Ii9ETczmUq8w6LkmH74xjptCYUwB+w61H9d0Sg1l+bgml7McWsH2JRjN8Zovb7VIKuPmFNrMpZWWqGPlyAJzrR8fgnVUue56VLxwWdJvQrj/Jfj6mR24ZCHlsdf4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=dOjJlECL; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=Z+PD7kyP; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="dOjJlECL"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="Z+PD7kyP" Received: from pps.filterd (m0279863.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 66G3wXqX1667228 for ; Thu, 16 Jul 2026 06:39:02 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= /olJtL4EEXjuiuE/Fu9MLOtE57HZJ7p/f88ZnmXBGcw=; b=dOjJlECLtklxPlhE szJga4Ci7SnXTF8SqMYpl5tKE64ogJw+UO5mLTSFfhIJL0dX9jlk9up7Ax7TTkui sxvVDlWQtPXs8oXoxVkdmqdcLNzeJWx6UJDYBpxBm0xoZD40YKZbv9hH504fyCAn h+VguRvlKN7cd3jxqs4KcdtK7zdl7enUu+dBbaRI4I9d7kZp/vcWdcehnW/sFnlh Yje7BNGyULPnfZ42gQv6+Kv6XkCQL6yuNV9vsTg/k7Havd6lEWbICg65pVAxwDaI LOVcglha3jiOEymMOLEEYw7Qu6ZA0exAwlZivvMcwg9Mk9TtZh6GNQaU0y84+BDv jf13KA== Received: from mail-pg1-f197.google.com (mail-pg1-f197.google.com [209.85.215.197]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4fen4w91be-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 16 Jul 2026 06:39:02 +0000 (GMT) Received: by mail-pg1-f197.google.com with SMTP id 41be03b00d2f7-c88ab059052so370502a12.1 for ; Wed, 15 Jul 2026 23:39:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1784183942; x=1784788742; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=/olJtL4EEXjuiuE/Fu9MLOtE57HZJ7p/f88ZnmXBGcw=; b=Z+PD7kyPoGCuenYqyTJO8WQcr/cP1MOu335FBZ2jR3d4yVQ+L362NsXxoh++RaUFbE m76xKydy/VZGOGnXazc1G5ThMb745LUjzXGrMkD96cGoTUcEfW+GOw4F5lizS0TRpU6A pypF27KYBpu+ScmUEpm3geO75k1wb/QRwHEBPw5VhcfwbS4tEsGb19gjSWG4uQAdLcE4 UnCT0HTumdNKsLELnQAWNRvPTH99QkIPNJtjr1ObOsBjHN+rMij2C8m792Pim2/06CSL Wc9CR3QS5dYJWxlBioeZoYz293U3zHiNWJmcG8CWdNyDPSE+uajbVKIsskN2Ff4DS4SS tvng== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1784183942; x=1784788742; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:x-gm-gg :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to :content-type; bh=/olJtL4EEXjuiuE/Fu9MLOtE57HZJ7p/f88ZnmXBGcw=; b=F5nRsYkX9dooYg4apmqtkq/hlLmHBFKQ0c5h8lIzyE95gEe2L7NAUKb+aW4rOHUT7J Nvi1Ag/K0V8EgB4QAWWRNt13DU0nKZ2KB/6VccJ9+tqNFX7hAZ2RgyZNk2uZSIQtCJ2Z XDoaIXeKfZ20wGcORxM6J3A+298tb0dwgCSE3XRTysSWaM2wQjz/rNx2WzrkZpT6aWxo qaDvdlYLZMnUj5bwX8Ebov77tp4QcwIcEUzKOcy0kjnDbzLJlg+r4ZbdFC/ovnP8RYZX p7NLu1p+uRw9R79I0RvEthxSBVUy7A9JG6UsorDspwBUVaFD3c2xIdPR9yR6OUwK3f2I pbhA== X-Forwarded-Encrypted: i=1; AHgh+RrbczW12pOXY3NMq3bDfcwvVfPM56er13hvpbtqbYhdkmKEfaPFhS5QUj/l7CLoeCbvjw1YENjfRII5cDw=@vger.kernel.org X-Gm-Message-State: AOJu0YyGnfsOMRNCQdLNbUjwxX28Td55r3Ii4Tczv3br3eJaEWLmjQc8 BihgHi4YT1iFMmcCiTFyZa18Rik/5l6/B9zEiz5qvD98XolGFPI+DRvUfW+EF/FYUcMCq21XFCW cBdvB1YfoRwK0m/HMk+W0M8x0gSkwE5002OW5mnYy7ZzUmXmJrlSjX7c0Adf3Oh0gD0U= X-Gm-Gg: AfdE7cnVa0lVudboxPvNmrPyr30fvkWMa5AQS3L+sIFmCGGm5XKtA7h/LFZ1BqxZWIY E1DaGH9foF+9RCvs1gE0plwuAf2E+7STaZDT+rioLUgHKypLKtynQTeuwbVPYwuIL6xt88KCbfx cSLzCv/WaIWYyLvX87Z4mIGDe39YrULrLq6TWdQcMoTv5tgGO/hsIhFtreJZShg7o/lI+mzdTo/ MDE2NhrAlcKz4kEZjs0SDCZI1fCewQIQ03Ridnv7ZhgZ16TrB74NX0aZETuuMoTAlUQJr6R+OFH GBU8aVVZx6xrkILnls32M3Ga1hLPXI0zxcd8c0ItbD4wqSmBSw2Gtvw/AYU0VIEE6OsJXkx5ZGP aqpuXWgWip649HHEDNs0/CKAxkzReNXCl7Q== X-Received: by 2002:a05:6a20:430a:b0:3bf:78a1:c140 with SMTP id adf61e73a8af0-3c38d909932mr1390168637.7.1784183941979; Wed, 15 Jul 2026 23:39:01 -0700 (PDT) X-Received: by 2002:a05:6a20:430a:b0:3bf:78a1:c140 with SMTP id adf61e73a8af0-3c38d909932mr1390150637.7.1784183941443; Wed, 15 Jul 2026 23:39:01 -0700 (PDT) Received: from hu-ptalari-hyd.qualcomm.com ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-cb258eb82desm1320870a12.2.2026.07.15.23.38.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 15 Jul 2026 23:39:01 -0700 (PDT) From: Praveen Talari Date: Thu, 16 Jul 2026 12:08:43 +0530 Subject: [PATCH v3 1/3] i2c: qcom-geni: use cancel command before abort on transfer timeout Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260716-fix_cancel_sequence_on_failure_for_i2c-v3-1-9091315a33a0@oss.qualcomm.com> References: <20260716-fix_cancel_sequence_on_failure_for_i2c-v3-0-9091315a33a0@oss.qualcomm.com> In-Reply-To: <20260716-fix_cancel_sequence_on_failure_for_i2c-v3-0-9091315a33a0@oss.qualcomm.com> To: Mukesh Kumar Savaliya , Viken Dadhaniya , Andi Shyti Cc: linux-arm-msm@vger.kernel.org, linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org, Praveen Talari , Naresh Maramaina X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1784183935; l=3620; i=praveen.talari@oss.qualcomm.com; s=20251114; h=from:subject:message-id; bh=fUysjhNtvV8X/Ql+qqACuezU5OdURq9AJeR3Khazz4E=; b=jA6EeEBkgOP3ceb+J3l6rt9a6ZbWLjNSVQVUGyOZH76Oq6/e+yY6lySjkGMWeo/AFQYWBUWZz 6aNtKrr27MSAWFp7BSbQq57niUVqh4as03Haqcq8RvVPODSOG/D4yLj X-Developer-Key: i=praveen.talari@oss.qualcomm.com; a=ed25519; pk=NGK/88fjyHXgfhIKwag7+uIytOmyOypvZ/hDFaYPEss= X-Authority-Analysis: v=2.4 cv=PsejqQM3 c=1 sm=1 tr=0 ts=6a587c86 cx=c_pps a=rz3CxIlbcmazkYymdCej/Q==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yOCtJkima9RkubShWh1s:22 a=EUspDBNiAAAA:8 a=HIFZfxgX9pW5VpyTZ0YA:9 a=QEXdDO2ut3YA:10 a=bFCP_H2QrGi7Okbo017w:22 X-Proofpoint-GUID: knHUhSZSItqBN0v3h5hZ8bvqkx6fI9_K X-Proofpoint-Spam-Info: AW1haW4tMjYwNzE2MDA2NyBTYWx0ZWRfX9EqYhXrCAIiq DfSGvrE/pVZ8rzd1t9KKDXHdDZrsTngT1hMtQj+EynFhgArDpEbNUQTMdKONLb82D1P01hSethp OkFRb/5UyYGo3+yCX6bPPKXd2Psf9c4= X-Proofpoint-ORIG-GUID: knHUhSZSItqBN0v3h5hZ8bvqkx6fI9_K X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzE2MDA2NyBTYWx0ZWRfX/LKLDlW5hbAS QqI5xD9zf39qawIf+X8JD8TPe85e6iLrMr/WGX/fudKTVnkTqDClNqzujVtcp4xEGNGTsXllZ5N XxwPy7G1kwPMpHD4qUMLKL1gjjs21VejotduvOLoqxv7A6dsjS0fHykg/X23GPSw0+lLhc27det YDos3Ry8AkplJXCxAweBHXrDMKFA018TouZDCjzx05+hdVlLCV17JII5MbztfrjWan1Zqo7DZox yQul7Pt74eOJbZzsOfjGxVIl4lbgX7Jj+g0gsNZ0+3EwnUse/FlLEbOsvYB3BIj7KVAr+nMOiRs a1s+4MxCZva87PZrcV6QbFF20YTm5fsxdUCpL6Oi/17BEvCAzQEPpiYJOGDz4PJwK7ln8soS4b6 btCcYGS73ZUPtES7vaZQaAXbCTgxgEQw5ftpGqcJjVyHKJKPhQIxuToT5YDgEFWC4Bj0BAdNaeb w/ad0j944/YzAFPsQnA== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-07-16_02,2026-07-15_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 malwarescore=0 clxscore=1015 bulkscore=0 priorityscore=1501 lowpriorityscore=0 adultscore=0 suspectscore=0 spamscore=0 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607160067 The GENI I2C driver currently invokes geni_se_abort_m_cmd() directly when a transfer times out. However, the GENI hardware command cancellation flow requires a cancel command to be issued first. An abort should only be used as a fallback when the cancel operation itself fails to complete. Introduce a dedicated cancel_done completion that is signaled when M_CMD_CANCEL_EN is received. The timeout recovery path waits for cancel completion and escalates to geni_i2c_abort_xfer() only if the cancel command does not complete within the expected time. Co-developed-by: Naresh Maramaina Signed-off-by: Naresh Maramaina Reviewed-by: Mukesh Kumar Savaliya Signed-off-by: Praveen Talari --- drivers/i2c/busses/i2c-qcom-geni.c | 30 ++++++++++++++++++++++++++++-- 1 file changed, 28 insertions(+), 2 deletions(-) diff --git a/drivers/i2c/busses/i2c-qcom-geni.c b/drivers/i2c/busses/i2c-qc= om-geni.c index 96dbf04138be..15403edb355a 100644 --- a/drivers/i2c/busses/i2c-qcom-geni.c +++ b/drivers/i2c/busses/i2c-qcom-geni.c @@ -74,6 +74,7 @@ enum geni_i2c_err_code { #define PACKING_BYTES_PW 4 =20 #define ABORT_TIMEOUT HZ +#define CANCEL_TIMEOUT HZ #define XFER_TIMEOUT HZ #define RST_TIMEOUT HZ =20 @@ -112,6 +113,7 @@ struct geni_i2c_dev { int err; struct i2c_adapter adap; struct completion done; + struct completion cancel_done; struct i2c_msg *cur; int cur_wr; int cur_rd; @@ -361,6 +363,8 @@ static irqreturn_t geni_i2c_irq(int irq, void *dev) dm_tx_st & TX_DMA_DONE || dm_tx_st & TX_RESET_DONE || dm_rx_st & RX_DMA_DONE || dm_rx_st & RX_RESET_DONE) complete(&gi2c->done); + if (m_stat & M_CMD_CANCEL_EN) + complete(&gi2c->cancel_done); =20 spin_unlock(&gi2c->lock); =20 @@ -387,6 +391,27 @@ static void geni_i2c_abort_xfer(struct geni_i2c_dev *g= i2c) dev_err(gi2c->se.dev, "Timeout abort_m_cmd\n"); } =20 +static void geni_i2c_cancel_xfer(struct geni_i2c_dev *gi2c) +{ + unsigned long time_left =3D msecs_to_jiffies(CANCEL_TIMEOUT); + unsigned long flags; + + reinit_completion(&gi2c->cancel_done); + + spin_lock_irqsave(&gi2c->lock, flags); + if (!gi2c->err) + geni_i2c_err(gi2c, GENI_TIMEOUT); + gi2c->cur =3D NULL; + geni_se_cancel_m_cmd(&gi2c->se); + spin_unlock_irqrestore(&gi2c->lock, flags); + + time_left =3D wait_for_completion_timeout(&gi2c->cancel_done, time_left); + if (!time_left) { + dev_err(gi2c->se.dev, "Timeout cancel_m_cmd\n"); + geni_i2c_abort_xfer(gi2c); + } +} + static void geni_i2c_rx_fsm_rst(struct geni_i2c_dev *gi2c) { u32 val; @@ -473,7 +498,7 @@ static int geni_i2c_rx_one_msg(struct geni_i2c_dev *gi2= c, struct i2c_msg *msg, cur =3D gi2c->cur; time_left =3D wait_for_completion_timeout(&gi2c->done, XFER_TIMEOUT); if (!time_left) - geni_i2c_abort_xfer(gi2c); + geni_i2c_cancel_xfer(gi2c); =20 geni_i2c_rx_msg_cleanup(gi2c, cur); =20 @@ -515,7 +540,7 @@ static int geni_i2c_tx_one_msg(struct geni_i2c_dev *gi2= c, struct i2c_msg *msg, cur =3D gi2c->cur; time_left =3D wait_for_completion_timeout(&gi2c->done, XFER_TIMEOUT); if (!time_left) - geni_i2c_abort_xfer(gi2c); + geni_i2c_cancel_xfer(gi2c); =20 geni_i2c_tx_msg_cleanup(gi2c, cur); =20 @@ -1107,6 +1132,7 @@ static int geni_i2c_probe(struct platform_device *pde= v) =20 gi2c->adap.algo =3D &geni_i2c_algo; init_completion(&gi2c->done); + init_completion(&gi2c->cancel_done); spin_lock_init(&gi2c->lock); platform_set_drvdata(pdev, gi2c); =20 --=20 2.34.1 From nobody Sat Jul 25 16:22:56 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B92AB346776 for ; Thu, 16 Jul 2026 06:39:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784183948; cv=none; b=fTlnC7gRP4lyeq8hzF9ES/27qLrQYz/ZWbWpnOVDBNURMAlQuS1rk7jGbZI9xs/AkJMjg3Td/N5ZBCQOXk7jleioQcfMxBIFxlZ0G6x/heNvtv4QqTpDL/8IDppBmvFKMep1VWXRctUv5gN+eYXwQFb7//VLcX+Mdi59/vpFTMM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784183948; c=relaxed/simple; bh=JTNdrvBVz+uhkV8v3RVfjPFxWgkdz2CZEuNPO45ffy4=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=NbXH6Bs6DDE+6NhoTYmNDo6JtHoyU/2/bFovytwJ3TUY16KbjB3o314wYywsfP9Mm9p904DrMbFVEODe+xhXS0cSC1VM4VRP5ZFlXPO0JokRW7fWDNKa6JZRGfA3EqKFYp8yGqn0o3B+r8Q3QBg6Ezvbjwhm6i350mjpwwhCj4Q= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=Uz7iNAuD; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=D2NZPFX1; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="Uz7iNAuD"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="D2NZPFX1" Received: from pps.filterd (m0279862.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 66G3wSi81445056 for ; Thu, 16 Jul 2026 06:39:06 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= NBWA4To0HeSiFVTDDmoZvlT6DKfi11p5Dhw5I+W7aZc=; b=Uz7iNAuDAGSgqAvp mZ7F0xIWgMB9lMnNCjX7wrZJlTmeqcmEtQDaB51Fp93/sVbkoO6Q9kcvcdc3WDhq Q3fRVfnANdOAW/JYigXkupQnuL7kn5fjxRZmktKUDuSzts8XdsseCMxAVojIkdex Ge9LrryRGEy57enD/bZ9PHm1VeEdlUof1RfUnG7YWkg1vOGYtztAGMrd+kYPV/qt q0DVk6mTBSyRoxAykktRyq6S0lGt1RXfZR0EH5yHtQT9XtxRtd3ngnCqTZf0w4r3 KeVwjLxF47IXbh/RgFKeCfwgKE/e4LLL6HHtoUhsYi5xT92yjBLP8aoUhRoGdF9+ k/OuiA== Received: from mail-pg1-f197.google.com (mail-pg1-f197.google.com [209.85.215.197]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4feehvadcu-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 16 Jul 2026 06:39:05 +0000 (GMT) Received: by mail-pg1-f197.google.com with SMTP id 41be03b00d2f7-c892143db7fso2737158a12.1 for ; Wed, 15 Jul 2026 23:39:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1784183945; x=1784788745; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=NBWA4To0HeSiFVTDDmoZvlT6DKfi11p5Dhw5I+W7aZc=; b=D2NZPFX1f0oQsXOMHjD/jsOO9jl+ZMFDsnu8vmWN7TOnT/+uLnyC4IYIE81ODOhWDE +Fv4mHYAYrYuO9do1SbNjrNGDdL3JSSt08wtf6M/ljUoyzuK56rqUavSumohU8fdh9oZ HnHn9AC/1Bt32MTT6qvZ5ZLxRt0CU1eBE+J5TG54swhJMH/hmPez+OXbMBd5zyZGGIIe kuRd2cOJnfGnF/hwqi692kfy6uTMYj/L0aUBy/03/VtbQbBL+HY0ewF6Bun63OklE+NB J2sr+jIl5u/ew5ZWAQQNbqnfYSx6fjuqqnwFFX1JKdHlm6xNm8zs34eippucTuNH+g1p coIg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1784183945; x=1784788745; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:x-gm-gg :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to :content-type; bh=NBWA4To0HeSiFVTDDmoZvlT6DKfi11p5Dhw5I+W7aZc=; b=XbilNs792qphWpXGTtxCfYnyVFKXY6HABR5+YFNvL9atyP4WVoPdTjyaN55Rn+rpkr gNfZQUmCqtYeG74zduz2U9Hcvejkvr6khc4cxfxFCRJMxMQZxrfMH2ddBkhBgW+J31PY VBXFbevp4yC+3WR6EXoIbLWVJErDkM1ELc3ufudHoCZNgfdcnN0dW6GzAQu/F6GcFF0Q VhEVdGK+lhn8kuMBinyuGJobCWa5KIx0rA5WnALDMuOc5Uit2h2ZNo/aV8PVJ16jjFt7 TI1MtUFkupYXApSfjdKU9pVXPJl/sqb1/yFQJkpqfQ9o5H48KKlC32PFvqHgw6LqLSxE LlhA== X-Forwarded-Encrypted: i=1; AHgh+RpcAaTskWmfvTmlDO1DAPHBBX1hf17rS7qX/r/zMdLv8V3qxslsEZWsHpPj0AMLvA2IwPQrvABI5L5BWys=@vger.kernel.org X-Gm-Message-State: AOJu0YwbAEqc8LL/EqyI6lhlwD0fjmeeu/ACBS1YcOQ+tf0UkL9XZxJU 5884ycAUjRblfI7Xui44ZAjWic3XhDlD5DR5YkGeaRjTqKoycBvexLC3Qsv/ClMxzc2LfFWhpIp V4HiZ0oN4F4Keu/WX+HIrxNSYS8RUr2kI3Q5Q834H1y5iKPh3CIp2Oy/JrJ5O5zU+Qz0= X-Gm-Gg: AfdE7cnVoI9nwORXWBvQDKn4/K76GAAW+2/aduLpHKISpSM0EWUoJGq+6EJ6EHjzPMV vWNx+WrA9GS2ZotGPjT1ZJ3+6x6KyHEBbW3ZCBKnz8zLuIn7+PG2BM4OB/iEI7ujzLm7EJmg0/d +eyGey2bqOaH5cR7YVtgNaHCAQZASsl5QohpeK3XcmzlHhwUAP2qzHnC+mQd+414b2f4BtviV2x hpIV4FSPLXf4BBx4qz2rQLkW3doaMW8TyU8RE6Yp14SmzPhKzL3TYE8zQ0VimsgReIPr8OmPsU1 /J7MqC2xpgpSkpl3iWAuYDQ39TTAYxCWVf83pdVJRjrdtLkTXTSQkV9imRtIuw9l3Ym1Wv/BYsh NQAN+lCVXm5EbwcxW9q5s4/SKweOg3dQYgA== X-Received: by 2002:a05:6a21:9d48:b0:398:840d:39aa with SMTP id adf61e73a8af0-3c110641880mr21827212637.29.1784183945252; Wed, 15 Jul 2026 23:39:05 -0700 (PDT) X-Received: by 2002:a05:6a21:9d48:b0:398:840d:39aa with SMTP id adf61e73a8af0-3c110641880mr21827183637.29.1784183944623; Wed, 15 Jul 2026 23:39:04 -0700 (PDT) Received: from hu-ptalari-hyd.qualcomm.com ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-cb258eb82desm1320870a12.2.2026.07.15.23.39.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 15 Jul 2026 23:39:04 -0700 (PDT) From: Praveen Talari Date: Thu, 16 Jul 2026 12:08:44 +0530 Subject: [PATCH v3 2/3] i2c: qcom-geni: use dedicated completions for abort and reset events Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260716-fix_cancel_sequence_on_failure_for_i2c-v3-2-9091315a33a0@oss.qualcomm.com> References: <20260716-fix_cancel_sequence_on_failure_for_i2c-v3-0-9091315a33a0@oss.qualcomm.com> In-Reply-To: <20260716-fix_cancel_sequence_on_failure_for_i2c-v3-0-9091315a33a0@oss.qualcomm.com> To: Mukesh Kumar Savaliya , Viken Dadhaniya , Andi Shyti Cc: linux-arm-msm@vger.kernel.org, linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org, Praveen Talari , Naresh Maramaina X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1784183935; l=6064; i=praveen.talari@oss.qualcomm.com; s=20251114; h=from:subject:message-id; bh=JTNdrvBVz+uhkV8v3RVfjPFxWgkdz2CZEuNPO45ffy4=; b=4c6rkF3EL/t04JO7nW3fi5lpPl2ahmeyeEtu4+wksBDN1agumA/shYv+eZvSZJexxB4U7RuMG OB3MQiI6u0rCMkBIRLTd/8hZtfqiA76dY9N0Y6r1yLl1oTZLG4yJjr7 X-Developer-Key: i=praveen.talari@oss.qualcomm.com; a=ed25519; pk=NGK/88fjyHXgfhIKwag7+uIytOmyOypvZ/hDFaYPEss= X-Authority-Analysis: v=2.4 cv=ZpDd7d7G c=1 sm=1 tr=0 ts=6a587c8a cx=c_pps a=rz3CxIlbcmazkYymdCej/Q==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_K5XuSEh1TEqbUxoQ0s3:22 a=EUspDBNiAAAA:8 a=KPPVM4V1oce58VYRkwwA:9 a=QEXdDO2ut3YA:10 a=bFCP_H2QrGi7Okbo017w:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzE2MDA2NyBTYWx0ZWRfX1+FYWYw2xm1v TbO7w9nesGoM9PEduSs3/VRrKZWpXpVBYERHwp0dCt5m0DLJJXkgRdei8Y33wznCJevzi0NoUIi qIgOm88ptpRYOTDKkAEss/ywiBl59NbNi4D3yIbuotSILSmVc4e5ofeG/LpZSl89IPFNMFbVrGC WX68S6kn9uj3jswSpIIXiltLqIy01xLst/wUt0ZfqQPFH4/UXmnEJVMe9fcPVrsyB/PoPH5Ejgy 9H88rUBGrt33EAKHeBv4xcUW71BpDp0M9NBcWb2CCs+SZWO7HQjrORt0Np8vK7kYz0nXwt/XVBB h6KhDdpMHu3g8ho+N9gZYG36h9hGapsrNwepvcfyHg77sPj4uhy8VkLqt0QjAcHs29w/vyNPVVB iQOgUyGgbqXfssnLqSQMks/qJYhBLGg2LgqBk7IJz0GYpqjL6ifoyMP25Dl5KfYsxT6uv0wLRrh /ep+buFcbqnygKSvvzw== X-Proofpoint-GUID: 1jULs6pYrNz70E-e7F998aDDwHjznTBJ X-Proofpoint-Spam-Info: AW1haW4tMjYwNzE2MDA2NyBTYWx0ZWRfX3uzFHlD2Y3F/ Odtx3BHCBNETFbEqq+rEYqH35f6uTLCgfWAgzhMk1OXenWyCFd11GgJNLz8UC2yHX6+Bmb0h5mJ Lk1dRqrtKi1hsUT4Ncd/FrbOfwIMDIM= X-Proofpoint-ORIG-GUID: 1jULs6pYrNz70E-e7F998aDDwHjznTBJ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-07-16_02,2026-07-15_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 bulkscore=0 spamscore=0 lowpriorityscore=0 impostorscore=0 phishscore=0 adultscore=0 suspectscore=0 clxscore=1015 priorityscore=1501 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607160067 The driver uses a common completion event for transfer, abort and DMA reset operations. This allows unrelated completion events to prematurely wake abort and reset waiters, leading to incorrect synchronization. Introduce dedicated completions for abort, TX reset, and RX reset operations, and signal them only from their respective interrupt events. This removes the dependency on shared completion state and eliminates the abort_done flag-based synchronization. Co-developed-by: Naresh Maramaina Signed-off-by: Naresh Maramaina Reviewed-by: Mukesh Kumar Savaliya Signed-off-by: Praveen Talari --- drivers/i2c/busses/i2c-qcom-geni.c | 54 +++++++++++++++++++---------------= ---- 1 file changed, 27 insertions(+), 27 deletions(-) diff --git a/drivers/i2c/busses/i2c-qcom-geni.c b/drivers/i2c/busses/i2c-qc= om-geni.c index 15403edb355a..9490aee4928c 100644 --- a/drivers/i2c/busses/i2c-qcom-geni.c +++ b/drivers/i2c/busses/i2c-qcom-geni.c @@ -113,7 +113,10 @@ struct geni_i2c_dev { int err; struct i2c_adapter adap; struct completion done; + struct completion abort_done; struct completion cancel_done; + struct completion tx_reset_done; + struct completion rx_reset_done; struct i2c_msg *cur; int cur_wr; int cur_rd; @@ -127,7 +130,6 @@ struct geni_i2c_dev { struct dma_chan *rx_c; bool no_dma; bool gpi_mode; - bool abort_done; bool is_tx_multi_desc_xfer; u32 num_msgs; struct geni_i2c_gpi_multi_desc_xfer i2c_multi_desc_config; @@ -256,8 +258,6 @@ static void geni_i2c_err(struct geni_i2c_dev *gi2c, int= err) =20 switch (err) { case GENI_ABORT_DONE: - gi2c->abort_done =3D true; - break; case NACK: case GENI_TIMEOUT: dev_dbg(gi2c->se.dev, "%s\n", gi2c_log[err].msg); @@ -359,12 +359,18 @@ static irqreturn_t geni_i2c_irq(int irq, void *dev) writel_relaxed(dm_rx_st, base + SE_DMA_RX_IRQ_CLR); =20 /* if this is err with done-bit not set, handle that through timeout. */ - if (m_stat & M_CMD_DONE_EN || m_stat & M_CMD_ABORT_EN || - dm_tx_st & TX_DMA_DONE || dm_tx_st & TX_RESET_DONE || - dm_rx_st & RX_DMA_DONE || dm_rx_st & RX_RESET_DONE) + if (m_stat & M_CMD_DONE_EN || + dm_tx_st & TX_DMA_DONE || + dm_rx_st & RX_DMA_DONE) complete(&gi2c->done); if (m_stat & M_CMD_CANCEL_EN) complete(&gi2c->cancel_done); + if (m_stat & M_CMD_ABORT_EN) + complete(&gi2c->abort_done); + if (dm_tx_st & TX_RESET_DONE) + complete(&gi2c->tx_reset_done); + if (dm_rx_st & RX_RESET_DONE) + complete(&gi2c->rx_reset_done); =20 spin_unlock(&gi2c->lock); =20 @@ -376,17 +382,13 @@ static void geni_i2c_abort_xfer(struct geni_i2c_dev *= gi2c) unsigned long time_left =3D ABORT_TIMEOUT; unsigned long flags; =20 + reinit_completion(&gi2c->abort_done); + spin_lock_irqsave(&gi2c->lock, flags); - geni_i2c_err(gi2c, GENI_TIMEOUT); - gi2c->cur =3D NULL; - gi2c->abort_done =3D false; geni_se_abort_m_cmd(&gi2c->se); spin_unlock_irqrestore(&gi2c->lock, flags); =20 - do { - time_left =3D wait_for_completion_timeout(&gi2c->done, time_left); - } while (!gi2c->abort_done && time_left); - + time_left =3D wait_for_completion_timeout(&gi2c->abort_done, time_left); if (!time_left) dev_err(gi2c->se.dev, "Timeout abort_m_cmd\n"); } @@ -414,31 +416,25 @@ static void geni_i2c_cancel_xfer(struct geni_i2c_dev = *gi2c) =20 static void geni_i2c_rx_fsm_rst(struct geni_i2c_dev *gi2c) { - u32 val; unsigned long time_left =3D RST_TIMEOUT; =20 + reinit_completion(&gi2c->rx_reset_done); writel_relaxed(1, gi2c->se.base + SE_DMA_RX_FSM_RST); - do { - time_left =3D wait_for_completion_timeout(&gi2c->done, time_left); - val =3D readl_relaxed(gi2c->se.base + SE_DMA_RX_IRQ_STAT); - } while (!(val & RX_RESET_DONE) && time_left); =20 - if (!(val & RX_RESET_DONE)) + time_left =3D wait_for_completion_timeout(&gi2c->rx_reset_done, time_left= ); + if (!time_left) dev_err(gi2c->se.dev, "Timeout resetting RX_FSM\n"); } =20 static void geni_i2c_tx_fsm_rst(struct geni_i2c_dev *gi2c) { - u32 val; unsigned long time_left =3D RST_TIMEOUT; =20 + reinit_completion(&gi2c->tx_reset_done); writel_relaxed(1, gi2c->se.base + SE_DMA_TX_FSM_RST); - do { - time_left =3D wait_for_completion_timeout(&gi2c->done, time_left); - val =3D readl_relaxed(gi2c->se.base + SE_DMA_TX_IRQ_STAT); - } while (!(val & TX_RESET_DONE) && time_left); =20 - if (!(val & TX_RESET_DONE)) + time_left =3D wait_for_completion_timeout(&gi2c->tx_reset_done, time_left= ); + if (!time_left) dev_err(gi2c->se.dev, "Timeout resetting TX_FSM\n"); } =20 @@ -851,6 +847,7 @@ static int geni_i2c_gpi_xfer(struct geni_i2c_dev *gi2c,= struct i2c_msg msgs[], i for (i =3D 0; i < num; i++) { gi2c->cur =3D &msgs[i]; gi2c->err =3D 0; + reinit_completion(&gi2c->done); dev_dbg(gi2c->se.dev, "msg[%d].len:%d\n", i, gi2c->cur->len); =20 peripheral.stretch =3D 0; @@ -920,6 +917,8 @@ static int geni_i2c_fifo_xfer(struct geni_i2c_dev *gi2c, m_param |=3D ((msgs[i].addr << SLV_ADDR_SHFT) & SLV_ADDR_MSK); =20 gi2c->cur =3D &msgs[i]; + gi2c->err =3D 0; + reinit_completion(&gi2c->done); if (msgs[i].flags & I2C_M_RD) ret =3D geni_i2c_rx_one_msg(gi2c, &msgs[i], m_param); else @@ -939,8 +938,6 @@ static int geni_i2c_xfer(struct i2c_adapter *adap, struct geni_i2c_dev *gi2c =3D i2c_get_adapdata(adap); int ret; =20 - gi2c->err =3D 0; - reinit_completion(&gi2c->done); ret =3D pm_runtime_get_sync(gi2c->se.dev); if (ret < 0) { dev_err(gi2c->se.dev, "error turning SE resources:%d\n", ret); @@ -1132,7 +1129,10 @@ static int geni_i2c_probe(struct platform_device *pd= ev) =20 gi2c->adap.algo =3D &geni_i2c_algo; init_completion(&gi2c->done); + init_completion(&gi2c->abort_done); init_completion(&gi2c->cancel_done); + init_completion(&gi2c->tx_reset_done); + init_completion(&gi2c->rx_reset_done); spin_lock_init(&gi2c->lock); platform_set_drvdata(pdev, gi2c); =20 --=20 2.34.1 From nobody Sat Jul 25 16:22:56 2026 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 71482346E54 for ; Thu, 16 Jul 2026 06:39:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784183951; cv=none; b=UjFqun5Mn/rOGVOquASi43RxK6uFhDZ1F802dYy9ETtl8vQt0YuS6GM2zFx3dM1AKtrn36yyROFDu7YdGguWsjXYQ2s8kaHFfptexczjNU89GH+4LlrH0mF4CA6vIxCfAKeKxvA86OjUMNLeZ/4T1tUyCqXFGpToEg25c7mrQQo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784183951; c=relaxed/simple; bh=uqzz3N+P6+FNeoSvCQyuRHyX3pwmPddM0+AKGis1MLM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=lgy+ZNbuKGx//m98EatFnyYBD4G91q0PSdXf+aFlP1k7BNjitmLLB2FawIOnVxo5W/3xAWy7QxM/Cb/FY2Tr0434Y9mTrJQM2yB3K9yVbnZdDsNdiC0WYvDaJl+13j+5caVWi+10moK2yjPjDpOCLEu4ypqM/myr9lR/st2tF0U= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=j1mjbVXk; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=IEfZKZyg; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="j1mjbVXk"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="IEfZKZyg" Received: from pps.filterd (m0279870.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 66G3wX2H1610250 for ; Thu, 16 Jul 2026 06:39:09 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= skp8VRIl4KbIukNLkOh6qeVxvl4TbXnB0PjjVXS77sA=; b=j1mjbVXkaM5A8Nc2 +1MH+xcyFC4pPa1j1+hsA9HR3iBc6hsYB6HPmPa6I5ZHm2FexREEOnyNOObIhL+u 2XBOeOUAQxYudKAvyy6lZvtT/PG7dqPa3akJsIFGFkpC5yTvOngU/+6iUVIFtZuK F1DxblXhhjJPYDUH4nVh2rUh56OznPIcl81CB7C2y7zLmsVS1P5EPhAGvU2A2INa lZ7OPrLk744oGG7Hg3vnsd/rhBrH3Aelo9DAqaga3hao5hwZN27thV55yMlTFZED Wf5+gFqrjh6dQ7LyYAir1BwW0XhyH2ZBSn+IIwaY8j59HNVwCXSiy3IZHA8YMDYP Uo0ocA== Received: from mail-pf1-f198.google.com (mail-pf1-f198.google.com [209.85.210.198]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4feayfkk2f-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 16 Jul 2026 06:39:09 +0000 (GMT) Received: by mail-pf1-f198.google.com with SMTP id d2e1a72fcca58-8484b9fb055so6378680b3a.0 for ; Wed, 15 Jul 2026 23:39:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1784183948; x=1784788748; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=skp8VRIl4KbIukNLkOh6qeVxvl4TbXnB0PjjVXS77sA=; b=IEfZKZygzlbv5iIsXw+7+EBb4+zzWs/9tBBN5e1pD0/w6qxAxsg8VSU4qIo+E3VOfs C73J4EDN4cDD5LUEcJ3u+8o/orMGCRywlrpTUSF1i0dq0BqVBRFcgrHdOKv9iJhaQf0M GCm6YwAKSb7i2dAtJOcKAniLwUi1tS8toOW9/JWUgOBwv6UCB3dc9huuOSslRYC+Qwfu 3HBgGhpTueLRSx3sLKsbmf3auxnUGlGWkm2XFDUtFEdFYsmquVAMywBIdqTIopbEjGNi eoYgL1XUsaa4iE94scOMwo0j69KG4ypiEqT3i8M2nuxJW+F84VzS6HwYkAZqeMCGmXA5 J6Ng== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1784183948; x=1784788748; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:x-gm-gg :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to :content-type; bh=skp8VRIl4KbIukNLkOh6qeVxvl4TbXnB0PjjVXS77sA=; b=r36rX4Km78pVbNbPgrvWQTmxa+42DlaQJZD7vZNIMLemy91cvlGNPLTTm50wznFOKD t7o0jcZrS5W2IGhwiUrXJ+BI32LLV05Il8Fx9yoLF9DRbNuLJOIYnPSAnOTCPcGm/WfE gWFHOQdoPHa0AeBq95hX5NWnhAHc7PzFGe4UcFlUco/kG/ECLj8MEaov0V2OCFrWYrBC 8RwUisvgHuhWhYeJRhn+Szdg0MoAbXLBQwPJGasbd9Jb0RAwhkf1/o7XHl1RMra5tbJC gNsARpvDvo/DEb//ZWbsw8T6+8NW34n7hZUN87luc/j+Yw66xtueAjOLCPybQ3H7679n cuIA== X-Forwarded-Encrypted: i=1; AHgh+Roh0SzAHkJ8/WCtu0hTd2NaYarWk2v97sURb/xNT6XuKdV79bXoal02rvRRQ762P9mlRTLOFZFy1Io1e5Q=@vger.kernel.org X-Gm-Message-State: AOJu0YzZYYIn1NNxTaibA293WTNaGf0w47kI0YRN1ZGUE21Pt7MYmDtb xJxeKKCFlaKqxuHnpTrHKX94WqPfuPucCiE4Iiy0boSJGer5aUHRy+6QmiQSR4Rv95kpEVeTA3c 7gYBwTnCkRTXLTc+72f+H9PmUddqbkIK++fsQKq4GG9XRJ0Wfeb0P9gGDwNOag6fHTko= X-Gm-Gg: AfdE7cnttfUQ5ZHbZYPZPwLjh8xmJm48HzqewmJbVMLjCcZ4mEUUCpboaZYcKY4UWgd rCmgWea7FeJZR9VbhtaBhBiJSu1RIgU3XCCMTZ9xUit88diSzJOaJx2VEghOQacVN7qoEJ9HUH9 cfyR1zcqD7F5j5/megF5jkr/zajJpQ/GyzAZ6EkN4pj8qu+cqk70Z0cxKMv3V+TYRnAJvZzzkwp Z0RrVU20LIwE4XefTxg8ono2uB+EukfVnsfL85PzCmQHNXETYLdTjgXJFWKRQo9yH633fRv7+uJ jAJKC5wbfdxhB5GvLAF6nqr/Td4uZ1IE6hDohj4eLBysHp4RvnoqUWior82pliQE6m2GBzG0uoZ tMING573EHXf+m9HrUkt+LFSBTDO5ichZtw== X-Received: by 2002:a05:6a00:9501:b0:848:50a5:a70b with SMTP id d2e1a72fcca58-8488962feb7mr20031116b3a.21.1784183948386; Wed, 15 Jul 2026 23:39:08 -0700 (PDT) X-Received: by 2002:a05:6a00:9501:b0:848:50a5:a70b with SMTP id d2e1a72fcca58-8488962feb7mr20031095b3a.21.1784183947835; Wed, 15 Jul 2026 23:39:07 -0700 (PDT) Received: from hu-ptalari-hyd.qualcomm.com ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-cb258eb82desm1320870a12.2.2026.07.15.23.39.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 15 Jul 2026 23:39:07 -0700 (PDT) From: Praveen Talari Date: Thu, 16 Jul 2026 12:08:45 +0530 Subject: [PATCH v3 3/3] i2c: qcom-geni: distinguish address-phase and data-phase NACK Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260716-fix_cancel_sequence_on_failure_for_i2c-v3-3-9091315a33a0@oss.qualcomm.com> References: <20260716-fix_cancel_sequence_on_failure_for_i2c-v3-0-9091315a33a0@oss.qualcomm.com> In-Reply-To: <20260716-fix_cancel_sequence_on_failure_for_i2c-v3-0-9091315a33a0@oss.qualcomm.com> To: Mukesh Kumar Savaliya , Viken Dadhaniya , Andi Shyti Cc: linux-arm-msm@vger.kernel.org, linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org, Praveen Talari , Naresh Maramaina X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1784183935; l=4780; i=praveen.talari@oss.qualcomm.com; s=20251114; h=from:subject:message-id; bh=uqzz3N+P6+FNeoSvCQyuRHyX3pwmPddM0+AKGis1MLM=; b=IOn7XZAr/KGNzDe8dYlDpdJ/MJmxxl7rMDtaWjHPdO7jBcZrf8orkmLIYwPj4bdZxNAq8VJbn S0PukxN2YvxA3UQwmN+GGoyiZ9+4mQDJtaTxzDCwM9w23UKEh089yTc X-Developer-Key: i=praveen.talari@oss.qualcomm.com; a=ed25519; pk=NGK/88fjyHXgfhIKwag7+uIytOmyOypvZ/hDFaYPEss= X-Proofpoint-GUID: OOqhX_DfzrqxOg4eDkcSmaxXgTxA7paX X-Authority-Analysis: v=2.4 cv=WoMb99fv c=1 sm=1 tr=0 ts=6a587c8d cx=c_pps a=m5Vt/hrsBiPMCU0y4gIsQw==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=gowsoOTTUOVcmtlkKump:22 a=EUspDBNiAAAA:8 a=wcK_sNrN2goZDBkbqrQA:9 a=QEXdDO2ut3YA:10 a=IoOABgeZipijB_acs4fv:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzE2MDA2NyBTYWx0ZWRfXwzuVsnw5j1wq zWs4UKXZbvr3GufYxEuVKWody/Amo6W6Pty3qqFBI2d7bj1pBjsp00fjqxaN9xcMS4Ei5mV5TtK DGCX9o2SLVLPIAjDhUTQfVKOuwTqPB2UpnkL98zvmQniwMNiywcSev7X2+JcLbR2DSvX2SwBJoq h32LwC6alnW4/cTrbaTTg8qDMhpdxbCLcoeOUGUqzru6+U/2F/MA7lCdjHLXCgCh9eQg98KPlf1 ya0avXGnhzdj+M0DZ6Mze0jE79B6Vp9pZk4LozdfcjG3YMaqd0Ny/1Kfg/AMiTECMDLQ4+wki9l xEyV61E8fr+E20lQUi9RfwBSK7Irf9bcjvptxHK27IsJ6bx6OCzBzteASceSGR4BGVoR5MLGRMP VaYQgrR985ONjwdHM4NeSytpy2j53zwcE5DmCGx2tCSd1oYeFrjlPT9L6/PifzFsklcKJGELK5c nlPHuVi4W5QKbjRfXaA== X-Proofpoint-ORIG-GUID: OOqhX_DfzrqxOg4eDkcSmaxXgTxA7paX X-Proofpoint-Spam-Info: AW1haW4tMjYwNzE2MDA2NyBTYWx0ZWRfXzoPTU4/4e1tj PxA8i0ho/fRhWEMk/KFIdCVZG8Gp77xIH5L74BGkTH/eUdC/EolGar0Pzk9q1TRSk04IpY14kki 8ahMKz6SIlI0pi/VTYwar6IFb+c4++g= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-07-16_02,2026-07-15_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 bulkscore=0 clxscore=1015 spamscore=0 lowpriorityscore=0 suspectscore=0 priorityscore=1501 malwarescore=0 phishscore=0 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607160067 The M_GP_IRQ_1 interrupt signals a NACK condition, but does not distinguish whether it occurred during the address phase or the data phase. The driver always attempted cancel and DMA FSM reset on any NACK, which is incorrect for an address NACK since the DMA engine was never armed and the hardware requires no recovery. Add geni_i2c_check_addr_data_nack() to distinguish the two cases by reading SE_GENI_M_GP_LENGTH after the NACK event. A zero value means the address phase was NACKed (ADDR_NACK) and no DMA recovery is needed. A non-zero value on a write transfer means a data byte was NACKed (DATA_NACK) and the normal cancel and DMA FSM reset path must run. Co-developed-by: Naresh Maramaina Signed-off-by: Naresh Maramaina Signed-off-by: Praveen Talari Reviewed-by: Mukesh Kumar Savaliya --- drivers/i2c/busses/i2c-qcom-geni.c | 29 ++++++++++++++++++++--------- 1 file changed, 20 insertions(+), 9 deletions(-) diff --git a/drivers/i2c/busses/i2c-qcom-geni.c b/drivers/i2c/busses/i2c-qc= om-geni.c index 9490aee4928c..c8562c06bf74 100644 --- a/drivers/i2c/busses/i2c-qcom-geni.c +++ b/drivers/i2c/busses/i2c-qcom-geni.c @@ -56,7 +56,8 @@ =20 enum geni_i2c_err_code { GP_IRQ0, - NACK, + ADDR_NACK, + DATA_NACK, GP_IRQ2, BUS_PROTO, ARB_LOST, @@ -67,7 +68,7 @@ enum geni_i2c_err_code { GENI_TIMEOUT, }; =20 -#define DM_I2C_CB_ERR ((BIT(NACK) | BIT(BUS_PROTO) | BIT(ARB_LOST)) \ +#define DM_I2C_CB_ERR ((BIT(ADDR_NACK) | BIT(BUS_PROTO) | BIT(ARB_LOST)) \ << 5) =20 #define I2C_AUTO_SUSPEND_DELAY 250 @@ -143,7 +144,8 @@ struct geni_i2c_err_log { =20 static const struct geni_i2c_err_log gi2c_log[] =3D { [GP_IRQ0] =3D {-EIO, "Unknown I2C err GP_IRQ0"}, - [NACK] =3D {-ENXIO, "NACK: slv unresponsive, check its power/reset-ln"}, + [ADDR_NACK] =3D {-ENXIO, "NACK: target device unresponsive, check its pow= er/reset-ln"}, + [DATA_NACK] =3D {-EIO, "Data NACK: TX transfer NACK"}, [GP_IRQ2] =3D {-EIO, "Unknown I2C err GP IRQ2"}, [BUS_PROTO] =3D {-EPROTO, "Bus proto err, noisy/unexpected start/stop"}, [ARB_LOST] =3D {-EAGAIN, "Bus arbitration lost, clock line undriveable"}, @@ -258,7 +260,8 @@ static void geni_i2c_err(struct geni_i2c_dev *gi2c, int= err) =20 switch (err) { case GENI_ABORT_DONE: - case NACK: + case ADDR_NACK: + case DATA_NACK: case GENI_TIMEOUT: dev_dbg(gi2c->se.dev, "%s\n", gi2c_log[err].msg); break; @@ -269,6 +272,14 @@ static void geni_i2c_err(struct geni_i2c_dev *gi2c, in= t err) } } =20 +static void geni_i2c_check_addr_data_nack(struct geni_i2c_dev *gi2c) +{ + if (!readl_relaxed(gi2c->se.base + SE_GENI_M_GP_LENGTH)) + geni_i2c_err(gi2c, ADDR_NACK); + else if (!(gi2c->cur->flags & I2C_M_RD)) + geni_i2c_err(gi2c, DATA_NACK); +} + static irqreturn_t geni_i2c_irq(int irq, void *dev) { struct geni_i2c_dev *gi2c =3D dev; @@ -294,7 +305,7 @@ static irqreturn_t geni_i2c_irq(int irq, void *dev) m_stat & (M_CMD_FAILURE_EN | M_CMD_ABORT_EN) || dm_rx_st & (DM_I2C_CB_ERR)) { if (m_stat & M_GP_IRQ_1_EN) - geni_i2c_err(gi2c, NACK); + geni_i2c_check_addr_data_nack(gi2c); if (m_stat & M_GP_IRQ_3_EN) geni_i2c_err(gi2c, BUS_PROTO); if (m_stat & M_GP_IRQ_4_EN) @@ -443,7 +454,7 @@ static void geni_i2c_rx_msg_cleanup(struct geni_i2c_dev= *gi2c, { gi2c->cur_rd =3D 0; if (gi2c->dma_buf) { - if (gi2c->err) + if (gi2c->err && gi2c->err !=3D gi2c_log[ADDR_NACK].err) geni_i2c_rx_fsm_rst(gi2c); geni_se_rx_dma_unprep(&gi2c->se, gi2c->dma_addr, gi2c->xfer_len); i2c_put_dma_safe_msg_buf(gi2c->dma_buf, cur, !gi2c->err); @@ -455,7 +466,7 @@ static void geni_i2c_tx_msg_cleanup(struct geni_i2c_dev= *gi2c, { gi2c->cur_wr =3D 0; if (gi2c->dma_buf) { - if (gi2c->err) + if (gi2c->err && gi2c->err !=3D gi2c_log[ADDR_NACK].err) geni_i2c_tx_fsm_rst(gi2c); geni_se_tx_dma_unprep(&gi2c->se, gi2c->dma_addr, gi2c->xfer_len); i2c_put_dma_safe_msg_buf(gi2c->dma_buf, cur, !gi2c->err); @@ -493,7 +504,7 @@ static int geni_i2c_rx_one_msg(struct geni_i2c_dev *gi2= c, struct i2c_msg *msg, =20 cur =3D gi2c->cur; time_left =3D wait_for_completion_timeout(&gi2c->done, XFER_TIMEOUT); - if (!time_left) + if (!time_left || (gi2c->err && gi2c->err !=3D gi2c_log[ADDR_NACK].err)) geni_i2c_cancel_xfer(gi2c); =20 geni_i2c_rx_msg_cleanup(gi2c, cur); @@ -535,7 +546,7 @@ static int geni_i2c_tx_one_msg(struct geni_i2c_dev *gi2= c, struct i2c_msg *msg, =20 cur =3D gi2c->cur; time_left =3D wait_for_completion_timeout(&gi2c->done, XFER_TIMEOUT); - if (!time_left) + if (!time_left || (gi2c->err && gi2c->err !=3D gi2c_log[ADDR_NACK].err)) geni_i2c_cancel_xfer(gi2c); =20 geni_i2c_tx_msg_cleanup(gi2c, cur); --=20 2.34.1