From nobody Sat Jul 25 16:49:30 2026 Received: from luna.linkmauve.fr (82-65-109-163.subs.proxad.net [82.65.109.163]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7C4263BFE3F; Wed, 15 Jul 2026 19:55:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=82.65.109.163 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784145331; cv=none; b=ONHvZThiNRu+oa/zzk4VmlCk761WZJbYdTPg7jYyBqe9BRxlYw6ICKde18eh0hKPn96d+3NykD2pyNiBQSofdSWTPQ79zgTOOgiOq+aFM1fn89qRYFXCQhH60MM8RZwDyMJ95ZWLd3ZU4oCuW36djcpt2k8UPWYTfhncgncAU/s= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784145331; c=relaxed/simple; bh=HQ8beO8wCBli7U4Gv/H+UsbdWNrMMNBM0UF46d21HpY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Q+WaqfopA0W9iFTkJIZuNGs6PD/6YFHzwZYFWbcRauZiU1zPSJe3SQvxdRTn3nRnBoAmGl5Sm/ocmukoni15MQi0ilATPlm4yfbdclFNImnU/Eg2J1pnGQFYhz1j+LWSwwWRP3erC5tRjb3gAADL22y1Oif+fk8cW02BnaOJDk0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=linkmauve.fr; spf=pass smtp.mailfrom=linkmauve.fr; arc=none smtp.client-ip=82.65.109.163 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=linkmauve.fr Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linkmauve.fr Received: by luna.linkmauve.fr (Postfix, from userid 1000) id EC76DF40D2F; Wed, 15 Jul 2026 21:55:24 +0200 (CEST) From: Link Mauve To: Srinivas Kandagatla Cc: Link Mauve , Andy Shevchenko , Sven Peter , Janne Grunau , Neal Gompa , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Vladimir Zapolskiy , =?UTF-8?q?Andr=C3=A9=20Draszik?= , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Orson Zhai , Baolin Wang , Chunyan Zhang , Maxime Coquelin , Alexandre Torgue , Kalyani Akula , Michal Simek , Miguel Ojeda , Boqun Feng , Gary Guo , =?UTF-8?q?Bj=C3=B6rn=20Roy=20Baron?= , Benno Lossin , Andreas Hindborg , Alice Ryhl , Trevor Gross , Danilo Krummrich , Daniel Almeida , Tamir Duberstein , Alexandre Courbot , =?UTF-8?q?Onur=20=C3=96zkan?= , asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, imx@lists.linux.dev, linux-amlogic@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, rust-for-linux@vger.kernel.org Subject: [PATCH v2 1/2] nvmem: core: deprecate reg_write callback and add reg_write_const Date: Wed, 15 Jul 2026 21:55:17 +0200 Message-ID: <20260715195520.25410-2-linkmauve@linkmauve.fr> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20260715195520.25410-1-linkmauve@linkmauve.fr> References: <20260715195520.25410-1-linkmauve@linkmauve.fr> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" This callback used to take a mutable void * for no reason, which causes the compiler to be unaware that the val buffer should never be modified by the callback. This was found while drafting the nvmem-provider Rust abstraction. Signed-off-by: Link Mauve --- drivers/nvmem/core.c | 26 +++++++++++++++++--------- drivers/nvmem/internals.h | 1 + include/linux/nvmem-provider.h | 6 +++++- 3 files changed, 23 insertions(+), 10 deletions(-) diff --git a/drivers/nvmem/core.c b/drivers/nvmem/core.c index e871181751f3..24c9e6f953c6 100644 --- a/drivers/nvmem/core.c +++ b/drivers/nvmem/core.c @@ -62,13 +62,20 @@ static int __nvmem_reg_read(struct nvmem_device *nvmem,= unsigned int offset, } =20 static int __nvmem_reg_write(struct nvmem_device *nvmem, unsigned int offs= et, - void *val, size_t bytes) + const void *val, size_t bytes) { int ret; =20 + if (nvmem->reg_write_const) { + gpiod_set_value_cansleep(nvmem->wp_gpio, 0); + ret =3D nvmem->reg_write_const(nvmem->priv, offset, val, bytes); + gpiod_set_value_cansleep(nvmem->wp_gpio, 1); + return ret; + } + if (nvmem->reg_write) { gpiod_set_value_cansleep(nvmem->wp_gpio, 0); - ret =3D nvmem->reg_write(nvmem->priv, offset, val, bytes); + ret =3D nvmem->reg_write(nvmem->priv, offset, (void *)val, bytes); gpiod_set_value_cansleep(nvmem->wp_gpio, 1); return ret; } @@ -264,7 +271,7 @@ static ssize_t bin_attr_nvmem_write(struct file *filp, = struct kobject *kobj, =20 count =3D round_down(count, nvmem->word_size); =20 - if (!nvmem->reg_write || nvmem->read_only) + if (!nvmem->reg_write || !nvmem->reg_write_const || nvmem->read_only) return -EPERM; =20 rc =3D nvmem_reg_write(nvmem, pos, buf, count); @@ -285,7 +292,7 @@ static umode_t nvmem_bin_attr_get_umode(struct nvmem_de= vice *nvmem) if (!nvmem->read_only) mode |=3D 0200; =20 - if (!nvmem->reg_write) + if (!nvmem->reg_write || !nvmem->reg_write_const) mode &=3D ~0200; =20 if (!nvmem->reg_read) @@ -321,13 +328,13 @@ static umode_t nvmem_attr_is_visible(struct kobject *= kobj, struct nvmem_device *nvmem =3D to_nvmem_device(dev); =20 /* - * If the device has no .reg_write operation, do not allow - * configuration as read-write. + * If the device has no .reg_write or .reg_write_const operation, do + * not allow configuration as read-write. * If the device is set as read-only by configuration, it * can be forced into read-write mode using the 'force_ro' * attribute. */ - if (attr =3D=3D &dev_attr_force_ro.attr && !nvmem->reg_write) + if (attr =3D=3D &dev_attr_force_ro.attr && !nvmem->reg_write && !nvmem->r= eg_write_const) return 0; /* Attribute not visible */ =20 return attr->mode; @@ -905,7 +912,7 @@ struct nvmem_device *nvmem_register(const struct nvmem_= config *config) if (!config->dev) return ERR_PTR(-EINVAL); =20 - if (!config->reg_read && !config->reg_write) + if (!config->reg_read && !config->reg_write && !config->reg_write_const) return ERR_PTR(-EINVAL); =20 nvmem =3D kzalloc_obj(*nvmem); @@ -950,6 +957,7 @@ struct nvmem_device *nvmem_register(const struct nvmem_= config *config) nvmem->type =3D config->type; nvmem->reg_read =3D config->reg_read; nvmem->reg_write =3D config->reg_write; + nvmem->reg_write_const =3D config->reg_write_const; nvmem->keepout =3D config->keepout; nvmem->nkeepout =3D config->nkeepout; if (config->of_node) @@ -975,7 +983,7 @@ struct nvmem_device *nvmem_register(const struct nvmem_= config *config) goto err_put_device; =20 nvmem->read_only =3D device_property_present(config->dev, "read-only") || - config->read_only || !nvmem->reg_write; + config->read_only || !nvmem->reg_write || !nvmem->reg_write_const; =20 #ifdef CONFIG_NVMEM_SYSFS nvmem->dev.groups =3D nvmem_dev_groups; diff --git a/drivers/nvmem/internals.h b/drivers/nvmem/internals.h index 18fed57270e5..184711dfd6a6 100644 --- a/drivers/nvmem/internals.h +++ b/drivers/nvmem/internals.h @@ -29,6 +29,7 @@ struct nvmem_device { unsigned int nkeepout; nvmem_reg_read_t reg_read; nvmem_reg_write_t reg_write; + nvmem_reg_write_const_t reg_write_const; struct gpio_desc *wp_gpio; struct nvmem_layout *layout; void *priv; diff --git a/include/linux/nvmem-provider.h b/include/linux/nvmem-provider.h index f3b13da78aac..c6e77ba1a8c1 100644 --- a/include/linux/nvmem-provider.h +++ b/include/linux/nvmem-provider.h @@ -20,6 +20,8 @@ typedef int (*nvmem_reg_read_t)(void *priv, unsigned int = offset, void *val, size_t bytes); typedef int (*nvmem_reg_write_t)(void *priv, unsigned int offset, void *val, size_t bytes); +typedef int (*nvmem_reg_write_const_t)(void *priv, unsigned int offset, + const void *val, size_t bytes); /* used for vendor specific post processing of cell data */ typedef int (*nvmem_cell_post_process_t)(void *priv, const char *id, int i= ndex, unsigned int offset, void *buf, @@ -93,7 +95,8 @@ struct nvmem_cell_info { * @root_only: Device is accessibly to root only. * @of_node: If given, this will be used instead of the parent's of_node. * @reg_read: Callback to read data; return zero if successful. - * @reg_write: Callback to write data; return zero if successful. + * @reg_write: **DEPRECATED** - please use reg_write_const instead. + * @reg_write_const: Callback to write data; return zero if successful. * @size: Device size. * @word_size: Minimum read/write access granularity. * @stride: Minimum read/write access stride. @@ -128,6 +131,7 @@ struct nvmem_config { struct device_node *of_node; nvmem_reg_read_t reg_read; nvmem_reg_write_t reg_write; + nvmem_reg_write_const_t reg_write_const; int size; int word_size; int stride; --=20 2.55.0 From nobody Sat Jul 25 16:49:30 2026 Received: from luna.linkmauve.fr (82-65-109-163.subs.proxad.net [82.65.109.163]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D1BBC3C10B3; Wed, 15 Jul 2026 19:55:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=82.65.109.163 ARC-Seal: i=1; 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spf=pass smtp.mailfrom=linkmauve.fr Received: by luna.linkmauve.fr (Postfix, from userid 1000) id 25A02F40D30; Wed, 15 Jul 2026 21:55:26 +0200 (CEST) From: Link Mauve To: Srinivas Kandagatla Cc: Link Mauve , Andy Shevchenko , Sven Peter , Janne Grunau , Neal Gompa , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Vladimir Zapolskiy , =?UTF-8?q?Andr=C3=A9=20Draszik?= , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Orson Zhai , Baolin Wang , Chunyan Zhang , Maxime Coquelin , Alexandre Torgue , Kalyani Akula , Michal Simek , Miguel Ojeda , Boqun Feng , Gary Guo , =?UTF-8?q?Bj=C3=B6rn=20Roy=20Baron?= , Benno Lossin , Andreas Hindborg , Alice Ryhl , Trevor Gross , Danilo Krummrich , Daniel Almeida , Tamir Duberstein , Alexandre Courbot , =?UTF-8?q?Onur=20=C3=96zkan?= , asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, imx@lists.linux.dev, linux-amlogic@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, rust-for-linux@vger.kernel.org Subject: [PATCH v2 2/2] nvmem: make all reg_write callbacks take const void * Date: Wed, 15 Jul 2026 21:55:18 +0200 Message-ID: <20260715195520.25410-3-linkmauve@linkmauve.fr> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20260715195520.25410-1-linkmauve@linkmauve.fr> References: <20260715195520.25410-1-linkmauve@linkmauve.fr> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The previous commit switched from a pointer to mutable data to a pointer to immutable data, so let=E2=80=99s fix all users of this API. Signed-off-by: Link Mauve --- drivers/nvmem/apple-spmi-nvmem.c | 2 +- drivers/nvmem/bcm-ocotp.c | 6 +++--- drivers/nvmem/imx-ocotp-scu.c | 6 +++--- drivers/nvmem/imx-ocotp.c | 6 +++--- drivers/nvmem/lan9662-otpc.c | 6 +++--- drivers/nvmem/lpc18xx_eeprom.c | 6 +++--- drivers/nvmem/max77759-nvmem.c | 4 ++-- drivers/nvmem/meson-efuse.c | 6 +++--- drivers/nvmem/qcom-spmi-sdam.c | 4 ++-- drivers/nvmem/qfprom.c | 6 +++--- drivers/nvmem/rave-sp-eeprom.c | 6 +++--- drivers/nvmem/snvs_lpgpr.c | 4 ++-- drivers/nvmem/sprd-efuse.c | 6 +++--- drivers/nvmem/stm32-bsec-optee-ta.c | 2 +- drivers/nvmem/stm32-bsec-optee-ta.h | 4 ++-- drivers/nvmem/stm32-romem.c | 10 +++++----- drivers/nvmem/zynqmp_nvmem.c | 6 +++--- 17 files changed, 45 insertions(+), 45 deletions(-) diff --git a/drivers/nvmem/apple-spmi-nvmem.c b/drivers/nvmem/apple-spmi-nv= mem.c index 88614005d5ce..cbf25c53d048 100644 --- a/drivers/nvmem/apple-spmi-nvmem.c +++ b/drivers/nvmem/apple-spmi-nvmem.c @@ -29,7 +29,7 @@ static int apple_spmi_nvmem_probe(struct spmi_device *sde= v) .stride =3D 1, .size =3D 0xffff, .reg_read =3D (void *)regmap_bulk_read, - .reg_write =3D (void *)regmap_bulk_write, + .reg_write_const =3D (void *)regmap_bulk_write, }; =20 regmap =3D devm_regmap_init_spmi_ext(sdev, &apple_spmi_regmap_config); diff --git a/drivers/nvmem/bcm-ocotp.c b/drivers/nvmem/bcm-ocotp.c index 2490f44caa40..5853ae0fe02d 100644 --- a/drivers/nvmem/bcm-ocotp.c +++ b/drivers/nvmem/bcm-ocotp.c @@ -179,11 +179,11 @@ static int bcm_otpc_read(void *context, unsigned int = offset, void *val, return 0; } =20 -static int bcm_otpc_write(void *context, unsigned int offset, void *val, +static int bcm_otpc_write(void *context, unsigned int offset, const void *= val, size_t bytes) { struct otpc_priv *priv =3D context; - u32 *buf =3D val; + const u32 *buf =3D val; u32 bytes_written; u32 address =3D offset / priv->config->word_size; int i, ret; @@ -223,7 +223,7 @@ static struct nvmem_config bcm_otpc_nvmem_config =3D { .word_size =3D 4, .stride =3D 4, .reg_read =3D bcm_otpc_read, - .reg_write =3D bcm_otpc_write, + .reg_write_const =3D bcm_otpc_write, }; =20 static const struct of_device_id bcm_otpc_dt_ids[] =3D { diff --git a/drivers/nvmem/imx-ocotp-scu.c b/drivers/nvmem/imx-ocotp-scu.c index 517d83e11af2..57008228100f 100644 --- a/drivers/nvmem/imx-ocotp-scu.c +++ b/drivers/nvmem/imx-ocotp-scu.c @@ -178,11 +178,11 @@ static int imx_scu_ocotp_read(void *context, unsigned= int offset, } =20 static int imx_scu_ocotp_write(void *context, unsigned int offset, - void *val, size_t bytes) + const void *val, size_t bytes) { struct ocotp_priv *priv =3D context; struct arm_smccc_res res; - u32 *buf =3D val; + const u32 *buf =3D val; u32 tmp; u32 index; int ret; @@ -226,7 +226,7 @@ static struct nvmem_config imx_scu_ocotp_nvmem_config = =3D { .stride =3D 1, .owner =3D THIS_MODULE, .reg_read =3D imx_scu_ocotp_read, - .reg_write =3D imx_scu_ocotp_write, + .reg_write_const =3D imx_scu_ocotp_write, }; =20 static const struct of_device_id imx_scu_ocotp_dt_ids[] =3D { diff --git a/drivers/nvmem/imx-ocotp.c b/drivers/nvmem/imx-ocotp.c index 108d78d7f6cb..36d4a37aed93 100644 --- a/drivers/nvmem/imx-ocotp.c +++ b/drivers/nvmem/imx-ocotp.c @@ -310,11 +310,11 @@ static void imx_ocotp_set_imx7_timing(struct ocotp_pr= iv *priv) writel(timing, priv->base + IMX_OCOTP_ADDR_TIMING); } =20 -static int imx_ocotp_write(void *context, unsigned int offset, void *val, +static int imx_ocotp_write(void *context, unsigned int offset, const void = *val, size_t bytes) { struct ocotp_priv *priv =3D context; - u32 *buf =3D val; + const u32 *buf =3D val; int ret; =20 u32 ctrl; @@ -483,7 +483,7 @@ static struct nvmem_config imx_ocotp_nvmem_config =3D { .word_size =3D 4, .stride =3D 1, .reg_read =3D imx_ocotp_read, - .reg_write =3D imx_ocotp_write, + .reg_write_const =3D imx_ocotp_write, }; =20 static const struct ocotp_params imx6q_params =3D { diff --git a/drivers/nvmem/lan9662-otpc.c b/drivers/nvmem/lan9662-otpc.c index 56fc19f092a7..7e4579c404d4 100644 --- a/drivers/nvmem/lan9662-otpc.c +++ b/drivers/nvmem/lan9662-otpc.c @@ -140,10 +140,10 @@ static int lan9662_otp_read(void *context, unsigned i= nt offset, } =20 static int lan9662_otp_write(void *context, unsigned int offset, - void *_val, size_t bytes) + const void *_val, size_t bytes) { struct lan9662_otp *otp =3D context; - u8 *val =3D _val; + const u8 *val =3D _val; u8 data, newdata; int i, rc =3D 0; =20 @@ -175,7 +175,7 @@ static struct nvmem_config otp_config =3D { .stride =3D 1, .word_size =3D 1, .reg_read =3D lan9662_otp_read, - .reg_write =3D lan9662_otp_write, + .reg_write_const =3D lan9662_otp_write, .size =3D OTP_MEM_SIZE, }; =20 diff --git a/drivers/nvmem/lpc18xx_eeprom.c b/drivers/nvmem/lpc18xx_eeprom.c index 504155e30bab..78a35ef095fb 100644 --- a/drivers/nvmem/lpc18xx_eeprom.c +++ b/drivers/nvmem/lpc18xx_eeprom.c @@ -87,7 +87,7 @@ static int lpc18xx_eeprom_busywait_until_prog(struct lpc1= 8xx_eeprom_dev *eeprom) } =20 static int lpc18xx_eeprom_gather_write(void *context, unsigned int reg, - void *val, size_t bytes) + const void *val, size_t bytes) { struct lpc18xx_eeprom_dev *eeprom =3D context; unsigned int offset =3D reg; @@ -109,7 +109,7 @@ static int lpc18xx_eeprom_gather_write(void *context, u= nsigned int reg, usleep_range(100, 200); =20 while (bytes) { - writel(*(u32 *)val, eeprom->mem_base + offset); + writel(*(const u32 *)val, eeprom->mem_base + offset); ret =3D lpc18xx_eeprom_busywait_until_prog(eeprom); if (ret < 0) return ret; @@ -155,7 +155,7 @@ static struct nvmem_config lpc18xx_nvmem_config =3D { .stride =3D 4, .word_size =3D 4, .reg_read =3D lpc18xx_eeprom_read, - .reg_write =3D lpc18xx_eeprom_gather_write, + .reg_write_const =3D lpc18xx_eeprom_gather_write, }; =20 static int lpc18xx_eeprom_probe(struct platform_device *pdev) diff --git a/drivers/nvmem/max77759-nvmem.c b/drivers/nvmem/max77759-nvmem.c index 283000ec3a2c..86c025cfc2f6 100644 --- a/drivers/nvmem/max77759-nvmem.c +++ b/drivers/nvmem/max77759-nvmem.c @@ -59,7 +59,7 @@ static int max77759_nvmem_reg_read(void *priv, unsigned i= nt offset, } =20 static int max77759_nvmem_reg_write(void *priv, unsigned int offset, - void *val, size_t bytes) + const void *val, size_t bytes) { struct max77759_nvmem *nvmem =3D priv; DEFINE_FLEX(struct max77759_maxq_command, cmd, cmd, length, @@ -99,7 +99,7 @@ static int max77759_nvmem_probe(struct platform_device *p= dev) .word_size =3D sizeof(u8), .stride =3D sizeof(u8), .reg_read =3D max77759_nvmem_reg_read, - .reg_write =3D max77759_nvmem_reg_write, + .reg_write_const =3D max77759_nvmem_reg_write, }; struct max77759_nvmem *nvmem; =20 diff --git a/drivers/nvmem/meson-efuse.c b/drivers/nvmem/meson-efuse.c index d7f9ac99a212..94b24d11a1a3 100644 --- a/drivers/nvmem/meson-efuse.c +++ b/drivers/nvmem/meson-efuse.c @@ -27,12 +27,12 @@ static int meson_efuse_read(void *context, unsigned int= offset, } =20 static int meson_efuse_write(void *context, unsigned int offset, - void *val, size_t bytes) + const void *val, size_t bytes) { struct meson_sm_firmware *fw =3D context; int ret; =20 - ret =3D meson_sm_call_write(fw, (u8 *)val, bytes, SM_EFUSE_WRITE, offset, + ret =3D meson_sm_call_write(fw, (void *)val, bytes, SM_EFUSE_WRITE, offse= t, bytes, 0, 0, 0); =20 return ret < 0 ? ret : 0; @@ -83,7 +83,7 @@ static int meson_efuse_probe(struct platform_device *pdev) econfig->stride =3D 1; econfig->word_size =3D 1; econfig->reg_read =3D meson_efuse_read; - econfig->reg_write =3D meson_efuse_write; + econfig->reg_write_const =3D meson_efuse_write; econfig->size =3D size; econfig->priv =3D fw; =20 diff --git a/drivers/nvmem/qcom-spmi-sdam.c b/drivers/nvmem/qcom-spmi-sdam.c index 4f1cca6eab71..6758cbc34577 100644 --- a/drivers/nvmem/qcom-spmi-sdam.c +++ b/drivers/nvmem/qcom-spmi-sdam.c @@ -81,7 +81,7 @@ static int sdam_read(void *priv, unsigned int offset, voi= d *val, return rc; } =20 -static int sdam_write(void *priv, unsigned int offset, void *val, +static int sdam_write(void *priv, unsigned int offset, const void *val, size_t bytes) { struct sdam_chip *sdam =3D priv; @@ -147,7 +147,7 @@ static int sdam_probe(struct platform_device *pdev) sdam->sdam_config.size =3D sdam->size; sdam->sdam_config.word_size =3D 1; sdam->sdam_config.reg_read =3D sdam_read; - sdam->sdam_config.reg_write =3D sdam_write; + sdam->sdam_config.reg_write_const =3D sdam_write; sdam->sdam_config.priv =3D sdam; =20 nvmem =3D devm_nvmem_register(&pdev->dev, &sdam->sdam_config); diff --git a/drivers/nvmem/qfprom.c b/drivers/nvmem/qfprom.c index 1de3435df116..16b7f647a3f6 100644 --- a/drivers/nvmem/qfprom.c +++ b/drivers/nvmem/qfprom.c @@ -252,13 +252,13 @@ static int qfprom_enable_fuse_blowing(const struct qf= prom_priv *priv, * * Return: 0 or -err. */ -static int qfprom_reg_write(void *context, unsigned int reg, void *_val, +static int qfprom_reg_write(void *context, unsigned int reg, const void *_= val, size_t bytes) { struct qfprom_priv *priv =3D context; struct qfprom_touched_values old; int words =3D bytes / 4; - u32 *value =3D _val; + const u32 *value =3D _val; u32 blow_status; int ret; int i; @@ -443,7 +443,7 @@ static int qfprom_probe(struct platform_device *pdev) =20 /* Only enable writing if we have SoC data and a valid clock */ if (priv->soc_data && priv->secclk) - econfig.reg_write =3D qfprom_reg_write; + econfig.reg_write_const =3D qfprom_reg_write; } =20 pm_runtime_enable(dev); diff --git a/drivers/nvmem/rave-sp-eeprom.c b/drivers/nvmem/rave-sp-eeprom.c index 9ecf3873cbb7..c703d303eb6c 100644 --- a/drivers/nvmem/rave-sp-eeprom.c +++ b/drivers/nvmem/rave-sp-eeprom.c @@ -278,10 +278,10 @@ static int rave_sp_eeprom_reg_read(void *eeprom, unsi= gned int offset, } =20 static int rave_sp_eeprom_reg_write(void *eeprom, unsigned int offset, - void *val, size_t bytes) + const void *val, size_t bytes) { return rave_sp_eeprom_access(eeprom, RAVE_SP_EEPROM_WRITE, - offset, val, bytes); + offset, (void *)val, bytes); } =20 static int rave_sp_eeprom_probe(struct platform_device *pdev) @@ -331,7 +331,7 @@ static int rave_sp_eeprom_probe(struct platform_device = *pdev) config.add_legacy_fixed_of_cells =3D true; config.size =3D size; config.reg_read =3D rave_sp_eeprom_reg_read; - config.reg_write =3D rave_sp_eeprom_reg_write; + config.reg_write_const =3D rave_sp_eeprom_reg_write; config.word_size =3D 1; config.stride =3D 1; =20 diff --git a/drivers/nvmem/snvs_lpgpr.c b/drivers/nvmem/snvs_lpgpr.c index 89c27112320f..3e76d33dff20 100644 --- a/drivers/nvmem/snvs_lpgpr.c +++ b/drivers/nvmem/snvs_lpgpr.c @@ -50,7 +50,7 @@ static const struct snvs_lpgpr_cfg snvs_lpgpr_cfg_imx7d = =3D { .size =3D 16, }; =20 -static int snvs_lpgpr_write(void *context, unsigned int offset, void *val, +static int snvs_lpgpr_write(void *context, unsigned int offset, const void= *val, size_t bytes) { struct snvs_lpgpr_priv *priv =3D context; @@ -127,7 +127,7 @@ static int snvs_lpgpr_probe(struct platform_device *pde= v) cfg->size =3D dcfg->size; cfg->owner =3D THIS_MODULE; cfg->reg_read =3D snvs_lpgpr_read; - cfg->reg_write =3D snvs_lpgpr_write; + cfg->reg_write_const =3D snvs_lpgpr_write; =20 nvmem =3D devm_nvmem_register(dev, cfg); =20 diff --git a/drivers/nvmem/sprd-efuse.c b/drivers/nvmem/sprd-efuse.c index 1a7e4e5d8b86..f960fa8cb25c 100644 --- a/drivers/nvmem/sprd-efuse.c +++ b/drivers/nvmem/sprd-efuse.c @@ -192,7 +192,7 @@ static void sprd_efuse_set_prog_en(struct sprd_efuse *e= fuse, bool en) } =20 static int sprd_efuse_raw_prog(struct sprd_efuse *efuse, u32 blk, bool dou= b, - bool lock, u32 *data) + bool lock, const u32 *data) { u32 status; int ret =3D 0; @@ -321,7 +321,7 @@ static int sprd_efuse_read(void *context, u32 offset, v= oid *val, size_t bytes) return ret; } =20 -static int sprd_efuse_write(void *context, u32 offset, void *val, size_t b= ytes) +static int sprd_efuse_write(void *context, u32 offset, const void *val, si= ze_t bytes) { struct sprd_efuse *efuse =3D context; bool blk_double =3D efuse->data->blk_double; @@ -410,7 +410,7 @@ static int sprd_efuse_probe(struct platform_device *pde= v) econfig.size =3D efuse->data->blk_nums * SPRD_EFUSE_BLOCK_WIDTH; econfig.add_legacy_fixed_of_cells =3D true; econfig.reg_read =3D sprd_efuse_read; - econfig.reg_write =3D sprd_efuse_write; + econfig.reg_write_const =3D sprd_efuse_write; econfig.priv =3D efuse; econfig.dev =3D &pdev->dev; nvmem =3D devm_nvmem_register(&pdev->dev, &econfig); diff --git a/drivers/nvmem/stm32-bsec-optee-ta.c b/drivers/nvmem/stm32-bsec= -optee-ta.c index f89ce791dd12..3184b976b1f9 100644 --- a/drivers/nvmem/stm32-bsec-optee-ta.c +++ b/drivers/nvmem/stm32-bsec-optee-ta.c @@ -203,7 +203,7 @@ int stm32_bsec_optee_ta_read(struct tee_context *ctx, u= nsigned int offset, =20 /* stm32_bsec_optee_ta_write() - nvmem write access using PTA client drive= r */ int stm32_bsec_optee_ta_write(struct tee_context *ctx, unsigned int lower, - unsigned int offset, void *buf, size_t bytes) + unsigned int offset, const void *buf, size_t bytes) { struct tee_shm *shm; struct tee_ioctl_invoke_arg arg; struct tee_param param[2]; diff --git a/drivers/nvmem/stm32-bsec-optee-ta.h b/drivers/nvmem/stm32-bsec= -optee-ta.h index 3966a0535179..74658a54fe57 100644 --- a/drivers/nvmem/stm32-bsec-optee-ta.h +++ b/drivers/nvmem/stm32-bsec-optee-ta.h @@ -50,7 +50,7 @@ int stm32_bsec_optee_ta_read(struct tee_context *ctx, uns= igned int offset, * On success, 0. On failure, -errno. */ int stm32_bsec_optee_ta_write(struct tee_context *ctx, unsigned int lower, - unsigned int offset, void *buf, size_t bytes); + unsigned int offset, const void *buf, size_t bytes); =20 #else =20 @@ -72,7 +72,7 @@ static inline int stm32_bsec_optee_ta_read(struct tee_con= text *ctx, =20 static inline int stm32_bsec_optee_ta_write(struct tee_context *ctx, unsigned int lower, - unsigned int offset, void *buf, + unsigned int offset, const void *buf, size_t bytes) { return -EOPNOTSUPP; diff --git a/drivers/nvmem/stm32-romem.c b/drivers/nvmem/stm32-romem.c index 82879b1c9eb9..622093b0755c 100644 --- a/drivers/nvmem/stm32-romem.c +++ b/drivers/nvmem/stm32-romem.c @@ -118,12 +118,12 @@ static int stm32_bsec_read(void *context, unsigned in= t offset, void *buf, return 0; } =20 -static int stm32_bsec_write(void *context, unsigned int offset, void *buf, +static int stm32_bsec_write(void *context, unsigned int offset, const void= *buf, size_t bytes) { struct stm32_romem_priv *priv =3D context; struct device *dev =3D priv->cfg.dev; - u32 *buf32 =3D buf; + const u32 *buf32 =3D buf; int ret, i; =20 /* Allow only writing complete 32-bits aligned words */ @@ -153,7 +153,7 @@ static int stm32_bsec_pta_read(void *context, unsigned = int offset, void *buf, return stm32_bsec_optee_ta_read(priv->ctx, offset, buf, bytes); } =20 -static int stm32_bsec_pta_write(void *context, unsigned int offset, void *= buf, +static int stm32_bsec_pta_write(void *context, unsigned int offset, const = void *buf, size_t bytes) { struct stm32_romem_priv *priv =3D context; @@ -239,10 +239,10 @@ static int stm32_romem_probe(struct platform_device *= pdev) return rc; } priv->cfg.reg_read =3D stm32_bsec_pta_read; - priv->cfg.reg_write =3D stm32_bsec_pta_write; + priv->cfg.reg_write_const =3D stm32_bsec_pta_write; } else { priv->cfg.reg_read =3D stm32_bsec_read; - priv->cfg.reg_write =3D stm32_bsec_write; + priv->cfg.reg_write_const =3D stm32_bsec_write; } } =20 diff --git a/drivers/nvmem/zynqmp_nvmem.c b/drivers/nvmem/zynqmp_nvmem.c index d297ff150dc0..54905a608157 100644 --- a/drivers/nvmem/zynqmp_nvmem.c +++ b/drivers/nvmem/zynqmp_nvmem.c @@ -183,7 +183,7 @@ static int zynqmp_nvmem_read(void *context, unsigned in= t offset, void *val, size } =20 static int zynqmp_nvmem_write(void *context, - unsigned int offset, void *val, size_t bytes) + unsigned int offset, const void *val, size_t bytes) { int pufflag =3D 0; =20 @@ -194,7 +194,7 @@ static int zynqmp_nvmem_write(void *context, pufflag =3D 1; =20 return zynqmp_efuse_access(context, offset, - val, bytes, EFUSE_WRITE, pufflag); + (void *)val, bytes, EFUSE_WRITE, pufflag); } =20 static const struct of_device_id zynqmp_nvmem_match[] =3D { @@ -216,7 +216,7 @@ static int zynqmp_nvmem_probe(struct platform_device *p= dev) econfig.priv =3D dev; econfig.add_legacy_fixed_of_cells =3D true; econfig.reg_read =3D zynqmp_nvmem_read; - econfig.reg_write =3D zynqmp_nvmem_write; + econfig.reg_write_const =3D zynqmp_nvmem_write; =20 return PTR_ERR_OR_ZERO(devm_nvmem_register(dev, &econfig)); } --=20 2.55.0