From nobody Sat Jul 25 17:35:18 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0E3E147798B; Wed, 15 Jul 2026 12:29:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784118573; cv=none; b=ki5Ejt05lEjIEb4ihrxMS4TuwElhpQnvI4Y3qkZf7cVs1yt92IsLbbPIwKK6crpP7j23Q6i4piVhw8HDY9jTsPD+D8HhIaJEXBr1JnZJYtIp/YWVcNqf/SciLN/jw69H5MIBbnnPL/QbnA+2qMmHY1b4krAezrMcINSh/Z8xUPA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784118573; c=relaxed/simple; bh=MhGk/CHy2kt92XmIvi4RBzeEVW+sWguFNAZtDuLvclE=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=isNVPDdsIvsFtxtxwDDSwRjfnDUAvN6TX86phjs0fzu7gFfOlZ7LBNrqnDp29lK+np9OKZuyssAxkSK9w65cAI7X5z5Vyfg5o49NsZZXSdq3OKn36wiDz6QzJxKbILP/9eMfMVCkY5R8ayewFqqKmhOgvB9MMAV6hZoy5J25i5w= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=Zt3FRaGS; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="Zt3FRaGS" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 26A581F00A3A; Wed, 15 Jul 2026 12:29:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1784118570; bh=jPOQT/PB2k8KkJ+NTN4By9GA7M/j8INKvvlBVqVXrs4=; h=From:Date:Subject:References:In-Reply-To:To:Cc; b=Zt3FRaGS2nKDhaLrxHZpzEKGjsTgP9VknnkHI+McoBdSK0+yVeIxfgZ3KC1qpKIqe ELp22XjJF2tvNOce4fa4Gv07k9cwWkMq88g2IXiA1Dtb9vmTXmFT+HwLYjJ9QjLR9S maLThLYLKFia6neJlPsfAdWE6zFkZh8w8So1IamkevMTdRVnvgmqRK5kvRIRe3fPTn N0SY/S96rYJNw7HOctm2En1YoqjdW3Z3jMYxgTJVJ4gbghEGeUjyA1w43ESZ9bUYvZ nJWDSxNpQbEErg5BP4MRn9bMuDpazvneO8T0Jd0ahGFX9p+jAQXOqQFHEoKNXBkDpx vNc/EGrJ6EKEA== From: Konrad Dybcio Date: Wed, 15 Jul 2026 14:29:17 +0200 Subject: [PATCH v2 1/4] usb: xhci: debugfs: Expose the USB3 tunneling ext_cap register value Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260715-topic-dwc3_tunneling_state-v2-1-026487a08119@oss.qualcomm.com> References: <20260715-topic-dwc3_tunneling_state-v2-0-026487a08119@oss.qualcomm.com> In-Reply-To: <20260715-topic-dwc3_tunneling_state-v2-0-026487a08119@oss.qualcomm.com> To: Thinh Nguyen , Greg Kroah-Hartman , Mathias Nyman Cc: linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org, usb4-upstream@oss.qualcomm.com, Raghavendra Thoorpu , Mika Westerberg , Konrad Dybcio X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1784118563; l=2275; i=konrad.dybcio@oss.qualcomm.com; s=20230215; h=from:subject:message-id; bh=qvUPwA/dw1tFcJg0a37yvDIBq9eIxcYl8zySkWJxako=; b=btPMca/TcBQje8x6aKBMq3/T56KmrQSbTr1f0sSW76jNuGCS0AgOyUP2O9LAwwSAG786cHwod M+3DSnfH2AUD5bkSwifKIgm7taYy/1TCAQCRHZWUs9Hd9UBv6xVdTi8 X-Developer-Key: i=konrad.dybcio@oss.qualcomm.com; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= From: Konrad Dybcio The USB3 Tunneling Support Capability (idx 18) features a single register. Expose it over debugfs, if supported by the controller. Signed-off-by: Konrad Dybcio --- drivers/usb/host/xhci-debugfs.c | 9 +++++++++ drivers/usb/host/xhci-debugfs.h | 2 ++ drivers/usb/host/xhci-ext-caps.h | 1 + 3 files changed, 12 insertions(+) diff --git a/drivers/usb/host/xhci-debugfs.c b/drivers/usb/host/xhci-debugf= s.c index d07276192256..380778403b2d 100644 --- a/drivers/usb/host/xhci-debugfs.c +++ b/drivers/usb/host/xhci-debugfs.c @@ -81,6 +81,10 @@ static const struct debugfs_reg32 xhci_extcap_dbc[] =3D { dump_register(EXTCAP_DBC_DEVINFO2), }; =20 +static const struct debugfs_reg32 xhci_extcap_usb3_tunneling[] =3D { + dump_register(EXTCAP_USB3_TUNNELING), +}; + static struct dentry *xhci_debugfs_root; =20 static struct xhci_regset *xhci_debugfs_alloc_regset(struct xhci_hcd *xhci) @@ -815,6 +819,11 @@ void xhci_debugfs_init(struct xhci_hcd *xhci) ARRAY_SIZE(xhci_extcap_dbc), "reg-ext-dbc"); =20 + xhci_debugfs_extcap_regset(xhci, XHCI_EXT_CAPS_USB3_TUNNELING, + xhci_extcap_usb3_tunneling, + ARRAY_SIZE(xhci_extcap_usb3_tunneling), + "reg-usb3-tunneling"); + xhci_debugfs_create_ring_dir(xhci, &xhci->cmd_ring, "command-ring", xhci->debugfs_root); diff --git a/drivers/usb/host/xhci-debugfs.h b/drivers/usb/host/xhci-debugf= s.h index 7c074b4be819..ca6b7f2da8e3 100644 --- a/drivers/usb/host/xhci-debugfs.h +++ b/drivers/usb/host/xhci-debugfs.h @@ -70,6 +70,8 @@ #define REG_EXTCAP_DBC_DEVINFO1 0x38 #define REG_EXTCAP_DBC_DEVINFO2 0x3c =20 +#define REG_EXTCAP_USB3_TUNNELING 0x00 + #define dump_register(nm) \ { \ .name =3D __stringify(nm), \ diff --git a/drivers/usb/host/xhci-ext-caps.h b/drivers/usb/host/xhci-ext-c= aps.h index 67ecf7320c62..22e53a750e2a 100644 --- a/drivers/usb/host/xhci-ext-caps.h +++ b/drivers/usb/host/xhci-ext-caps.h @@ -40,6 +40,7 @@ #define XHCI_EXT_CAPS_ROUTE 5 /* IDs 6-9 reserved */ #define XHCI_EXT_CAPS_DEBUG 10 +#define XHCI_EXT_CAPS_USB3_TUNNELING 18 /* Vendor caps */ #define XHCI_EXT_CAPS_VENDOR_INTEL 192 #define XHCI_EXT_CAPS_INTEL_SPR_SHADOW 206 --=20 2.55.0 From nobody Sat Jul 25 17:35:18 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B61B547799D; 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dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="e7NeL1/5" Received: by smtp.kernel.org (Postfix) with ESMTPSA id AC73B1F000E9; Wed, 15 Jul 2026 12:29:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1784118573; bh=RoX8MQp0qLu8G6fZPJ9b0uECHYzY30JyPm9d0hNLiTU=; h=From:Date:Subject:References:In-Reply-To:To:Cc; b=e7NeL1/5N7DuycY2AMMIYsnx46RsV0D0w61m6w4pJdhg6Wta3YmkKFnpB5zr7DNA1 g8IQv7DTPtVEhmjZRNFUMLqPxp756gZ+Tnxvvi0JffpK6sAE0EUUYXGJUG/pCXBDL0 hoSk1Vn6V0AYJjFct2v20ecIzw4w3U4cFApIIuXQ3MeFYdAIQvnkDv9LVBiRf38S8i vNJa0jI8cZ57kIIfYK+NHV5xJBAYvHRnJa8uVPKHkMw/vDk/NFPVGhMu6wLLKlW4Vl pRLli9Nhn2MWp7Jm6cDkXwEeFXMwkzFNKBsSedVlZNqJmriDPfKh5sAz7Opij0lGuo sWRBc3t8BLBGw== From: Konrad Dybcio Date: Wed, 15 Jul 2026 14:29:18 +0200 Subject: [PATCH v2 2/4] usb: xhci: Honor PORTSC.TM if valid Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260715-topic-dwc3_tunneling_state-v2-2-026487a08119@oss.qualcomm.com> References: <20260715-topic-dwc3_tunneling_state-v2-0-026487a08119@oss.qualcomm.com> In-Reply-To: <20260715-topic-dwc3_tunneling_state-v2-0-026487a08119@oss.qualcomm.com> To: Thinh Nguyen , Greg Kroah-Hartman , Mathias Nyman Cc: linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org, usb4-upstream@oss.qualcomm.com, Raghavendra Thoorpu , Mika Westerberg , Konrad Dybcio X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1784118563; l=3149; i=konrad.dybcio@oss.qualcomm.com; s=20230215; h=from:subject:message-id; bh=XYB11jOh3frUfE41Fc73kAvDy4enEucjLEH8YX7jbf4=; b=U2cMbF+9UHXNrATnVZuDHR2hAiCgziXjbO+7kaXlXyBKkYBGYNzIAbapGSrJPTRTqFHJ8K6s/ +5sOXjsdfaSCLkVBN/kDM7sYoWJwC+tpggG98JWpPwGXSfCJu0xoPXN X-Developer-Key: i=konrad.dybcio@oss.qualcomm.com; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= From: Konrad Dybcio Currently, the only way for the USB core to determine whether the link is native or tunneled is via an Intel vendor-specific Extended Capability. The XHCI specification v1.2 and newer expose a common ext_cap, indicating whether BIT(2) of PORTSC can be interpreted as the tunneling status. Make use of that and fall back to the existing Intel-specific path if the ext_cap is absent. Signed-off-by: Konrad Dybcio --- drivers/usb/host/xhci-ext-caps.h | 3 +++ drivers/usb/host/xhci-hub.c | 19 ++++++++++++++++--- drivers/usb/host/xhci-port.h | 3 ++- 3 files changed, 21 insertions(+), 4 deletions(-) diff --git a/drivers/usb/host/xhci-ext-caps.h b/drivers/usb/host/xhci-ext-c= aps.h index 22e53a750e2a..af7d624cd38e 100644 --- a/drivers/usb/host/xhci-ext-caps.h +++ b/drivers/usb/host/xhci-ext-caps.h @@ -66,6 +66,9 @@ #define XHCI_HLC (1 << 19) #define XHCI_BLC (1 << 20) =20 +/* USB3 tunneling support capability - section 7.11 */ +#define XHCI_USB3_TUNNELING_SUPPORTED BIT(16) + /* Intel SPR shadow capability */ #define XHCI_INTEL_SPR_ESS_PORT_OFFSET 0x8ac4 /* SuperSpeed port control = */ #define XHCI_INTEL_SPR_TUNEN BIT(4) /* Tunnel mode enabled */ diff --git a/drivers/usb/host/xhci-hub.c b/drivers/usb/host/xhci-hub.c index b0264bd8577a..402e98ab95ee 100644 --- a/drivers/usb/host/xhci-hub.c +++ b/drivers/usb/host/xhci-hub.c @@ -766,17 +766,30 @@ static int xhci_exit_test_mode(struct xhci_hcd *xhci) enum usb_link_tunnel_mode xhci_port_is_tunneled(struct xhci_hcd *xhci, struct xhci_port *port) { + void __iomem *base =3D &xhci->cap_regs->hc_capbase; struct usb_hcd *hcd; - void __iomem *base; u32 offset; + u32 val; =20 - /* Don't try and probe this capability for non-Intel hosts */ + /* Prefer the XHCI v1.2 ext_cap if advertised */ + offset =3D xhci_find_next_ext_cap(base, 0, XHCI_EXT_CAPS_USB3_TUNNELING); + if (offset) { + if (!(readl(base + offset) & XHCI_USB3_TUNNELING_SUPPORTED)) + return USB_LINK_NATIVE; + + val =3D xhci_portsc_readl(port); + if (val & PORT_TM) + return USB_LINK_TUNNELED; + + return USB_LINK_NATIVE; + } + + /* Fall back to the legacy Intel-specific ext_cap */ hcd =3D xhci_to_hcd(xhci); if (!dev_is_pci(hcd->self.controller) || to_pci_dev(hcd->self.controller)->vendor !=3D PCI_VENDOR_ID_INTEL) return USB_LINK_UNKNOWN; =20 - base =3D &xhci->cap_regs->hc_capbase; offset =3D xhci_find_next_ext_cap(base, 0, XHCI_EXT_CAPS_INTEL_SPR_SHADOW= ); =20 if (offset && offset <=3D XHCI_INTEL_SPR_ESS_PORT_OFFSET) { diff --git a/drivers/usb/host/xhci-port.h b/drivers/usb/host/xhci-port.h index 889b5fb0fcd8..215c9cadbc34 100644 --- a/drivers/usb/host/xhci-port.h +++ b/drivers/usb/host/xhci-port.h @@ -5,7 +5,8 @@ #define PORT_CONNECT (1 << 0) /* true: port enabled */ #define PORT_PE (1 << 1) -/* bit 2 reserved and zeroed */ +/* true: port is tunneling traffic over USB4 */ +#define PORT_TM (1 << 2) /* true: port has an over-current condition */ #define PORT_OC (1 << 3) /* true: port reset signaling asserted */ --=20 2.55.0 From nobody Sat Jul 25 17:35:18 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1468E44C65F; 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dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="YQPpecKb" Received: by smtp.kernel.org (Postfix) with ESMTPSA id EFD9C1F00A3A; Wed, 15 Jul 2026 12:29:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1784118575; bh=A6rv0IwEL2hDqWeDBZt5LAD/agoi0mUBl9rn+7nCO40=; h=From:Date:Subject:References:In-Reply-To:To:Cc; b=YQPpecKbPO5G1wgHYZVNP/5IcWH2kzS446yaZYryVyLLE0PogtBWi/cVK4YLRD3aK gRdX+pII3UHv1Flf5CAF+QNvaYNdEBsUZCpjgOACJUNIiSZeJMD3TMBQOOYkjP+4Fd HUxyiP3puAAXVOOXbwRUzKJtS/lSkBA9YKj2FNm+LsaFyBmQJO5SNTwBuGdLobyvUE vOvTeK16snvtDzKfaYQV5uLB0lnmaTgrmixwcqEnJSMsc32Xye/utdQFlcHZne6JI8 N0/G233yjncIlCIG7jcaapwlRXvGWr5bcrV73msHoK8IexfR5A0LrR+q2gZ0A5Qvn+ 19GO8tsipc8lA== From: Konrad Dybcio Date: Wed, 15 Jul 2026 14:29:19 +0200 Subject: [PATCH v2 3/4] usb: xhci: Allow custom op for usb_link_tunnel_mode reporting Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260715-topic-dwc3_tunneling_state-v2-3-026487a08119@oss.qualcomm.com> References: <20260715-topic-dwc3_tunneling_state-v2-0-026487a08119@oss.qualcomm.com> In-Reply-To: <20260715-topic-dwc3_tunneling_state-v2-0-026487a08119@oss.qualcomm.com> To: Thinh Nguyen , Greg Kroah-Hartman , Mathias Nyman Cc: linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org, usb4-upstream@oss.qualcomm.com, Raghavendra Thoorpu , Mika Westerberg , Konrad Dybcio X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1784118563; l=4937; i=konrad.dybcio@oss.qualcomm.com; s=20230215; h=from:subject:message-id; bh=oVbAFb5eDhRwKHU8ADd6kiDFDzRRmIyAoVjPPciW2Rk=; b=wIqlqpTP5g6PHVAeDVp6h8IAhHF/Qb1FvoOFb1FsfN6nbqSvOXDptc+rHZvpu3ESuF/vlFTxF VNcgmRkCa8rCjB9toiQ2uO96wdji3gm83t7afAcrtHtb7gB+5/YQKwq X-Developer-Key: i=konrad.dybcio@oss.qualcomm.com; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= From: Konrad Dybcio The Thunderbolt framework relies on the USB core to create device links for tunneled ports, so that the USB3 controller is only kept runtime-resumed for the duration of the tunneling. Currently, retrieving that information is only possibe on Intel XHCI hosts, through a vendor-specific capability. Extend xhci-plat to allow plumbing a custom one. Signed-off-by: Konrad Dybcio --- drivers/usb/host/xhci-hub.c | 13 +++++++++---- drivers/usb/host/xhci-plat.c | 2 ++ drivers/usb/host/xhci-plat.h | 1 + drivers/usb/host/xhci.c | 3 ++- drivers/usb/host/xhci.h | 5 ++++- 5 files changed, 18 insertions(+), 6 deletions(-) diff --git a/drivers/usb/host/xhci-hub.c b/drivers/usb/host/xhci-hub.c index 402e98ab95ee..9964cbd154ab 100644 --- a/drivers/usb/host/xhci-hub.c +++ b/drivers/usb/host/xhci-hub.c @@ -749,7 +749,7 @@ static int xhci_exit_test_mode(struct xhci_hcd *xhci) } =20 /** - * xhci_port_is_tunneled() - Check if USB3 connection is tunneled over USB4 + * xhci_port_tunnel_mode() - Check if USB3 connection is tunneled over USB4 * @xhci: xhci host controller * @port: USB3 port to be checked. * @@ -763,7 +763,7 @@ static int xhci_exit_test_mode(struct xhci_hcd *xhci) * detecting USB3 over USB4 tunnels. USB_LINK_NATIVE or USB_LINK_TUNNELED * otherwise. */ -enum usb_link_tunnel_mode xhci_port_is_tunneled(struct xhci_hcd *xhci, +enum usb_link_tunnel_mode xhci_port_tunnel_mode(struct xhci_hcd *xhci, struct xhci_port *port) { void __iomem *base =3D &xhci->cap_regs->hc_capbase; @@ -787,8 +787,13 @@ enum usb_link_tunnel_mode xhci_port_is_tunneled(struct= xhci_hcd *xhci, /* Fall back to the legacy Intel-specific ext_cap */ hcd =3D xhci_to_hcd(xhci); if (!dev_is_pci(hcd->self.controller) || - to_pci_dev(hcd->self.controller)->vendor !=3D PCI_VENDOR_ID_INTEL) - return USB_LINK_UNKNOWN; + to_pci_dev(hcd->self.controller)->vendor !=3D PCI_VENDOR_ID_INTEL) { + /* Last chance - if the controller has a custom tunnel_mode op, try that= */ + if (xhci->tunnel_mode) + return xhci->tunnel_mode(xhci_to_hcd(xhci), port->hcd_portnum); + else + return USB_LINK_UNKNOWN; + } =20 offset =3D xhci_find_next_ext_cap(base, 0, XHCI_EXT_CAPS_INTEL_SPR_SHADOW= ); =20 diff --git a/drivers/usb/host/xhci-plat.c b/drivers/usb/host/xhci-plat.c index 074d9c731639..dbaca694baa2 100644 --- a/drivers/usb/host/xhci-plat.c +++ b/drivers/usb/host/xhci-plat.c @@ -244,6 +244,8 @@ int xhci_plat_probe(struct platform_device *pdev, struc= t device *sysdev, const s priv =3D hcd_to_xhci_priv(hcd); /* Just copy data for now */ *priv =3D *priv_match; + + xhci->tunnel_mode =3D priv->tunnel_mode; } =20 device_set_wakeup_capable(&pdev->dev, true); diff --git a/drivers/usb/host/xhci-plat.h b/drivers/usb/host/xhci-plat.h index 00751d851831..c5042766a486 100644 --- a/drivers/usb/host/xhci-plat.h +++ b/drivers/usb/host/xhci-plat.h @@ -22,6 +22,7 @@ struct xhci_plat_priv { int (*suspend_quirk)(struct usb_hcd *); int (*resume_quirk)(struct usb_hcd *); int (*post_resume_quirk)(struct usb_hcd *); + enum usb_link_tunnel_mode (*tunnel_mode)(struct usb_hcd *hcd, int portnum= ); }; =20 #define hcd_to_xhci_priv(h) ((struct xhci_plat_priv *)hcd_to_xhci(h)->priv) diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c index 091c82ca8ee2..118401a74244 100644 --- a/drivers/usb/host/xhci.c +++ b/drivers/usb/host/xhci.c @@ -4760,7 +4760,8 @@ static int xhci_update_device(struct usb_hcd *hcd, st= ruct usb_device *udev) if (hcd->speed >=3D HCD_USB3 && !udev->parent->parent) { port =3D xhci->usb3_rhub.ports[udev->portnum - 1]; =20 - udev->tunnel_mode =3D xhci_port_is_tunneled(xhci, port); + udev->tunnel_mode =3D xhci_port_tunnel_mode(xhci, port); + if (udev->tunnel_mode =3D=3D USB_LINK_UNKNOWN) dev_dbg(&udev->dev, "link tunnel state unknown\n"); else if (udev->tunnel_mode =3D=3D USB_LINK_TUNNELED) diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h index 2d3941b5e1e3..a85968008a94 100644 --- a/drivers/usb/host/xhci.h +++ b/drivers/usb/host/xhci.h @@ -1675,6 +1675,9 @@ struct xhci_hcd { struct list_head regset_list; =20 void *dbc; + + enum usb_link_tunnel_mode (*tunnel_mode)(struct usb_hcd *hcd, int portnum= ); + /* platform-specific data -- must come last */ unsigned long priv[] __aligned(sizeof(s64)); }; @@ -1981,7 +1984,7 @@ int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq= , u16 wValue, u16 wIndex, int xhci_hub_status_data(struct usb_hcd *hcd, char *buf); int xhci_find_raw_port_number(struct usb_hcd *hcd, int port1); struct xhci_hub *xhci_get_rhub(struct usb_hcd *hcd); -enum usb_link_tunnel_mode xhci_port_is_tunneled(struct xhci_hcd *xhci, +enum usb_link_tunnel_mode xhci_port_tunnel_mode(struct xhci_hcd *xhci, struct xhci_port *port); void xhci_hc_died(struct xhci_hcd *xhci); =20 --=20 2.55.0 From nobody Sat Jul 25 17:35:18 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F18A4477E20; Wed, 15 Jul 2026 12:29:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784118583; cv=none; b=kEai+ZbgItCg1wRqVvTWYk5KoW4lXroiYbjiHPXNcUvEQlgK0o5uqQme0T8b+V0+fppwudfFTnB/ga0c9ZjgeX1+nXn0v0Aii937KzKlBG5+kr+K0J4EogW9X0UREJaFa+oHASWj4xEOXQ6s48K3duLIlW3S9wAD/qb/ucPx1sk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784118583; c=relaxed/simple; bh=M+DeZNYtVFijMr9sVI0AKk3cvYjTLkp9K1SQqftT9Lo=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260715-topic-dwc3_tunneling_state-v2-4-026487a08119@oss.qualcomm.com> References: <20260715-topic-dwc3_tunneling_state-v2-0-026487a08119@oss.qualcomm.com> In-Reply-To: <20260715-topic-dwc3_tunneling_state-v2-0-026487a08119@oss.qualcomm.com> To: Thinh Nguyen , Greg Kroah-Hartman , Mathias Nyman Cc: linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org, usb4-upstream@oss.qualcomm.com, Raghavendra Thoorpu , Mika Westerberg , Konrad Dybcio X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1784118563; l=4045; i=konrad.dybcio@oss.qualcomm.com; s=20230215; h=from:subject:message-id; bh=AGj6u9AXpospOYKXeoL025M2oc1PyYSQ8GLfsF9oCvs=; b=OtqKhsIwY4zTyT/cUSFmHcxpuSz1s5Bqa6i0TmLO0+7quk8oO+lvckTOt7jzpoywVpiqF7Uqs dvreG8bIYFIAYCZ2zxKdZMeld2xheuAUQr8jrGqPLiTwPplY8VZI3nK X-Developer-Key: i=konrad.dybcio@oss.qualcomm.com; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= From: Konrad Dybcio The Thunderbolt framework relies on the USB core to create device links for tunneled ports, so that the USB3 controller is only kept runtime-resumed for the duration of the tunneling. This depends on first knowing whether a connection is tunneled or native. Add the logic to handle that for DWC3 controllers. Signed-off-by: Konrad Dybcio --- drivers/usb/dwc3/core.c | 16 ++++++++++++++++ drivers/usb/dwc3/core.h | 18 ++++++++++++++++++ drivers/usb/dwc3/host.c | 12 ++++++++++++ 3 files changed, 46 insertions(+) diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index fd5c2cd36c59..6ee6fce4c927 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c @@ -162,6 +162,22 @@ void dwc3_set_prtcap(struct dwc3 *dwc, u32 mode, bool = ignore_susphy) } EXPORT_SYMBOL_GPL(dwc3_set_prtcap); =20 +enum usb_link_tunnel_mode dwc3_link_tunnel_mode(struct dwc3 *dwc, u8 port) +{ + /* Prior versions had no CIO support */ + if (!DWC3_VER_IS_WITHIN(DWC31, 191A, ANY)) + return USB_LINK_NATIVE; + + /* Not all DWC3 instances have CIO HW, trust the platform firmware */ + if (!device_property_present(dwc->dev, "usb4-host-interface")) + return USB_LINK_NATIVE; + + if (dwc3_readl(dwc, DWC3_CIOCTRL(port)) & DWC3_CIOCTRL_CIO_EN) + return USB_LINK_TUNNELED; + + return USB_LINK_NATIVE; +} + static void __dwc3_set_mode(struct work_struct *work) { struct dwc3 *dwc =3D work_to_dwc(work); diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h index 608daeb7ef10..decc51cd6505 100644 --- a/drivers/usb/dwc3/core.h +++ b/drivers/usb/dwc3/core.h @@ -179,6 +179,11 @@ #define DWC3_OEVTEN 0xcc0C #define DWC3_OSTS 0xcc10 =20 +/* CIO regs */ +#define DWC3_CIO_BASE(n) (0xcd20 + ((n) * 0x30)) +#define DWC3_CIOCTRL(n) (DWC3_CIO_BASE(n) + 0x00) +#define DWC3_CIOCTRL_CIO_EN BIT(0) + #define DWC3_LLUCTL(n) (0xd024 + ((n) * 0x80)) =20 /* Bit fields */ @@ -1314,6 +1319,7 @@ struct dwc3 { #define DWC31_REVISION_170A 0x3137302a #define DWC31_REVISION_180A 0x3138302a #define DWC31_REVISION_190A 0x3139302a +#define DWC31_REVISION_191A 0x3139312a #define DWC31_REVISION_200A 0x3230302a =20 #define DWC32_REVISION_ANY 0x0 @@ -1658,11 +1664,23 @@ static inline void dwc3_pre_run_stop(struct dwc3 *d= wc, bool is_on) #if IS_ENABLED(CONFIG_USB_DWC3_HOST) || IS_ENABLED(CONFIG_USB_DWC3_DUAL_RO= LE) int dwc3_host_init(struct dwc3 *dwc); void dwc3_host_exit(struct dwc3 *dwc); + +/** + * dwc3_link_tunnel_mode - Check whether the link is tunneled over TBT/USB4 + * @dwc: Pointer to DWC3 controller context + * @port: 0-based port index + * + * Returns: USB_LINK_TUNNELED if tunneled, USB_LINK_NATIVE if not, or + * when the controller does not have USB4 capabilities. + */ +enum usb_link_tunnel_mode dwc3_link_tunnel_mode(struct dwc3 *dwc, u8 port); #else static inline int dwc3_host_init(struct dwc3 *dwc) { return 0; } static inline void dwc3_host_exit(struct dwc3 *dwc) { } +static inline enum usb_link_tunnel_mode dwc3_link_tunnel_mode(struct dwc3 = *dwc, u8 port) +{ return USB_LINK_UNKNOWN; } #endif =20 #if IS_ENABLED(CONFIG_USB_DWC3_GADGET) || IS_ENABLED(CONFIG_USB_DWC3_DUAL_= ROLE) diff --git a/drivers/usb/dwc3/host.c b/drivers/usb/dwc3/host.c index 96b588bd08cd..eb03b079696e 100644 --- a/drivers/usb/dwc3/host.c +++ b/drivers/usb/dwc3/host.c @@ -77,8 +77,20 @@ static void dwc3_xhci_plat_start(struct usb_hcd *hcd) dwc3_enable_susphy(dwc, true); } =20 +static enum usb_link_tunnel_mode dwc3_xhci_tunnel_mode(struct usb_hcd *hcd= , int portnum) +{ + struct platform_device *pdev; + struct dwc3 *dwc; + + pdev =3D to_platform_device(hcd->self.controller); + dwc =3D dev_get_drvdata(pdev->dev.parent); + + return dwc3_link_tunnel_mode(dwc, portnum); +} + static const struct xhci_plat_priv dwc3_xhci_plat_quirk =3D { .plat_start =3D dwc3_xhci_plat_start, + .tunnel_mode =3D dwc3_xhci_tunnel_mode, }; =20 static void dwc3_host_fill_xhci_irq_res(struct dwc3 *dwc, --=20 2.55.0