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Date: Wed, 15 Jul 2026 23:39:07 +0530 Subject: [PATCH v27 1/7] Documentation/firmware: add imx/se to other_interfaces Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260715-imx-se-if-v27-1-bb7c45952f06@nxp.com> References: <20260715-imx-se-if-v27-0-bb7c45952f06@nxp.com> In-Reply-To: <20260715-imx-se-if-v27-0-bb7c45952f06@nxp.com> To: Jonathan Corbet , Shuah Khan , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Pankaj Gupta Cc: linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1784138954; l=7403; i=pankaj.gupta@nxp.com; s=20240523; h=from:subject:message-id; bh=ZSAmXRvPjYNeGEa/I9hefXFuALx9geFcXzYMsSoJmHQ=; b=w1QC84vjx2YUdAPoXZWkvpPM1At9pFdNZ82ogq/qrbiezfuOnyLd/KW6v4+BabEUyLCxPwhyz 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cz6j76O+vhmEtdKEaIy8JEAlKuAiBTqp424xLvdgOgwSXOvrlQ7vWuZg6/wR4rEVZ6hKANghm9lMOAtKfcM0zXJ9tLK+CFVoTOvLWWtq8zmrtaJ5w/z0c32SO7cEWL4n X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI0PR04MB10509 From: Pankaj Gupta Documents i.MX SoC's Service layer and C_DEV driver for selected SoC(s) that contains the NXP hardware IP(s) for Secure Enclaves(se) like: - NXP EdgeLock Enclave on i.MX93 & i.MX8ULP Signed-off-by: Pankaj Gupta Signed-off-by: Frank Li --- .../driver-api/firmware/other_interfaces.rst | 133 +++++++++++++++++= ++++ 1 file changed, 133 insertions(+) diff --git a/Documentation/driver-api/firmware/other_interfaces.rst b/Docum= entation/driver-api/firmware/other_interfaces.rst index 06ac89adaafb..6c6fa9a0ba1d 100644 --- a/Documentation/driver-api/firmware/other_interfaces.rst +++ b/Documentation/driver-api/firmware/other_interfaces.rst @@ -49,3 +49,136 @@ of the requests on to a secure monitor (EL3). =20 .. kernel-doc:: drivers/firmware/stratix10-svc.c :export: + +NXP Secure Enclave Firmware Interface +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D + +Introduction +------------ +The NXP's i.MX HW IP like EdgeLock Enclave, V2X etc., creates an embedded = secure +enclave within the SoC boundary to enable features like: + +- Hardware Security Module (HSM) +- Security Hardware Extension (SHE) +- Vehicular to Anything (V2X) + +Each of the above features is enabled through dedicated NXP H/W IP on the = SoC. +On a single SoC, multiple hardware IP (or can say more than one secure enc= lave) +can exist. + +NXP SoCs enabled with the such secure enclaves(SEs) IPs are: +i.MX93, i.MX8ULP + +To communicate with one or more co-existing SE(s) on SoC, there is/are ded= icated +messaging units(MU) per SE. Each co-existing SE can have one or multiple e= xclusive +MUs, dedicated to itself. None of the MU is shared between two SEs. Commun= ication +of the MU is realized using the mailbox driver. Each secure enclave can ca= ter to +multiple clients by virtue of these exclusive MUs. Also, they can distingu= ish +transactions originating from these clients based on the MU used and core = security +state. The communication between the clients and secure enclaves is in the= form of +a command/response mechanism. Each client could expose a specific set of s= ecure enclave +features to the higher layers, based on the commands supported by that cli= ent. For +example, the secure enclave could simultaneously support an OPTEE TA and L= inux +middleware as clients. Each of these clients can expose a specific set of = secure +enclave features based on the command set supported by them. + +NXP Secure Enclave(SE) Interface +-------------------------------- +MU(s) is/are not shared between SE(s). But for an SoC like i.MX95 which has +multiple SE(s) like HSM, V2X-HSM, V2X-SHE, all the SE(s) and their interfa= ces 'se-if' +that is/are dedicated to a particular SE will be enumerated and provisione= d using the +single compatible node("fsl,imx95-se"). + +Each 'se-if' comprises two layers: + +- (C_DEV Layer) User-Space software-access interface. +- (Service Layer) OS-level software-access interface. + +:: + + +--------------------------------------------+ + | Character Device(C_DEV) | + | | + | +---------+ +---------+ +---------+ | + | | misc #1 | | misc #2 | ... | misc #n | | + | | dev | | dev | | dev | | + | +---------+ +---------+ +---------+ | + | +-------------------------+ | + | | Misc. Dev Synchr. Logic | | + | +-------------------------+ | + | | + +--------------------------------------------+ + + +--------------------------------------------+ + | Service Layer | + | | + | +-----------------------------+ | + | | Message Serialization Logic | | + | +-----------------------------+ | + | +---------------+ | + | | imx-mailbox | | + | | mailbox.c | | + | +---------------+ | + | | + +--------------------------------------------+ + +- service layer: + This layer is responsible for ensuring the communication protocol that i= s defined + for communication with firmware. + + FW Communication protocol ensures two things: + + - Serializing the messages to be sent over an MU. + - FW can handle one command message at a time. + +- c_dev: + This layer offers character device contexts, created as '/dev/_mux_c= hx'. + Using these multiple device contexts that are multiplexed over a single = MU, + userspace application(s) can call fops like write/read to send the comma= nd message, + and read back the command response message to/from Firmware. + fops like read & write use the above defined service layer API(s) to com= municate with + Firmware. + + Misc-device(/dev/_mux_chn) synchronization protocol:: + + Non-Secure + Secure + | + | + +-----------+ +-------------+ | + | se_ctrl.c +<---->+imx-mailbox.c| | + | | | mailbox.c +<-->+------+ +------+ + +-----+-----+ +-------------+ | MU X +<-->+ ELE | + | +------+ +------+ + +----------------+ | + | | | + v v | + logical logical | + receiver waiter | + + + | + | | | + | | | + | +----+------+ | + | | | | + | | | | + device_ctx device_ctx device_ctx | + | + User 0 User 1 User Y | + +------+ +------+ +------+ | + |misc.c| |misc.c| |misc.c| | + kernel space +------+ +------+ +------+ | + | + +---------------------------------------------------- | + | | | | + userspace /dev/ele_muXch0 | | | + /dev/ele_muXch1 | | + /dev/ele_muXchY | + | + +When a user sends a command to the firmware, it registers its device_ctx +as waiter of a response from firmware. + +Enclave's Firmware owns the storage management over a Linux filesystem. +For this c_dev provisions a dedicated slave device called "receiver". + +.. kernel-doc:: drivers/firmware/imx/se_ctrl.c + :export: --=20 2.43.0 From nobody Thu Jul 16 20:33:50 2026 Received: from DB3PR0202CU003.outbound.protection.outlook.com (mail-northeuropeazon11010059.outbound.protection.outlook.com [52.101.84.59]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 908E843787A; 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This driver enables communication ensuring well defined message sequence protocol between Application Core and enclave's firmware. Driver configures multiple misc-device on the MU, for multiple user-space applications, to be able to communicate over single MU. It exists on some i.MX processors. e.g. i.MX8ULP, i.MX93 etc. Signed-off-by: Pankaj Gupta Reviewed-by: Rob Herring (Arm) Signed-off-by: Frank Li --- .../devicetree/bindings/firmware/fsl,imx-se.yaml | 91 ++++++++++++++++++= ++++ 1 file changed, 91 insertions(+) diff --git a/Documentation/devicetree/bindings/firmware/fsl,imx-se.yaml b/D= ocumentation/devicetree/bindings/firmware/fsl,imx-se.yaml new file mode 100644 index 000000000000..fa81adbf9b80 --- /dev/null +++ b/Documentation/devicetree/bindings/firmware/fsl,imx-se.yaml @@ -0,0 +1,91 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/firmware/fsl,imx-se.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP i.MX HW Secure Enclave(s) EdgeLock Enclave + +maintainers: + - Pankaj Gupta + +description: | + NXP's SoC may contain one or multiple embedded secure-enclave HW + IP(s) like i.MX EdgeLock Enclave, V2X etc. These NXP's HW IP(s) + enables features like + - Hardware Security Module (HSM), + - Security Hardware Extension (SHE), and + - Vehicular to Anything (V2X) + + Communication interface to the secure-enclaves(se) is based on the + messaging unit(s). + +properties: + compatible: + enum: + - fsl,imx8ulp-se-ele-hsm + - fsl,imx93-se-ele-hsm + - fsl,imx95-se-ele-hsm + + mboxes: + items: + - description: mailbox phandle to send message to se firmware + - description: mailbox phandle to receive message from se firmware + + mbox-names: + items: + - const: tx + - const: rx + + memory-region: + maxItems: 1 + + sram: + maxItems: 1 + +required: + - compatible + - mboxes + - mbox-names + +allOf: + # memory-region + - if: + properties: + compatible: + contains: + enum: + - fsl,imx8ulp-se-ele-hsm + - fsl,imx93-se-ele-hsm + then: + required: + - memory-region + else: + properties: + memory-region: false + + # sram + - if: + properties: + compatible: + contains: + enum: + - fsl,imx8ulp-se-ele-hsm + then: + required: + - sram + + else: + properties: + sram: false + +additionalProperties: false + +examples: + - | + secure-enclave { + compatible =3D "fsl,imx95-se-ele-hsm"; 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NXP hardware IP(s) for secure-enclaves like Edgelock Enclave(ELE), are embedded in the SoC to support the features like HSM, SHE & V2X, using message based communication interface. The secure enclave FW communicates with Linux over single or multiple dedicated messaging unit(MU) based interface(s). Exists on i.MX SoC(s) like i.MX8ULP, i.MX93, i.MX95 etc. For i.MX9x SoC(s) there is at least one dedicated ELE MU(s) for each world - Linux(one or more) and OPTEE-OS (one or more). Other dependent kernel drivers will be: - NVMEM: that supports non-volatile devices like EFUSES, managed by NXP's secure-enclave. Signed-off-by: Pankaj Gupta Reviewed-by: Frank Li Tested-by: Frieder Schrempf Reviewed-by: Frieder Schrempf Reported-by: sashiko-bot --- Changes from v26 to v27 Fix several issues reported by Sashiko in the ELE driver: -------------------------------------------------------- 1. Critical: encrypted IMEM DMA/physical address discarded / address 0 Status: Fixed. The IMEM buffer now uses dma_addr_t daddr, and save/restore paths pass imem->daddr to ele_service_swap(). This resolves the old issue where imem.phyaddr could remain zero. 2. High: ele_msg_send() failure leaves waiting_rsp_clbk_hdl.rx_msg dangling Status: Fixed. ele_msg_send_rcv() now uses a common clear_waiter path. On ele_msg_send() failure, the response waiter state is cleared under waiting_rsp_clbk_hdl.clbk_rx_lock. 3. High: tx_msg may be freed while mailbox still has async pointer Status: Addressed The i.MX MU mailbox controller copies the message payload into hardware registers synchronously in imx_mu_send_data(). The ELE client does not retain the tx_msg buffer after mbox_send_message() returns, and TX completion is handled by the mailbox controller/core "knows_txdone" set as false. 4. High: global var_se_info shared mutable state Status: Fixed. Mutable firmware-load and IMEM state is now per-device in struct se_if_priv. get_load_fw_instance() returns &priv->load_fw. The remaining var_se_info only carries common SoC-level revision data. 5. High: ele_service_swap() silently truncates 64-bit address Status: Fixed. ele_service_swap() now takes dma_addr_t, and the v27 changelog states that upper 32-bit addresses are rejected before placing the low 32 bits into the ELE message field. Firmware authentication and IMEM service-swap paths use DMA addresses end-to-end. 6. High: soc_device_register() handle not unregistered Status: Fixed. The code now registers a devres action using devm_add_action_or_reset() to call soc_device_unregister() for the soc_device_register() result. 7. High: manual dmam_free_coherent() can double-free devres memory Status: Fixed. The explicit dmam_free_coherent() for the encrypted IMEM buffer is removed from probe cleanup. The buffer is now treated as devres-managed and released by devres. 8. High: hardcoded MAX_SCHEDULE_TIMEOUT bypasses response timeout Status: Fixed / design-controlled. The response-wait path now uses callback-handle identity to decide whether timeout applies, instead of using command-receiver file identity. Command receiver daemon wait remains intentionally long/indefinite by design. The miscdev patch also shows timeout handling moved toward per-dev_ctx context. 9. Medium: ele_get_info() mixes goto cleanup with __free() Status: Not Accepted. This was intentionally not changed. The scoped __free(kfree) ownership for tx_msg/rx_msg and the manual gen_pool/DMA cleanup for get_info_data are separate ownership domains. 10. Medium: lockless clearing of rx_msg Status: Fixed. The response callback state is now cleared under waiting_rsp_clbk_hdl.clbk_rx_lock in the common cleanup path. 11. Low: resume ignores se_restore_imem_state() return value Status: Fixed with non-fatal PM policy. The return value is now captured and logged. The driver intentionally keeps suspend/resume non-fatal if IMEM save/restore fails. Reported-by: sashiko-bot Closes: https://sashiko.dev/#/patchset/20260629-imx-se-if-v26-0-14644628574= 4@nxp.com?part=3D3 12. Address review feedback from Lothar Wa=C3=9Fmann. Make se_fill_cmd_msg_hdr() return void and remove dead error checks at = its call sites, since the helper only fills the message header and always succeeded. Remove the trailing comma after the final empty of_device_id sentinel e= ntry so future compatible entries cannot accidentally be added after the tab= le terminator. --- drivers/firmware/imx/Kconfig | 13 ++ drivers/firmware/imx/Makefile | 2 + drivers/firmware/imx/ele_base_msg.c | 272 ++++++++++++++++++++++ drivers/firmware/imx/ele_base_msg.h | 98 ++++++++ drivers/firmware/imx/ele_common.c | 448 ++++++++++++++++++++++++++++++++= ++++ drivers/firmware/imx/ele_common.h | 43 ++++ drivers/firmware/imx/se_ctrl.c | 410 +++++++++++++++++++++++++++++++++ drivers/firmware/imx/se_ctrl.h | 111 +++++++++ include/linux/firmware/imx/se_api.h | 14 ++ 9 files changed, 1411 insertions(+) diff --git a/drivers/firmware/imx/Kconfig b/drivers/firmware/imx/Kconfig index 127ad752acf8..e3cb7f965e70 100644 --- a/drivers/firmware/imx/Kconfig +++ b/drivers/firmware/imx/Kconfig @@ -55,3 +55,16 @@ config IMX_SCMI_MISC_DRV core that could provide misc functions such as board control. =20 This driver can also be built as a module. + +config IMX_SEC_ENCLAVE + tristate "i.MX Embedded Secure Enclave - EdgeLock Enclave Firmware driver= ." + depends on MAILBOX && ((IMX_MBOX && ARCH_MXC && ARM64) || COMPILE_TEST) + select FW_LOADER + default m if ARCH_MXC + + help + Exposes APIs supported by the iMX Secure Enclave HW IP called: + - EdgeLock Enclave Firmware (for i.MX8ULP, i.MX93), + like base, HSM, V2X & SHE using the SAB protocol via the shared Messa= ging + Unit. This driver exposes these interfaces via a set of file descript= ors + allowing to configure shared memory, send and receive messages. diff --git a/drivers/firmware/imx/Makefile b/drivers/firmware/imx/Makefile index 3bbaffa6e347..4412b15846b1 100644 --- a/drivers/firmware/imx/Makefile +++ b/drivers/firmware/imx/Makefile @@ -4,3 +4,5 @@ obj-$(CONFIG_IMX_SCU) +=3D imx-scu.o misc.o imx-scu-irq.o = rm.o imx-scu-soc.o obj-${CONFIG_IMX_SCMI_CPU_DRV} +=3D sm-cpu.o obj-${CONFIG_IMX_SCMI_MISC_DRV} +=3D sm-misc.o obj-${CONFIG_IMX_SCMI_LMM_DRV} +=3D sm-lmm.o +sec_enclave-objs =3D se_ctrl.o ele_common.o ele_base_msg.o +obj-${CONFIG_IMX_SEC_ENCLAVE} +=3D sec_enclave.o diff --git a/drivers/firmware/imx/ele_base_msg.c b/drivers/firmware/imx/ele= _base_msg.c new file mode 100644 index 000000000000..997854e10e14 --- /dev/null +++ b/drivers/firmware/imx/ele_base_msg.c @@ -0,0 +1,272 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2025 NXP + */ + +#include + +#include +#include +#include +#include + +#include "ele_base_msg.h" +#include "ele_common.h" + +#define FW_DBG_DUMP_FIXED_STR "ELE" + +int ele_get_info(struct se_if_priv *priv, struct ele_dev_info *s_info) +{ + dma_addr_t get_info_addr =3D 0; + u32 *get_info_data =3D NULL; + int ret =3D 0; + + if (!priv) + return -EINVAL; + + memset(s_info, 0x0, sizeof(*s_info)); + + struct se_api_msg *tx_msg __free(kfree) =3D + kzalloc(ELE_GET_INFO_REQ_MSG_SZ, GFP_KERNEL); + if (!tx_msg) + return -ENOMEM; + + struct se_api_msg *rx_msg __free(kfree) =3D + kzalloc(ELE_GET_INFO_RSP_MSG_SZ, GFP_KERNEL); + if (!rx_msg) + return -ENOMEM; + + if (priv->mem_pool) + get_info_data =3D gen_pool_dma_alloc(priv->mem_pool, + ELE_GET_INFO_BUFF_SZ, + &get_info_addr); + else + get_info_data =3D dma_alloc_coherent(priv->dev, + ELE_GET_INFO_BUFF_SZ, + &get_info_addr, + GFP_KERNEL); + if (!get_info_data) { + dev_err(priv->dev, + "%s: Failed to allocate get_info_addr.", __func__); + return -ENOMEM; + } + + se_fill_cmd_msg_hdr(priv, (struct se_msg_hdr *)&tx_msg->header, + ELE_GET_INFO_REQ, ELE_GET_INFO_REQ_MSG_SZ, true); + + tx_msg->data[0] =3D upper_32_bits(get_info_addr); + tx_msg->data[1] =3D lower_32_bits(get_info_addr); + tx_msg->data[2] =3D sizeof(*s_info); + ret =3D ele_msg_send_rcv(priv, tx_msg, ELE_GET_INFO_REQ_MSG_SZ, rx_msg, + ELE_GET_INFO_RSP_MSG_SZ); + if (ret < 0) + goto exit; + + ret =3D se_val_rsp_hdr_n_status(priv, rx_msg, ELE_GET_INFO_REQ, + ELE_GET_INFO_RSP_MSG_SZ, true); + if (ret < 0) + goto exit; + + memcpy(s_info, get_info_data, sizeof(*s_info)); +exit: + if (priv->mem_pool) + gen_pool_free(priv->mem_pool, (unsigned long)get_info_data, + ELE_GET_INFO_BUFF_SZ); + else + dma_free_coherent(priv->dev, ELE_GET_INFO_BUFF_SZ, + get_info_data, get_info_addr); + + return ret; +} + +int ele_fetch_soc_info(struct se_if_priv *priv, void *data) +{ + return ele_get_info(priv, data); +} + +int ele_ping(struct se_if_priv *priv) +{ + int ret =3D 0; + + if (!priv) + return -EINVAL; + + struct se_api_msg *tx_msg __free(kfree) =3D kzalloc(ELE_PING_REQ_SZ, + GFP_KERNEL); + if (!tx_msg) + return -ENOMEM; + + struct se_api_msg *rx_msg __free(kfree) =3D kzalloc(ELE_PING_RSP_SZ, + GFP_KERNEL); + if (!rx_msg) + return -ENOMEM; + + se_fill_cmd_msg_hdr(priv, (struct se_msg_hdr *)&tx_msg->header, + ELE_PING_REQ, ELE_PING_REQ_SZ, true); + + ret =3D ele_msg_send_rcv(priv, tx_msg, ELE_PING_REQ_SZ, rx_msg, + ELE_PING_RSP_SZ); + if (ret < 0) + return ret; + + ret =3D se_val_rsp_hdr_n_status(priv, rx_msg, ELE_PING_REQ, + ELE_PING_RSP_SZ, true); + + return ret; +} + +int ele_service_swap(struct se_if_priv *priv, + dma_addr_t addr, + u32 addr_size, u16 flag) +{ + int ret =3D 0; + + if (upper_32_bits(addr)) { + dev_err(priv->dev, + "ELE service-swap address exceeds 32-bit range: %pad\n", + &addr); + return -ERANGE; + } + + if (!priv) + return -EINVAL; + + struct se_api_msg *tx_msg __free(kfree) =3D + kzalloc(ELE_SERVICE_SWAP_REQ_MSG_SZ, GFP_KERNEL); + if (!tx_msg) + return -ENOMEM; + + struct se_api_msg *rx_msg __free(kfree) =3D + kzalloc(ELE_SERVICE_SWAP_RSP_MSG_SZ, GFP_KERNEL); + if (!rx_msg) + return -ENOMEM; + + se_fill_cmd_msg_hdr(priv, (struct se_msg_hdr *)&tx_msg->header, + ELE_SERVICE_SWAP_REQ, ELE_SERVICE_SWAP_REQ_MSG_SZ, true); + if (ret) + return ret; + + tx_msg->data[0] =3D flag; + tx_msg->data[1] =3D addr_size; + tx_msg->data[2] =3D ELE_NONE_VAL; + tx_msg->data[3] =3D lower_32_bits(addr); + tx_msg->data[4] =3D se_get_msg_chksum((u32 *)&tx_msg[0], + ELE_SERVICE_SWAP_REQ_MSG_SZ); + if (!tx_msg->data[4]) + return -EINVAL; + + ret =3D ele_msg_send_rcv(priv, tx_msg, ELE_SERVICE_SWAP_REQ_MSG_SZ, + rx_msg, ELE_SERVICE_SWAP_RSP_MSG_SZ); + if (ret < 0) + return ret; + + ret =3D se_val_rsp_hdr_n_status(priv, rx_msg, ELE_SERVICE_SWAP_REQ, + ELE_SERVICE_SWAP_RSP_MSG_SZ, true); + if (ret) + return ret; + + if (flag =3D=3D ELE_IMEM_EXPORT) + ret =3D rx_msg->data[1]; + else + ret =3D 0; + + return ret; +} + +int ele_fw_authenticate(struct se_if_priv *priv, dma_addr_t contnr_addr, + dma_addr_t img_addr) +{ + int ret =3D 0; + + if (!priv) + return -EINVAL; + + if (upper_32_bits(contnr_addr) || upper_32_bits(img_addr)) { + dev_err(priv->dev, "Wrong address: %pap %pap\n", &contnr_addr, &img_addr= ); + return -EINVAL; + } + + struct se_api_msg *tx_msg __free(kfree) =3D + kzalloc(ELE_FW_AUTH_REQ_SZ, GFP_KERNEL); + if (!tx_msg) + return -ENOMEM; + + struct se_api_msg *rx_msg __free(kfree) =3D + kzalloc(ELE_FW_AUTH_RSP_MSG_SZ, GFP_KERNEL); + if (!rx_msg) + return -ENOMEM; + + se_fill_cmd_msg_hdr(priv, (struct se_msg_hdr *)&tx_msg->header, + ELE_FW_AUTH_REQ, ELE_FW_AUTH_REQ_SZ, true); + + tx_msg->data[0] =3D lower_32_bits(contnr_addr); + tx_msg->data[1] =3D 0; + tx_msg->data[2] =3D lower_32_bits(img_addr); + + ret =3D ele_msg_send_rcv(priv, tx_msg, ELE_FW_AUTH_REQ_SZ, rx_msg, + ELE_FW_AUTH_RSP_MSG_SZ); + if (ret < 0) + return ret; + + ret =3D se_val_rsp_hdr_n_status(priv, rx_msg, ELE_FW_AUTH_REQ, + ELE_FW_AUTH_RSP_MSG_SZ, true); + + return ret; +} + +int ele_debug_dump(struct se_if_priv *priv) +{ + bool keep_logging; + int msg_ex_cnt; + int ret =3D 0; + int i; + + if (!priv) + return -EINVAL; + + struct se_api_msg *tx_msg __free(kfree) =3D kzalloc(ELE_DEBUG_DUMP_REQ_SZ, + GFP_KERNEL); + if (!tx_msg) + return -ENOMEM; + + struct se_api_msg *rx_msg __free(kfree) =3D kzalloc(ELE_DEBUG_DUMP_RSP_SZ, + GFP_KERNEL); + if (!rx_msg) + return -ENOMEM; + + se_fill_cmd_msg_hdr(priv, &tx_msg->header, ELE_DEBUG_DUMP_REQ, + ELE_DEBUG_DUMP_REQ_SZ, true); + + msg_ex_cnt =3D 0; + do { + memset(rx_msg, 0x0, ELE_DEBUG_DUMP_RSP_SZ); + + ret =3D ele_msg_send_rcv(priv, tx_msg, ELE_DEBUG_DUMP_REQ_SZ, + rx_msg, ELE_DEBUG_DUMP_RSP_SZ); + if (ret < 0) + return ret; + + ret =3D se_val_rsp_hdr_n_status(priv, rx_msg, ELE_DEBUG_DUMP_REQ, + ELE_DEBUG_DUMP_RSP_SZ, true); + if (ret) { + dev_err(priv->dev, "Dump_Debug_Buffer Error: %x.", ret); + break; + } + keep_logging =3D (rx_msg->header.size >=3D (ELE_DEBUG_DUMP_RSP_SZ >> 2) = && + msg_ex_cnt < ELE_MAX_DBG_DMP_PKT); + + rx_msg->header.size -=3D 2; + + if (rx_msg->header.size > 2) + rx_msg->header.size--; + + for (i =3D 0; i < rx_msg->header.size; i +=3D 2) + dev_info(priv->dev, "%s%02x_%02x: 0x%08x 0x%08x", + FW_DBG_DUMP_FIXED_STR, msg_ex_cnt, i, + rx_msg->data[i + 1], rx_msg->data[i + 2]); + + msg_ex_cnt++; + } while (keep_logging); + + return ret; +} diff --git a/drivers/firmware/imx/ele_base_msg.h b/drivers/firmware/imx/ele= _base_msg.h new file mode 100644 index 000000000000..4c3699543e87 --- /dev/null +++ b/drivers/firmware/imx/ele_base_msg.h @@ -0,0 +1,98 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2025 NXP + * + * Header file for the EdgeLock Enclave Base API(s). + */ + +#ifndef ELE_BASE_MSG_H +#define ELE_BASE_MSG_H + +#include +#include + +#include "se_ctrl.h" + +#define ELE_NONE_VAL 0x0 + +#define ELE_GET_INFO_REQ 0xda +#define ELE_GET_INFO_REQ_MSG_SZ 0x10 +#define ELE_GET_INFO_RSP_MSG_SZ 0x08 + +#define MAX_UID_SIZE (16) +#define DEV_GETINFO_ROM_PATCH_SHA_SZ (32) +#define DEV_GETINFO_FW_SHA_SZ (32) +#define DEV_GETINFO_OEM_SRKH_SZ (64) +#define DEV_GETINFO_MIN_VER_MASK 0xff +#define DEV_GETINFO_MAJ_VER_MASK 0xff00 +#define ELE_DEV_INFO_EXTRA_SZ 0x60 + +struct dev_info { + u8 cmd; + u8 ver; + u16 length; + u16 soc_id; + u16 soc_rev; + u16 lmda_val; + u8 ssm_state; + u8 dev_atts_api_ver; + u8 uid[MAX_UID_SIZE]; + u8 sha_rom_patch[DEV_GETINFO_ROM_PATCH_SHA_SZ]; + u8 sha_fw[DEV_GETINFO_FW_SHA_SZ]; +}; + +struct dev_addn_info { + u8 oem_srkh[DEV_GETINFO_OEM_SRKH_SZ]; + u8 trng_state; + u8 csal_state; + u8 imem_state; + u8 reserved2; +}; + +struct ele_dev_info { + struct dev_info d_info; + struct dev_addn_info d_addn_info; +}; + +#define ELE_GET_INFO_BUFF_SZ (sizeof(struct ele_dev_info) \ + + ELE_DEV_INFO_EXTRA_SZ) + +#define GET_SERIAL_NUM_FROM_UID(x, uid_word_sz) ({\ + const u32 *__x =3D (const u32 *)(x); \ + size_t __sz =3D (uid_word_sz); \ + ((u64)__x[__sz - 1] << 32) | __x[0]; \ + }) + +#define ELE_MAX_DBG_DMP_PKT 50 +#define ELE_DEBUG_DUMP_REQ 0x21 +#define ELE_DEBUG_DUMP_REQ_SZ 0x4 +#define ELE_DEBUG_DUMP_RSP_SZ 0x5c + +#define ELE_PING_REQ 0x01 +#define ELE_PING_REQ_SZ 0x04 +#define ELE_PING_RSP_SZ 0x08 + +#define ELE_SERVICE_SWAP_REQ 0xdf +#define ELE_SERVICE_SWAP_REQ_MSG_SZ 0x18 +#define ELE_SERVICE_SWAP_RSP_MSG_SZ 0x0c +#define ELE_IMEM_SIZE 0x10000 +#define ELE_IMEM_STATE_OK 0xca +#define ELE_IMEM_STATE_BAD 0xfe +#define ELE_IMEM_STATE_WORD 0x27 +#define ELE_IMEM_STATE_MASK 0x00ff0000 +#define ELE_IMEM_EXPORT 0x1 +#define ELE_IMEM_IMPORT 0x2 + +#define ELE_FW_AUTH_REQ 0x02 +#define ELE_FW_AUTH_REQ_SZ 0x10 +#define ELE_FW_AUTH_RSP_MSG_SZ 0x08 + +int ele_get_info(struct se_if_priv *priv, struct ele_dev_info *s_info); +int ele_fetch_soc_info(struct se_if_priv *priv, void *data); +int ele_ping(struct se_if_priv *priv); +int ele_service_swap(struct se_if_priv *priv, dma_addr_t addr, + u32 addr_size, u16 flag); +int ele_fw_authenticate(struct se_if_priv *priv, dma_addr_t contnr_addr, + dma_addr_t img_addr); +int ele_debug_dump(struct se_if_priv *priv); +#endif diff --git a/drivers/firmware/imx/ele_common.c b/drivers/firmware/imx/ele_c= ommon.c new file mode 100644 index 000000000000..3f5f78df49b5 --- /dev/null +++ b/drivers/firmware/imx/ele_common.c @@ -0,0 +1,448 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2025 NXP + */ + +#include "ele_base_msg.h" +#include "ele_common.h" + +/* + * se_get_msg_chksum() - to calculate checksum word by word. + * + * @msg : reference to the input msg-data. + * @msg_len : reference to the input msg-data length in bytes. + * Includes extra 4 bytes (or 1 words) chksum. + * + * This function returns the checksum calculated by ORing word by word. + * + * Return: + * 0: if the input length is not 4 byte aligned, or num of words < 5. + * chksum: calculated word by word. + */ +u32 se_get_msg_chksum(u32 *msg, u32 msg_len) +{ + u32 nb_words =3D msg_len / (u32)sizeof(u32); + u32 chksum =3D 0; + u32 i; + + if (nb_words < 5) + return chksum; + + if (msg_len % SE_MSG_WORD_SZ) { + pr_err("Msg-len is not 4-byte aligned."); + return chksum; + } + + /* nb_words include one checksum word, so skip it. */ + nb_words--; + + for (i =3D 0; i < nb_words; i++) + chksum ^=3D *(msg + i); + + return chksum; +} + +int ele_msg_rcv(struct se_if_priv *priv, struct se_clbk_handle *se_clbk_hd= l) +{ + bool wait_uninterruptible =3D false; + unsigned long remaining_jiffies; + unsigned long flags; + int ret; + + remaining_jiffies =3D MAX_SCHEDULE_TIMEOUT; + do { + if (wait_uninterruptible) + ret =3D wait_for_completion_timeout(&se_clbk_hdl->done, + remaining_jiffies); + else + ret =3D wait_for_completion_interruptible_timeout(&se_clbk_hdl->done, + remaining_jiffies); + if (ret =3D=3D -ERESTARTSYS) { + /* + * Record that a signal was observed, then continue waiting non- + * interruptibly until the response arrives or the timeout + * expires. The caller can surface the interruption to userspace + * after the protocol transaction is brought back to a + * synchronized state. + */ + if (priv->waiting_rsp_clbk_hdl.rx_msg) { + WRITE_ONCE(se_clbk_hdl->signal_rcvd, true); + wait_uninterruptible =3D true; + continue; + } + break; + } + + if (ret =3D=3D 0) { + /* + * The response buffer belongs to the caller of ele_msg_send_rcv() + * and may be freed as soon as this function returns. Clear rx_msg + * under clbk_rx_lock so that a late se_if_rx_callback() can + * observe that the waiter has timed out and must not copy into + * the stale buffer. + * + * If the completion has not yet been signaled, mark the firmware + * path busy. This acts as a circuit breaker: reject new + * command/response transactions until the delayed response + * arrives and the callback closes the breaker. + */ + + spin_lock_irqsave(&se_clbk_hdl->clbk_rx_lock, flags); + se_clbk_hdl->rx_msg =3D NULL; + if (!completion_done(&se_clbk_hdl->done)) + atomic_set(&priv->fw_busy, 1); + + spin_unlock_irqrestore(&se_clbk_hdl->clbk_rx_lock, flags); + ret =3D -ETIMEDOUT; + dev_err(priv->dev, + "Fatal Error: SE interface: %s0, hangs indefinitely.\n", + get_se_if_name(priv->if_defs->se_if_type)); + break; + } + ret =3D se_clbk_hdl->rx_msg_sz; + break; + } while (ret < 0); + + return ret; +} + +int ele_msg_send(struct se_if_priv *priv, + void *tx_msg, + int tx_msg_sz) +{ + struct se_msg_hdr *header =3D tx_msg; + int err; + + /* + * Check that the size passed as argument matches the size + * carried in the message. + */ + if (header->size << 2 !=3D tx_msg_sz) { + dev_err(priv->dev, + "User buf hdr: 0x%x, sz mismatced with input-sz (%d !=3D %d).", + *(u32 *)header, header->size << 2, tx_msg_sz); + return -EINVAL; + } + + err =3D mbox_send_message(priv->tx_chan, tx_msg); + if (err < 0) { + dev_err(priv->dev, "Error: mbox_send_message failure.\n"); + return err; + } + + return tx_msg_sz; +} + +/* API used for send/receive blocking call. */ +int ele_msg_send_rcv(struct se_if_priv *priv, void *tx_msg, int tx_msg_sz, + void *rx_msg, int exp_rx_msg_sz) +{ + unsigned long flags; + int err; + + guard(mutex)(&priv->se_if_cmd_lock); + + if (atomic_read(&priv->fw_busy)) { + dev_dbg(priv->dev, "ELE became unresponsive.\n"); + return -EBUSY; + } + reinit_completion(&priv->waiting_rsp_clbk_hdl.done); + priv->waiting_rsp_clbk_hdl.rx_msg_sz =3D exp_rx_msg_sz; + priv->waiting_rsp_clbk_hdl.rx_msg =3D rx_msg; + + err =3D ele_msg_send(priv, tx_msg, tx_msg_sz); + if (err < 0) + goto clear_waiter; + + err =3D ele_msg_rcv(priv, &priv->waiting_rsp_clbk_hdl); + + if (priv->waiting_rsp_clbk_hdl.signal_rcvd) { + /* + * A signal was received after the command was sent. ele_msg_rcv() + * kept waiting until the FW/kernel protocol was synchronized again. + * If the transaction itself completed successfully, report the + * deferred signal to userspace using normal syscall-restart semantics. + * Do not hide real firmware/protocol errors such as -ETIMEDOUT. + */ + if (err > 0) + err =3D -ERESTARTSYS; + priv->waiting_rsp_clbk_hdl.signal_rcvd =3D false; + dev_err(priv->dev, "Err[0x%x]:Interrupted by signal.", err); + } + +clear_waiter: + spin_lock_irqsave(&priv->waiting_rsp_clbk_hdl.clbk_rx_lock, flags); + priv->waiting_rsp_clbk_hdl.rx_msg =3D NULL; + priv->waiting_rsp_clbk_hdl.rx_msg_sz =3D 0; + spin_unlock_irqrestore(&priv->waiting_rsp_clbk_hdl.clbk_rx_lock, flags); + + return err; +} + +static bool check_hdr_exception_for_sz(struct se_if_priv *priv, + struct se_msg_hdr *header) +{ + /* + * List of API(s) header that can be accepte variable length + * response buffer. + */ + if (header->command =3D=3D ELE_DEBUG_DUMP_REQ && + header->ver =3D=3D priv->if_defs->base_api_ver && + header->size >=3D 2 && header->size <=3D (ELE_DEBUG_DUMP_RSP_SZ / 4)) + return true; + + return false; +} + +/* + * Callback called by mailbox FW, when data is received. + */ +void se_if_rx_callback(struct mbox_client *mbox_cl, void *msg) +{ + struct se_clbk_handle *se_clbk_hdl; + struct device *dev =3D mbox_cl->dev; + struct se_msg_hdr *header; + bool sz_mismatch =3D false; + struct se_if_priv *priv; + unsigned long flags; + u32 rx_msg_sz; + + priv =3D dev_get_drvdata(dev); + + /* The function can be called with NULL msg */ + if (!msg) { + dev_err(dev, "Message is invalid\n"); + return; + } + + header =3D msg; + rx_msg_sz =3D header->size << 2; + + /* Incoming command: wake up the receiver if any. */ + if (header->tag =3D=3D priv->if_defs->cmd_tag) { + se_clbk_hdl =3D &priv->cmd_receiver_clbk_hdl; + spin_lock_irqsave(&se_clbk_hdl->clbk_rx_lock, flags); + if (!se_clbk_hdl->rx_msg) { + spin_unlock_irqrestore(&se_clbk_hdl->clbk_rx_lock, flags); + dev_warn(dev, "No command receiver registered for message: %.8x\n", + *((u32 *)header)); + return; + } + + /* + * cmd_tag messages are delivered only to the explicitly registered + * command receiver. Unlike the synchronous response waiter path, the + * command receiver uses a dedicated long-lived buffer installed by + * SE_IOCTL_ENABLE_CMD_RCV and is not subject to the timeout/circuit- + * breaker handling used for rsp_tag messages. + */ + dev_dbg(dev, "Selecting cmd receiver: for mesg header:0x%x.", + *(u32 *)header); + + /* + * Pre-allocated buffer of MAX_NVM_MSG_LEN + * as the NVM command are initiated by FW. + * Size is revealed as part of this call function. + */ + + if (rx_msg_sz > MAX_NVM_MSG_LEN) { + /* Store the response buffer maxsize in local variable.*/ + rx_msg_sz =3D MAX_NVM_MSG_LEN; + sz_mismatch =3D true; + } + + se_clbk_hdl->rx_msg_sz =3D rx_msg_sz; + memcpy(se_clbk_hdl->rx_msg, msg, se_clbk_hdl->rx_msg_sz); + complete(&se_clbk_hdl->done); + spin_unlock_irqrestore(&se_clbk_hdl->clbk_rx_lock, flags); + if (sz_mismatch) + dev_err(dev, + "CMD-RCVER NVM: hdr(0x%x) with different sz(%d !=3D %d).\n", + *(u32 *)header, + (header->size << 2), rx_msg_sz); + } else if (header->tag =3D=3D priv->if_defs->rsp_tag) { + bool exception_for_sz_mismatch =3D check_hdr_exception_for_sz(priv, head= er); + u32 exp_rx_msg_sz =3D 0; + + /* + * waiting_rsp_clbk_hdl.rx_msg is owned by the synchronous sender in + * ele_msg_send_rcv(). After timeout or error, that path clears rx_msg + * under clbk_rx_lock before returning to its caller, which may then free + * the buffer. Check rx_msg under the same lock here so a delayed respon= se + * can be detected and dropped instead of copying into freed memory. + * + * A late response also closes the firmware-busy circuit breaker, allowi= ng + * future command/response transactions to proceed again. + */ + se_clbk_hdl =3D &priv->waiting_rsp_clbk_hdl; + exp_rx_msg_sz =3D se_clbk_hdl->rx_msg_sz; + spin_lock_irqsave(&se_clbk_hdl->clbk_rx_lock, flags); + if (!se_clbk_hdl->rx_msg) { + /* Close circuit breaker on spinlock race */ + atomic_set(&priv->fw_busy, 0); + spin_unlock_irqrestore(&se_clbk_hdl->clbk_rx_lock, flags); + dev_info(dev, "ELE responded (late), recovery FW available."); + return; + } + dev_dbg(dev, "Selecting resp waiter: for mesg header:0x%x.", + *(u32 *)header); + + /* + * For rsp_tag traffic, the sender provides the expected response + * buffer size. If firmware returns a different size, clamp the copy + * length to the caller's buffer capacity before memcpy() and report the + * mismatch after dropping the spinlock. + */ + if (rx_msg_sz !=3D exp_rx_msg_sz) { + if (!exception_for_sz_mismatch) + sz_mismatch =3D true; + + se_clbk_hdl->rx_msg_sz =3D min(rx_msg_sz, exp_rx_msg_sz); + } + memcpy(se_clbk_hdl->rx_msg, msg, se_clbk_hdl->rx_msg_sz); + complete(&se_clbk_hdl->done); + spin_unlock_irqrestore(&se_clbk_hdl->clbk_rx_lock, flags); + + if (sz_mismatch) + dev_err(dev, + "Rsp to CMD: hdr(0x%x) with different sz(%d !=3D %d).\n", + *(u32 *)header, + (header->size << 2), exp_rx_msg_sz); + } else { + dev_err(dev, "Failed to select a device for message: %.8x\n", + *((u32 *)header)); + } +} + +int se_val_rsp_hdr_n_status(struct se_if_priv *priv, struct se_api_msg *ms= g, + u8 msg_id, u8 sz, bool is_base_api) +{ + struct se_msg_hdr *header =3D &msg->header; + u32 status; + + if (header->tag !=3D priv->if_defs->rsp_tag) { + dev_err(priv->dev, "MSG[0x%x] Hdr: Resp tag mismatch. (0x%x !=3D 0x%x)", + msg_id, header->tag, priv->if_defs->rsp_tag); + return -EINVAL; + } + + if (header->command !=3D msg_id) { + dev_err(priv->dev, "MSG Header: Cmd id mismatch. (0x%x !=3D 0x%x)", + header->command, msg_id); + return -EINVAL; + } + + if ((sz % 4) || (header->size !=3D (sz >> 2) && + !check_hdr_exception_for_sz(priv, header))) { + dev_err(priv->dev, "MSG[0x%x] Hdr: Cmd size mismatch. (0x%x !=3D 0x%x)", + msg_id, header->size, (sz >> 2)); + return -EINVAL; + } + + if (is_base_api && header->ver !=3D priv->if_defs->base_api_ver) { + dev_err(priv->dev, + "MSG[0x%x] Hdr: Base API Vers mismatch. (0x%x !=3D 0x%x)", + msg_id, header->ver, priv->if_defs->base_api_ver); + return -EINVAL; + } else if (!is_base_api && header->ver !=3D priv->if_defs->fw_api_ver) { + dev_err(priv->dev, + "MSG[0x%x] Hdr: FW API Vers mismatch. (0x%x !=3D 0x%x)", + msg_id, header->ver, priv->if_defs->fw_api_ver); + return -EINVAL; + } + + status =3D RES_STATUS(msg->data[0]); + if (status !=3D priv->if_defs->success_tag) { + dev_err(priv->dev, "Command Id[%x], Response Failure =3D 0x%x", + header->command, status); + return -EPERM; + } + + return 0; +} + +int se_save_imem_state(struct se_if_priv *priv, struct se_imem_buf *imem) +{ + struct ele_dev_info s_info =3D {0}; + int ret; + + ret =3D ele_get_info(priv, &s_info); + if (ret) { + dev_err(priv->dev, "Failed to get info from ELE.\n"); + return ret; + } + + /* Check for the imem-state before continue to save imem state. */ + if (s_info.d_addn_info.imem_state =3D=3D ELE_IMEM_STATE_BAD) + return 0; + + /* + * EXPORT command will save encrypted IMEM to given address, + * so later in resume, IMEM can be restored from the given + * address. + * + * Size must be at least 64 kB. + */ + ret =3D ele_service_swap(priv, imem->daddr, ELE_IMEM_SIZE, ELE_IMEM_EXPOR= T); + if (ret < 0) { + dev_err(priv->dev, "Failed to export IMEM."); + imem->size =3D 0; + } else { + dev_dbg(priv->dev, + "Exported %d bytes of encrypted IMEM.", + ret); + imem->size =3D ret; + } + + return ret > 0 ? 0 : ret; +} + +int se_restore_imem_state(struct se_if_priv *priv, struct se_imem_buf *ime= m) +{ + struct ele_dev_info s_info; + int ret; + + /* get info from ELE */ + ret =3D ele_get_info(priv, &s_info); + if (ret) { + dev_err(priv->dev, "Failed to get info from ELE."); + return ret; + } + imem->state =3D s_info.d_addn_info.imem_state; + + /* Check for the imem-state and imem-size before continue to + * restore imem state. + */ + if (s_info.d_addn_info.imem_state !=3D ELE_IMEM_STATE_BAD || !imem->size) + return -EIO; + + /* + * IMPORT command will restore IMEM from the given + * address, here size is the actual size returned by ELE + * during the export operation + */ + ret =3D ele_service_swap(priv, imem->daddr, imem->size, ELE_IMEM_IMPORT); + if (ret) { + dev_err(priv->dev, "Failed to import IMEM"); + return ret; + } + + /* + * After importing IMEM, check if IMEM state is equal to 0xCA + * to ensure IMEM is fully loaded and + * ELE functionality can be used. + */ + ret =3D ele_get_info(priv, &s_info); + if (ret) { + dev_err(priv->dev, "Failed to get info from ELE."); + return ret; + } + imem->state =3D s_info.d_addn_info.imem_state; + + if (s_info.d_addn_info.imem_state =3D=3D ELE_IMEM_STATE_OK) + dev_dbg(priv->dev, "Successfully restored IMEM."); + else + dev_err(priv->dev, "Failed to restore IMEM."); + + return ret; +} diff --git a/drivers/firmware/imx/ele_common.h b/drivers/firmware/imx/ele_c= ommon.h new file mode 100644 index 000000000000..0365759fdd12 --- /dev/null +++ b/drivers/firmware/imx/ele_common.h @@ -0,0 +1,43 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2025 NXP + */ + +#ifndef __ELE_COMMON_H__ +#define __ELE_COMMON_H__ + +#include "se_ctrl.h" + +#define ELE_SUCCESS_IND 0xD6 + +#define IMX_ELE_FW_DIR "imx/ele/" + +u32 se_get_msg_chksum(u32 *msg, u32 msg_len); + +int ele_msg_rcv(struct se_if_priv *priv, struct se_clbk_handle *se_clbk_hd= l); + +int ele_msg_send(struct se_if_priv *priv, void *tx_msg, int tx_msg_sz); + +int ele_msg_send_rcv(struct se_if_priv *priv, void *tx_msg, int tx_msg_sz, + void *rx_msg, int exp_rx_msg_sz); + +void se_if_rx_callback(struct mbox_client *mbox_cl, void *msg); + +int se_val_rsp_hdr_n_status(struct se_if_priv *priv, struct se_api_msg *ms= g, + u8 msg_id, u8 sz, bool is_base_api); + +/* Fill a command message header with a given command ID and length in byt= es. */ +static inline void se_fill_cmd_msg_hdr(struct se_if_priv *priv, struct se_= msg_hdr *hdr, + u8 cmd, u32 len, bool is_base_api) +{ + hdr->tag =3D priv->if_defs->cmd_tag; + hdr->ver =3D (is_base_api) ? priv->if_defs->base_api_ver : priv->if_defs-= >fw_api_ver; + hdr->command =3D cmd; + hdr->size =3D len >> 2; +} + +int se_save_imem_state(struct se_if_priv *priv, struct se_imem_buf *imem); + +int se_restore_imem_state(struct se_if_priv *priv, struct se_imem_buf *ime= m); + +#endif /*__ELE_COMMON_H__ */ diff --git a/drivers/firmware/imx/se_ctrl.c b/drivers/firmware/imx/se_ctrl.c new file mode 100644 index 000000000000..7cb98a373334 --- /dev/null +++ b/drivers/firmware/imx/se_ctrl.c @@ -0,0 +1,410 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2026 NXP + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "ele_base_msg.h" +#include "ele_common.h" +#include "se_ctrl.h" + +#define MAX_SOC_INFO_DATA_SZ 256 +#define MBOX_TX_NAME "tx" +#define MBOX_RX_NAME "rx" + +#define SE_TYPE_STR_DBG "dbg" +#define SE_TYPE_STR_HSM "hsm" + +#define SE_TYPE_ID_DBG 0x1 + +#define SE_TYPE_ID_HSM 0x2 + +struct se_var_info { + u16 soc_rev; +}; + +/* contains fixed information */ +struct se_soc_info { + const u16 soc_id; + const char *soc_name; + const struct se_fw_img_name se_fw_img_nm; +}; + +struct se_if_node { + struct se_soc_info *se_info; + u8 *pool_name; + bool reserved_dma_ranges; + struct se_if_defines if_defs; +}; + +/* common for all the SoC. */ +static struct se_var_info var_se_info; + +static struct se_soc_info se_imx8ulp_info =3D { + .soc_id =3D SOC_ID_OF_IMX8ULP, + .soc_name =3D "i.MX8ULP", + .se_fw_img_nm =3D { + .prim_fw_nm_in_rfs =3D IMX_ELE_FW_DIR + "mx8ulpa2-ahab-container.img", + .seco_fw_nm_in_rfs =3D IMX_ELE_FW_DIR + "mx8ulpa2ext-ahab-container.img", + }, +}; + +static struct se_if_node imx8ulp_se_ele_hsm =3D { + .se_info =3D &se_imx8ulp_info, + .pool_name =3D "sram", + .reserved_dma_ranges =3D true, + .if_defs =3D { + .se_if_type =3D SE_TYPE_ID_HSM, + .cmd_tag =3D 0x17, + .rsp_tag =3D 0xe1, + .success_tag =3D ELE_SUCCESS_IND, + .base_api_ver =3D MESSAGING_VERSION_6, + .fw_api_ver =3D MESSAGING_VERSION_7, + }, +}; + +static struct se_soc_info se_imx93_info =3D { + .soc_id =3D SOC_ID_OF_IMX93, +}; + +static struct se_if_node imx93_se_ele_hsm =3D { + .se_info =3D &se_imx93_info, + .reserved_dma_ranges =3D true, + .if_defs =3D { + .se_if_type =3D SE_TYPE_ID_HSM, + .cmd_tag =3D 0x17, + .rsp_tag =3D 0xe1, + .success_tag =3D ELE_SUCCESS_IND, + .base_api_ver =3D MESSAGING_VERSION_6, + .fw_api_ver =3D MESSAGING_VERSION_7, + }, +}; + +static const struct of_device_id se_match[] =3D { + { .compatible =3D "fsl,imx8ulp-se-ele-hsm", .data =3D &imx8ulp_se_ele_hsm= }, + { .compatible =3D "fsl,imx93-se-ele-hsm", .data =3D &imx93_se_ele_hsm }, + {} +}; + +char *get_se_if_name(u8 se_if_id) +{ + switch (se_if_id) { + case SE_TYPE_ID_DBG: return SE_TYPE_STR_DBG; + case SE_TYPE_ID_HSM: return SE_TYPE_STR_HSM; + } + + return NULL; +} + +static struct se_fw_load_info *get_load_fw_instance(struct se_if_priv *pri= v) +{ + return &priv->load_fw; +} + +static void se_soc_device_unregister(void *data) +{ + struct soc_device *sdev =3D data; + + soc_device_unregister(sdev); +} + +static int get_se_soc_info(struct se_if_priv *priv, const struct se_soc_in= fo *se_info) +{ + struct se_fw_load_info *load_fw =3D get_load_fw_instance(priv); + struct soc_device_attribute *attr; + u8 data[MAX_SOC_INFO_DATA_SZ]; + struct ele_dev_info *s_info; + struct soc_device *sdev; + int err =3D 0; + + /* + * This function should be called once. + * Check if the se_soc_rev is zero to continue. + */ + if (var_se_info.soc_rev) + return err; + + err =3D ele_fetch_soc_info(priv, &data); + if (err < 0) + return dev_err_probe(priv->dev, err, "Failed to fetch SoC Info."); + s_info =3D (void *)data; + var_se_info.soc_rev =3D s_info->d_info.soc_rev; + load_fw->imem.state =3D s_info->d_addn_info.imem_state; + + if (!se_info->soc_name) + return 0; + + attr =3D devm_kzalloc(priv->dev, sizeof(*attr), GFP_KERNEL); + if (!attr) + return -ENOMEM; + + if (FIELD_GET(DEV_GETINFO_MIN_VER_MASK, var_se_info.soc_rev)) + attr->revision =3D devm_kasprintf(priv->dev, GFP_KERNEL, "%x.%x", + FIELD_GET(DEV_GETINFO_MIN_VER_MASK, + var_se_info.soc_rev), + FIELD_GET(DEV_GETINFO_MAJ_VER_MASK, + var_se_info.soc_rev)); + else + attr->revision =3D devm_kasprintf(priv->dev, GFP_KERNEL, "%x", + FIELD_GET(DEV_GETINFO_MAJ_VER_MASK, + var_se_info.soc_rev)); + + attr->soc_id =3D se_info->soc_name; + + err =3D of_property_read_string(of_root, "model", &attr->machine); + if (err) + return -EINVAL; + + attr->family =3D "Freescale i.MX"; + + attr->serial_number =3D devm_kasprintf(priv->dev, + GFP_KERNEL, "%016llX", + GET_SERIAL_NUM_FROM_UID(s_info->d_info.uid, + MAX_UID_SIZE >> 2)); + + sdev =3D soc_device_register(attr); + if (IS_ERR(sdev)) + return PTR_ERR(sdev); + + err =3D devm_add_action_or_reset(priv->dev, se_soc_device_unregister, sde= v); + if (err) + return err; + + return 0; +} + +/* interface for managed res to free a mailbox channel */ +static void if_mbox_free_channel(void *mbox_chan) +{ + mbox_free_channel(mbox_chan); +} + +static int se_if_request_channel(struct device *dev, struct mbox_chan **ch= an, + struct mbox_client *cl, const char *name) +{ + struct mbox_chan *t_chan; + int ret =3D 0; + + t_chan =3D mbox_request_channel_byname(cl, name); + if (IS_ERR(t_chan)) + return dev_err_probe(dev, PTR_ERR(t_chan), + "Failed to request %s channel.", name); + + ret =3D devm_add_action_or_reset(dev, if_mbox_free_channel, t_chan); + if (ret) + return dev_err_probe(dev, -EPERM, + "Failed to add-action for removal of mbox: %s.", + name); + *chan =3D t_chan; + + return ret; +} + +static void se_if_probe_cleanup(void *plat_dev) +{ + struct platform_device *pdev =3D plat_dev; + struct device *dev =3D &pdev->dev; + struct se_if_priv *priv; + + priv =3D dev_get_drvdata(dev); + if (!priv) + return; + + /* + * In se_if_request_channel(), passed the clean-up functional + * pointer reference as action to devm_add_action_or_reset(). + * No need to free the mbox channels here. + */ + + /* + * Being device managed buffer, no need to free the buffer allocated + * in se probe to store encrypted IMEM. + */ + + /* + * No need to check, if reserved memory is allocated + * before calling for its release. Or clearing the + * un-set bit. + */ + of_reserved_mem_device_release(dev); + + dev_set_drvdata(dev, NULL); + kfree(priv); +} + +static int se_if_probe(struct platform_device *pdev) +{ + const struct se_soc_info *se_info; + const struct se_if_node *if_node; + struct se_fw_load_info *load_fw; + struct device *dev =3D &pdev->dev; + struct se_if_priv *priv; + int ret; + + if_node =3D device_get_match_data(dev); + if (!if_node) + return -EINVAL; + + se_info =3D if_node->se_info; + + priv =3D kzalloc_obj(*priv, GFP_KERNEL); + if (!priv) + return -ENOMEM; + + priv->dev =3D dev; + priv->if_defs =3D &if_node->if_defs; + dev_set_drvdata(dev, priv); + + mutex_init(&priv->se_if_cmd_lock); + spin_lock_init(&priv->cmd_receiver_clbk_hdl.clbk_rx_lock); + spin_lock_init(&priv->waiting_rsp_clbk_hdl.clbk_rx_lock); + atomic_set(&priv->fw_busy, 0); + init_completion(&priv->waiting_rsp_clbk_hdl.done); + init_completion(&priv->cmd_receiver_clbk_hdl.done); + + ret =3D devm_add_action_or_reset(dev, se_if_probe_cleanup, pdev); + if (ret) + return ret; + + /* Mailbox client configuration */ + priv->se_mb_cl.dev =3D dev; + priv->se_mb_cl.tx_block =3D false; + priv->se_mb_cl.knows_txdone =3D false; + priv->se_mb_cl.rx_callback =3D se_if_rx_callback; + + ret =3D se_if_request_channel(dev, &priv->tx_chan, &priv->se_mb_cl, MBOX_= TX_NAME); + if (ret) + return ret; + + ret =3D se_if_request_channel(dev, &priv->rx_chan, &priv->se_mb_cl, MBOX_= RX_NAME); + if (ret) + return ret; + + if (if_node->pool_name) { + priv->mem_pool =3D of_gen_pool_get(dev->of_node, if_node->pool_name, 0); + if (!priv->mem_pool) + return dev_err_probe(dev, -ENOMEM, + "Unable to get sram pool =3D %s.", + if_node->pool_name); + } + + if (if_node->reserved_dma_ranges) { + ret =3D of_reserved_mem_device_init(dev); + if (ret) + return dev_err_probe(dev, ret, + "Failed to init reserved memory region."); + } + + if (if_node->if_defs.se_if_type =3D=3D SE_TYPE_ID_HSM) { + ret =3D get_se_soc_info(priv, se_info); + if (ret) + return dev_err_probe(dev, ret, "Failed to fetch SoC Info."); + } + + /* By default, there is no pending FW to be loaded.*/ + if (se_info->se_fw_img_nm.seco_fw_nm_in_rfs) { + load_fw =3D get_load_fw_instance(priv); + mutex_init(&load_fw->load_fw_lock); + + load_fw->se_fw_img_nm =3D &se_info->se_fw_img_nm; + load_fw->is_fw_tobe_loaded =3D true; + + if (load_fw->se_fw_img_nm->prim_fw_nm_in_rfs) { + /* allocate buffer where SE store encrypted IMEM */ + load_fw->imem.buf =3D dmam_alloc_coherent(priv->dev, ELE_IMEM_SIZE, + &load_fw->imem.daddr, + GFP_KERNEL); + if (!load_fw->imem.buf) + return dev_err_probe(dev, -ENOMEM, + "dmam-alloc-failed: To store encr-IMEM."); + load_fw->imem_mgmt =3D true; + } + } + dev_info(dev, "i.MX secure-enclave: %s0 interface to firmware, configured= .", + get_se_if_name(priv->if_defs->se_if_type)); + + return ret; +} + +#ifdef CONFIG_PM_SLEEP +static int se_suspend(struct device *dev) +{ + struct se_if_priv *priv =3D dev_get_drvdata(dev); + struct se_fw_load_info *load_fw; + int ret =3D 0; + + load_fw =3D get_load_fw_instance(priv); + + if (load_fw->imem_mgmt) { + ret =3D se_save_imem_state(priv, &load_fw->imem); + if (ret) + dev_warn(dev, "Failure saving IMEM state[0x%x]", ret); + } + + return 0; +} + +static int se_resume(struct device *dev) +{ + struct se_if_priv *priv =3D dev_get_drvdata(dev); + struct se_fw_load_info *load_fw; + int ret =3D 0; + + load_fw =3D get_load_fw_instance(priv); + + if (load_fw->imem_mgmt) { + ret =3D se_restore_imem_state(priv, &load_fw->imem); + if (ret) + dev_warn(dev, "Failure restoring IMEM state[0x%x]", ret); + } + + return 0; +} + +static const struct dev_pm_ops se_pm =3D { + SET_SYSTEM_SLEEP_PM_OPS(se_suspend, se_resume) +}; + +#define SE_PM_OPS (&se_pm) +#else +#define SE_PM_OPS NULL +#endif + +static struct platform_driver se_driver =3D { + .driver =3D { + .name =3D "fsl-se", + .of_match_table =3D se_match, + .pm =3D SE_PM_OPS, + }, + .probe =3D se_if_probe, +}; +MODULE_DEVICE_TABLE(of, se_match); + +module_platform_driver(se_driver); +MODULE_AUTHOR("Pankaj Gupta "); +MODULE_DESCRIPTION("iMX Secure Enclave Driver."); +MODULE_LICENSE("GPL"); diff --git a/drivers/firmware/imx/se_ctrl.h b/drivers/firmware/imx/se_ctrl.h new file mode 100644 index 000000000000..b6833abd81d0 --- /dev/null +++ b/drivers/firmware/imx/se_ctrl.h @@ -0,0 +1,111 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2026 NXP + */ + +#ifndef SE_MU_H +#define SE_MU_H + +#include +#include +#include +#include + +#define MAX_FW_LOAD_RETRIES 50 +#define SE_MSG_WORD_SZ 0x4 + +#define RES_STATUS(x) FIELD_GET(0x000000ff, x) +#define MAX_NVM_MSG_LEN (256) +#define MESSAGING_VERSION_6 0x6 +#define MESSAGING_VERSION_7 0x7 + +struct se_clbk_handle { + struct completion done; + bool signal_rcvd; + u32 rx_msg_sz; + /* + * Assignment of the rx_msg buffer to held till the + * received content as part callback function, is copied. + */ + struct se_api_msg *rx_msg; + /* + * Serialise the timeout path in ele_msg_rcv() against + * se_if_rx_callback() so that the callback can never + * memcpy into a buffer that the timeout path has already + * freed. + */ + spinlock_t clbk_rx_lock; +}; + +struct se_imem_buf { + u8 *buf; + dma_addr_t daddr; + u32 size; + u32 state; +}; + +/* Header of the messages exchange with the EdgeLock Enclave */ +struct se_msg_hdr { + u8 ver; + u8 size; + u8 command; + u8 tag; +} __packed; + +#define SE_MU_HDR_SZ 4 + +struct se_api_msg { + struct se_msg_hdr header; + u32 data[]; +}; + +struct se_if_defines { + const u8 se_if_type; + u8 cmd_tag; + u8 rsp_tag; + u8 success_tag; + u8 base_api_ver; + u8 fw_api_ver; +}; + +struct se_fw_img_name { + const char *prim_fw_nm_in_rfs; + const char *seco_fw_nm_in_rfs; +}; + +struct se_fw_load_info { + const struct se_fw_img_name *se_fw_img_nm; + bool is_fw_tobe_loaded; + bool imem_mgmt; + struct se_imem_buf imem; + /* to serialize the fw load state */ + struct mutex load_fw_lock; +}; + +struct se_if_priv { + struct device *dev; + + struct se_clbk_handle cmd_receiver_clbk_hdl; + /* + * Update to the waiting_rsp_dev, to be protected + * under se_if_cmd_lock. + */ + struct se_clbk_handle waiting_rsp_clbk_hdl; + /* + * prevent new command to be sent on the se interface while previous + * command is still processing. (response is awaited) + */ + struct mutex se_if_cmd_lock; + + struct mbox_client se_mb_cl; + struct mbox_chan *tx_chan, *rx_chan; + + struct gen_pool *mem_pool; + const struct se_if_defines *if_defs; + struct se_fw_load_info load_fw; + + atomic_t fw_busy; +}; + +char *get_se_if_name(u8 se_if_id); +#endif diff --git a/include/linux/firmware/imx/se_api.h b/include/linux/firmware/i= mx/se_api.h new file mode 100644 index 000000000000..b1c4c9115d7b --- /dev/null +++ b/include/linux/firmware/imx/se_api.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2025 NXP + */ + +#ifndef __SE_API_H__ +#define __SE_API_H__ + +#include + +#define SOC_ID_OF_IMX8ULP 0x084d +#define SOC_ID_OF_IMX93 0x9300 + +#endif /* __SE_API_H__ */ --=20 2.43.0 From nobody Thu Jul 16 20:33:50 2026 Received: from GVXPR05CU001.outbound.protection.outlook.com (mail-swedencentralazon11013024.outbound.protection.outlook.com [52.101.83.24]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 643433EDAB3; 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No functionality change. Signed-off-by: Pankaj Gupta Reviewed-by: Frank Li Signed-off-by: Frank Li --- No Changes: Comments disposition as follows: Sashiko reported 3 pre-existing issues while reviewing patch 4/7. 1. ele_msg_send() failure leaves dangling rx_msg Status: Fixed. fixed in patch 3/7: common clear_waiter path clears waiter state under l= ock. 2. ele_service_swap() truncates 64-bit address. Status: Fixed. fixed in patch 3/7: dma_addr_t, upper-32-bit validation, and reserved-me= mory design. 3. dmam_alloc_coherent() double-free Status: Fixed. Fixed in patch 3/7: Manual dmam_free_coherent() for the IMEM buffer has been removed from probe cleanup. --- drivers/firmware/imx/ele_base_msg.c | 14 +++++----- drivers/firmware/imx/ele_common.c | 52 +++++++++++++++++++++------------= ---- drivers/firmware/imx/ele_common.h | 8 +++--- drivers/firmware/imx/se_ctrl.c | 42 ++++++++++++++++++++++++++++++ drivers/firmware/imx/se_ctrl.h | 9 +++++++ 5 files changed, 91 insertions(+), 34 deletions(-) diff --git a/drivers/firmware/imx/ele_base_msg.c b/drivers/firmware/imx/ele= _base_msg.c index 997854e10e14..fcd2bcaeefc8 100644 --- a/drivers/firmware/imx/ele_base_msg.c +++ b/drivers/firmware/imx/ele_base_msg.c @@ -57,8 +57,8 @@ int ele_get_info(struct se_if_priv *priv, struct ele_dev_= info *s_info) tx_msg->data[0] =3D upper_32_bits(get_info_addr); tx_msg->data[1] =3D lower_32_bits(get_info_addr); tx_msg->data[2] =3D sizeof(*s_info); - ret =3D ele_msg_send_rcv(priv, tx_msg, ELE_GET_INFO_REQ_MSG_SZ, rx_msg, - ELE_GET_INFO_RSP_MSG_SZ); + ret =3D ele_msg_send_rcv(priv->priv_dev_ctx, tx_msg, ELE_GET_INFO_REQ_MSG= _SZ, + rx_msg, ELE_GET_INFO_RSP_MSG_SZ); if (ret < 0) goto exit; =20 @@ -104,8 +104,8 @@ int ele_ping(struct se_if_priv *priv) se_fill_cmd_msg_hdr(priv, (struct se_msg_hdr *)&tx_msg->header, ELE_PING_REQ, ELE_PING_REQ_SZ, true); =20 - ret =3D ele_msg_send_rcv(priv, tx_msg, ELE_PING_REQ_SZ, rx_msg, - ELE_PING_RSP_SZ); + ret =3D ele_msg_send_rcv(priv->priv_dev_ctx, tx_msg, ELE_PING_REQ_SZ, + rx_msg, ELE_PING_RSP_SZ); if (ret < 0) return ret; =20 @@ -155,7 +155,7 @@ int ele_service_swap(struct se_if_priv *priv, if (!tx_msg->data[4]) return -EINVAL; =20 - ret =3D ele_msg_send_rcv(priv, tx_msg, ELE_SERVICE_SWAP_REQ_MSG_SZ, + ret =3D ele_msg_send_rcv(priv->priv_dev_ctx, tx_msg, ELE_SERVICE_SWAP_REQ= _MSG_SZ, rx_msg, ELE_SERVICE_SWAP_RSP_MSG_SZ); if (ret < 0) return ret; @@ -203,7 +203,7 @@ int ele_fw_authenticate(struct se_if_priv *priv, dma_ad= dr_t contnr_addr, tx_msg->data[1] =3D 0; tx_msg->data[2] =3D lower_32_bits(img_addr); =20 - ret =3D ele_msg_send_rcv(priv, tx_msg, ELE_FW_AUTH_REQ_SZ, rx_msg, + ret =3D ele_msg_send_rcv(priv->priv_dev_ctx, tx_msg, ELE_FW_AUTH_REQ_SZ, = rx_msg, ELE_FW_AUTH_RSP_MSG_SZ); if (ret < 0) return ret; @@ -241,7 +241,7 @@ int ele_debug_dump(struct se_if_priv *priv) do { memset(rx_msg, 0x0, ELE_DEBUG_DUMP_RSP_SZ); =20 - ret =3D ele_msg_send_rcv(priv, tx_msg, ELE_DEBUG_DUMP_REQ_SZ, + ret =3D ele_msg_send_rcv(priv->priv_dev_ctx, tx_msg, ELE_DEBUG_DUMP_REQ_= SZ, rx_msg, ELE_DEBUG_DUMP_RSP_SZ); if (ret < 0) return ret; diff --git a/drivers/firmware/imx/ele_common.c b/drivers/firmware/imx/ele_c= ommon.c index 3f5f78df49b5..955b7409ff9f 100644 --- a/drivers/firmware/imx/ele_common.c +++ b/drivers/firmware/imx/ele_common.c @@ -42,8 +42,9 @@ u32 se_get_msg_chksum(u32 *msg, u32 msg_len) return chksum; } =20 -int ele_msg_rcv(struct se_if_priv *priv, struct se_clbk_handle *se_clbk_hd= l) +int ele_msg_rcv(struct se_if_device_ctx *dev_ctx, struct se_clbk_handle *s= e_clbk_hdl) { + struct se_if_priv *priv =3D dev_ctx->priv; bool wait_uninterruptible =3D false; unsigned long remaining_jiffies; unsigned long flags; @@ -65,7 +66,7 @@ int ele_msg_rcv(struct se_if_priv *priv, struct se_clbk_h= andle *se_clbk_hdl) * after the protocol transaction is brought back to a * synchronized state. */ - if (priv->waiting_rsp_clbk_hdl.rx_msg) { + if (READ_ONCE(priv->waiting_rsp_clbk_hdl.dev_ctx)) { WRITE_ONCE(se_clbk_hdl->signal_rcvd, true); wait_uninterruptible =3D true; continue; @@ -106,7 +107,7 @@ int ele_msg_rcv(struct se_if_priv *priv, struct se_clbk= _handle *se_clbk_hdl) return ret; } =20 -int ele_msg_send(struct se_if_priv *priv, +int ele_msg_send(struct se_if_device_ctx *dev_ctx, void *tx_msg, int tx_msg_sz) { @@ -118,15 +119,16 @@ int ele_msg_send(struct se_if_priv *priv, * carried in the message. */ if (header->size << 2 !=3D tx_msg_sz) { - dev_err(priv->dev, - "User buf hdr: 0x%x, sz mismatced with input-sz (%d !=3D %d).", - *(u32 *)header, header->size << 2, tx_msg_sz); + dev_err(dev_ctx->priv->dev, + "%s: User buf hdr: 0x%x, sz mismatched with input-sz (%d !=3D %d).", + dev_ctx->devname, *(u32 *)header, header->size << 2, tx_msg_sz); return -EINVAL; } =20 - err =3D mbox_send_message(priv->tx_chan, tx_msg); + err =3D mbox_send_message(dev_ctx->priv->tx_chan, tx_msg); if (err < 0) { - dev_err(priv->dev, "Error: mbox_send_message failure.\n"); + dev_err(dev_ctx->priv->dev, + "%s: Error: mbox_send_message failure.", dev_ctx->devname); return err; } =20 @@ -134,27 +136,29 @@ int ele_msg_send(struct se_if_priv *priv, } =20 /* API used for send/receive blocking call. */ -int ele_msg_send_rcv(struct se_if_priv *priv, void *tx_msg, int tx_msg_sz, - void *rx_msg, int exp_rx_msg_sz) +int ele_msg_send_rcv(struct se_if_device_ctx *dev_ctx, void *tx_msg, + int tx_msg_sz, void *rx_msg, int exp_rx_msg_sz) { + struct se_if_priv *priv =3D dev_ctx->priv; unsigned long flags; int err; =20 guard(mutex)(&priv->se_if_cmd_lock); =20 if (atomic_read(&priv->fw_busy)) { - dev_dbg(priv->dev, "ELE became unresponsive.\n"); + dev_dbg(priv->dev, "%s: ELE became unresponsive.\n", dev_ctx->devname); return -EBUSY; } reinit_completion(&priv->waiting_rsp_clbk_hdl.done); + priv->waiting_rsp_clbk_hdl.dev_ctx =3D dev_ctx; priv->waiting_rsp_clbk_hdl.rx_msg_sz =3D exp_rx_msg_sz; priv->waiting_rsp_clbk_hdl.rx_msg =3D rx_msg; =20 - err =3D ele_msg_send(priv, tx_msg, tx_msg_sz); + err =3D ele_msg_send(dev_ctx, tx_msg, tx_msg_sz); if (err < 0) goto clear_waiter; =20 - err =3D ele_msg_rcv(priv, &priv->waiting_rsp_clbk_hdl); + err =3D ele_msg_rcv(dev_ctx, &priv->waiting_rsp_clbk_hdl); =20 if (priv->waiting_rsp_clbk_hdl.signal_rcvd) { /* @@ -167,11 +171,13 @@ int ele_msg_send_rcv(struct se_if_priv *priv, void *t= x_msg, int tx_msg_sz, if (err > 0) err =3D -ERESTARTSYS; priv->waiting_rsp_clbk_hdl.signal_rcvd =3D false; - dev_err(priv->dev, "Err[0x%x]:Interrupted by signal.", err); + dev_err(priv->dev, "%s: Err[0x%x]:Interrupted by signal.", + dev_ctx->devname, err); } =20 clear_waiter: spin_lock_irqsave(&priv->waiting_rsp_clbk_hdl.clbk_rx_lock, flags); + priv->waiting_rsp_clbk_hdl.dev_ctx =3D NULL; priv->waiting_rsp_clbk_hdl.rx_msg =3D NULL; priv->waiting_rsp_clbk_hdl.rx_msg_sz =3D 0; spin_unlock_irqrestore(&priv->waiting_rsp_clbk_hdl.clbk_rx_lock, flags); @@ -222,7 +228,7 @@ void se_if_rx_callback(struct mbox_client *mbox_cl, voi= d *msg) if (header->tag =3D=3D priv->if_defs->cmd_tag) { se_clbk_hdl =3D &priv->cmd_receiver_clbk_hdl; spin_lock_irqsave(&se_clbk_hdl->clbk_rx_lock, flags); - if (!se_clbk_hdl->rx_msg) { + if (!se_clbk_hdl->dev_ctx || !se_clbk_hdl->rx_msg) { spin_unlock_irqrestore(&se_clbk_hdl->clbk_rx_lock, flags); dev_warn(dev, "No command receiver registered for message: %.8x\n", *((u32 *)header)); @@ -236,8 +242,8 @@ void se_if_rx_callback(struct mbox_client *mbox_cl, voi= d *msg) * SE_IOCTL_ENABLE_CMD_RCV and is not subject to the timeout/circuit- * breaker handling used for rsp_tag messages. */ - dev_dbg(dev, "Selecting cmd receiver: for mesg header:0x%x.", - *(u32 *)header); + dev_dbg(dev, "Selecting cmd receiver:%s for mesg header:0x%x.", + se_clbk_hdl->dev_ctx->devname, *(u32 *)header); =20 /* * Pre-allocated buffer of MAX_NVM_MSG_LEN @@ -257,8 +263,8 @@ void se_if_rx_callback(struct mbox_client *mbox_cl, voi= d *msg) spin_unlock_irqrestore(&se_clbk_hdl->clbk_rx_lock, flags); if (sz_mismatch) dev_err(dev, - "CMD-RCVER NVM: hdr(0x%x) with different sz(%d !=3D %d).\n", - *(u32 *)header, + "%s: CMD-RCVER NVM: hdr(0x%x) with different sz(%d !=3D %d).\n", + se_clbk_hdl->dev_ctx->devname, *(u32 *)header, (header->size << 2), rx_msg_sz); } else if (header->tag =3D=3D priv->if_defs->rsp_tag) { bool exception_for_sz_mismatch =3D check_hdr_exception_for_sz(priv, head= er); @@ -284,8 +290,8 @@ void se_if_rx_callback(struct mbox_client *mbox_cl, voi= d *msg) dev_info(dev, "ELE responded (late), recovery FW available."); return; } - dev_dbg(dev, "Selecting resp waiter: for mesg header:0x%x.", - *(u32 *)header); + dev_dbg(dev, "Selecting resp waiter:%s for mesg header:0x%x.", + se_clbk_hdl->dev_ctx->devname, *(u32 *)header); =20 /* * For rsp_tag traffic, the sender provides the expected response @@ -305,8 +311,8 @@ void se_if_rx_callback(struct mbox_client *mbox_cl, voi= d *msg) =20 if (sz_mismatch) dev_err(dev, - "Rsp to CMD: hdr(0x%x) with different sz(%d !=3D %d).\n", - *(u32 *)header, + "%s: Rsp to CMD: hdr(0x%x) with different sz(%d !=3D %d).\n", + se_clbk_hdl->dev_ctx->devname, *(u32 *)header, (header->size << 2), exp_rx_msg_sz); } else { dev_err(dev, "Failed to select a device for message: %.8x\n", diff --git a/drivers/firmware/imx/ele_common.h b/drivers/firmware/imx/ele_c= ommon.h index 0365759fdd12..6c419e5c4404 100644 --- a/drivers/firmware/imx/ele_common.h +++ b/drivers/firmware/imx/ele_common.h @@ -14,12 +14,12 @@ =20 u32 se_get_msg_chksum(u32 *msg, u32 msg_len); =20 -int ele_msg_rcv(struct se_if_priv *priv, struct se_clbk_handle *se_clbk_hd= l); +int ele_msg_rcv(struct se_if_device_ctx *dev_ctx, struct se_clbk_handle *s= e_clbk_hdl); =20 -int ele_msg_send(struct se_if_priv *priv, void *tx_msg, int tx_msg_sz); +int ele_msg_send(struct se_if_device_ctx *dev_ctx, void *tx_msg, int tx_ms= g_sz); =20 -int ele_msg_send_rcv(struct se_if_priv *priv, void *tx_msg, int tx_msg_sz, - void *rx_msg, int exp_rx_msg_sz); +int ele_msg_send_rcv(struct se_if_device_ctx *dev_ctx, void *tx_msg, + int tx_msg_sz, void *rx_msg, int exp_rx_msg_sz); =20 void se_if_rx_callback(struct mbox_client *mbox_cl, void *msg); =20 diff --git a/drivers/firmware/imx/se_ctrl.c b/drivers/firmware/imx/se_ctrl.c index 7cb98a373334..25f9cd5441f9 100644 --- a/drivers/firmware/imx/se_ctrl.c +++ b/drivers/firmware/imx/se_ctrl.c @@ -197,6 +197,36 @@ static int get_se_soc_info(struct se_if_priv *priv, co= nst struct se_soc_info *se return 0; } =20 +static int init_misc_device_context(struct se_if_priv *priv, int ch_id, + struct se_if_device_ctx **new_dev_ctx) +{ + const char *err_str =3D "Failed to allocate memory"; + struct se_if_device_ctx *dev_ctx; + int ret =3D -ENOMEM; + + dev_ctx =3D kzalloc_obj(*dev_ctx, GFP_KERNEL); + + if (!dev_ctx) + return ret; + + dev_ctx->devname =3D kasprintf(GFP_KERNEL, "%s0_ch%d", + get_se_if_name(priv->if_defs->se_if_type), + ch_id); + if (!dev_ctx->devname) + goto exit; + + dev_ctx->priv =3D priv; + *new_dev_ctx =3D dev_ctx; + + return ret; +exit: + *new_dev_ctx =3D NULL; + + kfree(dev_ctx->devname); + kfree(dev_ctx); + return dev_err_probe(priv->dev, ret, "%s", err_str); +} + /* interface for managed res to free a mailbox channel */ static void if_mbox_free_channel(void *mbox_chan) { @@ -253,6 +283,12 @@ static void se_if_probe_cleanup(void *plat_dev) of_reserved_mem_device_release(dev); =20 dev_set_drvdata(dev, NULL); + + if (priv->priv_dev_ctx) { + kfree(priv->priv_dev_ctx->devname); + kfree(priv->priv_dev_ctx); + priv->priv_dev_ctx =3D NULL; + } kfree(priv); } =20 @@ -319,6 +355,12 @@ static int se_if_probe(struct platform_device *pdev) "Failed to init reserved memory region."); } =20 + ret =3D init_misc_device_context(priv, 0, &priv->priv_dev_ctx); + if (ret) + return dev_err_probe(dev, ret, + "Failed[0x%x] to create device contexts.", + ret); + if (if_node->if_defs.se_if_type =3D=3D SE_TYPE_ID_HSM) { ret =3D get_se_soc_info(priv, se_info); if (ret) diff --git a/drivers/firmware/imx/se_ctrl.h b/drivers/firmware/imx/se_ctrl.h index b6833abd81d0..355d38684b1b 100644 --- a/drivers/firmware/imx/se_ctrl.h +++ b/drivers/firmware/imx/se_ctrl.h @@ -20,6 +20,7 @@ #define MESSAGING_VERSION_7 0x7 =20 struct se_clbk_handle { + struct se_if_device_ctx *dev_ctx; struct completion done; bool signal_rcvd; u32 rx_msg_sz; @@ -44,6 +45,12 @@ struct se_imem_buf { u32 state; }; =20 +/* Private struct for each char device instance. */ +struct se_if_device_ctx { + struct se_if_priv *priv; + const char *devname; +}; + /* Header of the messages exchange with the EdgeLock Enclave */ struct se_msg_hdr { u8 ver; @@ -105,6 +112,8 @@ struct se_if_priv { struct se_fw_load_info load_fw; =20 atomic_t fw_busy; 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ABI documentation for the NXP secure-enclave driver. User-space library using this driver: - i.MX Secure Enclave library: -- URL: https://github.com/nxp-imx/imx-secure-enclave.git, - i.MX Secure Middle-Ware: -- URL: https://github.com/nxp-imx/imx-smw.git Following checks are performed on the incoming msg-header, to block exchanging invalid arbitrary commands: - maximum allowed words, - check if command-tag & response-tag are valid - version, - command id validation check, to allow limited base-line API(s) and restrict following: - exchanging power management commands. - reset requests. - BBSM configuration requests. - re-initializing the FW. - RNG init - CAAM resource release management - SE's internal memory management. from user-space. Signed-off-by: Pankaj Gupta --- Changes from v26 to v27 Fix issues reported by Sashiko while reviewing patch 5/7: --------------------------------------------------------- 1. Critical: allocated DMA address for encrypted IMEM buffer discarded Status: Fixed. The IMEM buffer stores dma_addr_t daddr, and save/restore uses imem->dad= dr. 2. High: command receiver contexts bypass response timeout Status: Fixed. Timeout classification is now based on the callback handle used for the = wait, not file/device context identity. 3. High: dlink_dev_ctx() frees command receiver rx_msg without lock Status: Fixed. dlink_dev_ctx() now clears command-receiver callback state under cmd_receiver_clbk_hdl.clbk_rx_lock and frees the old rx_msg after dropping the lock. 4. High: missing kref_init() in init_device_context() Status: Fixed. The v27 changelog states init_device_context() now calls kref_init(&dev_ctx->refcount) 5. High: unbind/remove hangs when userspace is blocked in read() Status: Fixed. The read path no longer holds dev_ctx->fops_lock across the blocking ele_msg_rcv() wait, allowing teardown to acquire fops_lock and clean the context. 6. High: DMA memory freed while firmware may still process timed-out transa= ction Status: Fixed. fw_busy now tracks the exact timed-out dev_ctx via priv->fw_busy_dev_ctx. Cleanup skips freeing coherent DMA only for that context. Late response handling uses work, and teardown calls cancel_work_sync() plus se_clear_fw_busy(). 7. High: concurrent ioctls can trigger multiple firmware authentications Status: Fixed. Firmware load state is serialized using load_fw->load_fw_lock. 8. High: get_se_soc_id() type confusion leaks pointer bits Status: Fixed. get_se_soc_id() now treats device_get_match_data() as struct se_if_node = * and reads if_node->se_info->soc_id. 9. High: early mailbox send failure leaves dangling shared response waiter Status: Fixed. ele_msg_send_rcv() now clears response waiter state under clbk_rx_lock on mailbox send failure. 10. High: invalid dma_to_phys() on coherent DMA address Status: Fixed. Firmware authentication and IMEM service-swap paths use dma_addr_t end-= to-end. dma_to_phys() was removed from this path. 11. Medium: UAPI ioctl structs use variable-sized pointers/types Status: Fixed. The UAPI ioctl structures now use fixed-width __u64 for user pointers a= nd __u32 for sizes. Kernel code uses u64_to_user_ptr(), and .compat_ioctl =3D compat_ptr_ioctl is registered. 12. Medium: unbounded user size passed to memdup_user() Status: Fixed. MAX_ALLOWED_TX_MSG_SZ is introduced and user-provided TX/write sizes are validated before memdup_user(). 13. Pre-existing high: misdirected signal handling in ele_msg_rcv() Status: Fixed / design-controlled. Deferred signal handling is tied to the response-wait callback handle instead of blindly modifying priv->waiting_rsp_clbk_hdl from unrelated wait paths. Command receiver daemon waits are kept separate from synchronous response waits. Reported-by: sashiko-bot Closes: https://sashiko.dev/#/patchset/20260629-imx-se-if-v26-0-14644628574= 4@nxp.com?part=3D5 --- Documentation/ABI/testing/se-cdev | 44 ++ drivers/firmware/imx/Makefile | 2 +- drivers/firmware/imx/ele_base_msg.c | 28 + drivers/firmware/imx/ele_base_msg.h | 19 + drivers/firmware/imx/ele_common.c | 85 ++- drivers/firmware/imx/ele_common.h | 6 + drivers/firmware/imx/ele_fw_api.c | 57 ++ drivers/firmware/imx/ele_fw_api.h | 18 + drivers/firmware/imx/se_ctrl.c | 1178 +++++++++++++++++++++++++++++++= +++- drivers/firmware/imx/se_ctrl.h | 67 +- include/uapi/linux/se_ioctl.h | 97 +++ 11 files changed, 1571 insertions(+), 30 deletions(-) diff --git a/Documentation/ABI/testing/se-cdev b/Documentation/ABI/testing/= se-cdev new file mode 100644 index 000000000000..c6b8e16bda78 --- /dev/null +++ b/Documentation/ABI/testing/se-cdev @@ -0,0 +1,44 @@ +What: /dev/_mu[0-9]+_ch[0-9]+ +Date: Mar 2025 +KernelVersion: 6.8 +Contact: linux-imx@nxp.com, pankaj.gupta@nxp.com +Description: + NXP offers multiple hardware IP(s) for secure enclaves like EdgeLock- + Enclave(ELE), SECO. The character device file descriptors + /dev/_mu*_ch* are the interface between userspace NXP's secure- + enclave shared library and the kernel driver. + + The ioctl(2)-based ABI is defined and documented in + [include]. + ioctl(s) are used primarily for: + + - shared memory management + - allocation of I/O buffers + - getting mu info + - setting a dev-ctx as receiver to receive all the commands from FW + - getting SoC info + - send command and receive command response + + The following file operations are supported: + + open(2) + Currently the only useful flags are O_RDWR. + + read(2) + Every read() from the opened character device context is waiting on + wait_event_interruptible, that gets set by the registered mailbox call= back + function, indicating a message received from the firmware on message- + unit. + + write(2) + Every write() to the opened character device context needs to acquire + mailbox_lock before sending message on to the message unit. + + close(2) + Stops and frees up the I/O contexts that were associated + with the file descriptor. + +Users: https://github.com/nxp-imx/imx-secure-enclave.git, + https://github.com/nxp-imx/imx-smw.git, + crypto/skcipher, + drivers/nvmem/imx-ocotp-ele.c diff --git a/drivers/firmware/imx/Makefile b/drivers/firmware/imx/Makefile index 4412b15846b1..3f41131a0fdc 100644 --- a/drivers/firmware/imx/Makefile +++ b/drivers/firmware/imx/Makefile @@ -4,5 +4,5 @@ obj-$(CONFIG_IMX_SCU) +=3D imx-scu.o misc.o imx-scu-irq.o = rm.o imx-scu-soc.o obj-${CONFIG_IMX_SCMI_CPU_DRV} +=3D sm-cpu.o obj-${CONFIG_IMX_SCMI_MISC_DRV} +=3D sm-misc.o obj-${CONFIG_IMX_SCMI_LMM_DRV} +=3D sm-lmm.o -sec_enclave-objs =3D se_ctrl.o ele_common.o ele_base_msg.o +sec_enclave-objs =3D se_ctrl.o ele_common.o ele_base_msg.o ele_fw_api.o obj-${CONFIG_IMX_SEC_ENCLAVE} +=3D sec_enclave.o diff --git a/drivers/firmware/imx/ele_base_msg.c b/drivers/firmware/imx/ele= _base_msg.c index fcd2bcaeefc8..28674dc9365f 100644 --- a/drivers/firmware/imx/ele_base_msg.c +++ b/drivers/firmware/imx/ele_base_msg.c @@ -15,6 +15,34 @@ =20 #define FW_DBG_DUMP_FIXED_STR "ELE" =20 +int ele_uapi_allowed_base_cmd(struct se_if_priv *priv, + struct se_msg_hdr *header) +{ + switch (header->command) { + case ELE_PING_REQ: return 0; + case ELE_DEBUG_DUMP_REQ: return 0; + case ELE_OEM_AUTH_CONTAINER_REQ: return 0; + case ELE_OEM_VERIFY_IMAGE_REQ: return 0; + case ELE_OEM_REL_CONTAINER_REQ: return 0; + case ELE_FW_LIFE_CYCLE_REQ: return 0; + case ELE_READ_FUSE_REQ: return 0; + case ELE_GET_FW_VERS_REQ: return 0; + case ELE_RETURN_LIFE_CYCLE_REQ: return 0; + case ELE_GET_EVENT_REQ: return 0; + case ELE_COMMIT_REQ: return 0; + case ELE_GEN_KEY_BLOB_REQ: return 0; + case ELE_GET_FW_STATUS_REQ: return 0; + case ELE_XIP_DECRYPT_REQ: return 0; + case ELE_WRITE_FUSE: return 0; + case ELE_GET_INFO_REQ: return 0; + case ELE_DEV_ATTEST_REQ: return 0; + case ELE_WRITE_SHADOW_FUSE_REQ: return 0; + case ELE_READ_SHADOW_FUSE_REQ: return 0; + default: + return -EACCES; + } +} + int ele_get_info(struct se_if_priv *priv, struct ele_dev_info *s_info) { dma_addr_t get_info_addr =3D 0; diff --git a/drivers/firmware/imx/ele_base_msg.h b/drivers/firmware/imx/ele= _base_msg.h index 4c3699543e87..238465a4eccd 100644 --- a/drivers/firmware/imx/ele_base_msg.h +++ b/drivers/firmware/imx/ele_base_msg.h @@ -15,6 +15,23 @@ =20 #define ELE_NONE_VAL 0x0 =20 +#define ELE_OEM_AUTH_CONTAINER_REQ 0x87 +#define ELE_OEM_VERIFY_IMAGE_REQ 0x88 +#define ELE_OEM_REL_CONTAINER_REQ 0x89 +#define ELE_FW_LIFE_CYCLE_REQ 0x95 +#define ELE_READ_FUSE_REQ 0x97 +#define ELE_GET_FW_VERS_REQ 0x9d +#define ELE_RETURN_LIFE_CYCLE_REQ 0xa0 +#define ELE_GET_EVENT_REQ 0xa2 +#define ELE_COMMIT_REQ 0xa8 +#define ELE_GEN_KEY_BLOB_REQ 0xaf +#define ELE_GET_FW_STATUS_REQ 0xc5 +#define ELE_XIP_DECRYPT_REQ 0xc6 +#define ELE_WRITE_FUSE 0xd6 +#define ELE_DEV_ATTEST_REQ 0xdb +#define ELE_WRITE_SHADOW_FUSE_REQ 0xf2 +#define ELE_READ_SHADOW_FUSE_REQ 0xf3 + #define ELE_GET_INFO_REQ 0xda #define ELE_GET_INFO_REQ_MSG_SZ 0x10 #define ELE_GET_INFO_RSP_MSG_SZ 0x08 @@ -95,4 +112,6 @@ int ele_service_swap(struct se_if_priv *priv, dma_addr_t= addr, int ele_fw_authenticate(struct se_if_priv *priv, dma_addr_t contnr_addr, dma_addr_t img_addr); int ele_debug_dump(struct se_if_priv *priv); +int ele_uapi_allowed_base_cmd(struct se_if_priv *priv, + struct se_msg_hdr *header); #endif diff --git a/drivers/firmware/imx/ele_common.c b/drivers/firmware/imx/ele_c= ommon.c index 955b7409ff9f..7deff38c4613 100644 --- a/drivers/firmware/imx/ele_common.c +++ b/drivers/firmware/imx/ele_common.c @@ -5,6 +5,27 @@ =20 #include "ele_base_msg.h" #include "ele_common.h" +#include "ele_fw_api.h" +#include "se_ctrl.h" + +int se_chk_tx_msg_hdr(struct se_if_device_ctx *dev_ctx, struct se_msg_hdr = *header) +{ + struct se_if_priv *priv =3D dev_ctx->priv; + + if (!header->size || header->size > MAX_WORD_SIZE) + return -EINVAL; + + if (header->tag !=3D priv->if_defs->cmd_tag && + header->tag !=3D priv->if_defs->rsp_tag) + return -EINVAL; + + if (header->ver =3D=3D priv->if_defs->base_api_ver) + return ele_uapi_allowed_base_cmd(priv, header); + else if (header->ver =3D=3D priv->if_defs->fw_api_ver) + return ele_uapi_allowed_fw_cmd(dev_ctx, header); + + return -EINVAL; +} =20 /* * se_get_msg_chksum() - to calculate checksum word by word. @@ -42,16 +63,50 @@ u32 se_get_msg_chksum(u32 *msg, u32 msg_len) return chksum; } =20 +static void se_mark_fw_busy(struct se_if_device_ctx *dev_ctx) +{ + struct se_if_priv *priv =3D dev_ctx->priv; + unsigned long flags; + + spin_lock_irqsave(&priv->fw_busy_lock, flags); + if (!priv->fw_busy_dev_ctx) { + kref_get(&dev_ctx->refcount); + priv->fw_busy_dev_ctx =3D dev_ctx; + atomic_set(&priv->fw_busy, 1); + } + spin_unlock_irqrestore(&priv->fw_busy_lock, flags); +} + +void set_se_rcv_msg_timeout(struct se_if_device_ctx *dev_ctx, u32 timeout_= ms) +{ + dev_ctx->rcv_msg_timeout_jiffies =3D msecs_to_jiffies(timeout_ms); +} + int ele_msg_rcv(struct se_if_device_ctx *dev_ctx, struct se_clbk_handle *s= e_clbk_hdl) { struct se_if_priv *priv =3D dev_ctx->priv; + bool is_rsp_wait_with_timeout =3D false; bool wait_uninterruptible =3D false; unsigned long remaining_jiffies; + unsigned long deadline_jiffies; unsigned long flags; int ret; =20 - remaining_jiffies =3D MAX_SCHEDULE_TIMEOUT; + remaining_jiffies =3D dev_ctx->rcv_msg_timeout_jiffies; + if (se_clbk_hdl =3D=3D &priv->waiting_rsp_clbk_hdl) { + is_rsp_wait_with_timeout =3D true; + deadline_jiffies =3D jiffies + remaining_jiffies; + } + do { + if (is_rsp_wait_with_timeout) { + if (time_after_eq(jiffies, deadline_jiffies)) { + ret =3D -ETIMEDOUT; + break; + } + remaining_jiffies =3D deadline_jiffies - jiffies; + } + if (wait_uninterruptible) ret =3D wait_for_completion_timeout(&se_clbk_hdl->done, remaining_jiffies); @@ -67,6 +122,9 @@ int ele_msg_rcv(struct se_if_device_ctx *dev_ctx, struct= se_clbk_handle *se_clbk * synchronized state. */ if (READ_ONCE(priv->waiting_rsp_clbk_hdl.dev_ctx)) { + if (!is_rsp_wait_with_timeout) + return ret; + WRITE_ONCE(se_clbk_hdl->signal_rcvd, true); wait_uninterruptible =3D true; continue; @@ -91,7 +149,7 @@ int ele_msg_rcv(struct se_if_device_ctx *dev_ctx, struct= se_clbk_handle *se_clbk spin_lock_irqsave(&se_clbk_hdl->clbk_rx_lock, flags); se_clbk_hdl->rx_msg =3D NULL; if (!completion_done(&se_clbk_hdl->done)) - atomic_set(&priv->fw_busy, 1); + se_mark_fw_busy(dev_ctx); =20 spin_unlock_irqrestore(&se_clbk_hdl->clbk_rx_lock, flags); ret =3D -ETIMEDOUT; @@ -206,6 +264,7 @@ static bool check_hdr_exception_for_sz(struct se_if_pri= v *priv, void se_if_rx_callback(struct mbox_client *mbox_cl, void *msg) { struct se_clbk_handle *se_clbk_hdl; + bool schedule_fw_busy_work =3D false; struct device *dev =3D mbox_cl->dev; struct se_msg_hdr *header; bool sz_mismatch =3D false; @@ -284,9 +343,13 @@ void se_if_rx_callback(struct mbox_client *mbox_cl, vo= id *msg) exp_rx_msg_sz =3D se_clbk_hdl->rx_msg_sz; spin_lock_irqsave(&se_clbk_hdl->clbk_rx_lock, flags); if (!se_clbk_hdl->rx_msg) { - /* Close circuit breaker on spinlock race */ - atomic_set(&priv->fw_busy, 0); + if (atomic_read(&priv->fw_busy)) + schedule_fw_busy_work =3D true; spin_unlock_irqrestore(&se_clbk_hdl->clbk_rx_lock, flags); + + if (schedule_fw_busy_work) + schedule_work(&priv->fw_busy_work); + dev_info(dev, "ELE responded (late), recovery FW available."); return; } @@ -327,31 +390,31 @@ int se_val_rsp_hdr_n_status(struct se_if_priv *priv, = struct se_api_msg *msg, u32 status; =20 if (header->tag !=3D priv->if_defs->rsp_tag) { - dev_err(priv->dev, "MSG[0x%x] Hdr: Resp tag mismatch. (0x%x !=3D 0x%x)", + dev_dbg(priv->dev, "MSG[0x%x] Hdr: Resp tag mismatch. (0x%x !=3D 0x%x)", msg_id, header->tag, priv->if_defs->rsp_tag); return -EINVAL; } =20 if (header->command !=3D msg_id) { - dev_err(priv->dev, "MSG Header: Cmd id mismatch. (0x%x !=3D 0x%x)", + dev_dbg(priv->dev, "MSG Header: Cmd id mismatch. (0x%x !=3D 0x%x)", header->command, msg_id); return -EINVAL; } =20 if ((sz % 4) || (header->size !=3D (sz >> 2) && !check_hdr_exception_for_sz(priv, header))) { - dev_err(priv->dev, "MSG[0x%x] Hdr: Cmd size mismatch. (0x%x !=3D 0x%x)", + dev_dbg(priv->dev, "MSG[0x%x] Hdr: Cmd size mismatch. (0x%x !=3D 0x%x)", msg_id, header->size, (sz >> 2)); return -EINVAL; } =20 if (is_base_api && header->ver !=3D priv->if_defs->base_api_ver) { - dev_err(priv->dev, + dev_dbg(priv->dev, "MSG[0x%x] Hdr: Base API Vers mismatch. (0x%x !=3D 0x%x)", msg_id, header->ver, priv->if_defs->base_api_ver); return -EINVAL; } else if (!is_base_api && header->ver !=3D priv->if_defs->fw_api_ver) { - dev_err(priv->dev, + dev_dbg(priv->dev, "MSG[0x%x] Hdr: FW API Vers mismatch. (0x%x !=3D 0x%x)", msg_id, header->ver, priv->if_defs->fw_api_ver); return -EINVAL; @@ -359,7 +422,7 @@ int se_val_rsp_hdr_n_status(struct se_if_priv *priv, st= ruct se_api_msg *msg, =20 status =3D RES_STATUS(msg->data[0]); if (status !=3D priv->if_defs->success_tag) { - dev_err(priv->dev, "Command Id[%x], Response Failure =3D 0x%x", + dev_dbg(priv->dev, "Command Id[%x], Response Failure =3D 0x%x", header->command, status); return -EPERM; } @@ -420,7 +483,7 @@ int se_restore_imem_state(struct se_if_priv *priv, stru= ct se_imem_buf *imem) * restore imem state. */ if (s_info.d_addn_info.imem_state !=3D ELE_IMEM_STATE_BAD || !imem->size) - return -EIO; + return 0; =20 /* * IMPORT command will restore IMEM from the given diff --git a/drivers/firmware/imx/ele_common.h b/drivers/firmware/imx/ele_c= ommon.h index 6c419e5c4404..228ca900d32c 100644 --- a/drivers/firmware/imx/ele_common.h +++ b/drivers/firmware/imx/ele_common.h @@ -12,6 +12,11 @@ =20 #define IMX_ELE_FW_DIR "imx/ele/" =20 +#define MAX_WORD_SIZE 0x20 +#define SE_RCV_MSG_DEFAULT_TIMEOUT 5000 +#define SE_RCV_MSG_LONG_TIMEOUT 5000000 + +void set_se_rcv_msg_timeout(struct se_if_device_ctx *dev_ctx, u32 val); u32 se_get_msg_chksum(u32 *msg, u32 msg_len); =20 int ele_msg_rcv(struct se_if_device_ctx *dev_ctx, struct se_clbk_handle *s= e_clbk_hdl); @@ -40,4 +45,5 @@ int se_save_imem_state(struct se_if_priv *priv, struct se= _imem_buf *imem); =20 int se_restore_imem_state(struct se_if_priv *priv, struct se_imem_buf *ime= m); =20 +int se_chk_tx_msg_hdr(struct se_if_device_ctx *dev_ctx, struct se_msg_hdr = *header); #endif /*__ELE_COMMON_H__ */ diff --git a/drivers/firmware/imx/ele_fw_api.c b/drivers/firmware/imx/ele_f= w_api.c new file mode 100644 index 000000000000..4f0f2cb53857 --- /dev/null +++ b/drivers/firmware/imx/ele_fw_api.c @@ -0,0 +1,57 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2026 NXP + */ + +#include "se_ctrl.h" +#include "ele_fw_api.h" + +static bool se_cmd_receiver_allowed_cmd(u8 cmd) +{ + switch (cmd) { + case ELE_SESSION_CLOSE_REQ: + case ELE_STORAGE_CLOSE_REQ: + case ELE_STORAGE_MASTER_IMPORT_REQ: + return true; + default: + return false; + } +} + +int ele_uapi_allowed_fw_cmd(struct se_if_device_ctx *dev_ctx, struct se_ms= g_hdr *header) +{ + struct se_if_priv *priv =3D dev_ctx->priv; + bool is_cmd_receiver =3D false; + + scoped_guard(mutex, &priv->modify_lock) + if (dev_ctx =3D=3D priv->cmd_receiver_clbk_hdl.dev_ctx) + is_cmd_receiver =3D true; + + if (header->tag =3D=3D priv->if_defs->cmd_tag) { + if (is_cmd_receiver && !se_cmd_receiver_allowed_cmd(header->command)) + return -EOPNOTSUPP; + } + + if (header->tag =3D=3D priv->if_defs->rsp_tag && !is_cmd_receiver) + return -EOPNOTSUPP; + + return 0; +} + +void fw_api_specific_ops(struct se_if_device_ctx *dev_ctx, struct se_msg_h= dr *header) +{ + if (header->command =3D=3D ELE_STORAGE_OPEN_REQ) { + int rc =3D 0; + + rc =3D set_dev_ctx_as_command_receiver(dev_ctx); + if (rc) + dev_err(dev_ctx->priv->dev, + "Failed to register %s as CMD-Receiver: %d\n", + dev_ctx->devname, rc); + } + if (header->command =3D=3D ELE_STORAGE_CLOSE_REQ) { + scoped_guard(mutex, &dev_ctx->priv->modify_lock) + unset_dev_ctx_as_command_receiver(dev_ctx); + } +} + diff --git a/drivers/firmware/imx/ele_fw_api.h b/drivers/firmware/imx/ele_f= w_api.h new file mode 100644 index 000000000000..e017359b5053 --- /dev/null +++ b/drivers/firmware/imx/ele_fw_api.h @@ -0,0 +1,18 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2026 NXP + */ + +#ifndef ELE_FW_API_H +#define ELE_FW_API_H +#include "se_ctrl.h" + +#define ELE_SESSION_OPEN_REQ 0x10u +#define ELE_SESSION_CLOSE_REQ 0x11u +#define ELE_STORAGE_OPEN_REQ 0xE0u +#define ELE_STORAGE_CLOSE_REQ 0xE1u +#define ELE_STORAGE_MASTER_IMPORT_REQ 0xE2u + +int ele_uapi_allowed_fw_cmd(struct se_if_device_ctx *dev_ctx, struct se_ms= g_hdr *header); +void fw_api_specific_ops(struct se_if_device_ctx *dev_ctx, struct se_msg_h= dr *header); +#endif /* ELE_FW_API_H */ diff --git a/drivers/firmware/imx/se_ctrl.c b/drivers/firmware/imx/se_ctrl.c index 25f9cd5441f9..fb82df5c58d5 100644 --- a/drivers/firmware/imx/se_ctrl.c +++ b/drivers/firmware/imx/se_ctrl.c @@ -4,10 +4,10 @@ */ =20 #include +#include #include #include #include -#include #include #include #include @@ -16,6 +16,7 @@ #include #include #include +#include #include #include #include @@ -25,22 +26,21 @@ #include #include #include +#include =20 #include "ele_base_msg.h" #include "ele_common.h" +#include "ele_fw_api.h" #include "se_ctrl.h" =20 +/* Maximum response buffer size in bytes for debug-dump replies. */ +#define MAX_ALLOWED_RX_MSG_SZ ELE_DEBUG_DUMP_RSP_SZ +#define MAX_ALLOWED_TX_MSG_SZ SZ_4K + #define MAX_SOC_INFO_DATA_SZ 256 #define MBOX_TX_NAME "tx" #define MBOX_RX_NAME "rx" =20 -#define SE_TYPE_STR_DBG "dbg" -#define SE_TYPE_STR_HSM "hsm" - -#define SE_TYPE_ID_DBG 0x1 - -#define SE_TYPE_ID_HSM 0x2 - struct se_var_info { u16 soc_rev; }; @@ -120,6 +120,13 @@ char *get_se_if_name(u8 se_if_id) return NULL; } =20 +static u32 get_se_soc_id(struct se_if_priv *priv) +{ + const struct se_if_node *if_node =3D device_get_match_data(priv->dev); + + return if_node->se_info->soc_id; +} + static struct se_fw_load_info *get_load_fw_instance(struct se_if_priv *pri= v) { return &priv->load_fw; @@ -197,11 +204,234 @@ static int get_se_soc_info(struct se_if_priv *priv, = const struct se_soc_info *se return 0; } =20 +static int load_firmware(struct se_if_priv *priv, const u8 *se_img_file_to= _load) +{ + const struct firmware *fw =3D NULL; + dma_addr_t se_fw_dma_addr; + u8 *se_fw_buf; + int ret; + + if (!se_img_file_to_load) { + dev_err(priv->dev, "FW image is not provided."); + return -EINVAL; + } + ret =3D request_firmware(&fw, se_img_file_to_load, priv->dev); + if (ret) + return ret; + + dev_info(priv->dev, "loading firmware %s.", se_img_file_to_load); + + /* allocate buffer to store the SE FW */ + se_fw_buf =3D dma_alloc_coherent(priv->dev, fw->size, &se_fw_dma_addr, GF= P_KERNEL); + if (!se_fw_buf) { + ret =3D -ENOMEM; + goto exit; + } + + memcpy(se_fw_buf, fw->data, fw->size); + ret =3D ele_fw_authenticate(priv, se_fw_dma_addr, se_fw_dma_addr); + if (ret < 0) { + dev_err(priv->dev, + "Error %pe: Authenticate & load SE firmware %s.", + ERR_PTR(ret), se_img_file_to_load); + ret =3D -EPERM; + } + dma_free_coherent(priv->dev, fw->size, se_fw_buf, se_fw_dma_addr); +exit: + release_firmware(fw); + + return ret; +} + +static int se_load_firmware(struct se_if_priv *priv) +{ + struct se_fw_load_info *load_fw =3D get_load_fw_instance(priv); + int ret =3D 0; + + guard(mutex)(&load_fw->load_fw_lock); + if (!load_fw->is_fw_tobe_loaded) + return 0; + + if (load_fw->imem.state =3D=3D ELE_IMEM_STATE_BAD) { + ret =3D load_firmware(priv, load_fw->se_fw_img_nm->prim_fw_nm_in_rfs); + if (ret) { + dev_err(priv->dev, "Failed to load boot firmware."); + return -EPERM; + } + } + + ret =3D load_firmware(priv, load_fw->se_fw_img_nm->seco_fw_nm_in_rfs); + if (ret) { + dev_err(priv->dev, "Failed to load runtime firmware."); + return -EPERM; + } + + load_fw->is_fw_tobe_loaded =3D false; + + return ret; +} + +static int init_se_shared_mem(struct se_if_device_ctx *dev_ctx) +{ + struct se_shared_mem_mgmt_info *se_shared_mem_mgmt =3D &dev_ctx->se_share= d_mem_mgmt; + struct se_if_priv *priv =3D dev_ctx->priv; + + INIT_LIST_HEAD(&se_shared_mem_mgmt->pending_out); + INIT_LIST_HEAD(&se_shared_mem_mgmt->pending_in); + + /* + * Allocate some memory for data exchanges with S40x. + * This will be used for data not requiring secure memory. + */ + se_shared_mem_mgmt->non_secure_mem.ptr =3D + dma_alloc_coherent(priv->dev, MAX_DATA_SIZE_PER_USER, + &se_shared_mem_mgmt->non_secure_mem.dma_addr, + GFP_KERNEL); + if (!se_shared_mem_mgmt->non_secure_mem.ptr) + return -ENOMEM; + + se_shared_mem_mgmt->non_secure_mem.size =3D MAX_DATA_SIZE_PER_USER; + se_shared_mem_mgmt->non_secure_mem.pos =3D 0; + + return 0; +} + +static void cleanup_se_shared_mem(struct se_if_device_ctx *dev_ctx) +{ + struct se_shared_mem_mgmt_info *se_shared_mem_mgmt =3D &dev_ctx->se_share= d_mem_mgmt; + struct se_if_priv *priv =3D dev_ctx->priv; + + /* Free non-secure shared buffer. */ + dma_free_coherent(priv->dev, MAX_DATA_SIZE_PER_USER, + se_shared_mem_mgmt->non_secure_mem.ptr, + se_shared_mem_mgmt->non_secure_mem.dma_addr); + + se_shared_mem_mgmt->non_secure_mem.ptr =3D NULL; + se_shared_mem_mgmt->non_secure_mem.dma_addr =3D 0; + se_shared_mem_mgmt->non_secure_mem.size =3D 0; + se_shared_mem_mgmt->non_secure_mem.pos =3D 0; +} + +/* Need to copy the output data to user-device context. + */ +static int se_dev_ctx_cpy_out_data(struct se_if_device_ctx *dev_ctx) +{ + struct se_shared_mem_mgmt_info *se_shared_mem_mgmt =3D &dev_ctx->se_share= d_mem_mgmt; + struct se_if_priv *priv =3D dev_ctx->priv; + struct se_buf_desc *b_desc, *temp; + bool do_cpy =3D true; + + list_for_each_entry_safe(b_desc, temp, &se_shared_mem_mgmt->pending_out, = link) { + if (b_desc->usr_buf_ptr && b_desc->shared_buf_ptr && do_cpy) { + dev_dbg(priv->dev, "Copying output data to user."); + if (do_cpy && copy_to_user(b_desc->usr_buf_ptr, + b_desc->shared_buf_ptr, + b_desc->size)) { + dev_err(priv->dev, "Failure copying output data to user."); + do_cpy =3D false; + } + } + + if (b_desc->shared_buf_ptr) + memset(b_desc->shared_buf_ptr, 0, b_desc->size); + + list_del(&b_desc->link); + kfree(b_desc); + } + + return do_cpy ? 0 : -EFAULT; +} + +/* + * Clean the used Shared Memory space, + * whether its Input Data copied from user buffers, or + * Data received from FW. + */ +static void se_dev_ctx_shared_mem_cleanup(struct se_if_device_ctx *dev_ctx) +{ + struct se_shared_mem_mgmt_info *se_shared_mem_mgmt =3D &dev_ctx->se_share= d_mem_mgmt; + struct list_head *pending_lists[] =3D {&se_shared_mem_mgmt->pending_in, + &se_shared_mem_mgmt->pending_out}; + struct se_buf_desc *b_desc, *temp; + int i; + + for (i =3D 0; i < ARRAY_SIZE(pending_lists); i++) { + list_for_each_entry_safe(b_desc, temp, pending_lists[i], link) { + if (b_desc->shared_buf_ptr) + memset(b_desc->shared_buf_ptr, 0, b_desc->size); + + list_del(&b_desc->link); + kfree(b_desc); + } + } + se_shared_mem_mgmt->non_secure_mem.pos =3D 0; +} + +static struct se_buf_desc *add_b_desc_to_pending_list(void *shared_ptr_wit= h_pos, + struct se_ioctl_setup_iobuf *io, + struct se_if_device_ctx *dev_ctx) +{ + struct se_shared_mem_mgmt_info *se_shared_mem_mgmt =3D &dev_ctx->se_share= d_mem_mgmt; + struct se_buf_desc *b_desc =3D NULL; + + b_desc =3D kzalloc_obj(*b_desc, GFP_KERNEL); + if (!b_desc) + return ERR_PTR(-ENOMEM); + + b_desc->shared_buf_ptr =3D shared_ptr_with_pos; + b_desc->usr_buf_ptr =3D u64_to_user_ptr(io->user_buf); + b_desc->size =3D io->length; + + if (io->flags & SE_IO_BUF_FLAGS_IS_INPUT) { + /* + * buffer is input: + * add an entry in the "pending input buffers" list so + * that copied data can be cleaned from shared memory + * later. + */ + list_add_tail(&b_desc->link, &se_shared_mem_mgmt->pending_in); + } else { + /* + * buffer is output: + * add an entry in the "pending out buffers" list so data + * can be copied to user space when receiving Secure-Enclave + * response. + */ + list_add_tail(&b_desc->link, &se_shared_mem_mgmt->pending_out); + } + + return b_desc; +} + +static void se_if_open_gate_release(struct kref *kref) +{ + struct se_if_open_gate *gate =3D + container_of(kref, struct se_if_open_gate, refcount); + + kfree(gate); +} + +static bool se_if_open_gate_get(struct se_if_open_gate *gate) +{ + if (!gate) + return false; + + return kref_get_unless_zero(&gate->refcount); +} + +static void se_if_open_gate_put(struct se_if_open_gate *gate) +{ + if (gate) + kref_put(&gate->refcount, se_if_open_gate_release); +} + static int init_misc_device_context(struct se_if_priv *priv, int ch_id, - struct se_if_device_ctx **new_dev_ctx) + struct se_if_device_ctx **new_dev_ctx, + const struct file_operations *se_if_fops) { const char *err_str =3D "Failed to allocate memory"; struct se_if_device_ctx *dev_ctx; + struct se_if_open_gate *gate =3D NULL; int ret =3D -ENOMEM; =20 dev_ctx =3D kzalloc_obj(*dev_ctx, GFP_KERNEL); @@ -215,18 +445,865 @@ static int init_misc_device_context(struct se_if_pri= v *priv, int ch_id, if (!dev_ctx->devname) goto exit; =20 + mutex_init(&dev_ctx->fops_lock); + dev_ctx->priv =3D priv; + kref_init(&dev_ctx->refcount); + dev_ctx->cleanup_done =3D false; *new_dev_ctx =3D dev_ctx; + set_se_rcv_msg_timeout(dev_ctx, SE_RCV_MSG_DEFAULT_TIMEOUT); + + gate =3D kzalloc_obj(*gate, GFP_KERNEL); + if (!gate) + goto exit; + + mutex_init(&gate->lock); + kref_init(&gate->refcount); /* device-owned reference */ + gate->priv =3D priv; + gate->dying =3D false; + priv->open_gate =3D gate; + + /* + * The miscdevice storage is now owned by the open gate object. + * priv->priv_dev_ctx still keeps a pointer to that miscdevice. + */ + dev_ctx->miscdev =3D &gate->miscdev; + + dev_ctx->miscdev->name =3D dev_ctx->devname; + dev_ctx->miscdev->minor =3D MISC_DYNAMIC_MINOR; + dev_ctx->miscdev->fops =3D se_if_fops; + dev_ctx->miscdev->parent =3D priv->dev; + ret =3D misc_register(dev_ctx->miscdev); + if (ret) { + err_str =3D "Failed to register misc device."; + goto exit; + } =20 return ret; exit: *new_dev_ctx =3D NULL; - + if (gate) { + priv->open_gate =3D NULL; + se_if_open_gate_put(gate); + } kfree(dev_ctx->devname); kfree(dev_ctx); return dev_err_probe(priv->dev, ret, "%s", err_str); } =20 +static void se_if_priv_release(struct kref *kref) +{ + struct se_if_priv *priv =3D container_of(kref, struct se_if_priv, refcoun= t); + + /* Free priv_dev_ctx if it exists */ + if (priv->priv_dev_ctx) { + /* + * miscdev storage belongs to open_gate, not directly to + * priv_dev_ctx. The gate should already have been detached + * from priv during teardown. + */ + + kfree(priv->priv_dev_ctx->devname); + kfree(priv->priv_dev_ctx); + priv->priv_dev_ctx =3D NULL; + } + + /* + * Be defensive: if teardown did not already drop the device-owned + * gate reference for some reason, release it here. + */ + if (priv->open_gate) { + se_if_open_gate_put(priv->open_gate); + priv->open_gate =3D NULL; + } + + /* Free any remaining resources that weren't devm-managed */ + kfree(priv); +} + +static void se_if_dev_ctx_release(struct kref *kref) +{ + struct se_if_device_ctx *dev_ctx =3D + container_of(kref, struct se_if_device_ctx, refcount); + struct se_if_priv *priv =3D dev_ctx->priv; + + kfree(dev_ctx); + + /* drop the priv reference owned by this device context */ + kref_put(&priv->refcount, se_if_priv_release); +} + +static void se_clear_fw_busy(struct se_if_priv *priv) +{ + struct se_if_device_ctx *dev_ctx =3D NULL; + unsigned long flags; + + spin_lock_irqsave(&priv->fw_busy_lock, flags); + dev_ctx =3D priv->fw_busy_dev_ctx; + priv->fw_busy_dev_ctx =3D NULL; + atomic_set(&priv->fw_busy, 0); + spin_unlock_irqrestore(&priv->fw_busy_lock, flags); + + if (!dev_ctx) + return; + + scoped_guard(mutex, &dev_ctx->fops_lock) { + if (dev_ctx->cleanup_done) + cleanup_se_shared_mem(dev_ctx); + } + + kref_put(&dev_ctx->refcount, se_if_dev_ctx_release); +} + +void unset_dev_ctx_as_command_receiver(struct se_if_device_ctx *dev_ctx) +{ + struct se_if_priv *priv =3D dev_ctx->priv; + struct se_api_msg *old_rx_msg =3D NULL; + struct se_clbk_handle *se_clbk_hdl; + unsigned long flags; + + lockdep_assert_held(&priv->modify_lock); + se_clbk_hdl =3D &priv->cmd_receiver_clbk_hdl; + + if (se_clbk_hdl->dev_ctx =3D=3D dev_ctx) { + spin_lock_irqsave(&se_clbk_hdl->clbk_rx_lock, flags); + old_rx_msg =3D se_clbk_hdl->rx_msg; + se_clbk_hdl->dev_ctx =3D NULL; + se_clbk_hdl->rx_msg =3D NULL; + se_clbk_hdl->rx_msg_sz =3D 0; + spin_unlock_irqrestore(&se_clbk_hdl->clbk_rx_lock, flags); + + kfree(old_rx_msg); + complete_all(&se_clbk_hdl->done); + } +} + +int set_dev_ctx_as_command_receiver(struct se_if_device_ctx *dev_ctx) +{ + struct se_if_priv *priv =3D dev_ctx->priv; + struct se_api_msg *new_rx_msg =3D NULL; + struct se_clbk_handle *se_clbk_hdl; + unsigned long flags; + + se_clbk_hdl =3D &priv->cmd_receiver_clbk_hdl; + guard(mutex)(&priv->modify_lock); + if (se_clbk_hdl->dev_ctx =3D=3D dev_ctx) + return 0; + + if (se_clbk_hdl->dev_ctx) + return -EBUSY; + + if (!se_clbk_hdl->rx_msg) { + new_rx_msg =3D kzalloc(MAX_NVM_MSG_LEN, GFP_KERNEL); + if (!new_rx_msg) + return -ENOMEM; + } + spin_lock_irqsave(&se_clbk_hdl->clbk_rx_lock, flags); + if (new_rx_msg) + se_clbk_hdl->rx_msg =3D new_rx_msg; + reinit_completion(&se_clbk_hdl->done); + se_clbk_hdl->rx_msg_sz =3D MAX_NVM_MSG_LEN; + se_clbk_hdl->dev_ctx =3D dev_ctx; + dev_ctx->rcv_msg_timeout_jiffies =3D MAX_SCHEDULE_TIMEOUT; + spin_unlock_irqrestore(&se_clbk_hdl->clbk_rx_lock, flags); + + return 0; +} + +static void dlink_dev_ctx(struct se_if_device_ctx *dev_ctx) +{ + struct se_if_priv *priv =3D dev_ctx->priv; + + unset_dev_ctx_as_command_receiver(dev_ctx); + + if (!list_empty(&dev_ctx->link)) { + list_del_init(&dev_ctx->link); + priv->active_devctx_count--; + } +} + +static bool se_is_fw_busy_ctx(struct se_if_device_ctx *dev_ctx) +{ + struct se_if_priv *priv =3D dev_ctx->priv; + unsigned long flags; + bool match; + + spin_lock_irqsave(&priv->fw_busy_lock, flags); + match =3D priv->fw_busy_dev_ctx =3D=3D dev_ctx; + spin_unlock_irqrestore(&priv->fw_busy_lock, flags); + + return match; +} + +static void cleanup_dev_ctx(struct se_if_device_ctx *dev_ctx, bool is_fclo= se) +{ + scoped_guard(mutex, &dev_ctx->fops_lock) { + if (dev_ctx->cleanup_done) + goto exit; + + /* + * fw_busy is caused by one timed-out synchronous transaction. Only that + * transaction's dev_ctx may still have coherent memory referenced by FW. + * Do not skip cleanup for unrelated contexts while fw_busy is set. + */ + if (se_is_fw_busy_ctx(dev_ctx)) + dev_warn(dev_ctx->priv->dev, + "%s: deferring shared memory cleanup while FW is busy\n", + dev_ctx->devname); + else + cleanup_se_shared_mem(dev_ctx); + + kfree(dev_ctx->devname); + dev_ctx->devname =3D NULL; + dev_ctx->cleanup_done =3D true; + } +exit: + if (is_fclose) + kref_put(&dev_ctx->refcount, se_if_dev_ctx_release); +} + +static void dlink_n_cleanup_dev_ctx(struct se_if_device_ctx *dev_ctx, bool= is_fclose) +{ + struct se_if_priv *priv =3D dev_ctx->priv; + + if (is_fclose) { + scoped_guard(mutex, &priv->modify_lock) + dlink_dev_ctx(dev_ctx); + } + + cleanup_dev_ctx(dev_ctx, is_fclose); +} + +static int init_device_context(struct se_if_priv *priv, int ch_id, + struct se_if_device_ctx **new_dev_ctx) +{ + struct se_if_device_ctx *dev_ctx; + int ret =3D 0; + + dev_ctx =3D kzalloc_obj(*dev_ctx, GFP_KERNEL); + + if (!dev_ctx) + return -ENOMEM; + + dev_ctx->devname =3D kasprintf(GFP_KERNEL, "%s0_ch%d", + get_se_if_name(priv->if_defs->se_if_type), + ch_id); + if (!dev_ctx->devname) { + kfree(dev_ctx); + return -ENOMEM; + } + + mutex_init(&dev_ctx->fops_lock); + kref_init(&dev_ctx->refcount); + dev_ctx->priv =3D priv; + dev_ctx->cleanup_done =3D false; + INIT_LIST_HEAD(&dev_ctx->link); + set_se_rcv_msg_timeout(dev_ctx, SE_RCV_MSG_LONG_TIMEOUT); + *new_dev_ctx =3D dev_ctx; + + ret =3D init_se_shared_mem(dev_ctx); + if (ret < 0) { + kfree(dev_ctx->devname); + kfree(dev_ctx); + *new_dev_ctx =3D NULL; + + return ret; + } + + /* Take a reference to priv for this device context */ + kref_get(&priv->refcount); + + scoped_guard(mutex, &priv->modify_lock) { + list_add_tail(&dev_ctx->link, &priv->dev_ctx_list); + priv->active_devctx_count++; + } + + return ret; +} + +static int se_ioctl_cmd_snd_rcv_cleanup(struct se_if_device_ctx *dev_ctx, = void __user *uarg, + struct se_ioctl_cmd_snd_rcv_rsp_info *cmd_snd_rcv_rsp_info) +{ + /* shared memory is allocated before this IOCTL */ + se_dev_ctx_shared_mem_cleanup(dev_ctx); + + if (cmd_snd_rcv_rsp_info->rx_buf_sz && + copy_to_user(uarg, cmd_snd_rcv_rsp_info, sizeof(*cmd_snd_rcv_rsp_info= ))) { + dev_err(dev_ctx->priv->dev, "%s: Failed to copy cmd_snd_rcv_rsp_info to = user.", + dev_ctx->devname); + return -EFAULT; + } + + return 0; +} + +static int se_ioctl_cmd_snd_rcv_rsp_handler(struct se_if_device_ctx *dev_c= tx, + void __user *uarg) +{ + struct se_ioctl_cmd_snd_rcv_rsp_info cmd_snd_rcv_rsp_info =3D {0}; + struct se_if_priv *priv =3D dev_ctx->priv; + int rsp_status_err =3D 0; + int cleanup_err =3D 0; + int err =3D 0; + + if (copy_from_user(&cmd_snd_rcv_rsp_info, uarg, + sizeof(cmd_snd_rcv_rsp_info))) { + dev_err(priv->dev, + "%s: Failed to copy cmd_snd_rcv_rsp_info from user.", + dev_ctx->devname); + se_ioctl_cmd_snd_rcv_cleanup(dev_ctx, uarg, &cmd_snd_rcv_rsp_info); + return -EFAULT; + } + + if (cmd_snd_rcv_rsp_info.tx_buf_sz < SE_MU_HDR_SZ || + cmd_snd_rcv_rsp_info.tx_buf_sz > MAX_ALLOWED_TX_MSG_SZ) { + dev_err(priv->dev, "%s: User buffer too small/large(%d < %d)", + dev_ctx->devname, cmd_snd_rcv_rsp_info.tx_buf_sz, + cmd_snd_rcv_rsp_info.tx_buf_sz < SE_MU_HDR_SZ ? SE_MU_HDR_SZ : + MAX_ALLOWED_TX_MSG_SZ); + se_ioctl_cmd_snd_rcv_cleanup(dev_ctx, uarg, &cmd_snd_rcv_rsp_info); + return -ENOSPC; + } + + struct se_api_msg *tx_msg __free(kfree) =3D + memdup_user(u64_to_user_ptr(cmd_snd_rcv_rsp_info.tx_buf), + cmd_snd_rcv_rsp_info.tx_buf_sz); + if (IS_ERR(tx_msg)) { + err =3D PTR_ERR(tx_msg); + se_ioctl_cmd_snd_rcv_cleanup(dev_ctx, uarg, &cmd_snd_rcv_rsp_info); + return err; + } + + err =3D se_chk_tx_msg_hdr(dev_ctx, &tx_msg->header); + if (err) { + se_ioctl_cmd_snd_rcv_cleanup(dev_ctx, uarg, &cmd_snd_rcv_rsp_info); + return err; + } + + if (cmd_snd_rcv_rsp_info.rx_buf_sz < sizeof(struct se_msg_hdr) || + cmd_snd_rcv_rsp_info.rx_buf_sz > MAX_ALLOWED_RX_MSG_SZ) { + se_ioctl_cmd_snd_rcv_cleanup(dev_ctx, uarg, &cmd_snd_rcv_rsp_info); + return -EINVAL; + } + + if (tx_msg->header.tag !=3D priv->if_defs->cmd_tag) { + se_ioctl_cmd_snd_rcv_cleanup(dev_ctx, uarg, &cmd_snd_rcv_rsp_info); + return -EINVAL; + } + + if (tx_msg->header.ver =3D=3D priv->if_defs->fw_api_ver && + get_load_fw_instance(priv)->is_fw_tobe_loaded) { + err =3D se_load_firmware(priv); + if (err) { + dev_err(priv->dev, "Could not send msg as FW is not loaded."); + se_ioctl_cmd_snd_rcv_cleanup(dev_ctx, uarg, &cmd_snd_rcv_rsp_info); + return -EPERM; + } + } + + struct se_api_msg *rx_msg __free(kfree) =3D + kzalloc(cmd_snd_rcv_rsp_info.rx_buf_sz, GFP_KERNEL); + if (!rx_msg) { + se_ioctl_cmd_snd_rcv_cleanup(dev_ctx, uarg, &cmd_snd_rcv_rsp_info); + return -ENOMEM; + } + + err =3D ele_msg_send_rcv(dev_ctx, tx_msg, cmd_snd_rcv_rsp_info.tx_buf_sz, + rx_msg, cmd_snd_rcv_rsp_info.rx_buf_sz); + if (err < 0) { + se_ioctl_cmd_snd_rcv_cleanup(dev_ctx, uarg, &cmd_snd_rcv_rsp_info); + + return err; + } + + dev_dbg(priv->dev, "%s: %s %s.", dev_ctx->devname, __func__, + "message received, start transmit to user"); + + rsp_status_err =3D + se_val_rsp_hdr_n_status(priv, rx_msg, tx_msg->header.command, + cmd_snd_rcv_rsp_info.rx_buf_sz, + tx_msg->header.ver =3D=3D priv->if_defs->base_api_ver); + + if (!rsp_status_err) { + err =3D se_dev_ctx_cpy_out_data(dev_ctx); + if (err < 0) { + se_ioctl_cmd_snd_rcv_cleanup(dev_ctx, uarg, &cmd_snd_rcv_rsp_info); + return err; + } + } + + /* Copy data from the buffer */ + print_hex_dump_debug("to user ", DUMP_PREFIX_OFFSET, 4, 4, rx_msg, + cmd_snd_rcv_rsp_info.rx_buf_sz, false); + + if (copy_to_user(u64_to_user_ptr(cmd_snd_rcv_rsp_info.rx_buf), rx_msg, + cmd_snd_rcv_rsp_info.rx_buf_sz)) { + dev_err(priv->dev, "%s: Failed to copy to user.", dev_ctx->devname); + err =3D -EFAULT; + } + + cleanup_err =3D se_ioctl_cmd_snd_rcv_cleanup(dev_ctx, uarg, &cmd_snd_rcv_= rsp_info); + + if (cleanup_err && !err) + err =3D cleanup_err; + + if (!err && !rsp_status_err) + fw_api_specific_ops(dev_ctx, &tx_msg->header); + + return err; +} + +static int se_ioctl_get_mu_info(struct se_if_device_ctx *dev_ctx, + void __user *uarg) +{ + struct se_if_priv *priv =3D dev_ctx->priv; + struct se_ioctl_get_if_info if_info; + struct se_if_node *if_node; + int err =3D 0; + + if_node =3D container_of(priv->if_defs, typeof(*if_node), if_defs); + + if_info.se_if_id =3D 0; + if_info.interrupt_idx =3D 0; + if_info.tz =3D 0; + if_info.did =3D 0; + if_info.cmd_tag =3D priv->if_defs->cmd_tag; + if_info.rsp_tag =3D priv->if_defs->rsp_tag; + if_info.success_tag =3D priv->if_defs->success_tag; + if_info.base_api_ver =3D priv->if_defs->base_api_ver; + if_info.fw_api_ver =3D priv->if_defs->fw_api_ver; + + dev_dbg(priv->dev, "%s: info [se_if_id: %d, irq_idx: %d, tz: 0x%x, did: 0= x%x].", + dev_ctx->devname, if_info.se_if_id, if_info.interrupt_idx, if_info.tz, + if_info.did); + + if (copy_to_user(uarg, &if_info, sizeof(if_info))) { + dev_err(priv->dev, "%s: Failed to copy mu info to user.", + dev_ctx->devname); + err =3D -EFAULT; + } + + return err; +} + +static void rollback_shared_mem_pos(struct se_if_device_ctx *dev_ctx, u32 = length) +{ + struct se_shared_mem *shared_mem =3D NULL; + + shared_mem =3D &dev_ctx->se_shared_mem_mgmt.non_secure_mem; + + if (WARN_ON_ONCE(length > shared_mem->pos)) { + shared_mem->pos =3D 0; + return; + } + + shared_mem->pos -=3D length; +} + +static int get_shared_mem_slot(struct se_if_device_ctx *dev_ctx, + u32 *length, dma_addr_t *ele_dma_addr, void **ptr) +{ + struct se_shared_mem *shared_mem =3D NULL; + size_t aligned_len =3D 0; + u32 pos; + + aligned_len =3D round_up((size_t)*length, 8); + if (aligned_len < *length) { + dev_err(dev_ctx->priv->dev, "%s: Invalid buffer length.", + dev_ctx->devname); + return -EINVAL; + } + + /* No specific requirement for this buffer. */ + shared_mem =3D &dev_ctx->se_shared_mem_mgmt.non_secure_mem; + + /* Check there is enough space in the shared memory. */ + dev_dbg(dev_ctx->priv->dev, "%s: req_size =3D %zd, max_size=3D %d, curr_p= os =3D %d", + dev_ctx->devname, aligned_len, shared_mem->size, + shared_mem->pos); + + if (shared_mem->size < shared_mem->pos || + aligned_len > (shared_mem->size - shared_mem->pos)) { + dev_err(dev_ctx->priv->dev, "%s: Not enough space in shared memory.", + dev_ctx->devname); + return -ENOMEM; + } + + /* Allocate space in shared memory. 8 bytes aligned. */ + pos =3D shared_mem->pos; + shared_mem->pos +=3D aligned_len; + *ele_dma_addr =3D (u64)shared_mem->dma_addr + pos; + *ptr =3D shared_mem->ptr + pos; + *length =3D aligned_len; + + memset(shared_mem->ptr + pos, 0, aligned_len); + + return 0; +} + +/* + * Copy a buffer of data to/from the user and return the address to use in + * messages + */ +static int se_ioctl_setup_iobuf_handler(struct se_if_device_ctx *dev_ctx, + void __user *uarg) +{ + struct se_ioctl_setup_iobuf io =3D {0}; + struct se_buf_desc *b_desc =3D NULL; + void *dma_buf_ptr =3D NULL; + dma_addr_t ele_dma_addr; + u32 aligned_len =3D 0; + int err =3D 0; + + if (copy_from_user(&io, uarg, sizeof(io))) { + dev_err(dev_ctx->priv->dev, "%s: Failed copy iobuf config from user.", + dev_ctx->devname); + return -EFAULT; + } + + dev_dbg(dev_ctx->priv->dev, "%s: io [buf: %p(%d) flag: %x].", dev_ctx->de= vname, + u64_to_user_ptr(io.user_buf), io.length, io.flags); + + if (io.length =3D=3D 0 || !io.user_buf) { + /* + * Accept NULL pointers since some buffers are optional + * in FW commands. In this case we should return 0 as + * pointer to be embedded into the message. + * Skip all data copy part of code below. + */ + io.ele_addr =3D 0; + goto copy; + } + + aligned_len =3D io.length; + err =3D get_shared_mem_slot(dev_ctx, &aligned_len, &ele_dma_addr, &dma_bu= f_ptr); + if (err) + return err; + + io.ele_addr =3D ele_dma_addr; + if ((io.flags & SE_IO_BUF_FLAGS_IS_INPUT) || + (io.flags & SE_IO_BUF_FLAGS_IS_IN_OUT)) { + /* + * buffer is input: + * copy data from user space to this allocated buffer. + */ + if (copy_from_user(dma_buf_ptr, u64_to_user_ptr(io.user_buf), + io.length)) { + dev_err(dev_ctx->priv->dev, + "%s: Failed copy data to shared memory.", + dev_ctx->devname); + err =3D -EFAULT; + goto rollback; + } + } + + b_desc =3D add_b_desc_to_pending_list(dma_buf_ptr, &io, dev_ctx); + if (IS_ERR(b_desc)) { + err =3D PTR_ERR(b_desc); + dev_err(dev_ctx->priv->dev, "%s: Failed to allocate/link b_desc.", + dev_ctx->devname); + goto rollback; + } + +copy: + /* Provide the EdgeLock Enclave address to user space only if success.*/ + if (copy_to_user(uarg, &io, sizeof(io))) { + dev_err(dev_ctx->priv->dev, "%s: Failed to copy iobuff setup to user.", + dev_ctx->devname); + err =3D -EFAULT; + goto rollback; + } + return err; + +rollback: + if (!IS_ERR_OR_NULL(b_desc)) { + list_del(&b_desc->link); + kfree(b_desc); + } + + if (dma_buf_ptr && aligned_len) { + memset(dma_buf_ptr, 0, aligned_len); + rollback_shared_mem_pos(dev_ctx, aligned_len); + } + + return err; +} + +/* IOCTL to provide SoC information */ +static int se_ioctl_get_se_soc_info_handler(struct se_if_device_ctx *dev_c= tx, + void __user *uarg) +{ + struct se_ioctl_get_soc_info soc_info; + int err =3D -EINVAL; + + soc_info.soc_id =3D get_se_soc_id(dev_ctx->priv); + soc_info.soc_rev =3D var_se_info.soc_rev; + + err =3D copy_to_user(uarg, (u8 *)(&soc_info), sizeof(soc_info)); + if (err) { + dev_err(dev_ctx->priv->dev, "%s: Failed to copy soc info to user.", + dev_ctx->devname); + err =3D -EFAULT; + } + + return err; +} + +/* + * File operations for user-space + */ + +/* Write a message to the MU. */ +static ssize_t se_if_fops_write(struct file *fp, const char __user *buf, + size_t size, loff_t *ppos) +{ + struct se_if_device_ctx *dev_ctx =3D fp->private_data; + struct se_if_priv *priv; + int err; + + scoped_cond_guard(mutex_intr, return -EBUSY, &dev_ctx->fops_lock) { + if (dev_ctx->cleanup_done) + return -ENODEV; + + priv =3D dev_ctx->priv; + + dev_dbg(priv->dev, "%s: write from buf (%p)%zu, ppos=3D%lld.", dev_ctx->= devname, + buf, size, ((ppos) ? *ppos : 0)); + + if (dev_ctx !=3D priv->cmd_receiver_clbk_hdl.dev_ctx) + return -EINVAL; + + if (size < SE_MU_HDR_SZ || size > MAX_ALLOWED_TX_MSG_SZ) { + dev_err(priv->dev, "%s: User buffer too small/large(%zu < %d)", + dev_ctx->devname, size, + size < SE_MU_HDR_SZ ? SE_MU_HDR_SZ : + MAX_ALLOWED_TX_MSG_SZ); + return -ENOSPC; + } + + struct se_api_msg *tx_msg __free(kfree) =3D memdup_user(buf, size); + if (IS_ERR(tx_msg)) + return PTR_ERR(tx_msg); + + err =3D se_chk_tx_msg_hdr(dev_ctx, &tx_msg->header); + if (err) + return err; + + print_hex_dump_debug("from user ", DUMP_PREFIX_OFFSET, 4, 4, + tx_msg, size, false); + + err =3D ele_msg_send(dev_ctx, tx_msg, size); + + return err; + } +} + +/* + * Read a message from the MU. + * Blocking until a message is available. + */ +static ssize_t se_if_fops_read(struct file *fp, char __user *buf, size_t s= ize, + loff_t *ppos) +{ + struct se_if_device_ctx *dev_ctx =3D fp->private_data; + struct se_if_priv *priv; + unsigned long flags; + size_t copy_len; + int err; + + scoped_cond_guard(mutex_intr, return -EBUSY, &dev_ctx->fops_lock) { + if (dev_ctx->cleanup_done) { + priv->cmd_receiver_clbk_hdl.rx_msg_sz =3D 0; + se_dev_ctx_shared_mem_cleanup(dev_ctx); + return -ENODEV; + } + + priv =3D dev_ctx->priv; + + dev_dbg(priv->dev, "%s: read to buf %p(%zu), ppos=3D%lld.", dev_ctx->dev= name, + buf, size, ((ppos) ? *ppos : 0)); + + if (dev_ctx !=3D priv->cmd_receiver_clbk_hdl.dev_ctx) { + priv->cmd_receiver_clbk_hdl.rx_msg_sz =3D 0; + se_dev_ctx_shared_mem_cleanup(dev_ctx); + return -EINVAL; + } + } + + err =3D ele_msg_rcv(dev_ctx, &priv->cmd_receiver_clbk_hdl); + if (err < 0) { + if (err !=3D -ERESTARTSYS) + dev_err(priv->dev, + "%s: Er[0x%x]: Signal Interrupted. Current act-dev-ctx count: %d.", + dev_ctx->devname, err, dev_ctx->priv->active_devctx_count); + goto exit; + } + + spin_lock_irqsave(&priv->cmd_receiver_clbk_hdl.clbk_rx_lock, flags); + if (priv->cmd_receiver_clbk_hdl.dev_ctx !=3D dev_ctx || + !priv->cmd_receiver_clbk_hdl.rx_msg || + !priv->cmd_receiver_clbk_hdl.rx_msg_sz) { + spin_unlock_irqrestore(&priv->cmd_receiver_clbk_hdl.clbk_rx_lock, flags); + err =3D -ENODEV; + goto exit; + } + spin_unlock_irqrestore(&priv->cmd_receiver_clbk_hdl.clbk_rx_lock, flags); + + /* We may need to copy the output data to user before + * delivering the completion message. + */ + err =3D se_dev_ctx_cpy_out_data(dev_ctx); + if (err < 0) + goto exit; + + /* Copy data from the buffer */ + print_hex_dump_debug("to user ", DUMP_PREFIX_OFFSET, 4, 4, + priv->cmd_receiver_clbk_hdl.rx_msg, + priv->cmd_receiver_clbk_hdl.rx_msg_sz, + false); + + copy_len =3D min(size, priv->cmd_receiver_clbk_hdl.rx_msg_sz); + + if (copy_to_user(buf, priv->cmd_receiver_clbk_hdl.rx_msg, copy_len)) + err =3D -EFAULT; + else + err =3D copy_len; + +exit: + priv->cmd_receiver_clbk_hdl.rx_msg_sz =3D 0; + se_dev_ctx_shared_mem_cleanup(dev_ctx); + + return err; +} + +/* Open a character device. */ +static int se_if_fops_open(struct inode *nd, struct file *fp) +{ + struct miscdevice *miscdev =3D fp->private_data; + struct se_if_open_gate *gate; + struct se_if_device_ctx *misc_dev_ctx; + struct se_if_device_ctx *dev_ctx; + struct se_if_priv *priv; + int err =3D 0; + + gate =3D container_of(miscdev, struct se_if_open_gate, miscdev); + + if (!se_if_open_gate_get(gate)) + return -ENODEV; + + if (mutex_lock_interruptible(&gate->lock)) { + se_if_open_gate_put(gate); + return -EBUSY; + } + + if (gate->dying || !gate->priv || + !kref_get_unless_zero(&gate->priv->refcount)) { + err =3D -ENODEV; + goto out_unlock_gate; + } + + priv =3D gate->priv; + mutex_unlock(&gate->lock); + + misc_dev_ctx =3D priv->priv_dev_ctx; + + if (mutex_lock_interruptible(&misc_dev_ctx->fops_lock)) { + err =3D -EBUSY; + goto out_put_priv; + } + + if (misc_dev_ctx->cleanup_done) { + err =3D -ENODEV; + goto out_unlock_misc; + } + + priv->dev_ctx_mono_count++; + err =3D init_device_context(priv, priv->dev_ctx_mono_count, &dev_ctx); + if (err) { + dev_err(priv->dev, "Failed[0x%x] to create dev-ctx.", err); + goto out_unlock_misc; + } + + fp->private_data =3D dev_ctx; + +out_unlock_misc: + mutex_unlock(&misc_dev_ctx->fops_lock); +out_put_priv: + kref_put(&priv->refcount, se_if_priv_release); + se_if_open_gate_put(gate); + return err; +out_unlock_gate: + mutex_unlock(&gate->lock); + se_if_open_gate_put(gate); + return err; +} + +/* Close a character device. */ +static int se_if_fops_close(struct inode *nd, struct file *fp) +{ + struct se_if_device_ctx *dev_ctx =3D fp->private_data; + + dlink_n_cleanup_dev_ctx(dev_ctx, true); + + return 0; +} + +/* IOCTL entry point of a character device */ +static long se_ioctl(struct file *fp, unsigned int cmd, unsigned long arg) +{ + struct se_if_device_ctx *dev_ctx =3D fp->private_data; + struct se_if_priv *priv; + void __user *uarg =3D (void __user *)arg; + long err; + + /* Prevent race during change of device context */ + scoped_cond_guard(mutex_intr, return -EBUSY, &dev_ctx->fops_lock) { + if (dev_ctx->cleanup_done) + return -ENODEV; + + priv =3D dev_ctx->priv; + + switch (cmd) { + case SE_IOCTL_ENABLE_CMD_RCV: { + err =3D set_dev_ctx_as_command_receiver(dev_ctx); + if (err) + dev_err(priv->dev, "Failed to register %s as CMD-Receiver: %ld\n", + dev_ctx->devname, err); + break; + } + case SE_IOCTL_GET_MU_INFO: + err =3D se_ioctl_get_mu_info(dev_ctx, uarg); + break; + case SE_IOCTL_SETUP_IOBUF: + err =3D se_ioctl_setup_iobuf_handler(dev_ctx, uarg); + break; + case SE_IOCTL_GET_SOC_INFO: + err =3D se_ioctl_get_se_soc_info_handler(dev_ctx, uarg); + break; + case SE_IOCTL_CMD_SEND_RCV_RSP: + err =3D se_ioctl_cmd_snd_rcv_rsp_handler(dev_ctx, uarg); + break; + default: + err =3D -ENOTTY; + dev_dbg(priv->dev, "%s: IOCTL %.8x not supported.", + dev_ctx->devname, cmd); + } + } + + return err; +} + +/* Char driver setup */ +static const struct file_operations se_if_fops =3D { + .open =3D se_if_fops_open, + .owner =3D THIS_MODULE, + .release =3D se_if_fops_close, + .unlocked_ioctl =3D se_ioctl, + .compat_ioctl =3D compat_ptr_ioctl, + .read =3D se_if_fops_read, + .write =3D se_if_fops_write, +}; + /* interface for managed res to free a mailbox channel */ static void if_mbox_free_channel(void *mbox_chan) { @@ -257,6 +1334,7 @@ static int se_if_request_channel(struct device *dev, s= truct mbox_chan **chan, static void se_if_probe_cleanup(void *plat_dev) { struct platform_device *pdev =3D plat_dev; + struct se_if_device_ctx *dev_ctx; struct device *dev =3D &pdev->dev; struct se_if_priv *priv; =20 @@ -264,6 +1342,61 @@ static void se_if_probe_cleanup(void *plat_dev) if (!priv) return; =20 + /* + * Mark the private device context as cleanup_done first. + * This prevents new device contexts from being created in open(). + */ + if (priv->priv_dev_ctx) { + scoped_guard(mutex, &priv->modify_lock) + priv->priv_dev_ctx->cleanup_done =3D true; + + if (priv->open_gate) { + scoped_guard(mutex, &priv->open_gate->lock) { + priv->open_gate->dying =3D true; + priv->open_gate->priv =3D NULL; + } + } + + if (priv->priv_dev_ctx->miscdev) + misc_deregister(priv->priv_dev_ctx->miscdev); + } + + while (true) { + dev_ctx =3D NULL; + + scoped_guard(mutex, &priv->modify_lock) { + if (list_empty(&priv->dev_ctx_list)) + goto out_done; + + dev_ctx =3D list_first_entry(&priv->dev_ctx_list, + struct se_if_device_ctx, link); + + /* pin this context so close() cannot free it under us */ + kref_get(&dev_ctx->refcount); + dlink_dev_ctx(dev_ctx); + } + + /* + * Local cleanup outside the global lock avoids ABBA deadlock + * with paths that already take dev_ctx->fops_lock first. + */ + cleanup_dev_ctx(dev_ctx, false); + kref_put(&dev_ctx->refcount, se_if_dev_ctx_release); + } +out_done: + + cancel_work_sync(&priv->fw_busy_work); + /* + * A timed-out synchronous command may have retained a dev_ctx through + * priv->fw_busy_dev_ctx even after the fd was closed and the context was + * removed from dev_ctx_list. If no late response arrived, release that + * retained context during driver teardown. + * + * se_clear_fw_busy() is idempotent and internally checks + * priv->fw_busy_dev_ctx under fw_busy_lock. + */ + se_clear_fw_busy(priv); + /* * In se_if_request_channel(), passed the clean-up functional * pointer reference as action to devm_add_action_or_reset(). @@ -284,12 +1417,16 @@ static void se_if_probe_cleanup(void *plat_dev) =20 dev_set_drvdata(dev, NULL); =20 - if (priv->priv_dev_ctx) { - kfree(priv->priv_dev_ctx->devname); - kfree(priv->priv_dev_ctx); - priv->priv_dev_ctx =3D NULL; - } - kfree(priv); + /* Drop the initial reference - priv will be freed when last fd closes */ + kref_put(&priv->refcount, se_if_priv_release); +} + +static void se_fw_busy_work(struct work_struct *work) +{ + struct se_if_priv *priv =3D + container_of(work, struct se_if_priv, fw_busy_work); + + se_clear_fw_busy(priv); } =20 static int se_if_probe(struct platform_device *pdev) @@ -312,15 +1449,22 @@ static int se_if_probe(struct platform_device *pdev) return -ENOMEM; =20 priv->dev =3D dev; + kref_init(&priv->refcount); priv->if_defs =3D &if_node->if_defs; dev_set_drvdata(dev, priv); =20 mutex_init(&priv->se_if_cmd_lock); + mutex_init(&priv->modify_lock); spin_lock_init(&priv->cmd_receiver_clbk_hdl.clbk_rx_lock); spin_lock_init(&priv->waiting_rsp_clbk_hdl.clbk_rx_lock); atomic_set(&priv->fw_busy, 0); + spin_lock_init(&priv->fw_busy_lock); + priv->fw_busy_dev_ctx =3D NULL; + INIT_WORK(&priv->fw_busy_work, se_fw_busy_work); + init_completion(&priv->waiting_rsp_clbk_hdl.done); init_completion(&priv->cmd_receiver_clbk_hdl.done); + INIT_LIST_HEAD(&priv->dev_ctx_list); =20 ret =3D devm_add_action_or_reset(dev, se_if_probe_cleanup, pdev); if (ret) @@ -355,7 +1499,7 @@ static int se_if_probe(struct platform_device *pdev) "Failed to init reserved memory region."); } =20 - ret =3D init_misc_device_context(priv, 0, &priv->priv_dev_ctx); + ret =3D init_misc_device_context(priv, 0, &priv->priv_dev_ctx, &se_if_fop= s); if (ret) return dev_err_probe(dev, ret, "Failed[0x%x] to create device contexts.", diff --git a/drivers/firmware/imx/se_ctrl.h b/drivers/firmware/imx/se_ctrl.h index 355d38684b1b..abfd77eecb72 100644 --- a/drivers/firmware/imx/se_ctrl.h +++ b/drivers/firmware/imx/se_ctrl.h @@ -8,17 +8,28 @@ =20 #include #include -#include #include +#include +#include =20 #define MAX_FW_LOAD_RETRIES 50 #define SE_MSG_WORD_SZ 0x4 =20 #define RES_STATUS(x) FIELD_GET(0x000000ff, x) +#define MAX_DATA_SIZE_PER_USER (65 * 1024) #define MAX_NVM_MSG_LEN (256) #define MESSAGING_VERSION_6 0x6 #define MESSAGING_VERSION_7 0x7 =20 +struct se_if_open_gate { + struct miscdevice miscdev; + struct se_if_priv *priv; + /* to lock to update the structure */ + struct mutex lock; + struct kref refcount; + bool dying; +}; + struct se_clbk_handle { struct se_if_device_ctx *dev_ctx; struct completion done; @@ -45,10 +56,43 @@ struct se_imem_buf { u32 state; }; =20 +struct se_buf_desc { + u8 *shared_buf_ptr; + void __user *usr_buf_ptr; + u32 size; + struct list_head link; +}; + +struct se_shared_mem { + dma_addr_t dma_addr; + u32 size; + u32 pos; + u8 *ptr; +}; + +struct se_shared_mem_mgmt_info { + struct list_head pending_in; + struct list_head pending_out; + + struct se_shared_mem non_secure_mem; +}; + /* Private struct for each char device instance. */ struct se_if_device_ctx { struct se_if_priv *priv; + struct miscdevice *miscdev; const char *devname; + bool cleanup_done; + unsigned long rcv_msg_timeout_jiffies; + + /* process one file operation at a time. */ + struct mutex fops_lock; + + struct se_shared_mem_mgmt_info se_shared_mem_mgmt; + struct list_head link; + + /* Add reference counting */ + struct kref refcount; }; =20 /* Header of the messages exchange with the EdgeLock Enclave */ @@ -112,9 +156,30 @@ struct se_if_priv { struct se_fw_load_info load_fw; =20 atomic_t fw_busy; + /* + * Serialise the fw_busy_dev_ctx and fw_busy state updates between the + * timeout path, late-response callback/work, and teardown. + */ + spinlock_t fw_busy_lock; + struct se_if_device_ctx *fw_busy_dev_ctx; + struct work_struct fw_busy_work; =20 struct se_if_device_ctx *priv_dev_ctx; + struct list_head dev_ctx_list; + + /* prevent modifying priv member variable in parallel. */ + struct mutex modify_lock; + u32 active_devctx_count; + u32 dev_ctx_mono_count; + + /* Add reference counting */ + struct kref refcount; + + /* stable gate used by .open() */ + struct se_if_open_gate *open_gate; }; =20 char *get_se_if_name(u8 se_if_id); +void unset_dev_ctx_as_command_receiver(struct se_if_device_ctx *dev_ctx); +int set_dev_ctx_as_command_receiver(struct se_if_device_ctx *dev_ctx); #endif diff --git a/include/uapi/linux/se_ioctl.h b/include/uapi/linux/se_ioctl.h new file mode 100644 index 000000000000..ea14cec05020 --- /dev/null +++ b/include/uapi/linux/se_ioctl.h @@ -0,0 +1,97 @@ +/* SPDX-License-Identifier: (GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Cla= use*/ +/* + * Copyright 2025 NXP + */ + +#ifndef SE_IOCTL_H +#define SE_IOCTL_H + +#include + +#define SE_TYPE_STR_DBG "dbg" +#define SE_TYPE_STR_HSM "hsm" +#define SE_TYPE_ID_UNKWN 0x0 +#define SE_TYPE_ID_DBG 0x1 +#define SE_TYPE_ID_HSM 0x2 +/* IOCTL definitions. */ + +struct se_ioctl_setup_iobuf { + __u64 user_buf; + __u32 length; + __u32 flags; + __u64 ele_addr; +}; + +struct se_ioctl_shared_mem_cfg { + __u32 base_offset; + __u32 size; +}; + +struct se_ioctl_get_if_info { + __u8 se_if_id; + __u8 interrupt_idx; + __u8 tz; + __u8 did; + __u8 cmd_tag; + __u8 rsp_tag; + __u8 success_tag; + __u8 base_api_ver; + __u8 fw_api_ver; +}; + +struct se_ioctl_cmd_snd_rcv_rsp_info { + __u64 tx_buf; + __u32 tx_buf_sz; + __u64 rx_buf; + __u32 rx_buf_sz; +}; + +struct se_ioctl_get_soc_info { + __u16 soc_id; + __u16 soc_rev; +}; + +/* IO Buffer Flags */ +#define SE_IO_BUF_FLAGS_IS_OUTPUT (0x00u) +#define SE_IO_BUF_FLAGS_IS_INPUT (0x01u) +#define SE_IO_BUF_FLAGS_USE_SEC_MEM (0x02u) +#define SE_IO_BUF_FLAGS_USE_SHORT_ADDR (0x04u) +#define SE_IO_BUF_FLAGS_IS_IN_OUT (0x10u) + +/* IOCTLS */ +#define SE_IOCTL 0x0A /* like MISC_MAJOR. */ + +/* + * ioctl to designated the current fd as logical-reciever. + * This is ioctl is send when the nvm-daemon, a slave to the + * firmware is started by the user. + */ +#define SE_IOCTL_ENABLE_CMD_RCV _IO(SE_IOCTL, 0x01) + +/* + * ioctl to get the buffer allocated from the memory, which is shared + * between kernel and FW. + * Post allocation, the kernel tagged the allocated memory with: + * Output + * Input + * Input-Output + * Short address + * Secure-memory + */ +#define SE_IOCTL_SETUP_IOBUF _IOWR(SE_IOCTL, 0x03, struct se_ioctl_setup_i= obuf) + +/* + * ioctl to get the mu information, that is used to exchange message + * with FW, from user-spaced. + */ +#define SE_IOCTL_GET_MU_INFO _IOR(SE_IOCTL, 0x04, struct se_ioctl_get_if_i= nfo) +/* + * ioctl to get SoC Info from user-space. + */ +#define SE_IOCTL_GET_SOC_INFO _IOR(SE_IOCTL, 0x06, struct se_ioctl_ge= t_soc_info) + +/* + * ioctl to send command and receive response from user-space. + */ +#define SE_IOCTL_CMD_SEND_RCV_RSP _IOWR(SE_IOCTL, 0x07, struct se_ioctl_cm= d_snd_rcv_rsp_info) +#endif --=20 2.43.0 From nobody Thu Jul 16 20:33:50 2026 Received: from GVXPR05CU001.outbound.protection.outlook.com (mail-swedencentralazon11013024.outbound.protection.outlook.com [52.101.83.24]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 01D2E3C8728; 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Add label sram0 for sram@2201f000 and add secure-enclave node Signed-off-by: Pankaj Gupta Reviewed-by: Frank Li --- arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi b/arch/arm64/boot/d= ts/freescale/imx8ulp.dtsi index c6d1bb9edf38..182f1444b643 100644 --- a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: (GPL-2.0+ OR MIT) /* - * Copyright 2021 NXP + * Copyright 2021, 2025 NXP */ =20 #include @@ -153,7 +153,7 @@ sosc: clock-sosc { #clock-cells =3D <0>; }; =20 - sram@2201f000 { + sram0: sram@2201f000 { compatible =3D "mmio-sram"; reg =3D <0x0 0x2201f000 0x0 0x1000>; =20 @@ -185,6 +185,13 @@ scmi_sensor: protocol@15 { #thermal-sensor-cells =3D <1>; }; }; + + hsm0: secure-enclave { + compatible =3D "fsl,imx8ulp-se-ele-hsm"; + mbox-names =3D "tx", "rx"; + mboxes =3D <&s4muap 0 0>, <&s4muap 1 0>; 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Signed-off-by: Pankaj Gupta Reviewed-by: Frank Li --- arch/arm64/boot/dts/freescale/imx8ulp-evk.dts | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts b/arch/arm64/boo= t/dts/freescale/imx8ulp-evk.dts index 5dea66c1e7aa..16399d921e04 100644 --- a/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts +++ b/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts @@ -1,6 +1,6 @@ // SPDX-License-Identifier: (GPL-2.0+ OR MIT) /* - * Copyright 2021 NXP + * Copyright 2021, 2025 NXP */ =20 /dts-v1/; @@ -37,6 +37,12 @@ linux,cma { linux,cma-default; }; =20 + ele_reserved: memory@90000000 { + compatible =3D "shared-dma-pool"; + reg =3D <0 0x90000000 0 0x100000>; + no-map; + }; + m33_reserved: noncacheable-section@a8600000 { reg =3D <0 0xa8600000 0 0x1000000>; no-map; @@ -259,6 +265,10 @@ &usdhc0 { status =3D "okay"; }; =20 +&hsm0 { + memory-region =3D <&ele_reserved>; +}; + &fec { pinctrl-names =3D "default", "sleep"; pinctrl-0 =3D <&pinctrl_enet>; --=20 2.43.0