From nobody Sat Jul 25 18:53:07 2026 Received: from SJ2PR03CU001.outbound.protection.outlook.com (mail-westusazon11012019.outbound.protection.outlook.com [52.101.43.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8F494427FAC; Tue, 14 Jul 2026 20:24:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=52.101.43.19 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784060691; cv=fail; b=dpOhwRN4+4ksLJhcUFNm4OmGDW5jwlbyfuakoZFzDAdSMxCMBZMHEbM7XTZLri4HReHN0wppxzuxFmUhdT2UN7FGiHZf7YebDChM7Ynog78QXdIEdsDNj/GtZNRchcUeqb7ZS4MXCQmnABt2KLX9WxUvN0yutptVWM6iF5krvCM= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784060691; c=relaxed/simple; bh=0V/rtasEFuRaKwsM4lpyYPOMzwbN9dOe2KSifpgN0nU=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=PkeaLD0mPEC8cFeKmcJkArqOiztZuZ/iHAKG0dCI/D3+0hORcZvaitGsk2ewIa1tx91hRCMxLI9Vc5LZ4rzEljJkx5HL+dRV03MyDxPvZ47YHkH7V8Uc/9pJyLDRjI2hmAISQ82ZC3iPHjnw007mX+KTNWsat7yodWlAd6cZ24Q= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=amd.com; spf=fail smtp.mailfrom=amd.com; dkim=pass (1024-bit key) header.d=amd.com header.i=@amd.com header.b=PIJZFQMQ; arc=fail smtp.client-ip=52.101.43.19 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=amd.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=amd.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=amd.com header.i=@amd.com header.b="PIJZFQMQ" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=FXEzCllbjZo0Pwi60F5pOLv1rOq59Pu1AWTtIIx2zGf7+RTPpAFjh7b6WlnBvssSDOnyTB6eTYZUSmK3wDuPGgzvZyhc1XIRy+iyoL5QwN2eNJqlvq02gKsqXibv0ssFgNmcP34kbv4ijBedCw8Lf0X3AOSbrvkWRU/iOCfWh9CcKvTPgG+wYYs9YVg6LM0Zkk2+eww36UsLMMN5SdOnyXDC+yByLnC2hNwjOfvO4LzFDZGAcNCI7O9gpNNpflEq6LNyvw5qYyHxEAQMkjzHourpXkqNB2r2kfHlfIsbxzbEp5LgJdMMfZBB6CF9Httw4cnVBphQGr9S5xE7LwjBGg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=7d16mvyBSOOl9CvA4YeF5qT9GlgN88fbSuWz+r0ajKM=; b=usp35drwBQnUelu/ljidPBiQ1qUwkbtX5sFOWWTt8kgUOby7+GEaG0g3GhZqFz6J7oBAZ97jsldD/4jl8QMwRM3ad/QUWEUT4UiuHMHti86SUwV04e21NqU8r/BKhl6HXqSytFOTEehT6XaO1O2Ol712tAJh3Pn+YWvKRVtLWZw7AHrt4zlIHmKb3j2bFzeYZ3RHO0Fa/9BMCTpkv5n+BqBjeyvxBBhMOWX2q73EJ6si6RzsrfOxLukJoTXurmZjgJTp7Z+I6D/HJG608Ty6sysGSofSaXwPY+T2dtBw0OQ7NOPQ1m477zldunU0Ijt8C3KBdKZXyMQW6Mr4wzxbPA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=kernel.org smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=7d16mvyBSOOl9CvA4YeF5qT9GlgN88fbSuWz+r0ajKM=; b=PIJZFQMQABkwC6tMfpm9xTsScdHDGxIiUhBfnJ9u+JeKtVTcFSq9eDP58fznYlS2rnDZlbxqcGUmZuiF5YECGE+fn6IsUOMykD6PpH5IU8eVRO0SLzDerScg302Gvv3oQ8hpP8GC4uSPcZjiNk1nQ7GfBDJp8KQT1/4pg6MUgFk= Received: from MN2PR03CA0021.namprd03.prod.outlook.com (2603:10b6:208:23a::26) by MW6PR12MB8836.namprd12.prod.outlook.com (2603:10b6:303:241::11) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.21.202.18; Tue, 14 Jul 2026 20:24:44 +0000 Received: from BN2PEPF00004FBC.namprd04.prod.outlook.com (2603:10b6:208:23a:cafe::95) by MN2PR03CA0021.outlook.office365.com (2603:10b6:208:23a::26) with Microsoft SMTP Server (version=TLS1_3, cipher=TLS_AES_256_GCM_SHA384) id 15.21.202.19 via Frontend Transport; Tue, 14 Jul 2026 20:24:44 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=satlexmb08.amd.com; pr=C Received: from satlexmb08.amd.com (165.204.84.17) by BN2PEPF00004FBC.mail.protection.outlook.com (10.167.243.182) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.21.223.9 via Frontend Transport; Tue, 14 Jul 2026 20:24:44 +0000 Received: from satlexmb08.amd.com (10.181.42.217) by satlexmb08.amd.com (10.181.42.217) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.41; Tue, 14 Jul 2026 15:24:43 -0500 Received: from xsjblevinsk51.xilinx.com (10.180.168.240) by satlexmb08.amd.com (10.181.42.217) with Microsoft SMTP Server id 15.2.2562.41 via Frontend Transport; Tue, 14 Jul 2026 15:24:43 -0500 From: Ben Levinsky To: Bjorn Andersson , Mathieu Poirier , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley CC: , , , Tanmay Shah , "Michal Simek" , Subject: [PATCH v6 1/2] dt-bindings: remoteproc: document AMD MicroBlaze/V BRAM-based rproc Date: Tue, 14 Jul 2026 13:24:40 -0700 Message-ID: <20260714202441.554065-2-ben.levinsky@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260714202441.554065-1-ben.levinsky@amd.com> References: <20260714202441.554065-1-ben.levinsky@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN2PEPF00004FBC:EE_|MW6PR12MB8836:EE_ X-MS-Office365-Filtering-Correlation-Id: 2db3bfc5-a576-45f2-29e0-08dee1e5f125 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|30052699003|23010399003|1800799024|376014|36860700016|82310400026|13003099007|20046099003|3023799007|56012099006|11063799006|18002099003|22082099003; X-Microsoft-Antispam-Message-Info: apqjnkPG2BSU/OdU8jyc/NUW6lqeyHNp7WlCYOEyeJwRoQtoI+gPeOa6iSd01pp5NS5TYSmMixerny2yYU8aFhzVLW/vcm6Cz34WmeqR5c4YyMOsZ3mWj8xANTmBrxfQkeq6NO6QyypEkbCOiktv/DGTXA/JcefPkxBcIf7VWP3XCCkZpmyxMZFonGk3hfSI8YM1LgKdn7V3dxnCqGtixi1RLef1I3JkFo0mPH5xtxhqVgHvDaEym5jXI/KwMv2KKkZbUitBZmtpKkMuoumSB39EEVO2q//Q7yJv4qRFPmXNsE9OoOJ4SYX1vbWfqSsLkqRmamcSqwhHiets4WR3/K7Phcj+wWOrl7WKrrFF+ZL1rx+4SuwiVHAkMGh69lQdxAQLFNIA1CpGqz1QKz0G60i1Pe/B16boF5OB9AYqhuScCBPnE3RK26lNk9EnsGU7e86w2nVTCxJVGxVG2I/8HCAvvYbEuhy65keR4Xk6ls9ZW15EjwUBItbE1E3rFf4mSpwOGRaBcltIQvn3zAi5NrUBsYGmIMvF7Q849e+yNmbIquKXYcSwlO30HtnMSwTKR+hZeYoHWu+8Jkgn3+BMlggzb4Vf3+8irPa6eBGe0OYWbMH0IKTVTO4sGwuAC4YWK784WWlIwxNoPd1zECT/+Q== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb08.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(30052699003)(23010399003)(1800799024)(376014)(36860700016)(82310400026)(13003099007)(20046099003)(3023799007)(56012099006)(11063799006)(18002099003)(22082099003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 0pYQQHjHsuYdAKmy6R6kWfHawWzxva/x2OqhXI6PnN807faEqksXiAxSPmXAayuWsbQQgHf0D7Hy0L4TwZN0qiVDQruPsBX2O3yaVOaYhcPX5hw43V5yvfQDSHlxV4ZSfWMV6oiDjrRfQaOpa3MYu2D18zCO6cqESFDgZUyQIB0uaDfxXdc7JtjSZKxDCwfIBCZRMOlch4Q0Orcd1YvMlAT4YQDkXWkub/Y4TXP13CZ8yu6JG54Xt4m4EuWB+w1AYa12/R7MhSufSZ55LXsNzoejOTwoWDXtX7FmEE+WQwkNiiOgqLNgW+Euz/zR0b6azDUWENhn7hDBQvpXFYJxKYbqPW6p93RYbyyN0e8lov94/yIJkq0aG/jaEu+QBwSIrKB0hBhB61ffZ0cBKnJQG2EoJN038xBDHLox1bI8rLFFEjg9Q07UjT6ClB0PUnV7 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 14 Jul 2026 20:24:44.2257 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 2db3bfc5-a576-45f2-29e0-08dee1e5f125 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN2PEPF00004FBC.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW6PR12MB8836 Content-Type: text/plain; charset="utf-8" Describe an AMD MicroBlaze/V BRAM-based remote processor controlled through the remoteproc framework. The binding models a soft-core processor subsystem instantiated in AMD programmable logic and using dual-port BRAM for firmware storage and execution. The remoteproc device is represented as a child node whose reg property describes the firmware memory window in the processor-local address space. The parent bus node provides standard devicetree address translation through ranges so Linux can access the same BRAM through the system physical address space. A clock input feeds the soft-core processor subsystem, and an active-low reset GPIO holds the processor in reset until firmware loading completes. The firmware-name property is optional. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Ben Levinsky --- .../bindings/remoteproc/amd,bram-rproc.yaml | 105 ++++++++++++++++++ 1 file changed, 105 insertions(+) create mode 100644 Documentation/devicetree/bindings/remoteproc/amd,bram-r= proc.yaml diff --git a/Documentation/devicetree/bindings/remoteproc/amd,bram-rproc.ya= ml b/Documentation/devicetree/bindings/remoteproc/amd,bram-rproc.yaml new file mode 100644 index 000000000000..c0359f447ea8 --- /dev/null +++ b/Documentation/devicetree/bindings/remoteproc/amd,bram-rproc.yaml @@ -0,0 +1,105 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/remoteproc/amd,bram-rproc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: AMD MicroBlaze/V BRAM-based Remote Processor + +maintainers: + - Ben Levinsky + +description: | + Soft-core processor subsystem instantiated in AMD programmable logic and + using dual-port BRAM for firmware storage and execution. + + Hardware Architecture: + + Host (PS) Programmable Logic (PL) + =3D=3D=3D=3D=3D=3D=3D=3D=3D =3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D + + AXI Interface -----------------> AXI BRAM Controller (Host Port) + | + | Port A + v + +-----------------+ + | Dual-Port BRAM | + | (shared memory) | + +-----------------+ + ^ + | Port B + | + AXI BRAM Controller (Soft-core Port) + ^ + | LMB + | + Soft-core CPU (MicroBlaze/V) + + GPIO --------------------------> Proc Sys Reset ----> CPU Reset Signal + + Clock -------------------------> Clock Distribution -> CPU Clock + + Memory Architecture: + + The dual-port BRAM allows simultaneous access from both processors: + - Port A: Connected to the host AXI BRAM controller for firmware loa= ding + - Port B: Connected to the soft-core local memory bus for execution + + The reg property describes the executable BRAM window in the processor-l= ocal + address space. The parent bus node translates that window to the system + physical address space by using standard devicetree address translation + through ranges. A clock input and a reset GPIO control the subsystem. + +properties: + compatible: + oneOf: + - const: xlnx,zynqmp-bram-rproc + - items: + - enum: + - amd,versal2-bram-rproc + - xlnx,versal-bram-rproc + - xlnx,versal-net-bram-rproc + - const: xlnx,zynqmp-bram-rproc + + reg: + maxItems: 1 + description: + Processor-local address and size of the BRAM firmware memory window, + as seen by the soft-core processor (typically 0x0 for reset vector). + The parent bus ranges property must translate this window to the + corresponding system physical address. + + clocks: + maxItems: 1 + description: + Clock input for the soft-core processor subsystem. + + firmware-name: + maxItems: 1 + description: + Name of the firmware ELF file to load. + + reset-gpios: + maxItems: 1 + description: + GPIO specifier controlling the soft-core reset input. + +required: + - compatible + - reg + - clocks + - reset-gpios + +additionalProperties: false + +examples: + - | + #include + remoteproc@0 { + compatible =3D "xlnx,zynqmp-bram-rproc"; + reg =3D <0x0 0x40000>; + clocks =3D <&pl_clk>; + firmware-name =3D "firmware.elf"; + reset-gpios =3D <&gpio0 0 GPIO_ACTIVE_LOW>; + }; +... --=20 2.34.1 From nobody Sat Jul 25 18:53:07 2026 Received: from CY7PR03CU001.outbound.protection.outlook.com (mail-westcentralusazon11010002.outbound.protection.outlook.com [40.93.198.2]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 99E1C2EDD6B; Tue, 14 Jul 2026 20:24:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=40.93.198.2 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784060692; cv=fail; b=R3unmYfjPD88HW9IivMqswGh3lIiyInkKsAxUUSQIOl2z/gcEoNCKHlpACdRv1oZ2p6Ij9VhBTK7aJrWbcJL8ReNMC5JbR0Ub+vWpminIkIWRLO3YoIe/8aAtSb0r8PxR6mHhbBVoCapF7CkcZk1zW0Xrj+P8kXd5eF2UnzB8UM= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784060692; c=relaxed/simple; bh=F5PaxiH34QnSilwnXEU0D/sQQaKR66iU+5YH6xBeS80=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=KQgVJLuxqSXa4Auk9ZbnuqgNSjFASYUI3dYR19ihoYxdJNLYk3e74RtlmTOUt/ODaifrfCIFz2vt1m/TIXBmzesyaIklhOcgP/9b23PXY5vGDvVGNE4t8RDOYhTurPTBaFhUzNRbyW5pCzlDXKQ6nGHG24ibit15IJws9SEWQww= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=amd.com; spf=fail smtp.mailfrom=amd.com; dkim=pass (1024-bit key) header.d=amd.com header.i=@amd.com header.b=JS0mzCYU; arc=fail smtp.client-ip=40.93.198.2 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=amd.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=amd.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=amd.com header.i=@amd.com header.b="JS0mzCYU" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=dJlpshVYkMD9fIUWrLZu2YAujklgXr+iItPSXQyXW1zHigPaZL+uXh7MDs6WzSaQZuqQeskY/2FSVeUrfGcmGz5Fs1ZqJeZsBj30YpPrm4YdBdW7QwI0AaQbzE8vGzB8uMCJ5kUF7OulwyNYbTH+vkBS4JtMGNu5fozKLRPH7NkIMfteTSLyg9/xS1qFY3J3k4HPcVPNYgPZACmsefnItTRNX3Kt7AQU6UZoAeu4uJ4xa72/PJRqxlCCYU8Qll02I5BgO4Q0b4o+l8rme+tHMsRGCJs/v8v/buHFfkLPG3acmqS+nDEnqim9zaGVu0hHVnDQcOfnKkJXkX+GSAJ9WA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=fjnO9fQC/7gOhVWEZ0BWt78ZKQ8rsreXAI2A/xyN7BI=; b=I2PD32ZUlQ2N+xg1011a5Xgn2Shs6O/QZKf5l4BO2mq6NSZOzjdPLzHB7RltjhJj2JmaHtQEgxrkIrm/qTldLXIPEsB+Hy32X87aRG8R9tu7x5AcV58TxxceS3dRQS4+nIGTjrEr3gZsehvtkeHuJ/ofsGd9lWeP8QlnN+gXR5ymwGHL7x+wchHWFl/tDb3809ritr0+Sfn/oDOpTeTU1QS4GzO+K4T1R2VbXLsLE+x+S8ZElCMnnoQsN7I9GS0oyr8NJaoK8bWMZtoSbm8ljbNDEsqiDrPhnNAZ+hBw2+T0w4yXFQfA3NskiRizS3cIse18Nc7ITPKF0Z7OE9IN1Q== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=kernel.org smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=fjnO9fQC/7gOhVWEZ0BWt78ZKQ8rsreXAI2A/xyN7BI=; b=JS0mzCYUnrU4n9vJRhWwil/Sita05W8toQ8zLXBW8jUryefE0PWZro54nhv70/EEjfdw4gBIi5lRc+Vi0hzlS3kPPo5iTpgerGL0rx3W8zOsvn/FhzL1vDNYrKQlyimB1+0NWJm/QN0WjNh3jsZulcXbrH5whlW6GrFROyk6Ryg= Received: from MN2PR03CA0006.namprd03.prod.outlook.com (2603:10b6:208:23a::11) by MW3PR12MB4379.namprd12.prod.outlook.com (2603:10b6:303:5e::11) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.21.223.10; Tue, 14 Jul 2026 20:24:46 +0000 Received: from BN2PEPF00004FBC.namprd04.prod.outlook.com (2603:10b6:208:23a:cafe::8a) by MN2PR03CA0006.outlook.office365.com (2603:10b6:208:23a::11) with Microsoft SMTP Server (version=TLS1_3, cipher=TLS_AES_256_GCM_SHA384) id 15.21.202.19 via Frontend Transport; Tue, 14 Jul 2026 20:24:46 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=satlexmb08.amd.com; pr=C Received: from satlexmb08.amd.com (165.204.84.17) by BN2PEPF00004FBC.mail.protection.outlook.com (10.167.243.182) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.21.223.9 via Frontend Transport; Tue, 14 Jul 2026 20:24:45 +0000 Received: from satlexmb08.amd.com (10.181.42.217) by satlexmb08.amd.com (10.181.42.217) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.41; Tue, 14 Jul 2026 15:24:44 -0500 Received: from xsjblevinsk51.xilinx.com (10.180.168.240) by satlexmb08.amd.com (10.181.42.217) with Microsoft SMTP Server id 15.2.2562.41 via Frontend Transport; Tue, 14 Jul 2026 15:24:43 -0500 From: Ben Levinsky To: Bjorn Andersson , Mathieu Poirier , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley CC: , , , Tanmay Shah , "Michal Simek" , Subject: [PATCH v6 2/2] remoteproc: add AMD MicroBlaze/V BRAM-based remote processor driver Date: Tue, 14 Jul 2026 13:24:41 -0700 Message-ID: <20260714202441.554065-3-ben.levinsky@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260714202441.554065-1-ben.levinsky@amd.com> References: <20260714202441.554065-1-ben.levinsky@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN2PEPF00004FBC:EE_|MW3PR12MB4379:EE_ X-MS-Office365-Filtering-Correlation-Id: 4b19a8d6-cdfc-4d93-aac6-08dee1e5f22a X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700016|82310400026|1800799024|376014|23010399003|6133799003|22082099003|56012099006|11063799006|18002099003; X-Microsoft-Antispam-Message-Info: wLy0wnpPMG28k11JoVUZsfhZfq3NL72jyFHEqzAcviTy/drfWP92ZV46UiBQoXw3aWk8JfqlSkMDGOHxE67RBgE8gi7f6UpVCmp2TVLWbG3nXb448xupEKACExou0UqUG8Kl+x3LRduWK2hWWfjERK1BlMImZmkuuDplFitBwH/ZxYWKDG82Vf5CAhI809PWp/3LfOyOWwz+tY5pZQ9EoxLxtz9cc9nxGSClOUEA5yC2FUd2pJ1uKGGkuio5jAYI9x79Ob8LQFMPqoKnlHGjReuQC3PSEhbM/jUxgt76ryl2TztIgk4Saz/ByGJ0+my7GLoRiUXtDb2aAN18Y1y3l2GQAnZ+3G+Nwqvtz+zaF1LCwxq+IJBQ98/XDjGwy1WIwttdSCV/648Gdb4TiZhJ2AwnFUq21QnYo35HceK+M3KWXJ04T4jG+vNdZCI304gENDr1ojW/vnpTPDwXVDIwYDO+fQY1JLXuvFFz9ncgFmBe9Ib/C/hGPIKm62XZKNz1Tbqbobhv55DH7VgLApvNPWMNQJqoNGG+0fS1/vTw7NuOpdGO/mYArJvkRyIV5uQWcWcOhd/sxYpq+J7cYSBdQ3zANr8O3KS/berN0bmZbCoAlylQ7oWIhc1KzKkRJMtMqeBe8os/FmvWSTL4vDQpGb8geyvS90/LvvRjkmS4LeLZh7DfY0kgN+88iUDsZoR2RUZmzYaf4iuQdZ+N3QnE9A== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb08.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(36860700016)(82310400026)(1800799024)(376014)(23010399003)(6133799003)(22082099003)(56012099006)(11063799006)(18002099003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 0kw4Zdvw6FxhbS9uac1ZVK69raq85W0jWBBxC0F05JEtdiUxmcQ/t5BenDz4Hz2JBQIJMnB+JOi1SUp0RH7LZrSqYz+FpqCF4TSmOmcPABOvAlFEt6b6AedbuI3WCuXk+BnhcGnfw53DEqXVO8YS3/MKOOnNxq4YKg2jLR+MU7QvuhNHp382DtqVY0gR/5ioy45+O3NJ6qmUWnhLs85OrpxJXOebAk8F3/dNrhN6lCqYlS5ocYRJ63+6O42fFP++FwfbXpXpZg41LKXFt2iMURLO5/dKq/EUnDm1voI/phZi1f7lXn8SxuTsm4wsufUhNP85MQ5WmxlRWEK+g8tfpZdjOYDDKfqtaYfA2w7sGWhPZX0mKQ77WJGUzknxFDfkswxNSXaKoe/4KMmcXoTQvkCDbUMA5Cy8U9WA72JNJeXJXUhvS3xs3usVU6S/kwIh X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 14 Jul 2026 20:24:45.9401 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 4b19a8d6-cdfc-4d93-aac6-08dee1e5f22a X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN2PEPF00004FBC.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW3PR12MB4379 Content-Type: text/plain; charset="utf-8" Add a remoteproc driver for AMD MicroBlaze/V soft-core processor subsystems instantiated in programmable logic and using dual-port BRAM for firmware storage and execution. The driver parses the firmware memory window from the remoteproc device node's reg property, interprets that address and size in the processor-local address space, and then uses standard devicetree address translation through the parent bus ranges property to obtain the corresponding Linux-visible system physical address. The resulting translated region is registered as the executable remoteproc carveout and coredump segment. The processor is controlled through an active-low reset GPIO and a subsystem clock. The clock is enabled before reset is released, and the processor is kept in reset until firmware loading completes. The firmware-name property is optional, allowing firmware to be assigned later through the remoteproc framework. Firmware images without a resource table are also accepted. Signed-off-by: Ben Levinsky --- drivers/remoteproc/Kconfig | 9 + drivers/remoteproc/Makefile | 1 + drivers/remoteproc/amd_mbv_bram_rproc.c | 213 ++++++++++++++++++++++++ 3 files changed, 223 insertions(+) create mode 100644 drivers/remoteproc/amd_mbv_bram_rproc.c diff --git a/drivers/remoteproc/Kconfig b/drivers/remoteproc/Kconfig index c521c744e7db..b25252acbfb9 100644 --- a/drivers/remoteproc/Kconfig +++ b/drivers/remoteproc/Kconfig @@ -23,6 +23,15 @@ config REMOTEPROC_CDEV =20 It's safe to say N if you don't want to use this interface. =20 +config AMD_MBV_BRAM_REMOTEPROC + tristate "AMD MicroBlaze/V BRAM-based remoteproc support" + depends on OF && COMMON_CLK && (GPIOLIB || COMPILE_TEST) + help + Say y or m here to support a MicroBlaze/V BRAM-based remote + processor managed through the remoteproc framework. + + If unsure, say N. + config IMX_REMOTEPROC tristate "i.MX remoteproc support" depends on ARCH_MXC diff --git a/drivers/remoteproc/Makefile b/drivers/remoteproc/Makefile index 1c7598b8475d..689686de0d41 100644 --- a/drivers/remoteproc/Makefile +++ b/drivers/remoteproc/Makefile @@ -11,6 +11,7 @@ remoteproc-y +=3D remoteproc_sysfs.o remoteproc-y +=3D remoteproc_virtio.o remoteproc-y +=3D remoteproc_elf_loader.o obj-$(CONFIG_REMOTEPROC_CDEV) +=3D remoteproc_cdev.o +obj-$(CONFIG_AMD_MBV_BRAM_REMOTEPROC) +=3D amd_mbv_bram_rproc.o obj-$(CONFIG_IMX_REMOTEPROC) +=3D imx_rproc.o obj-$(CONFIG_IMX_DSP_REMOTEPROC) +=3D imx_dsp_rproc.o obj-$(CONFIG_INGENIC_VPU_RPROC) +=3D ingenic_rproc.o diff --git a/drivers/remoteproc/amd_mbv_bram_rproc.c b/drivers/remoteproc/a= md_mbv_bram_rproc.c new file mode 100644 index 000000000000..e4a103cf8455 --- /dev/null +++ b/drivers/remoteproc/amd_mbv_bram_rproc.c @@ -0,0 +1,213 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * AMD MicroBlaze/V BRAM-based Remote Processor driver + * + * Copyright (C) 2026 Advanced Micro Devices, Inc. + * + * This driver supports soft-core processors (MicroBlaze, MicroBlaze-V, or + * similar) instantiated in AMD programmable logic, using dual-port BRAM + * for firmware storage and execution. + * + * The firmware memory (BRAM) is described in the processor-local address + * space and translated to the Linux-visible system physical address with + * standard devicetree address translation. + * + * Reset is controlled via GPIO connected to Processor System Reset IP. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include "remoteproc_internal.h" + +/** + * struct amd_bram_rproc - AMD MicroBlaze/V BRAM-based remoteproc private = data + * @dev: device pointer + * @reset: GPIO descriptor for reset control (active-low) + * @clk: processor clock + */ +struct amd_bram_rproc { + struct device *dev; + struct gpio_desc *reset; + struct clk *clk; +}; + +static int amd_bram_rproc_prepare(struct rproc *rproc) +{ + struct amd_bram_rproc *priv =3D rproc->priv; + struct rproc_mem_entry *mem; + struct resource res; + u64 da, size; + int ret; + + ret =3D of_property_read_reg(priv->dev->of_node, 0, &da, &size); + if (ret) { + dev_err(priv->dev, "failed to parse executable memory reg\n"); + return ret; + } + + if (!size || size > U32_MAX) { + dev_err(priv->dev, "invalid executable memory size\n"); + return -EINVAL; + } + + if (da > U32_MAX) { + dev_err(priv->dev, "invalid executable memory address\n"); + return -EINVAL; + } + + ret =3D of_address_to_resource(priv->dev->of_node, 0, &res); + if (ret) { + dev_err(priv->dev, "failed to translate executable memory reg\n"); + return ret; + } + + mem =3D rproc_mem_entry_init(priv->dev, NULL, (dma_addr_t)res.start, + resource_size(&res), da, + rproc_mem_entry_ioremap_wc, + rproc_mem_entry_iounmap, + dev_name(priv->dev)); + if (!mem) + return -ENOMEM; + + rproc_add_carveout(rproc, mem); + rproc_coredump_add_segment(rproc, da, resource_size(&res)); + + return 0; +} + +static int amd_bram_rproc_start(struct rproc *rproc) +{ + struct amd_bram_rproc *priv =3D rproc->priv; + int ret; + + /* Enable clock before releasing reset */ + ret =3D clk_prepare_enable(priv->clk); + if (ret) { + dev_err(priv->dev, "failed to enable clock: %d\n", ret); + return ret; + } + + /* Deassert reset and let the processor run. */ + ret =3D gpiod_set_value_cansleep(priv->reset, 0); + if (ret) { + dev_err(priv->dev, "failed to deassert reset: %d\n", ret); + clk_disable_unprepare(priv->clk); + return ret; + } + + return 0; +} + +static int amd_bram_rproc_stop(struct rproc *rproc) +{ + struct amd_bram_rproc *priv =3D rproc->priv; + int ret; + + /* Assert reset before disabling the processor clock. */ + ret =3D gpiod_set_value_cansleep(priv->reset, 1); + if (ret) { + dev_err(priv->dev, "failed to assert reset: %d\n", ret); + return ret; + } + + /* Disable clock after asserting reset */ + clk_disable_unprepare(priv->clk); + + return 0; +} + +static int amd_bram_rproc_parse_fw(struct rproc *rproc, + const struct firmware *fw) +{ + rproc_elf_load_rsc_table_optional(rproc, fw, dev_dbg, + "no resource table found\n"); + return 0; +} + +static const struct rproc_ops amd_bram_rproc_ops =3D { + .prepare =3D amd_bram_rproc_prepare, + .start =3D amd_bram_rproc_start, + .stop =3D amd_bram_rproc_stop, + .load =3D rproc_elf_load_segments, + .sanity_check =3D rproc_elf_sanity_check, + .get_boot_addr =3D rproc_elf_get_boot_addr, + .parse_fw =3D amd_bram_rproc_parse_fw, +}; + +static int amd_bram_rproc_probe(struct platform_device *pdev) +{ + struct device *dev =3D &pdev->dev; + struct amd_bram_rproc *priv; + const char *fw_name =3D NULL; + struct rproc *rproc; + int ret; + + ret =3D rproc_of_parse_firmware(dev, 0, &fw_name); + if (ret < 0 && ret !=3D -EINVAL) + return dev_err_probe(dev, ret, + "failed to parse firmware-name property\n"); + + rproc =3D devm_rproc_alloc(dev, dev_name(dev), &amd_bram_rproc_ops, + fw_name, sizeof(*priv)); + if (!rproc) + return -ENOMEM; + + priv =3D rproc->priv; + priv->dev =3D dev; + + /* Get the processor clock */ + priv->clk =3D devm_clk_get(dev, NULL); + if (IS_ERR(priv->clk)) + return dev_err_probe(dev, PTR_ERR(priv->clk), + "failed to get clock\n"); + + /* + * Keep the processor in reset until remoteproc has finished loading + * firmware into the executable memory window described by reg and + * translated through the parent bus ranges property. + */ + priv->reset =3D devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH); + if (IS_ERR(priv->reset)) + return dev_err_probe(dev, PTR_ERR(priv->reset), + "failed to get reset gpio\n"); + + rproc->auto_boot =3D false; + + ret =3D dma_set_mask_and_coherent(dev, DMA_BIT_MASK(64)); + if (ret) + return dev_err_probe(dev, ret, "failed to set DMA mask\n"); + + platform_set_drvdata(pdev, rproc); + + ret =3D devm_rproc_add(dev, rproc); + if (ret) + return dev_err_probe(dev, ret, "failed to register rproc\n"); + + return 0; +} + +static const struct of_device_id amd_bram_rproc_of_match[] =3D { + { .compatible =3D "xlnx,zynqmp-bram-rproc" }, + { /* sentinel */ }, +}; +MODULE_DEVICE_TABLE(of, amd_bram_rproc_of_match); + +static struct platform_driver amd_bram_rproc_driver =3D { + .probe =3D amd_bram_rproc_probe, + .driver =3D { + .name =3D "amd-bram-rproc", + .of_match_table =3D amd_bram_rproc_of_match, + }, +}; +module_platform_driver(amd_bram_rproc_driver); + +MODULE_DESCRIPTION("AMD MicroBlaze/V BRAM-based Remote Processor driver"); +MODULE_AUTHOR("Ben Levinsky "); +MODULE_LICENSE("GPL"); --=20 2.34.1