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Tue, 14 Jul 2026 16:22:29 -0700 (PDT) From: David Lechner Date: Tue, 14 Jul 2026 18:21:23 -0500 Subject: [PATCH v4 1/8] dt-bindings: iio: adc: Add reference-sources property Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260714-iio-adc-ti-ads122c14-v4-1-25f8e3084485@baylibre.com> References: <20260714-iio-adc-ti-ads122c14-v4-0-25f8e3084485@baylibre.com> In-Reply-To: <20260714-iio-adc-ti-ads122c14-v4-0-25f8e3084485@baylibre.com> To: Jonathan Cameron , =?utf-8?q?Nuno_S=C3=A1?= , Andy Shevchenko , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Chris Hall , Patrick Edwards , Kurt Borja , Nguyen Minh Tien , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, David Lechner , Conor Dooley X-Mailer: b4 0.16-dev X-Developer-Signature: v=1; a=openpgp-sha256; l=1287; i=dlechner@baylibre.com; h=from:subject:message-id; bh=gnJcOpkZvI6QrZ8vVSRd8XUtUDqGn+U84NE4BPUS78o=; b=owEBbQGS/pANAwAKAcLMIAH/AY/AAcsmYgBqVsR9/capx2PP3w4wNGfR/Bc1DLXlx+TQflrix 6Lemmt6mMuJATMEAAEKAB0WIQTsGNmeYg6D1pzYaJjCzCAB/wGPwAUCalbEfQAKCRDCzCAB/wGP wFGfB/9UhTU+DhxboN7kD6yBq+l+yMfqE1SWEPDhrm0JzrxF8xviVxhS6l2kXD/dhJVpoY1IDI7 noGG9iITPJgS5wzUW4u4w2o8SdiKUiwkoNZXipYoR1UMo4QfwdEA8n8e8odJPW4uzzBiUutDdav sNiZTUV6oeiWdcsF94Zl2pJjftgtvvOPLMB/i6nato9E5Qq9cyVUYjQcWbe+hnE2IdaOtEScYjr EvGuR6e+AOvYaLG2oFDAzF4mBwoG6c1+4CJjFz4YKcDpKDbR7Dj/+D+T3H4yx955qPC52JZMZDT ptiDTvK+aG7xqGpv/ABMhTE2TUJu2FlE+GaqQIRd7UQb3Wk9 X-Developer-Key: i=dlechner@baylibre.com; a=openpgp; fpr=8A73D82A6A1F509907F373881F8AF88C82F77C03 From: Kurt Borja Some ADCs have configurable voltage reference sources for each channel. Signed-off-by: Kurt Borja Acked-by: Conor Dooley Signed-off-by: David Lechner (TI) --- v3 changes: * Removed minItems. v2 changes (compared to Kurt's RFC v2): * Drop maxItems. * Drop 2nd paragraph of description. * Make reference-sources plural since it is an array. --- Documentation/devicetree/bindings/iio/adc/adc.yaml | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/iio/adc/adc.yaml b/Documenta= tion/devicetree/bindings/iio/adc/adc.yaml index b9bc02b5b07a..8f608bf0b24d 100644 --- a/Documentation/devicetree/bindings/iio/adc/adc.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adc.yaml @@ -73,6 +73,13 @@ properties: device design and can interact with other characteristics such as settling time. =20 + reference-sources: + $ref: /schemas/types.yaml#/definitions/string-array + description: + Indicates the voltage reference source or sources for this channel. = Some + ADCs usually allow choosing between internal reference sources or a = pair + of external pins. + anyOf: - oneOf: - required: --=20 2.43.0 From nobody Sat Jul 25 18:54:59 2026 Received: from mail-ot1-f41.google.com (mail-ot1-f41.google.com [209.85.210.41]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 85FAD429CEF for ; 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Tue, 14 Jul 2026 16:22:32 -0700 (PDT) Received: from [127.0.1.1] ([2600:8803:e7e4:500:280e:69fd:7612:d5a9]) by smtp.gmail.com with ESMTPSA id 006d021491bc7-6a39af0e953sm7561978eaf.3.2026.07.14.16.22.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Jul 2026 16:22:30 -0700 (PDT) From: David Lechner Date: Tue, 14 Jul 2026 18:21:24 -0500 Subject: [PATCH v4 2/8] dt-bindings: iio: adc: Add excitation current sources properties Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260714-iio-adc-ti-ads122c14-v4-2-25f8e3084485@baylibre.com> References: <20260714-iio-adc-ti-ads122c14-v4-0-25f8e3084485@baylibre.com> In-Reply-To: <20260714-iio-adc-ti-ads122c14-v4-0-25f8e3084485@baylibre.com> To: Jonathan Cameron , =?utf-8?q?Nuno_S=C3=A1?= , Andy Shevchenko , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Chris Hall , Patrick Edwards , Kurt Borja , Nguyen Minh Tien , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, David Lechner , Conor Dooley X-Mailer: b4 0.16-dev X-Developer-Signature: v=1; a=openpgp-sha256; l=2227; i=dlechner@baylibre.com; h=from:subject:message-id; bh=96e2F9/YVY8qwuX8Jw8IiU0nLEgtbp30DvDE9oQfRe4=; b=owEBbQGS/pANAwAKAcLMIAH/AY/AAcsmYgBqVsSEZ8CkvjR262q2YkB685P0STJushRPgz7KX 6YT/l22ByCJATMEAAEKAB0WIQTsGNmeYg6D1pzYaJjCzCAB/wGPwAUCalbEhAAKCRDCzCAB/wGP wCXgCACbIGSHdaMyWKeHrBYL3DjmFKDNe+U6zIL00vffpkxo0o7CwPzkDvh9bfOD3eJNg1u0y3l 2xhc3SF24o50+kejshbKaX4PzpbDcZJ0t8S8JOPcMFfd/E3mMcrgsCQMV1dX6ghs/J5n5IEBXX1 6y46iTfBKTQY1YuHgB5BVAYDgWHUZvB1kHGRDuFpsFFyUa68XKzJAP94bADwZUHfRDaoU+e7HpS HRJSfmhroYvGTy/lqAm2E3qiESIO4th59V2oPhi47QFXm5adH0yHBovRqu2zUejJErGzqNtzahd YFwqfJZ0PxWU+UgZ4P8XunFvJsnncTCYRMuXRTIQKrF6s4dw X-Developer-Key: i=dlechner@baylibre.com; a=openpgp; fpr=8A73D82A6A1F509907F373881F8AF88C82F77C03 From: Kurt Borja Some ADCs incorporate current sources that provide excitation current to resistive temperature devices (RTDs), thermistors, diodes and other resistive sensors that require constant current biasing. Signed-off-by: Kurt Borja Acked-by: Conor Dooley Signed-off-by: David Lechner (TI) --- v4 changes: * Add sentence about values being pins like diff-channels and single-channel properties. v2 changes (compared to Kurt's RFC v2): * Make units nanoamps instead of microamps to fit known devices. * Drop bit about allowing single value for multiple channels. * Add bit about semantics of the array index. --- Documentation/devicetree/bindings/iio/adc/adc.yaml | 21 ++++++++++++++++++= +++ 1 file changed, 21 insertions(+) diff --git a/Documentation/devicetree/bindings/iio/adc/adc.yaml b/Documenta= tion/devicetree/bindings/iio/adc/adc.yaml index 8f608bf0b24d..9f7196d61ac3 100644 --- a/Documentation/devicetree/bindings/iio/adc/adc.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adc.yaml @@ -80,6 +80,27 @@ properties: ADCs usually allow choosing between internal reference sources or a = pair of external pins. =20 + excitation-channels: + $ref: /schemas/types.yaml#/definitions/uint32-array + description: + Excitation current sources provide current to resistive temperature + devices (RTDs), thermistors, diodes and other resistive sensors that + require constant current biasing. + + This array describes the mux configuration of the excitation current + sources. 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Tue, 14 Jul 2026 16:22:34 -0700 (PDT) From: David Lechner Date: Tue, 14 Jul 2026 18:21:25 -0500 Subject: [PATCH v4 3/8] dt-bindings: iio: adc: Add burn-out current properties Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260714-iio-adc-ti-ads122c14-v4-3-25f8e3084485@baylibre.com> References: <20260714-iio-adc-ti-ads122c14-v4-0-25f8e3084485@baylibre.com> In-Reply-To: <20260714-iio-adc-ti-ads122c14-v4-0-25f8e3084485@baylibre.com> To: Jonathan Cameron , =?utf-8?q?Nuno_S=C3=A1?= , Andy Shevchenko , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Chris Hall , Patrick Edwards , Kurt Borja , Nguyen Minh Tien , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, David Lechner , Conor Dooley X-Mailer: b4 0.16-dev X-Developer-Signature: v=1; a=openpgp-sha256; l=1218; i=dlechner@baylibre.com; h=from:subject:message-id; bh=+GUNuuQMtib4Kibx1H+tAJiwv94cfO9xjtvXTTsu6EE=; b=owEBbQGS/pANAwAKAcLMIAH/AY/AAcsmYgBqVsSK2ikdAzyGcKq5rUo+8ZJ2AvgO5A2eHZ4U9 CcKvt7ojLuJATMEAAEKAB0WIQTsGNmeYg6D1pzYaJjCzCAB/wGPwAUCalbEigAKCRDCzCAB/wGP wJysB/9XlInnk9loRJLMo2JjVVmYH85uIxCwTOFEILsZbeDdS9cjEofLQkwJPzqRzQZ8qmQKvjS FQP6yw//jnCqzuAlzHSUwbWLQ6W7HkqJuqrTbcRUrYiMd3c4mz8Q8KKlLYlrSWR2ttwl96ptPI+ 5iqB4ae43XBtvButX/ehtkUdNgEuW46lMiX8ueBMvFx7BSQspxVgeqqQdZ++A+u57X/aRvPvuA8 ywTOuIw+EBAtp2ukaipdrnFGGQENzVyj7yM2aO+0P6xaE3uLbxw3IjjMgMoOfB0+zRC1I+ZW5Lu Y1O6AZlJOwBmFHtZQWLcIAX31m83L3qlc3FlXfS/CmfqQDbX X-Developer-Key: i=dlechner@baylibre.com; a=openpgp; fpr=8A73D82A6A1F509907F373881F8AF88C82F77C03 From: Kurt Borja Some ADCs incorporate burn-out current sources that provide current to the channel's input pins for open-circuit or short-circuit detection. Signed-off-by: Kurt Borja Acked-by: Conor Dooley Signed-off-by: David Lechner (TI) --- v3 changes: * Removed maxItems. v2 changes (compared to Kurt's RFC v2): * Changed units from microamps to nanoamps to fit known devices. --- Documentation/devicetree/bindings/iio/adc/adc.yaml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/iio/adc/adc.yaml b/Documenta= tion/devicetree/bindings/iio/adc/adc.yaml index 9f7196d61ac3..e1da63119648 100644 --- a/Documentation/devicetree/bindings/iio/adc/adc.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adc.yaml @@ -101,6 +101,11 @@ properties: sources. The index in the array corresponds to the same index in the excitation-channels array. =20 + burn-out-current-nanoamp: + description: + Burn-out current sources provide current to the channel's input pins= for + open-circuit or short-circuit detection. + anyOf: - oneOf: - required: --=20 2.43.0 From nobody Sat Jul 25 18:54:59 2026 Received: from mail-oo1-f49.google.com (mail-oo1-f49.google.com [209.85.161.49]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BEA89433037 for ; Tue, 14 Jul 2026 23:22:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.161.49 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784071362; cv=none; b=m2HcC0oCbdSNBirPM1QbnPQdavDpi/FOvbIPA+X16H6vNDEyNvG1Kr2eFcTzgUkoqf3uSFaE7GdORHLSW//I/kNinz0++vkV96IGsB7ayiZ6CfAv7/LhJ0c+kziBFo9c5wCXsNuJU3i5KmtAQ9mX4CWNcHHcP+4QN8qVbNkLlcY= ARC-Message-Signature: i=1; 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Tue, 14 Jul 2026 16:22:37 -0700 (PDT) Received: from [127.0.1.1] ([2600:8803:e7e4:500:280e:69fd:7612:d5a9]) by smtp.gmail.com with ESMTPSA id 006d021491bc7-6a39af0e953sm7561978eaf.3.2026.07.14.16.22.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Jul 2026 16:22:36 -0700 (PDT) From: "David Lechner (TI)" Date: Tue, 14 Jul 2026 18:21:26 -0500 Subject: [PATCH v4 4/8] dt-bindings: iio: adc: add input-chopping property Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260714-iio-adc-ti-ads122c14-v4-4-25f8e3084485@baylibre.com> References: <20260714-iio-adc-ti-ads122c14-v4-0-25f8e3084485@baylibre.com> In-Reply-To: <20260714-iio-adc-ti-ads122c14-v4-0-25f8e3084485@baylibre.com> To: Jonathan Cameron , =?utf-8?q?Nuno_S=C3=A1?= , Andy Shevchenko , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Chris Hall , Patrick Edwards , Kurt Borja , Nguyen Minh Tien , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, David Lechner X-Mailer: b4 0.16-dev X-Developer-Signature: v=1; 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This is a feature seen frequently in ADCs that are designed to measure resistive loads, such as RTDs and strain gauges. Enabling this can reduce offset errors by swapping the positive and negative input channels on every other conversion. This can have side-effects in timing and filter response, so it is not always desirable to enable this feature in some applications. Therefore, it is best to make this a property that can be enabled or disabled in the device tree. Signed-off-by: David Lechner (TI) Acked-by: Conor Dooley --- v3 changes: * Renamed property to input-chopping to reflect more common terminology. * Removed "allowed" from the description. * Extended description to explain when it should not be used. v2 changes: * New patch. --- Documentation/devicetree/bindings/iio/adc/adc.yaml | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/Documentation/devicetree/bindings/iio/adc/adc.yaml b/Documenta= tion/devicetree/bindings/iio/adc/adc.yaml index e1da63119648..b673eaa5d072 100644 --- a/Documentation/devicetree/bindings/iio/adc/adc.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adc.yaml @@ -80,6 +80,14 @@ properties: ADCs usually allow choosing between internal reference sources or a = pair of external pins. =20 + input-chopping: + type: boolean + description: + If set, the positive and negative input channels are swapped on every + other conversion to reduce offset error. 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Tue, 14 Jul 2026 16:22:39 -0700 (PDT) Received: from [127.0.1.1] ([2600:8803:e7e4:500:280e:69fd:7612:d5a9]) by smtp.gmail.com with ESMTPSA id 006d021491bc7-6a39af0e953sm7561978eaf.3.2026.07.14.16.22.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Jul 2026 16:22:39 -0700 (PDT) From: "David Lechner (TI)" Date: Tue, 14 Jul 2026 18:21:27 -0500 Subject: [PATCH v4 5/8] dt-bindings: iio: adc: add ti,ads122c14 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260714-iio-adc-ti-ads122c14-v4-5-25f8e3084485@baylibre.com> References: <20260714-iio-adc-ti-ads122c14-v4-0-25f8e3084485@baylibre.com> In-Reply-To: <20260714-iio-adc-ti-ads122c14-v4-0-25f8e3084485@baylibre.com> To: Jonathan Cameron , =?utf-8?q?Nuno_S=C3=A1?= , Andy Shevchenko , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Chris Hall , Patrick Edwards , Kurt Borja , Nguyen Minh Tien , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, David Lechner , Conor Dooley X-Mailer: b4 0.16-dev X-Developer-Signature: v=1; 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This is an ADC that is primarily intended for use with resistive sensors (RTD, thermocouple, Wheatstone bridge, etc.). There are a few unusual properties because of this. In particular, the reference voltage source and current output requirements can be different for each measurement, so these are included in the channel bindings. The REFP/REFN reference voltage is usually just connected to a resistor that is being driven by the ADC's current outputs, so there is special property for this case rather than requiring a regulator to be defined to represent that. Reviewed-by: Conor Dooley Signed-off-by: David Lechner (TI) --- v4 changes: * Generalize temperature sensors to resistive sensors in commit message and bindings description. * Remove leftover paragraph from v1 in commit message. * Added if to make clocks and drdy interrupts mutually exclusive. v3 changes: * Fixed channel@ pattern. * Adapted to input-chopping property rename. * Made sure to use items: on array properties. * Added reg to required list. * Fixed missing space in example comment. v2 changes: * Added ti, vendor prefix when appropriate. * Others are now standardized properties from adc.yaml. * Moved top-level unevaluatedProperties. * Fixed some issues with the channel@ matching and reg property. * Dropped description on bipolar property. * Renamed current-chopping to input-channel-rotation. * Drop header file and use string enum instead for reference-sources. * Added burn-out-current-nanoamp property. * Drop allOf: and just use oneOf: directly. * Fix inconsistent indentation in the examples. --- .../devicetree/bindings/iio/adc/ti,ads112c14.yaml | 217 +++++++++++++++++= ++++ MAINTAINERS | 6 + 2 files changed, 223 insertions(+) diff --git a/Documentation/devicetree/bindings/iio/adc/ti,ads112c14.yaml b/= Documentation/devicetree/bindings/iio/adc/ti,ads112c14.yaml new file mode 100644 index 000000000000..b11359c9955e --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/ti,ads112c14.yaml @@ -0,0 +1,217 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/ti,ads112c14.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments' ADS112C14 and similar ADC chips + +description: | + Supports the following Texas Instruments' ADC chips: + - ADS112C14 (16-bit) + - ADS122C14 (24-bit) + + https://www.ti.com/lit/ds/symlink/ads122c14.pdf + + These chips are primarily designed for use with resistive sensors such as + RTDs, thermocouples, Wheatstone bridges, etc. The channel bindings refle= ct + this in that each channel represents the conditions required to make a + measurement rather than strictly just the physical input channels. + +maintainers: + - David Lechner + +properties: + compatible: + enum: + - ti,ads112c14 + - ti,ads122c14 + + reg: + items: + - minimum: 0x40 + maximum: 0x47 + + clocks: + maxItems: 1 + description: Optional external clock connected to GPIO3 pin. + + avdd-supply: true + dvdd-supply: true + + refp-supply: true + refn-supply: true + + ti,refp-refn-resistor-ohms: + description: + The resistance of the external resistor between REFP and REFN when u= sing + resistor bridge driven by current outputs for RTD measurements. + + interrupts: + minItems: 1 + items: + - description: /FAULT interrupt (GPIO2 pin) + - description: /DRDY interrupt (GPIO3 pin) + + interrupt-names: + minItems: 1 + maxItems: 2 + items: + enum: [fault, drdy] + + gpio-controller: true + '#gpio-cells': + const: 2 + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + +patternProperties: + ^channel@[0-9a-f]$: + $ref: adc.yaml + + unevaluatedProperties: false + + properties: + reg: + items: + - maximum: 15 # arbitrary limit, channel@ can be any combination= of AIN0-AIN7 + + single-channel: + maximum: 7 + + diff-channels: + items: + maximum: 7 + + bipolar: true + + input-chopping: true + + excitation-channels: + maxItems: 2 + items: + maximum: 7 + + excitation-current-nanoamp: + maxItems: 2 + items: + enum: [1000, 10000, 20000, 30000, 40000, 50000, 60000, 70000, 80= 000, + 90000, 100000, 200000, 300000, 400000, 500000, 600000, 70= 0000, + 800000, 900000, 1000000] + + burn-out-current-nanoamp: + items: + - enum: [200, 1000, 10000] + + reference-sources: + items: + - enum: [internal-2.5v, internal-1.25v, external, avdd] + default: internal-2.5v + + dependencies: + excitation-channels: [ excitation-current-nanoamp ] + excitation-current-nanoamp: [ excitation-channels ] + + oneOf: + - required: [ single-channel ] + - required: [ diff-channels ] + +unevaluatedProperties: false + +required: + - compatible + - reg + - avdd-supply + - dvdd-supply + +dependencies: + refn-supply: [ refp-supply ] + +oneOf: + - required: [ refp-supply ] + - required: [ "ti,refp-refn-resistor-ohms" ] + - properties: + refp-supply: false + refn-supply: false + ti,refp-refn-resistor-ohms: false + +# /DRDY out and CLK in use the same AIN7/GPIO3 pin. +if: + properties: + interrupt-names: + contains: + const: drdy +then: + properties: + clocks: false + +examples: + - | + i2c { + #address-cells =3D <1>; + #size-cells =3D <0>; + + adc@40 { + compatible =3D "ti,ads112c14"; + reg =3D <0x40>; + + avdd-supply =3D <&avdd>; + dvdd-supply =3D <&dvdd>; + + /* 3-Wire RTD: Two IDACs, One Measurement (AIN1-AIN2) */ + + ti,refp-refn-resistor-ohms =3D <500>; + + #address-cells =3D <1>; + #size-cells =3D <0>; + + channel@0 { + reg =3D <0>; + diff-channels =3D <1>, <2>; + input-chopping; + excitation-channels =3D <0>, <3>; + excitation-current-nanoamp =3D <500000>, <500000>; + reference-sources =3D "external"; + label =3D "rtd"; + }; + }; + }; + - | + i2c { + #address-cells =3D <1>; + #size-cells =3D <0>; + + adc@40 { + compatible =3D "ti,ads112c14"; + reg =3D <0x40>; + + avdd-supply =3D <&avdd>; + dvdd-supply =3D <&dvdd>; + + /* Resistive Bridge Measurement With a Thermistor for Temperat= ure Compensation */ + + refp-supply =3D <&avdd>; + + #address-cells =3D <1>; + #size-cells =3D <0>; + + channel@0 { + reg =3D <0>; + diff-channels =3D <6>, <7>; + bipolar; + reference-sources =3D "external"; + label =3D "bridge"; + }; + + channel@1 { + reg =3D <1>; + diff-channels =3D <1>, <2>; + reference-sources =3D "internal-2.5v"; + label =3D "thermistor"; + }; + }; + }; diff --git a/MAINTAINERS b/MAINTAINERS index 2b1ec46c5919..3e114e0c9c5f 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -26958,6 +26958,12 @@ S: Maintained F: Documentation/devicetree/bindings/iio/adc/ti,ads1119.yaml F: drivers/iio/adc/ti-ads1119.c =20 +TI ADS112C14 ADC DRIVER +M: David Lechner +L: linux-iio@vger.kernel.org +S: Maintained +F: Documentation/devicetree/bindings/iio/adc/ti,ads112c14.yaml + TI ADS1018 ADC DRIVER M: Kurt Borja L: linux-iio@vger.kernel.org --=20 2.43.0 From nobody Sat Jul 25 18:54:59 2026 Received: from mail-ot1-f43.google.com (mail-ot1-f43.google.com [209.85.210.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1E21242EEA3 for ; Tue, 14 Jul 2026 23:22:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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Tue, 14 Jul 2026 16:22:41 -0700 (PDT) Received: from [127.0.1.1] ([2600:8803:e7e4:500:280e:69fd:7612:d5a9]) by smtp.gmail.com with ESMTPSA id 006d021491bc7-6a39af0e953sm7561978eaf.3.2026.07.14.16.22.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Jul 2026 16:22:40 -0700 (PDT) From: "David Lechner (TI)" Date: Tue, 14 Jul 2026 18:21:28 -0500 Subject: [PATCH v4 6/8] iio: adc: add ti-ads112c14 driver Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260714-iio-adc-ti-ads122c14-v4-6-25f8e3084485@baylibre.com> References: <20260714-iio-adc-ti-ads122c14-v4-0-25f8e3084485@baylibre.com> In-Reply-To: <20260714-iio-adc-ti-ads122c14-v4-0-25f8e3084485@baylibre.com> To: Jonathan Cameron , =?utf-8?q?Nuno_S=C3=A1?= , Andy Shevchenko , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Chris Hall , Patrick Edwards , Kurt Borja , Nguyen Minh Tien , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, David Lechner X-Mailer: b4 0.16-dev X-Developer-Signature: v=1; a=openpgp-sha256; l=22459; i=dlechner@baylibre.com; h=from:subject:message-id; bh=/ZETdR6TQTAEDbJF5NrJA10iTT9G+zxZY5EcZOBdZ3s=; b=owEBbQGS/pANAwAKAcLMIAH/AY/AAcsmYgBqVsSe5H183bVPiFrq8MgPtY/12sjcbrRtnWaRq OqMN9cZIHeJATMEAAEKAB0WIQTsGNmeYg6D1pzYaJjCzCAB/wGPwAUCalbEngAKCRDCzCAB/wGP wJ2RB/98d3J5SVlPn6wcQc2Ek7M5LbRAqF2sxR449FmUsQ6mRkG7e47tSNMLudJxa2xmoQZo4J8 ikb9jm83AM5lGF1XBWSotRtjFHnBkN4BGVd6GeGiLsFUuvotz1b0fYX3hO6oFB/4yhnqV7s2WwJ SNn7rFqMHT9639a+jGT+M3+NG9vMYjPcH1s4UYyXX/mUcbMGdjwmTaAguBSGyHWzalxZWIR9y+3 zvcKAJyFDRfFFILDfZwJH3RFNWVJ+DqOgmR7h2y8QeIqlVcHASFKMnIFpTKr4NerA0+KDasuvwU Wzoa9pBPbGskrd5Q5jhW+3hadew3YTOAjzbxj3SwP6NFrtVT X-Developer-Key: i=dlechner@baylibre.com; a=openpgp; fpr=8A73D82A6A1F509907F373881F8AF88C82F77C03 Add a new driver for the TI ADS112C14/ADS122C14 ADC chips. This first step is adding a very basic driver that only supports power on/reset and reading the system monitor channels. ADS112C14_SYS_MON_CHANNEL_SHORT is the last channel rather than being in logical order by address to keep the voltage channels together and in case we find we need to add variants of this channel with different voltage reference later. Signed-off-by: David Lechner (TI) --- A few other notes for review that didn't seem worth putting in the commit message: * I intentionally did not use bulk regmap because later we may need to get the voltage of the avdd supply. * I left some comments in the code where the code might look funny (e.g. to reduce future diff) or does not exactly match the datasheet, in which case later changes will address that. v4 changes: * Change no match data error code. * Add fsleep() after power on. * Keep val and val2 params on same line. * Use explicit address range check for system monitor channels. * Don't check for specific error on reset regmap write. * Fix typo in print format for device ID. * Add macros to clear up ADS112C14_DEVICE_CFG_CONV_MODE values. v3 changes: * Reordered some things to reudce future diffs. * Fixed missing space in comment. * Added device ID check. * Added ADS112C14_SYS_MON_CHANNEL_BASE macro. * Drop linux/mod_devicetable.h import. v2 changes: * Add some indent to register field macro defines. * Drop ads112c14_internal_ref_uV array (use macros instead). * Don't keep pointer to i2c client. * Consistently check channel < 100 instead of >=3D 100 sometimes. * Check return of i2c_get_match_data(). * Fix bug on checking -EREMOTEIO. * Don't use &client->dev when we already have dev local variable. * Make some changes to reduce diff in later patches. --- MAINTAINERS | 1 + drivers/iio/adc/Kconfig | 12 + drivers/iio/adc/Makefile | 1 + drivers/iio/adc/ti-ads112c14.c | 578 +++++++++++++++++++++++++++++++++++++= ++++ 4 files changed, 592 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 3e114e0c9c5f..7077ed7c9efe 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -26963,6 +26963,7 @@ M: David Lechner L: linux-iio@vger.kernel.org S: Maintained F: Documentation/devicetree/bindings/iio/adc/ti,ads112c14.yaml +F: drivers/iio/adc/ti-ads112c14.c =20 TI ADS1018 ADC DRIVER M: Kurt Borja diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig index d1b198cb8a80..642c42b1fae7 100644 --- a/drivers/iio/adc/Kconfig +++ b/drivers/iio/adc/Kconfig @@ -1798,6 +1798,18 @@ config TI_ADS1119 This driver can also be built as a module. If so, the module will= be called ti-ads1119. =20 +config TI_ADS112C14 + tristate "Texas Instruments ADS112C14/ADS122C14" + depends on I2C + select REGMAP + select REGMAP_I2C + help + If you say yes here you get support for Texas Instruments ADS112C14, + ADS122C14 ADC chips. + + This driver can also be built as a module. If so, the module will be + called ti-ads112c14. + config TI_ADS124S08 tristate "Texas Instruments ADS124S08" depends on SPI diff --git a/drivers/iio/adc/Makefile b/drivers/iio/adc/Makefile index 0f90b75577ff..3778c7b0b8b5 100644 --- a/drivers/iio/adc/Makefile +++ b/drivers/iio/adc/Makefile @@ -154,6 +154,7 @@ obj-$(CONFIG_TI_ADS1015) +=3D ti-ads1015.o obj-$(CONFIG_TI_ADS1018) +=3D ti-ads1018.o obj-$(CONFIG_TI_ADS1100) +=3D ti-ads1100.o obj-$(CONFIG_TI_ADS1119) +=3D ti-ads1119.o +obj-$(CONFIG_TI_ADS112C14) +=3D ti-ads112c14.o obj-$(CONFIG_TI_ADS124S08) +=3D ti-ads124s08.o obj-$(CONFIG_TI_ADS1298) +=3D ti-ads1298.o obj-$(CONFIG_TI_ADS131E08) +=3D ti-ads131e08.o diff --git a/drivers/iio/adc/ti-ads112c14.c b/drivers/iio/adc/ti-ads112c14.c new file mode 100644 index 000000000000..a69c595ab518 --- /dev/null +++ b/drivers/iio/adc/ti-ads112c14.c @@ -0,0 +1,578 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * IIO driver for Texas Instruments ADS112C14 and similar ADCs. + * + * Copyright (C) 2026 Texas Instruments Incorporated - https://www.ti.com/ + * Copyright (C) 2026 Baylibre Inc. + * + * Datasheet: https://www.ti.com/lit/ds/symlink/ads122c14.pdf + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* Datasheet t_d(RST) - time to wait after reset before next I2C use. */ +#define ADS112C14_DELAY_RESET_US 500 + +#define ADS112C14_CMD_RDATA 0x00 +#define ADS112C14_CMD_RREG 0x40 +#define ADS112C14_CMD_WREG 0x80 + +#define ADS112C14_REG_DEVICE_ID 0x00 +#define ADS112C14_DEVICE_ID_BITS GENMASK(3, 0) + +#define ADS112C14_REG_REVISION_ID 0x01 + +#define ADS112C14_REG_STATUS_MSB 0x02 +#define ADS112C14_STATUS_MSB_RESETN BIT(7) +#define ADS112C14_STATUS_MSB_AVDD_UVN BIT(6) +#define ADS112C14_STATUS_MSB_REF_UVN BIT(5) +#define ADS112C14_STATUS_MSB_REG_MAP_CRC_FAULTN BIT(3) +#define ADS112C14_STATUS_MSB_MEM_FAULTN BIT(2) +#define ADS112C14_STATUS_MSB_REG_WRITE_FAULTN BIT(1) +#define ADS112C14_STATUS_MSB_DRDY BIT(0) + +#define ADS112C14_REG_STATUS_LSB 0x03 +#define ADS112C14_STATUS_LSB_CONV_COUNT GENMASK(7, 4) +#define ADS112C14_STATUS_LSB_GPIO3_DAT_IN BIT(3) +#define ADS112C14_STATUS_LSB_GPIO2_DAT_IN BIT(2) +#define ADS112C14_STATUS_LSB_GPIO1_DAT_IN BIT(1) +#define ADS112C14_STATUS_LSB_GPIO0_DAT_IN BIT(0) + +#define ADS112C14_REG_CONVERSION_CTRL 0x04 +#define ADS112C14_CONVERSION_CTRL_RESET GENMASK(7, 2) +#define ADS112C14_CONVERSION_CTRL_START BIT(1) +#define ADS112C14_CONVERSION_CTRL_STOP BIT(0) + +#define ADS112C14_REG_DEVICE_CFG 0x05 +#define ADS112C14_DEVICE_CFG_PWDN BIT(7) +#define ADS112C14_DEVICE_CFG_STBY_MODE BIT(6) +#define ADS112C14_DEVICE_CFG_BOCS GENMASK(5, 4) +#define ADS112C14_DEVICE_CFG_CLK_SEL BIT(3) +#define ADS112C14_DEVICE_CFG_CONV_MODE BIT(2) +#define ADS112C14_DEVICE_CFG_CONV_MODE_CONTINUOUS 0 +#define ADS112C14_DEVICE_CFG_CONV_MODE_SINGLE_SHOT 1 +#define ADS112C14_DEVICE_CFG_SPEED_MODE GENMASK(1, 0) + +#define ADS112C14_REG_DATA_RATE_CFG 0x06 +#define ADS112C14_DATA_RATE_CFG_DELAY GENMASK(7, 4) +#define ADS112C14_DATA_RATE_CFG_GC_EN BIT(3) +#define ADS112C14_DATA_RATE_CFG_FLTR_OSR GENMASK(2, 0) + +#define ADS112C14_REG_MUX_CFG 0x07 +#define ADS112C14_MUX_CFG_AINP GENMASK(7, 4) +#define ADS112C14_MUX_CFG_AINN GENMASK(3, 0) + +#define ADS112C14_REG_GAIN_CFG 0x08 +#define ADS112C14_GAIN_CFG_SPARE BIT(7) +#define ADS112C14_GAIN_CFG_SYS_MON GENMASK(6, 4) +#define ADS112C14_GAIN_CFG_GAIN GENMASK(3, 0) + +#define ADS112C14_REG_REFERENCE_CFG 0x09 +#define ADS112C14_REFERENCE_CFG_REF_UV_EN BIT(7) +#define ADS112C14_REFERENCE_CFG_REFP_BUF_EN BIT(5) +#define ADS112C14_REFERENCE_CFG_REFN_BUF_EN BIT(4) +#define ADS112C14_REFERENCE_CFG_REF_VAL BIT(2) +#define ADS112C14_REFERENCE_CFG_REF_VAL_1_25V 0 +#define ADS112C14_REFERENCE_CFG_REF_VAL_2_5V 1 +#define ADS112C14_REFERENCE_CFG_REF_SEL GENMASK(1, 0) +#define ADS112C14_REFERENCE_CFG_REF_SEL_INTERNAL 0 +#define ADS112C14_REFERENCE_CFG_REF_SEL_EXTERNAL 1 +#define ADS112C14_REFERENCE_CFG_REF_SEL_AVDD 2 + +#define ADS112C14_REG_DIGITAL_CFG 0x0A +#define ADS112C14_DIGITAL_CFG_REG_MAP_CRC_EN BIT(6) +#define ADS112C14_DIGITAL_CFG_I2C_CRC_EN BIT(5) +#define ADS112C14_DIGITAL_CFG_STATUS_EN BIT(4) +#define ADS112C14_DIGITAL_CFG_FAULT_PIN_BEHAVIOR BIT(3) +#define ADS112C14_DIGITAL_CFG_CODING BIT(1) + +#define ADS112C14_REG_GPIO_CFG 0x0B +#define ADS112C14_GPIO_CFG_GPIO3_CFG GENMASK(7, 6) +#define ADS112C14_GPIO_CFG_GPIO2_CFG GENMASK(5, 4) +#define ADS112C14_GPIO_CFG_GPIO1_CFG GENMASK(3, 2) +#define ADS112C14_GPIO_CFG_GPIO0_CFG GENMASK(1, 0) + +#define ADS112C14_REG_GPIO_DATA_OUTPUT 0x0C +#define ADS112C14_GPIO_DATA_OUTPUT_GPIO3_SRC BIT(7) +#define ADS112C14_GPIO_DATA_OUTPUT_GPIO2_SRC BIT(6) +#define ADS112C14_GPIO_DATA_OUTPUT_GPIO3_DAT_OUT BIT(3) +#define ADS112C14_GPIO_DATA_OUTPUT_GPIO2_DAT_OUT BIT(2) +#define ADS112C14_GPIO_DATA_OUTPUT_GPIO1_DAT_OUT BIT(1) +#define ADS112C14_GPIO_DATA_OUTPUT_GPIO0_DAT_OUT BIT(0) + +#define ADS112C14_REG_IDAC_MAG_CFG 0x0D +#define ADS112C14_IDAC_MAG_CFG_I2MAG GENMASK(7, 4) +#define ADS112C14_IDAC_MAG_CFG_I1MAG GENMASK(3, 0) + +#define ADS112C14_REG_IDAC_MUX_CFG 0x0E +#define ADS112C14_IDAC_MUX_CFG_IUNIT BIT(7) +#define ADS112C14_IDAC_MUX_CFG_I2MUX GENMASK(6, 4) +#define ADS112C14_IDAC_MUX_CFG_I1MUX GENMASK(2, 0) + +#define ADS112C14_REG_REG_MAP_CRC 0x0F + +#define ADS112C14_INT_REF0_mV 1250 +#define ADS112C14_INT_REF1_mV 2500 + +struct ads112c14_chip_info { + const char *name; + u8 device_id; + u32 resolution_bits; +}; + +/* Fixed channels for system monitor measurements. */ + +#define ADS112C14_SYS_MON_CHANNEL_BASE 100 + +enum { + ADS112C14_SYS_MON_CHANNEL_TEMP =3D ADS112C14_SYS_MON_CHANNEL_BASE, + ADS112C14_SYS_MON_CHANNEL_EXT_REF, + ADS112C14_SYS_MON_CHANNEL_AVDD, + ADS112C14_SYS_MON_CHANNEL_DVDD, + ADS112C14_SYS_MON_CHANNEL_SHORT, +}; + +static const struct iio_chan_spec ads112c14_sys_mon_channels[] =3D { + { + .type =3D IIO_TEMP, + .indexed =3D 1, + .channel =3D ADS112C14_SYS_MON_CHANNEL_TEMP, + .address =3D 2, + .info_mask_separate =3D BIT(IIO_CHAN_INFO_RAW) + | BIT(IIO_CHAN_INFO_SCALE) + | BIT(IIO_CHAN_INFO_OFFSET), + }, + { + .type =3D IIO_VOLTAGE, + .indexed =3D 1, + .channel =3D ADS112C14_SYS_MON_CHANNEL_EXT_REF, + .address =3D 3, + .info_mask_separate =3D BIT(IIO_CHAN_INFO_RAW) + | BIT(IIO_CHAN_INFO_SCALE), + }, + { + .type =3D IIO_VOLTAGE, + .indexed =3D 1, + .channel =3D ADS112C14_SYS_MON_CHANNEL_AVDD, + .address =3D 4, + .info_mask_separate =3D BIT(IIO_CHAN_INFO_RAW) + | BIT(IIO_CHAN_INFO_SCALE), + }, + { + .type =3D IIO_VOLTAGE, + .indexed =3D 1, + .channel =3D ADS112C14_SYS_MON_CHANNEL_DVDD, + .address =3D 5, + .info_mask_separate =3D BIT(IIO_CHAN_INFO_RAW) + | BIT(IIO_CHAN_INFO_SCALE), + }, + { + .type =3D IIO_VOLTAGE, + .indexed =3D 1, + .channel =3D ADS112C14_SYS_MON_CHANNEL_SHORT, + .channel2 =3D ADS112C14_SYS_MON_CHANNEL_SHORT, + .differential =3D 1, + .address =3D 1, + .info_mask_separate =3D BIT(IIO_CHAN_INFO_RAW) + | BIT(IIO_CHAN_INFO_SCALE), + }, +}; + +struct ads112c14_data { + const struct ads112c14_chip_info *chip_info; + struct regmap *regmap; +}; + +static bool ads112c14_writeable_reg(struct device *dev, unsigned int reg) +{ + switch (reg) { + case ADS112C14_REG_DEVICE_ID: + case ADS112C14_REG_REVISION_ID: + case ADS112C14_REG_STATUS_LSB: + return false; + default: + return true; + } +} + +static bool ads112c14_volatile_reg(struct device *dev, unsigned int reg) +{ + switch (reg) { + case ADS112C14_REG_STATUS_MSB: + case ADS112C14_REG_STATUS_LSB: + case ADS112C14_REG_CONVERSION_CTRL: + return true; + default: + return false; + } +} + +static const struct reg_default ads112c14_reg_defaults[] =3D { + { ADS112C14_REG_DEVICE_CFG, 0 }, + { ADS112C14_REG_DATA_RATE_CFG, 0 }, + { ADS112C14_REG_MUX_CFG, 0 }, + { ADS112C14_REG_GAIN_CFG, FIELD_PREP_CONST(ADS112C14_GAIN_CFG_GAIN, 1) }, + { ADS112C14_REG_REFERENCE_CFG, 0 }, + { ADS112C14_REG_DIGITAL_CFG, 0 }, + { ADS112C14_REG_GPIO_CFG, 0 }, + { ADS112C14_REG_GPIO_DATA_OUTPUT, 0 }, + { ADS112C14_REG_IDAC_MAG_CFG, 0 }, + { ADS112C14_REG_IDAC_MUX_CFG, FIELD_PREP_CONST(ADS112C14_IDAC_MUX_CFG_I2M= UX, 1) }, +}; + +static const struct regmap_config ads112c14_regmap_config =3D { + .reg_bits =3D 8, + .val_bits =3D 8, + .read_flag_mask =3D ADS112C14_CMD_RREG, + .write_flag_mask =3D ADS112C14_CMD_WREG, + .max_register =3D ADS112C14_REG_REG_MAP_CRC, + .writeable_reg =3D ads112c14_writeable_reg, + .volatile_reg =3D ads112c14_volatile_reg, + .reg_defaults =3D ads112c14_reg_defaults, + .num_reg_defaults =3D ARRAY_SIZE(ads112c14_reg_defaults), + .cache_type =3D REGCACHE_MAPLE, +}; + +static int ads112c14_prepare_sys_mon_channel(struct ads112c14_data *data, + const struct iio_chan_spec *chan) +{ + int ret; + + /* TODO: GAIN is useful for shorted PGA inputs. */ + /* All SYS_MON channels use GAIN of 1 to keep it simple. */ + ret =3D regmap_update_bits(data->regmap, ADS112C14_REG_GAIN_CFG, + ADS112C14_GAIN_CFG_SYS_MON | + ADS112C14_GAIN_CFG_GAIN, + FIELD_PREP(ADS112C14_GAIN_CFG_SYS_MON, chan->address) | + FIELD_PREP(ADS112C14_GAIN_CFG_GAIN, 1)); + if (ret) + return ret; + + /* All SYS_MON channels use signed data to keep it simple. */ + ret =3D regmap_clear_bits(data->regmap, ADS112C14_REG_DIGITAL_CFG, + ADS112C14_DIGITAL_CFG_CODING); + if (ret) + return ret; + + /* + * REVISIT: if we implement regulator support for the REFOUT pin, we + * might need to make this voltage match what is required by that. In + * that case, we could also adjust GAIN so that we still get the same + * range. + */ + /* + * NB: SYS_MON channels ignore REF_SEL except for the shorted input + * channel, so we set it here to internal reference to be consistent. + * If we ever need to make a measurement of shorted input with other + * reference source, we could add additional channels for that. + */ + ret =3D regmap_update_bits(data->regmap, ADS112C14_REG_REFERENCE_CFG, + ADS112C14_REFERENCE_CFG_REF_VAL | + ADS112C14_REFERENCE_CFG_REF_SEL, + FIELD_PREP(ADS112C14_REFERENCE_CFG_REF_VAL, + ADS112C14_REFERENCE_CFG_REF_VAL_2_5V) | + FIELD_PREP(ADS112C14_REFERENCE_CFG_REF_SEL, + ADS112C14_REFERENCE_CFG_REF_SEL_INTERNAL)); + if (ret) + return ret; + + return 0; +} + +static int ads112c14_single_conversion(struct ads112c14_data *data, + const struct iio_chan_spec *chan, + u8 *buf) +{ + struct i2c_client *client =3D to_i2c_client(regmap_get_device(data->regma= p)); + u32 reg_val; + int ret; + + if (chan->channel < ADS112C14_SYS_MON_CHANNEL_BASE) { + /* Not implemented yet. */ + return -EINVAL; + } else { + ret =3D ads112c14_prepare_sys_mon_channel(data, chan); + if (ret) + return ret; + } + + ret =3D regmap_write(data->regmap, ADS112C14_REG_CONVERSION_CTRL, + ADS112C14_CONVERSION_CTRL_START); + if (ret) + return ret; + + ret =3D regmap_read_poll_timeout(data->regmap, + ADS112C14_REG_STATUS_MSB, reg_val, + FIELD_GET(ADS112C14_STATUS_MSB_DRDY, reg_val), + 1 * USEC_PER_MSEC, 100 * USEC_PER_MSEC); + if (ret) + return ret; + + return i2c_smbus_read_i2c_block_data(client, ADS112C14_CMD_RDATA, + BITS_TO_BYTES(data->chip_info->resolution_bits), + buf); +} + +static int ads112c14_read_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + int *val, int *val2, long mask) +{ + struct ads112c14_data *data =3D iio_priv(indio_dev); + u32 vref_uV, fsr_bits; + + /* Selecting V_REF source is not implemented yet. */ + vref_uV =3D ADS112C14_INT_REF1_mV * (MICRO / MILLI); + + if (chan->channel < ADS112C14_SYS_MON_CHANNEL_BASE) { + /* Not implemented yet. */ + return -EINVAL; + } else { + /* All SYS_MON channels are using signed coding. */ + fsr_bits =3D data->chip_info->resolution_bits - 1; + } + + switch (mask) { + case IIO_CHAN_INFO_RAW: { + u8 buf[3]; + int ret; + + IIO_DEV_ACQUIRE_DIRECT_MODE(indio_dev, claim); + if (IIO_DEV_ACQUIRE_FAILED(claim)) + return -EBUSY; + + ret =3D ads112c14_single_conversion(data, chan, buf); + if (ret < 0) + return ret; + + switch (data->chip_info->resolution_bits) { + case 16: + *val =3D get_unaligned_be16(buf); + break; + case 24: + *val =3D get_unaligned_be24(buf); + break; + default: + return -EINVAL; + } + + *val =3D sign_extend32(*val, fsr_bits); + + return IIO_VAL_INT; + } + case IIO_CHAN_INFO_SCALE: + if (chan->type =3D=3D IIO_TEMP) { + /* TS_TC (typical) =3D 405 uV/=C2=B0C */ + *val =3D MILLI * vref_uV / 405; + *val2 =3D fsr_bits; + return IIO_VAL_FRACTIONAL_LOG2; + } + + *val =3D vref_uV / (MICRO / MILLI); + + /* + * Some SYS_MON channels (ext ref, AVDD, DVDD) need to be + * multiplied by 8 to account for internal attenuation of / 8. + */ + switch (chan->address) { + case 3 ... 5: + *val2 =3D fsr_bits - 3; + break; + default: + *val2 =3D fsr_bits; + break; + } + + return IIO_VAL_FRACTIONAL_LOG2; + case IIO_CHAN_INFO_OFFSET: + /* Only the temperature channel has an offset. */ + if (chan->type !=3D IIO_TEMP) + return -EINVAL; + /* + * Die temperature [=C2=B0C] =3D 25=C2=B0C + (Measured voltage =E2=80=93= TS_Offset) / TS_TC + * TS_TC (typical) =3D 405 uV/=C2=B0C + * TS_Offset (typical) =3D 119.5 mV + */ + *val =3D div_s64((s64)(25 * 405 - 119500) * BIT(fsr_bits), vref_uV); + return IIO_VAL_INT; + default: + return -EINVAL; + } +} + +static int ads112c14_read_label(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, char *label) +{ + const char *label_source; + + /* System monitor channels. */ + switch (chan->channel) { + case ADS112C14_SYS_MON_CHANNEL_TEMP: + label_source =3D "Internal temperature sensor"; + break; + case ADS112C14_SYS_MON_CHANNEL_EXT_REF: + label_source =3D "External reference"; + break; + case ADS112C14_SYS_MON_CHANNEL_AVDD: + label_source =3D "AVDD"; + break; + case ADS112C14_SYS_MON_CHANNEL_DVDD: + label_source =3D "DVDD"; + break; + case ADS112C14_SYS_MON_CHANNEL_SHORT: + label_source =3D "Internal short (internal reference source)"; + break; + default: + return -EINVAL; + } + + return sysfs_emit(label, "%s\n", label_source); +} + +static const struct iio_info ads112c14_info =3D { + .read_raw =3D ads112c14_read_raw, + .read_label =3D ads112c14_read_label, +}; + +static int ads112c14_probe(struct i2c_client *client) +{ + struct device *dev =3D &client->dev; + const struct ads112c14_chip_info *info; + struct iio_dev *indio_dev; + struct ads112c14_data *data; + u32 reg_val; + int ret; + + info =3D i2c_get_match_data(client); + if (!info) + return dev_err_probe(dev, -ENODEV, "missing match data\n"); + + indio_dev =3D devm_iio_device_alloc(dev, sizeof(*data)); + if (!indio_dev) + return -ENOMEM; + + data =3D iio_priv(indio_dev); + data->chip_info =3D info; + + ret =3D devm_regulator_get_enable(dev, "dvdd"); + if (ret) + return dev_err_probe(dev, ret, "failed to get dvdd regulator\n"); + + ret =3D devm_regulator_get_enable(dev, "avdd"); + if (ret) + return dev_err_probe(dev, ret, "failed to get avdd regulator\n"); + + /* It takes some time for the internal reference to stabilize. */ + fsleep(10 * USEC_PER_MSEC); + + data->regmap =3D devm_regmap_init_i2c(client, &ads112c14_regmap_config); + if (IS_ERR(data->regmap)) + return dev_err_probe(dev, PTR_ERR(data->regmap), + "failed to init regmap\n"); + + /* + * Write magic reset value (0x16) to ensure known state. The reset may + * cause an error because of failing to get the I2C ACK at the end of + * the message. The device still gets reset so it is safe to ignore the + * return value here. If something else is wrong, later read/write will + * likely have the same error. + */ + regmap_write(data->regmap, ADS112C14_REG_CONVERSION_CTRL, + FIELD_PREP(ADS112C14_CONVERSION_CTRL_RESET, 0x16)); + + fsleep(ADS112C14_DELAY_RESET_US); + + ret =3D regmap_read(data->regmap, ADS112C14_REG_STATUS_MSB, ®_val); + if (ret) + return ret; + + if (FIELD_GET(ADS112C14_STATUS_MSB_RESETN, reg_val)) + return dev_err_probe(dev, -EIO, "reset failed\n"); + + /* + * Clear reset bit to prepare for next probe. And clear AVDD fault since + * that happens on every reset. + */ + ret =3D regmap_write(data->regmap, ADS112C14_REG_STATUS_MSB, + ADS112C14_STATUS_MSB_RESETN | + ADS112C14_STATUS_MSB_AVDD_UVN); + if (ret) + return ret; + + ret =3D regmap_read(data->regmap, ADS112C14_REG_DEVICE_ID, ®_val); + if (ret) + return ret; + + if (FIELD_GET(ADS112C14_DEVICE_ID_BITS, reg_val) !=3D info->device_id) + dev_info(dev, "device ID mismatch, expected 0x%X, got 0x%lX\n", + info->device_id, + FIELD_GET(ADS112C14_DEVICE_ID_BITS, reg_val)); + + ret =3D regmap_update_bits(data->regmap, ADS112C14_REG_DEVICE_CFG, + ADS112C14_DEVICE_CFG_CONV_MODE, + FIELD_PREP(ADS112C14_DEVICE_CFG_CONV_MODE, + ADS112C14_DEVICE_CFG_CONV_MODE_SINGLE_SHOT)); + if (ret) + return ret; + + indio_dev->name =3D info->name; + indio_dev->modes =3D INDIO_DIRECT_MODE; + indio_dev->channels =3D ads112c14_sys_mon_channels; + indio_dev->num_channels =3D ARRAY_SIZE(ads112c14_sys_mon_channels); + indio_dev->info =3D &ads112c14_info; + + return devm_iio_device_register(dev, indio_dev); +} + +static const struct ads112c14_chip_info ads112c14_chip_info =3D { + .name =3D "ads112c14", + .device_id =3D 0xE, + .resolution_bits =3D 16, +}; + +static const struct ads112c14_chip_info ads122c14_chip_info =3D { + .name =3D "ads122c14", + .device_id =3D 0xF, + .resolution_bits =3D 24, +}; + +static const struct of_device_id ads112c14_of_match[] =3D { + { .compatible =3D "ti,ads112c14", .data =3D &ads112c14_chip_info }, + { .compatible =3D "ti,ads122c14", .data =3D &ads122c14_chip_info }, + { } +}; +MODULE_DEVICE_TABLE(of, ads112c14_of_match); + +static const struct i2c_device_id ads112c14_id[] =3D { + { .name =3D "ads112c14", .driver_data =3D (kernel_ulong_t)&ads112c14_chip= _info }, + { .name =3D "ads122c14", .driver_data =3D (kernel_ulong_t)&ads122c14_chip= _info }, + { } +}; +MODULE_DEVICE_TABLE(i2c, ads112c14_id); + +static struct i2c_driver ads112c14_driver =3D { + .driver =3D { + .name =3D "ads112c14", + .of_match_table =3D ads112c14_of_match, + }, + .probe =3D ads112c14_probe, + .id_table =3D ads112c14_id, +}; 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Tue, 14 Jul 2026 16:22:42 -0700 (PDT) Received: from [127.0.1.1] ([2600:8803:e7e4:500:280e:69fd:7612:d5a9]) by smtp.gmail.com with ESMTPSA id 006d021491bc7-6a39af0e953sm7561978eaf.3.2026.07.14.16.22.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Jul 2026 16:22:42 -0700 (PDT) From: "David Lechner (TI)" Date: Tue, 14 Jul 2026 18:21:29 -0500 Subject: [PATCH v4 7/8] iio: adc: ti-ads112c14: implement gain on internal short SYS_MON channel Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260714-iio-adc-ti-ads122c14-v4-7-25f8e3084485@baylibre.com> References: <20260714-iio-adc-ti-ads122c14-v4-0-25f8e3084485@baylibre.com> In-Reply-To: <20260714-iio-adc-ti-ads122c14-v4-0-25f8e3084485@baylibre.com> To: Jonathan Cameron , =?utf-8?q?Nuno_S=C3=A1?= , Andy Shevchenko , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Chris Hall , Patrick Edwards , Kurt Borja , Nguyen Minh Tien , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, David Lechner X-Mailer: b4 0.16-dev X-Developer-Signature: v=1; a=openpgp-sha256; l=9056; i=dlechner@baylibre.com; h=from:subject:message-id; bh=25WUGK2ba5xnlX7QOGvC2X9iXHAztyjhOtHUdyixIh4=; b=owEBbQGS/pANAwAKAcLMIAH/AY/AAcsmYgBqVsSlkE+hdncUFraWkbz++l+CEcjrCVyAmFriW 9pipjI1+2GJATMEAAEKAB0WIQTsGNmeYg6D1pzYaJjCzCAB/wGPwAUCalbEpQAKCRDCzCAB/wGP wP7ECACRc+Zv0D7ihFX64vE/p37cV4oPQgydKsBdDee683QTgcwa+sP/sj9RZaXL32743f7ZFiE IObVYuYaHRi0b08cOsEttvFNlqG76h+rx6whneklhRVJ/JPtUbYdMfl2SU8wcmE3cWbpbWfa/Ji 8vtwHB7E2vkbPjzcqoAuxRBV83wdq1HalsN6k9Z+DQQo4lZW+KOp10uS485k5xXbuZxvZCIQ/Vw kn3yX26xAvwRime6595qOrUgBDQtTR30k9UVvLEzlGVZKZUaHlg25uuzwBWPgBxjt6JPD515NQM oJ/7y46YWovEsjpzJSTjmCfaYzyH4x8K2+DMruBSgM5lWWhu X-Developer-Key: i=dlechner@baylibre.com; a=openpgp; fpr=8A73D82A6A1F509907F373881F8AF88C82F77C03 Implement support for the programmable gain amplifier on the internal short SYS_MON channel. This channel is used for calibration, so it is useful to be able to set the PGA to the same gain as the external channels. The gain setting is implemented via the `_scale` attribute. In the future, we may want to support different reference voltages for this channel, so the scale_available table is populated during probe rather than being a static table. Signed-off-by: David Lechner (TI) --- v4 changes: * Added comments on ads112c14_pga_gains_x10. * Fix scale storage to be compatible with big-endian. * Make some changes to reduce diff in next patch. * Add driver mutex instead of using claim direct mode. v3 changes: * Use IIO_VAL_DECIMAL64_PICO for scale. v2 changes: * Make some changes to reduce diff in next patch. * Add some local variables to reduce line wrap. --- drivers/iio/adc/ti-ads112c14.c | 152 +++++++++++++++++++++++++++++++++++++= +++- 1 file changed, 149 insertions(+), 3 deletions(-) diff --git a/drivers/iio/adc/ti-ads112c14.c b/drivers/iio/adc/ti-ads112c14.c index a69c595ab518..17bb6472a39b 100644 --- a/drivers/iio/adc/ti-ads112c14.c +++ b/drivers/iio/adc/ti-ads112c14.c @@ -9,12 +9,14 @@ */ =20 #include +#include #include #include #include #include #include #include +#include #include #include #include @@ -128,6 +130,15 @@ #define ADS112C14_INT_REF0_mV 1250 #define ADS112C14_INT_REF1_mV 2500 =20 +/* + * Available gains as tenths (e.g. value 5 =3D=3D 0.5 gain). Indexes corre= spond to + * ADS112C14_GAIN_CFG_GAIN values. + */ +static const u32 ads112c14_pga_gains_x10[] =3D { + 5, 10, 20, 40, 50, 80, 100, 160, /* 0 - 7 */ + 200, 320, 500, 640, 1000, 1280, 2000, 2560, /* 8 - 15 */ +}; + struct ads112c14_chip_info { const char *name; u8 device_id; @@ -189,12 +200,17 @@ static const struct iio_chan_spec ads112c14_sys_mon_c= hannels[] =3D { .address =3D 1, .info_mask_separate =3D BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE), + .info_mask_separate_available =3D BIT(IIO_CHAN_INFO_SCALE), }, }; =20 struct ads112c14_data { const struct ads112c14_chip_info *chip_info; struct regmap *regmap; + /* Synchronizes access to register value fields. */ + struct mutex lock; + u8 sys_mon_chan_short_gain_val; + int sys_mon_chan_short_scale_available[ARRAY_SIZE(ads112c14_pga_gains_x10= )][2]; }; =20 static bool ads112c14_writeable_reg(struct device *dev, unsigned int reg) @@ -250,15 +266,21 @@ static const struct regmap_config ads112c14_regmap_co= nfig =3D { static int ads112c14_prepare_sys_mon_channel(struct ads112c14_data *data, const struct iio_chan_spec *chan) { + u32 gain_val; int ret; =20 - /* TODO: GAIN is useful for shorted PGA inputs. */ - /* All SYS_MON channels use GAIN of 1 to keep it simple. */ + /* + * All SYS_MON channels use GAIN of 1 to keep it simple. Other than + * the internal short channel, where it is useful in practice. + */ + gain_val =3D chan->channel =3D=3D ADS112C14_SYS_MON_CHANNEL_SHORT ? + data->sys_mon_chan_short_gain_val : 1; + ret =3D regmap_update_bits(data->regmap, ADS112C14_REG_GAIN_CFG, ADS112C14_GAIN_CFG_SYS_MON | ADS112C14_GAIN_CFG_GAIN, FIELD_PREP(ADS112C14_GAIN_CFG_SYS_MON, chan->address) | - FIELD_PREP(ADS112C14_GAIN_CFG_GAIN, 1)); + FIELD_PREP(ADS112C14_GAIN_CFG_GAIN, gain_val)); if (ret) return ret; =20 @@ -301,6 +323,8 @@ static int ads112c14_single_conversion(struct ads112c14= _data *data, u32 reg_val; int ret; =20 + guard(mutex)(&data->lock); + if (chan->channel < ADS112C14_SYS_MON_CHANNEL_BASE) { /* Not implemented yet. */ return -EINVAL; @@ -332,6 +356,7 @@ static int ads112c14_read_raw(struct iio_dev *indio_dev, int *val, int *val2, long mask) { struct ads112c14_data *data =3D iio_priv(indio_dev); + const int *scale_avail; u32 vref_uV, fsr_bits; =20 /* Selecting V_REF source is not implemented yet. */ @@ -381,6 +406,19 @@ static int ads112c14_read_raw(struct iio_dev *indio_de= v, return IIO_VAL_FRACTIONAL_LOG2; } =20 + if (chan->channel =3D=3D ADS112C14_SYS_MON_CHANNEL_SHORT) { + u8 idx; + + guard(mutex)(&data->lock); + + idx =3D data->sys_mon_chan_short_gain_val; + scale_avail =3D data->sys_mon_chan_short_scale_available[idx]; + *val =3D scale_avail[0]; + *val2 =3D scale_avail[1]; + + return IIO_VAL_DECIMAL64_PICO; + } + *val =3D vref_uV / (MICRO / MILLI); =20 /* @@ -413,6 +451,75 @@ static int ads112c14_read_raw(struct iio_dev *indio_de= v, } } =20 +static int ads112c14_read_avail(struct iio_dev *indio_dev, + const struct iio_chan_spec *chan, const int **vals, + int *type, int *length, long mask) +{ + struct ads112c14_data *data =3D iio_priv(indio_dev); + + switch (mask) { + case IIO_CHAN_INFO_SCALE: + if (chan->channel =3D=3D ADS112C14_SYS_MON_CHANNEL_SHORT) { + guard(mutex)(&data->lock); + + *vals =3D (const int *)data->sys_mon_chan_short_scale_available; + *length =3D 2 * ARRAY_SIZE(data->sys_mon_chan_short_scale_available); + *type =3D IIO_VAL_DECIMAL64_PICO; + return IIO_AVAIL_LIST; + } + + return -EINVAL; + default: + return -EINVAL; + } +} + +static int ads112c14_write_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, int val, + int val2, long mask) +{ + struct ads112c14_data *data =3D iio_priv(indio_dev); + const int (*scale_avail)[2]; + u8 *gain_val; + + switch (mask) { + case IIO_CHAN_INFO_SCALE: { + guard(mutex)(&data->lock); + + if (chan->channel =3D=3D ADS112C14_SYS_MON_CHANNEL_SHORT) { + scale_avail =3D data->sys_mon_chan_short_scale_available; + gain_val =3D &data->sys_mon_chan_short_gain_val; + } else { + return -EINVAL; + } + + for (u32 i =3D 0; i < ARRAY_SIZE(ads112c14_pga_gains_x10); i++) { + if (iio_val_s64_compose(val, val2) =3D=3D + iio_val_s64_compose(scale_avail[i][0], scale_avail[i][1])) { + *gain_val =3D i; + return 0; + } + } + + return -EINVAL; + } + default: + return -EINVAL; + } +} + +static int ads112c14_write_raw_get_fmt(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + long mask) +{ + switch (mask) { + case IIO_CHAN_INFO_SCALE: + return IIO_VAL_DECIMAL64_PICO; + default: + return IIO_VAL_INT_PLUS_MICRO; + } +} + static int ads112c14_read_label(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, char *label) { @@ -444,9 +551,39 @@ static int ads112c14_read_label(struct iio_dev *indio_= dev, =20 static const struct iio_info ads112c14_info =3D { .read_raw =3D ads112c14_read_raw, + .read_avail =3D ads112c14_read_avail, + .write_raw =3D ads112c14_write_raw, + .write_raw_get_fmt =3D ads112c14_write_raw_get_fmt, .read_label =3D ads112c14_read_label, }; =20 +static void ads112c14_populate_scale_available(int (*scale_avail)[2], + u32 full_scale, u32 fsr_bits) +{ + for (u32 i =3D 0; i < ARRAY_SIZE(ads112c14_pga_gains_x10); i++) { + u64 gain_x10 =3D ads112c14_pga_gains_x10[i]; + s64 scale; + + scale =3D div64_u64((u64)PICO * 10U * full_scale, + gain_x10 * BIT(fsr_bits)); + + iio_val_s64_decompose(scale, &scale_avail[i][0], + &scale_avail[i][1]); + } +} + +static void ads112c14_populate_tables(struct ads112c14_data *data) +{ + u32 full_scale, fsr_bits; + + /* For now, assuming all sys_mon channels are using 2.5V reference. */ + full_scale =3D ADS112C14_INT_REF1_mV; + fsr_bits =3D data->chip_info->resolution_bits - 1; + + ads112c14_populate_scale_available(data->sys_mon_chan_short_scale_availab= le, + full_scale, fsr_bits); +} + static int ads112c14_probe(struct i2c_client *client) { struct device *dev =3D &client->dev; @@ -467,6 +604,10 @@ static int ads112c14_probe(struct i2c_client *client) data =3D iio_priv(indio_dev); data->chip_info =3D info; =20 + ret =3D devm_mutex_init(dev, &data->lock); + if (ret) + return ret; + ret =3D devm_regulator_get_enable(dev, "dvdd"); if (ret) return dev_err_probe(dev, ret, "failed to get dvdd regulator\n"); @@ -502,6 +643,9 @@ static int ads112c14_probe(struct i2c_client *client) if (FIELD_GET(ADS112C14_STATUS_MSB_RESETN, reg_val)) return dev_err_probe(dev, -EIO, "reset failed\n"); =20 + /* Default gain after reset is 1. */ + data->sys_mon_chan_short_gain_val =3D 1; + /* * Clear reset bit to prepare for next probe. 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Tue, 14 Jul 2026 16:22:45 -0700 (PDT) Received: from [127.0.1.1] ([2600:8803:e7e4:500:280e:69fd:7612:d5a9]) by smtp.gmail.com with ESMTPSA id 006d021491bc7-6a39af0e953sm7561978eaf.3.2026.07.14.16.22.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Jul 2026 16:22:44 -0700 (PDT) From: "David Lechner (TI)" Date: Tue, 14 Jul 2026 18:21:30 -0500 Subject: [PATCH v4 8/8] iio: adc: ti-ads112c14: add measurement channel support Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260714-iio-adc-ti-ads122c14-v4-8-25f8e3084485@baylibre.com> References: <20260714-iio-adc-ti-ads122c14-v4-0-25f8e3084485@baylibre.com> In-Reply-To: <20260714-iio-adc-ti-ads122c14-v4-0-25f8e3084485@baylibre.com> To: Jonathan Cameron , =?utf-8?q?Nuno_S=C3=A1?= , Andy Shevchenko , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Chris Hall , Patrick Edwards , Kurt Borja , Nguyen Minh Tien , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, David Lechner X-Mailer: b4 0.16-dev X-Developer-Signature: v=1; a=openpgp-sha256; l=23271; i=dlechner@baylibre.com; h=from:subject:message-id; bh=G65Ti4QAMGB3NTJ8s0MkoDBtHTtbBSTfAKdXE3aAfz0=; b=owEBbQGS/pANAwAKAcLMIAH/AY/AAcsmYgBqVsSsGOpLLRkyL75EhoXfjapWiV5aRmiN2f92+ oxY32wJ2KGJATMEAAEKAB0WIQTsGNmeYg6D1pzYaJjCzCAB/wGPwAUCalbErAAKCRDCzCAB/wGP wP5KB/9UoD7QNB5aVzupQFrxf3chnOYV3jbbfPQCa+whoueQ3i+ahFG1kJc53A1/qwaehl+00cF xBZ2YS0IfYgaRTqvcM8ry+fG/FLdnGMBAO6i74PxOFUQySeZP1EunkdKgQ+gtdGP1L6wuu4cPQh eR2CW58K1epbz1EDlGM0/7Tcr9iO4pgv2MIHNeLPEexSL2aBmAicFFpou1ZgccdQvqZYWaMuYkP MquNrfPGCvIHfvHSMuPpS3/IjreaNB8g0ruMtjSPxXJlhVmqMTB0Ey4T612JOH6v1A46Y0X4d5Y 16xca+evu8jvk0wDv92iymvQiPgXqSvvp1oYnttQDFTosVgC X-Developer-Key: i=dlechner@baylibre.com; a=openpgp; fpr=8A73D82A6A1F509907F373881F8AF88C82F77C03 Add support for parsing devicetree properties for measurement channels and doing direct reads on these. There are quite a lot of conditions that have to be met for each measurement to be made, so quite a bit of state and algorithms are required to handle it. Channels are created dynamically since the number of possibilities is unreasonably large. Signed-off-by: David Lechner (TI) --- v4 changes: * Removed burnout code (saving for later). * Use regmap_assign_bits() for bipolar. * Use mutex to protect scale state. v3 changes: * Checked error when getting "label" property. * Removed call of fwnode_device_is_available(). * Used IIO_VAL_DECIMAL64_PICO for scale. * Added switch in ads112c14_read_avail() to reduce future diff. v2 changes: * Adapted for changes in DT bindings. * Fixed bug in IDAC current register value calculation. * Fix uninitialized variable bug. * Fix bug in data->num_measurements calculation. * Use IIO_RESISTANCE instead of IIO_VOLTAGE when external reference is used and it is a resistor rather than a voltage source. * Fix bug with negative input mux selection on single-ended measurements. * Fixed return checks of devm_regulator_get_enable_read_voltage(). --- drivers/iio/adc/ti-ads112c14.c | 504 +++++++++++++++++++++++++++++++++++++= +++- 1 file changed, 493 insertions(+), 11 deletions(-) diff --git a/drivers/iio/adc/ti-ads112c14.c b/drivers/iio/adc/ti-ads112c14.c index 17bb6472a39b..fef3a9c37ced 100644 --- a/drivers/iio/adc/ti-ads112c14.c +++ b/drivers/iio/adc/ti-ads112c14.c @@ -12,9 +12,11 @@ #include #include #include +#include #include #include #include +#include #include #include #include @@ -77,6 +79,7 @@ #define ADS112C14_REG_MUX_CFG 0x07 #define ADS112C14_MUX_CFG_AINP GENMASK(7, 4) #define ADS112C14_MUX_CFG_AINN GENMASK(3, 0) +#define ADS112C14_MUX_CFG_AIN_GND 8 =20 #define ADS112C14_REG_GAIN_CFG 0x08 #define ADS112C14_GAIN_CFG_SPARE BIT(7) @@ -130,6 +133,20 @@ #define ADS112C14_INT_REF0_mV 1250 #define ADS112C14_INT_REF1_mV 2500 =20 +enum { + ADS112C14_VREF_SOURCE_INTERNAL_2_5V, + ADS112C14_VREF_SOURCE_INTERNAL_1_25V, + ADS112C14_VREF_SOURCE_EXTERNAL, + ADS112C14_VREF_SOURCE_AVDD, +}; + +static const char * const ads112c14_vref_source_names[] =3D { + [ADS112C14_VREF_SOURCE_INTERNAL_2_5V] =3D "internal-2.5v", + [ADS112C14_VREF_SOURCE_INTERNAL_1_25V] =3D "internal-1.25v", + [ADS112C14_VREF_SOURCE_EXTERNAL] =3D "external", + [ADS112C14_VREF_SOURCE_AVDD] =3D "avdd", +}; + /* * Available gains as tenths (e.g. value 5 =3D=3D 0.5 gain). Indexes corre= spond to * ADS112C14_GAIN_CFG_GAIN values. @@ -204,11 +221,33 @@ static const struct iio_chan_spec ads112c14_sys_mon_c= hannels[] =3D { }, }; =20 +struct ads112c14_measurement { + const char *label; + u32 vref_source; + u8 iunit; + u8 idac1_mag; + u8 idac2_mag; + u8 idac1_mux; + u8 idac2_mux; + u8 iadc_count; + u8 gain_val; + bool global_chop; + bool bipolar; + int scale_available[ARRAY_SIZE(ads112c14_pga_gains_x10)][2]; +}; + struct ads112c14_data { const struct ads112c14_chip_info *chip_info; struct regmap *regmap; /* Synchronizes access to register value fields. */ struct mutex lock; + u32 avdd_uV; + u32 ext_ref_uV; + bool refp_is_avdd; + bool refn_is_gnd; + u32 ext_ref_ohms; + struct ads112c14_measurement *measurements; + u32 num_measurements; u8 sys_mon_chan_short_gain_val; int sys_mon_chan_short_scale_available[ARRAY_SIZE(ads112c14_pga_gains_x10= )][2]; }; @@ -263,12 +302,112 @@ static const struct regmap_config ads112c14_regmap_c= onfig =3D { .cache_type =3D REGCACHE_MAPLE, }; =20 +static int ads112c14_prepare_measurement_channel(struct ads112c14_data *da= ta, + const struct iio_chan_spec *chan) +{ + struct ads112c14_measurement *measurement =3D &data->measurements[chan->s= can_index]; + u32 refp_buf_en, refn_buf_en, ref_val, ref_sel; + int ret; + + ret =3D regmap_update_bits(data->regmap, ADS112C14_REG_MUX_CFG, + ADS112C14_MUX_CFG_AINP | ADS112C14_MUX_CFG_AINN, + FIELD_PREP(ADS112C14_MUX_CFG_AINP, chan->channel) | + FIELD_PREP(ADS112C14_MUX_CFG_AINN, chan->channel2)); + if (ret) + return ret; + + ret =3D regmap_assign_bits(data->regmap, ADS112C14_REG_DIGITAL_CFG, + ADS112C14_DIGITAL_CFG_CODING, + !measurement->bipolar); + if (ret) + return ret; + + ret =3D regmap_update_bits(data->regmap, ADS112C14_REG_GAIN_CFG, + ADS112C14_GAIN_CFG_SYS_MON | + ADS112C14_GAIN_CFG_GAIN, + FIELD_PREP(ADS112C14_GAIN_CFG_SYS_MON, 0) | + FIELD_PREP(ADS112C14_GAIN_CFG_GAIN, + measurement->gain_val)); + if (ret) + return ret; + + ret =3D regmap_update_bits(data->regmap, ADS112C14_REG_IDAC_MAG_CFG, + ADS112C14_IDAC_MAG_CFG_I2MAG | + ADS112C14_IDAC_MAG_CFG_I1MAG, + FIELD_PREP(ADS112C14_IDAC_MAG_CFG_I2MAG, + measurement->idac2_mag) | + FIELD_PREP(ADS112C14_IDAC_MAG_CFG_I1MAG, + measurement->idac1_mag)); + if (ret) + return ret; + + ret =3D regmap_update_bits(data->regmap, ADS112C14_REG_IDAC_MUX_CFG, + ADS112C14_IDAC_MUX_CFG_IUNIT | + ADS112C14_IDAC_MUX_CFG_I2MUX | + ADS112C14_IDAC_MUX_CFG_I1MUX, + FIELD_PREP(ADS112C14_IDAC_MUX_CFG_IUNIT, + measurement->iunit) | + FIELD_PREP(ADS112C14_IDAC_MUX_CFG_I2MUX, + measurement->idac2_mux) | + FIELD_PREP(ADS112C14_IDAC_MUX_CFG_I1MUX, + measurement->idac1_mux)); + if (ret) + return ret; + + ret =3D regmap_update_bits(data->regmap, ADS112C14_REG_DATA_RATE_CFG, + ADS112C14_DATA_RATE_CFG_GC_EN, + FIELD_PREP(ADS112C14_DATA_RATE_CFG_GC_EN, + measurement->global_chop)); + if (ret) + return ret; + + refp_buf_en =3D !data->refp_is_avdd && + measurement->vref_source =3D=3D ADS112C14_VREF_SOURCE_EXTERNAL; + refn_buf_en =3D !data->refn_is_gnd && + measurement->vref_source =3D=3D ADS112C14_VREF_SOURCE_EXTERNAL; + + ref_val =3D measurement->vref_source =3D=3D ADS112C14_VREF_SOURCE_INTERNA= L_2_5V ? + ADS112C14_REFERENCE_CFG_REF_VAL_2_5V : + ADS112C14_REFERENCE_CFG_REF_VAL_1_25V; + + switch (measurement->vref_source) { + case ADS112C14_VREF_SOURCE_AVDD: + ref_sel =3D ADS112C14_REFERENCE_CFG_REF_SEL_AVDD; + break; + case ADS112C14_VREF_SOURCE_EXTERNAL: + ref_sel =3D ADS112C14_REFERENCE_CFG_REF_SEL_EXTERNAL; + break; + default: + ref_sel =3D ADS112C14_REFERENCE_CFG_REF_SEL_INTERNAL; + break; + } + + return regmap_update_bits(data->regmap, ADS112C14_REG_REFERENCE_CFG, + ADS112C14_REFERENCE_CFG_REFP_BUF_EN | + ADS112C14_REFERENCE_CFG_REFN_BUF_EN | + ADS112C14_REFERENCE_CFG_REF_VAL | + ADS112C14_REFERENCE_CFG_REF_SEL, + FIELD_PREP(ADS112C14_REFERENCE_CFG_REFP_BUF_EN, + refp_buf_en) | + FIELD_PREP(ADS112C14_REFERENCE_CFG_REFN_BUF_EN, + refn_buf_en) | + FIELD_PREP(ADS112C14_REFERENCE_CFG_REF_VAL, + ref_val) | + FIELD_PREP(ADS112C14_REFERENCE_CFG_REF_SEL, + ref_sel)); +} + static int ads112c14_prepare_sys_mon_channel(struct ads112c14_data *data, const struct iio_chan_spec *chan) { u32 gain_val; int ret; =20 + /* + * NB: IDAC registers are left as-is in case they are generating current + * needed for the external reference measurement. + */ + /* * All SYS_MON channels use GAIN of 1 to keep it simple. Other than * the internal short channel, where it is useful in practice. @@ -326,8 +465,9 @@ static int ads112c14_single_conversion(struct ads112c14= _data *data, guard(mutex)(&data->lock); =20 if (chan->channel < ADS112C14_SYS_MON_CHANNEL_BASE) { - /* Not implemented yet. */ - return -EINVAL; + ret =3D ads112c14_prepare_measurement_channel(data, chan); + if (ret) + return ret; } else { ret =3D ads112c14_prepare_sys_mon_channel(data, chan); if (ret) @@ -356,6 +496,7 @@ static int ads112c14_read_raw(struct iio_dev *indio_dev, int *val, int *val2, long mask) { struct ads112c14_data *data =3D iio_priv(indio_dev); + struct ads112c14_measurement *measurement =3D NULL; const int *scale_avail; u32 vref_uV, fsr_bits; =20 @@ -363,8 +504,8 @@ static int ads112c14_read_raw(struct iio_dev *indio_dev, vref_uV =3D ADS112C14_INT_REF1_mV * (MICRO / MILLI); =20 if (chan->channel < ADS112C14_SYS_MON_CHANNEL_BASE) { - /* Not implemented yet. */ - return -EINVAL; + measurement =3D &data->measurements[chan->scan_index]; + fsr_bits =3D data->chip_info->resolution_bits - measurement->bipolar; } else { /* All SYS_MON channels are using signed coding. */ fsr_bits =3D data->chip_info->resolution_bits - 1; @@ -394,7 +535,8 @@ static int ads112c14_read_raw(struct iio_dev *indio_dev, return -EINVAL; } =20 - *val =3D sign_extend32(*val, fsr_bits); + if (!measurement || measurement->bipolar) + *val =3D sign_extend32(*val, fsr_bits); =20 return IIO_VAL_INT; } @@ -406,6 +548,16 @@ static int ads112c14_read_raw(struct iio_dev *indio_de= v, return IIO_VAL_FRACTIONAL_LOG2; } =20 + if (chan->channel < ADS112C14_SYS_MON_CHANNEL_BASE) { + guard(mutex)(&data->lock); + + scale_avail =3D measurement->scale_available[measurement->gain_val]; + *val =3D scale_avail[0]; + *val2 =3D scale_avail[1]; + + return IIO_VAL_DECIMAL64_PICO; + } + if (chan->channel =3D=3D ADS112C14_SYS_MON_CHANNEL_SHORT) { u8 idx; =20 @@ -459,6 +611,18 @@ static int ads112c14_read_avail(struct iio_dev *indio_= dev, =20 switch (mask) { case IIO_CHAN_INFO_SCALE: + if (chan->channel < ADS112C14_SYS_MON_CHANNEL_BASE) { + struct ads112c14_measurement *measurement; + + guard(mutex)(&data->lock); + + measurement =3D &data->measurements[chan->scan_index]; + *vals =3D (const int *)measurement->scale_available; + *length =3D 2 * ARRAY_SIZE(measurement->scale_available); + *type =3D IIO_VAL_DECIMAL64_PICO; + return IIO_AVAIL_LIST; + } + if (chan->channel =3D=3D ADS112C14_SYS_MON_CHANNEL_SHORT) { guard(mutex)(&data->lock); =20 @@ -486,7 +650,13 @@ static int ads112c14_write_raw(struct iio_dev *indio_d= ev, case IIO_CHAN_INFO_SCALE: { guard(mutex)(&data->lock); =20 - if (chan->channel =3D=3D ADS112C14_SYS_MON_CHANNEL_SHORT) { + if (chan->channel < ADS112C14_SYS_MON_CHANNEL_BASE) { + struct ads112c14_measurement *measurement; + + measurement =3D &data->measurements[chan->scan_index]; + scale_avail =3D measurement->scale_available; + gain_val =3D &measurement->gain_val; + } else if (chan->channel =3D=3D ADS112C14_SYS_MON_CHANNEL_SHORT) { scale_avail =3D data->sys_mon_chan_short_scale_available; gain_val =3D &data->sys_mon_chan_short_gain_val; } else { @@ -523,8 +693,20 @@ static int ads112c14_write_raw_get_fmt(struct iio_dev = *indio_dev, static int ads112c14_read_label(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, char *label) { + struct ads112c14_data *data =3D iio_priv(indio_dev); const char *label_source; =20 + /* measurement channels */ + if (chan->channel < ADS112C14_SYS_MON_CHANNEL_BASE) { + struct ads112c14_measurement *measurement; + + measurement =3D &data->measurements[chan->scan_index]; + if (!measurement->label) + return -EINVAL; + + return sysfs_emit(label, "%s\n", measurement->label); + } + /* System monitor channels. */ switch (chan->channel) { case ADS112C14_SYS_MON_CHANNEL_TEMP: @@ -557,6 +739,215 @@ static const struct iio_info ads112c14_info =3D { .read_label =3D ads112c14_read_label, }; =20 +static int ads112c14_populate_idac_mag(u32 current_nA, u8 *idac_mag) +{ + u32 current_uA =3D current_nA / (NANO / MICRO); + + /* Convert microamps to IMAG bits */ + if (current_uA =3D=3D 1) + *idac_mag =3D 1; + else if (in_range(current_uA, 10, 100) && current_uA % 10 =3D=3D 0) + *idac_mag =3D current_uA / 10 + 1; + else + return dev_err_probe(NULL, -EINVAL, + "invalid excitation-current-nanoamp value\n"); + + return 0; +} + +static int ads112c14_parse_channels(struct iio_dev *indio_dev, + bool *need_avdd_ref, bool *need_ext_ref) +{ + struct ads112c14_data *data =3D iio_priv(indio_dev); + struct device *dev =3D indio_dev->dev.parent; + struct iio_chan_spec *channels; + u32 num_child_nodes, i, pair[2]; + int ret; + + *need_avdd_ref =3D false; + *need_ext_ref =3D false; + + num_child_nodes =3D device_get_named_child_node_count(dev, "channel"); + + data->measurements =3D devm_kcalloc(dev, num_child_nodes, + sizeof(*data->measurements), GFP_KERNEL); + if (!data->measurements) + return -ENOMEM; + + channels =3D devm_kcalloc(dev, num_child_nodes + + ARRAY_SIZE(ads112c14_sys_mon_channels), + sizeof(*channels), GFP_KERNEL); + if (!channels) + return -ENOMEM; + + i =3D 0; + device_for_each_named_child_node_scoped(dev, child, "channel") { + struct ads112c14_measurement *measurement =3D &data->measurements[i]; + struct iio_chan_spec *spec =3D &channels[i]; + + spec->indexed =3D 1; + spec->scan_index =3D i; + measurement->gain_val =3D 1; + + if (fwnode_property_present(child, "label")) { + ret =3D fwnode_property_read_string(child, "label", &measurement->label= ); + if (ret) + return dev_err_probe(dev, ret, + "failed to read label property\n"); + } + + if (fwnode_property_present(child, "single-channel")) { + ret =3D fwnode_property_read_u32(child, "single-channel", + &pair[0]); + if (ret) + return dev_err_probe(dev, ret, + "failed to read single-channel property\n"); + + if (pair[0] >=3D 8) + return dev_err_probe(dev, -EINVAL, + "single-channel value must be between 0 and 7\n"); + + spec->channel =3D pair[0]; + /* + * NB: channel2 is unused by iio core code in this case. + * Let's us avoid special case for negative input mux + * for single-ended channels when taking measurements. + */ + spec->channel2 =3D ADS112C14_MUX_CFG_AIN_GND; + } else if (fwnode_property_present(child, "diff-channels")) { + ret =3D fwnode_property_read_u32_array(child, "diff-channels", + pair, ARRAY_SIZE(pair)); + if (ret) + return dev_err_probe(dev, ret, + "failed to read diff-channels property\n"); + + if (pair[0] >=3D 8 || pair[1] >=3D 8) + return dev_err_probe(dev, -EINVAL, + "diff-channels values must be between 0 and 7\n"); + + spec->differential =3D 1; + spec->channel =3D pair[0]; + spec->channel2 =3D pair[1]; + } else { + return dev_err_probe(dev, -EINVAL, + "channel node missing channel type property\n"); + } + + if (fwnode_property_present(child, "excitation-channels")) { + ret =3D fwnode_property_count_u32(child, "excitation-channels"); + if (ret < 0) + return dev_err_probe(dev, ret, + "failed to read excitation-channels property\n"); + + if (ret < 1 || ret > 2) + return dev_err_probe(dev, -EINVAL, + "excitation-channels property must have 1 or 2 values\n"); + + measurement->iadc_count =3D ret; + pair[1] =3D 0; + + ret =3D fwnode_property_read_u32_array(child, "excitation-channels", + pair, measurement->iadc_count); + if (ret) + return dev_err_probe(dev, ret, + "failed to read excitation-channels property\n"); + + if (pair[0] >=3D 8 || pair[1] >=3D 8) + return dev_err_probe(dev, -EINVAL, + "excitation-channels values must be between 0 and 7\n"); + + measurement->idac1_mux =3D pair[0]; + measurement->idac2_mux =3D measurement->iadc_count > 1 ? pair[1] : 0; + + ret =3D fwnode_property_read_u32_array(child, "excitation-current-nanoa= mp", + pair, measurement->iadc_count); + if (ret) + return dev_err_probe(dev, ret, + "failed to read excitation-current-nanoamp property\n"); + + if (pair[0] <=3D 100 * (NANO / MICRO) && + (measurement->iadc_count =3D=3D 1 || pair[1] <=3D 100 * (NANO / MIC= RO))) { + /* + * If both values are 100=C2=B5A or less, then we can + * use IUNIT =3D 1=C2=B5A for better precision. + */ + ret =3D ads112c14_populate_idac_mag(pair[0], + &measurement->idac1_mag); + if (ret) + return ret; + + if (measurement->iadc_count > 1) { + ret =3D ads112c14_populate_idac_mag(pair[1], + &measurement->idac2_mag); + if (ret) + return ret; + } + } else { + /* + * Otherwise, IUINT is 10=C2=B5A (flag set) and so + * IxMAG is 1/10 of the actual current. + */ + measurement->iunit =3D 1; + + ret =3D ads112c14_populate_idac_mag(pair[0] / 10, + &measurement->idac1_mag); + if (ret) + return ret; + + if (measurement->iadc_count > 1) { + ret =3D ads112c14_populate_idac_mag(pair[1] / 10, + &measurement->idac2_mag); + if (ret) + return ret; + } + } + } + + measurement->bipolar =3D fwnode_property_read_bool(child, "bipolar"); + measurement->global_chop =3D fwnode_property_read_bool(child, + "input-chopping"); + + if (fwnode_property_present(child, "reference-sources")) { + ret =3D fwnode_property_match_property_string(child, + "reference-sources", ads112c14_vref_source_names, + ARRAY_SIZE(ads112c14_vref_source_names)); + if (ret < 0) + return dev_err_probe(dev, ret, + "invalid reference-sources value\n"); + + measurement->vref_source =3D ret; + } + + if (measurement->vref_source =3D=3D ADS112C14_VREF_SOURCE_AVDD) + *need_avdd_ref =3D true; + if (measurement->vref_source =3D=3D ADS112C14_VREF_SOURCE_EXTERNAL) + *need_ext_ref =3D true; + + spec->info_mask_separate =3D BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_= SCALE); + spec->info_mask_separate_available =3D BIT(IIO_CHAN_INFO_SCALE); + + /* + * If reference source is resistor rather than voltage supply, + * then the measurement is effectively a resistance measurement. + */ + spec->type =3D (measurement->vref_source =3D=3D ADS112C14_VREF_SOURCE_EX= TERNAL && + data->ext_ref_ohms) ? IIO_RESISTANCE : IIO_VOLTAGE; + + if (spec->type =3D=3D IIO_RESISTANCE) + spec->differential =3D 0; + + i++; + } + + data->num_measurements =3D i; + memcpy(channels + i, ads112c14_sys_mon_channels, sizeof(ads112c14_sys_mon= _channels)); + + indio_dev->channels =3D channels; + indio_dev->num_channels =3D i + ARRAY_SIZE(ads112c14_sys_mon_channels); + + return 0; +} + static void ads112c14_populate_scale_available(int (*scale_avail)[2], u32 full_scale, u32 fsr_bits) { @@ -576,6 +967,33 @@ static void ads112c14_populate_tables(struct ads112c14= _data *data) { u32 full_scale, fsr_bits; =20 + for (u32 i =3D 0; i < data->num_measurements; i++) { + struct ads112c14_measurement *measurement =3D &data->measurements[i]; + + switch (measurement->vref_source) { + case ADS112C14_VREF_SOURCE_EXTERNAL: + if (data->ext_ref_ohms) + full_scale =3D data->ext_ref_ohms; + else + full_scale =3D data->ext_ref_uV / (MICRO / MILLI); + break; + case ADS112C14_VREF_SOURCE_AVDD: + full_scale =3D data->avdd_uV / (MICRO / MILLI); + break; + case ADS112C14_VREF_SOURCE_INTERNAL_1_25V: + full_scale =3D ADS112C14_INT_REF0_mV; + break; + default: + full_scale =3D ADS112C14_INT_REF1_mV; + break; + } + + fsr_bits =3D data->chip_info->resolution_bits - measurement->bipolar; + + ads112c14_populate_scale_available(measurement->scale_available, + full_scale, fsr_bits); + } + /* For now, assuming all sys_mon channels are using 2.5V reference. */ full_scale =3D ADS112C14_INT_REF1_mV; fsr_bits =3D data->chip_info->resolution_bits - 1; @@ -590,6 +1008,9 @@ static int ads112c14_probe(struct i2c_client *client) const struct ads112c14_chip_info *info; struct iio_dev *indio_dev; struct ads112c14_data *data; + bool need_avdd_ref, need_ext_ref; + u32 refp_uV =3D 0; + u32 refn_uV =3D 0; u32 reg_val; int ret; =20 @@ -608,13 +1029,76 @@ static int ads112c14_probe(struct i2c_client *client) if (ret) return ret; =20 + if (device_property_present(dev, "ti,refp-refn-resistor-ohms")) { + ret =3D device_property_read_u32(dev, "ti,refp-refn-resistor-ohms", + &data->ext_ref_ohms); + if (ret) + return dev_err_probe(dev, ret, + "failed to read ti,refp-refn-resistor-ohms property\n"); + } + + ret =3D ads112c14_parse_channels(indio_dev, &need_avdd_ref, &need_ext_ref= ); + if (ret) + return ret; + ret =3D devm_regulator_get_enable(dev, "dvdd"); if (ret) return dev_err_probe(dev, ret, "failed to get dvdd regulator\n"); =20 - ret =3D devm_regulator_get_enable(dev, "avdd"); - if (ret) - return dev_err_probe(dev, ret, "failed to get avdd regulator\n"); + if (need_avdd_ref) { + ret =3D devm_regulator_get_enable_read_voltage(dev, "avdd"); + if (ret < 0) + return dev_err_probe(dev, ret, "failed to get avdd voltage\n"); + + data->avdd_uV =3D ret; + } else { + ret =3D devm_regulator_get_enable(dev, "avdd"); + if (ret) + return dev_err_probe(dev, ret, "failed to get avdd regulator\n"); + } + + if (device_property_present(dev, "refp-supply")) { + ret =3D devm_regulator_get_enable_read_voltage(dev, "refp"); + if (ret < 0) + return dev_err_probe(dev, ret, "failed to get refp voltage\n"); + + refp_uV =3D ret; + + struct fwnode_handle *refp_fwnode __free(fwnode_handle) =3D + fwnode_find_reference(dev->fwnode, "refp-supply", 0); + if (IS_ERR(refp_fwnode)) + return dev_err_probe(dev, PTR_ERR(refp_fwnode), + "failed to get refp fwnode\n"); + + struct fwnode_handle *avdd_fwnode __free(fwnode_handle) =3D + fwnode_find_reference(dev->fwnode, "avdd-supply", 0); + if (IS_ERR(avdd_fwnode)) + return dev_err_probe(dev, PTR_ERR(avdd_fwnode), + "failed to get avdd fwnode\n"); + + /* REFP buffer should not be enabled when connected to AVDD */ + data->refp_is_avdd =3D refp_fwnode =3D=3D avdd_fwnode; + } + + if (device_property_present(dev, "refn-supply")) { + ret =3D devm_regulator_get_enable_read_voltage(dev, "refn"); + if (ret < 0) + return dev_err_probe(dev, ret, "failed to get refn voltage\n"); + + refn_uV =3D ret; + } else { + data->refn_is_gnd =3D true; + } + + data->ext_ref_uV =3D refp_uV - refn_uV; + + if (data->ext_ref_uV && data->ext_ref_ohms) + return dev_err_probe(dev, -EINVAL, + "ti,refp-refn-resistor-ohms property should not be present when r= efp-supply or refn-supply is present\n"); + + if (need_ext_ref && !data->ext_ref_uV && !data->ext_ref_ohms) + return dev_err_probe(dev, -EINVAL, + "external reference measurements require either refp-supply or ti= ,refp-refn-resistor-ohms property\n"); =20 /* It takes some time for the internal reference to stabilize. */ fsleep(10 * USEC_PER_MSEC); @@ -676,8 +1160,6 @@ static int ads112c14_probe(struct i2c_client *client) =20 indio_dev->name =3D info->name; indio_dev->modes =3D INDIO_DIRECT_MODE; - indio_dev->channels =3D ads112c14_sys_mon_channels; - indio_dev->num_channels =3D ARRAY_SIZE(ads112c14_sys_mon_channels); indio_dev->info =3D &ads112c14_info; =20 return devm_iio_device_register(dev, indio_dev); --=20 2.43.0