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Tue, 14 Jul 2026 17:20:01 -0700 (PDT) From: "David Lechner (TI)" Date: Tue, 14 Jul 2026 19:19:30 -0500 Subject: [PATCH 1/3] iio: adc: ti-ads112c14: add debugfs register access Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260714-iio-adc-ti-ads112c14-buffered-read-v1-1-fe6e1c971288@baylibre.com> References: <20260714-iio-adc-ti-ads112c14-buffered-read-v1-0-fe6e1c971288@baylibre.com> In-Reply-To: <20260714-iio-adc-ti-ads112c14-buffered-read-v1-0-fe6e1c971288@baylibre.com> To: Jonathan Cameron , =?utf-8?q?Nuno_S=C3=A1?= , Andy Shevchenko Cc: Chris Hall , Patrick Edwards , Kurt Borja , Nguyen Minh Tien , linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, "David Lechner (TI)" X-Mailer: b4 0.16-dev X-Developer-Signature: v=1; a=openpgp-sha256; l=1403; i=dlechner@baylibre.com; h=from:subject:message-id; bh=Z8GIy77JBX2RgMhUKg5pNwcJvDLIEJ7sirso5/tXXkM=; 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This is a complex chip and being able to poke registers is useful for debugging and diagnostic/calibration purposes. Signed-off-by: David Lechner (TI) --- drivers/iio/adc/ti-ads112c14.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/drivers/iio/adc/ti-ads112c14.c b/drivers/iio/adc/ti-ads112c14.c index fef3a9c37ced..28824c81908e 100644 --- a/drivers/iio/adc/ti-ads112c14.c +++ b/drivers/iio/adc/ti-ads112c14.c @@ -690,6 +690,19 @@ static int ads112c14_write_raw_get_fmt(struct iio_dev = *indio_dev, } } =20 +static int ads112c14_debugfs_reg_access(struct iio_dev *indio_dev, + unsigned int reg, + unsigned int writeval, + unsigned int *readval) +{ + struct ads112c14_data *data =3D iio_priv(indio_dev); + + if (readval) + return regmap_read(data->regmap, reg, readval); + + return regmap_write(data->regmap, reg, writeval); +} + static int ads112c14_read_label(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, char *label) { @@ -736,6 +749,7 @@ static const struct iio_info ads112c14_info =3D { .read_avail =3D ads112c14_read_avail, .write_raw =3D ads112c14_write_raw, .write_raw_get_fmt =3D ads112c14_write_raw_get_fmt, + .debugfs_reg_access =3D ads112c14_debugfs_reg_access, .read_label =3D ads112c14_read_label, }; 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Tue, 14 Jul 2026 17:20:02 -0700 (PDT) From: "David Lechner (TI)" Date: Tue, 14 Jul 2026 19:19:31 -0500 Subject: [PATCH 2/3] iio: adc: ti-ads112c14: add support for I2C CRC8 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260714-iio-adc-ti-ads112c14-buffered-read-v1-2-fe6e1c971288@baylibre.com> References: <20260714-iio-adc-ti-ads112c14-buffered-read-v1-0-fe6e1c971288@baylibre.com> In-Reply-To: <20260714-iio-adc-ti-ads112c14-buffered-read-v1-0-fe6e1c971288@baylibre.com> To: Jonathan Cameron , =?utf-8?q?Nuno_S=C3=A1?= , Andy Shevchenko Cc: Chris Hall , Patrick Edwards , Kurt Borja , Nguyen Minh Tien , linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, "David Lechner (TI)" X-Mailer: b4 0.16-dev X-Developer-Signature: v=1; a=openpgp-sha256; l=7615; i=dlechner@baylibre.com; h=from:subject:message-id; bh=HFTM3kcFI3bgzN5pSwcDunfYHR7FvwBroXaFieoNilQ=; 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This verifies data integrity of all I2C transactions with the device. For now, it is always enabled, but it could be made optional in the future if needed (e.g. for higher-speed data acquisition). Signed-off-by: David Lechner (TI) --- drivers/iio/adc/Kconfig | 1 - drivers/iio/adc/ti-ads112c14.c | 145 +++++++++++++++++++++++++++++++++++++= ++-- 2 files changed, 140 insertions(+), 6 deletions(-) diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig index 642c42b1fae7..4ed6f01386bf 100644 --- a/drivers/iio/adc/Kconfig +++ b/drivers/iio/adc/Kconfig @@ -1802,7 +1802,6 @@ config TI_ADS112C14 tristate "Texas Instruments ADS112C14/ADS122C14" depends on I2C select REGMAP - select REGMAP_I2C help If you say yes here you get support for Texas Instruments ADS112C14, ADS122C14 ADC chips. diff --git a/drivers/iio/adc/ti-ads112c14.c b/drivers/iio/adc/ti-ads112c14.c index 28824c81908e..99ccacd6d56f 100644 --- a/drivers/iio/adc/ti-ads112c14.c +++ b/drivers/iio/adc/ti-ads112c14.c @@ -10,6 +10,7 @@ =20 #include #include +#include #include #include #include @@ -156,6 +157,9 @@ static const u32 ads112c14_pga_gains_x10[] =3D { 200, 320, 500, 640, 1000, 1280, 2000, 2560, /* 8 - 15 */ }; =20 +#define ADS112C14_I2C_CRC8_POLYNOMIAL 0x07 +DECLARE_CRC8_TABLE(ads112c14_crc8_table); + struct ads112c14_chip_info { const char *name; u8 device_id; @@ -241,6 +245,7 @@ struct ads112c14_data { struct regmap *regmap; /* Synchronizes access to register value fields. */ struct mutex lock; + bool i2c_crc_enabled; u32 avdd_uV; u32 ext_ref_uV; bool refp_is_avdd; @@ -289,6 +294,120 @@ static const struct reg_default ads112c14_reg_default= s[] =3D { { ADS112C14_REG_IDAC_MUX_CFG, FIELD_PREP_CONST(ADS112C14_IDAC_MUX_CFG_I2M= UX, 1) }, }; =20 +/** + * ads112c14_i2c_read_bytes() - Read bytes from the device over I2C + * @client: I2C client for the device + * @cmd: Command to send to the device before reading + * @buf: Buffer to store the read bytes + * @len: Number of bytes to read + * @use_crc: Whether to use CRC8 for data integrity check + * + * If I2C_CRC is enabled, @use_crc may be set to true to perform a CRC8 ch= eck + * on the received data. + */ +static int ads112c14_i2c_read_bytes(struct i2c_client *client, u8 cmd, + u8 *buf, u8 len, bool use_crc) +{ + u8 rx_buf[4]; /* Up to 3 data bytes + 1 CRC byte. */ + u8 rx_len; + int ret; + + rx_len =3D len + (use_crc ? 1 : 0); + + if (rx_len > sizeof(rx_buf)) + return -EINVAL; + + ret =3D i2c_smbus_read_i2c_block_data(client, cmd, rx_len, rx_buf); + if (ret < 0) + return ret; + + if (use_crc) { + u8 crc =3D crc8(ads112c14_crc8_table, rx_buf, len, CRC8_INIT_VALUE); + + if (crc !=3D rx_buf[len]) + return -EBADMSG; + } + + memcpy(buf, rx_buf, len); + + return 0; +} + +/** + * ads112c14_regmap_bus_read() - Read a register from the device + * @context: Pointer to the device context + * @reg_buf: Register address to read + * @reg_size: Size of the register address (should be 1) + * @val_buf: Buffer to store the read value + * @val_size: Size of the value to read + * + * Custom regmap read function that also does CRC check when enabled. + */ +static int ads112c14_regmap_bus_read(void *context, const void *reg_buf, + size_t reg_size, void *val_buf, + size_t val_size) +{ + struct ads112c14_data *data =3D context; + struct device *dev =3D regmap_get_device(data->regmap); + struct i2c_client *client =3D to_i2c_client(dev); + const u8 *cmd =3D reg_buf; + + if (reg_size !=3D 1) + return -EINVAL; + + return ads112c14_i2c_read_bytes(client, cmd[0], val_buf, val_size, + data->i2c_crc_enabled); +} + +/** + * ads112c14_regmap_bus_write() - Write a register to the device + * @context: Pointer to the device context + * @data_buf: Buffer containing the register address and value to write + * @count: Number of bytes to write + * + * Custom regmap write function that also does readback with CRC check of + * nonvolatile registers when CRC is enabled. + */ +static int ads112c14_regmap_bus_write(void *context, const void *data_buf, + size_t count) +{ + struct ads112c14_data *data =3D context; + struct device *dev =3D regmap_get_device(data->regmap); + struct i2c_client *client =3D to_i2c_client(dev); + const u8 *tx =3D data_buf; + u8 reg, readback; + int ret; + + if (count !=3D 2) + return -EINVAL; + + ret =3D i2c_smbus_write_byte_data(client, tx[0], tx[1]); + if (ret) + return ret; + + reg =3D tx[0] & ~ADS112C14_CMD_WREG; + + if (!data->i2c_crc_enabled || ads112c14_volatile_reg(dev, reg)) + return 0; + + ret =3D ads112c14_i2c_read_bytes(client, reg | ADS112C14_CMD_RREG, + &readback, sizeof(readback), true); + if (ret) + return ret; + + if (readback !=3D tx[1]) + return -EIO; + + return 0; +} + +static const struct regmap_bus ads112c14_regmap_bus =3D { + .read =3D ads112c14_regmap_bus_read, + .write =3D ads112c14_regmap_bus_write, + .reg_format_endian_default =3D REGMAP_ENDIAN_BIG, + .val_format_endian_default =3D REGMAP_ENDIAN_BIG, +}; + static const struct regmap_config ads112c14_regmap_config =3D { .reg_bits =3D 8, .val_bits =3D 8, @@ -486,9 +605,9 @@ static int ads112c14_single_conversion(struct ads112c14= _data *data, if (ret) return ret; =20 - return i2c_smbus_read_i2c_block_data(client, ADS112C14_CMD_RDATA, - BITS_TO_BYTES(data->chip_info->resolution_bits), - buf); + return ads112c14_i2c_read_bytes(client, ADS112C14_CMD_RDATA, buf, + BITS_TO_BYTES(data->chip_info->resolution_bits), + data->i2c_crc_enabled); } =20 static int ads112c14_read_raw(struct iio_dev *indio_dev, @@ -1117,7 +1236,8 @@ static int ads112c14_probe(struct i2c_client *client) /* It takes some time for the internal reference to stabilize. */ fsleep(10 * USEC_PER_MSEC); =20 - data->regmap =3D devm_regmap_init_i2c(client, &ads112c14_regmap_config); + data->regmap =3D devm_regmap_init(dev, &ads112c14_regmap_bus, data, + &ads112c14_regmap_config); if (IS_ERR(data->regmap)) return dev_err_probe(dev, PTR_ERR(data->regmap), "failed to init regmap\n"); @@ -1154,6 +1274,14 @@ static int ads112c14_probe(struct i2c_client *client) if (ret) return ret; =20 + ret =3D regmap_update_bits(data->regmap, ADS112C14_REG_DIGITAL_CFG, + ADS112C14_DIGITAL_CFG_I2C_CRC_EN, + ADS112C14_DIGITAL_CFG_I2C_CRC_EN); + if (ret) + return ret; + + data->i2c_crc_enabled =3D true; + ret =3D regmap_read(data->regmap, ADS112C14_REG_DEVICE_ID, ®_val); if (ret) return ret; @@ -1205,6 +1333,13 @@ static const struct i2c_device_id ads112c14_id[] =3D= { }; MODULE_DEVICE_TABLE(i2c, ads112c14_id); =20 +static int ads112c14_i2c_add_driver(struct i2c_driver *driver) +{ + crc8_populate_msb(ads112c14_crc8_table, ADS112C14_I2C_CRC8_POLYNOMIAL); + + return i2c_add_driver(driver); +} + static struct i2c_driver ads112c14_driver =3D { .driver =3D { .name =3D "ads112c14", @@ -1213,7 +1348,7 @@ static struct i2c_driver ads112c14_driver =3D { .probe =3D ads112c14_probe, .id_table =3D ads112c14_id, }; -module_i2c_driver(ads112c14_driver); +module_driver(ads112c14_driver, ads112c14_i2c_add_driver, i2c_del_driver); =20 MODULE_AUTHOR("David Lechner (TI) "); MODULE_DESCRIPTION("TI ADS112C14 I2C ADC driver"); --=20 2.43.0 From nobody Sat Jul 25 18:55:15 2026 Received: from mail-oa1-f49.google.com (mail-oa1-f49.google.com [209.85.160.49]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2B51223395E for ; Wed, 15 Jul 2026 00:20:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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The device has a continuous conversion mode, but that can only be used with one channel at a time since there is nothing like a sequencer to support that in hardware. Instead, we use single-shot reads like we do for direct reads to be able to read multiple channels. Support for continuous conversion mode could be added in the future if needed via a 2nd buffer. Signed-off-by: David Lechner (TI) --- drivers/iio/adc/ti-ads112c14.c | 103 +++++++++++++++++++++++++++++++++++++= ++-- 1 file changed, 99 insertions(+), 4 deletions(-) diff --git a/drivers/iio/adc/ti-ads112c14.c b/drivers/iio/adc/ti-ads112c14.c index 99ccacd6d56f..1404ca31324b 100644 --- a/drivers/iio/adc/ti-ads112c14.c +++ b/drivers/iio/adc/ti-ads112c14.c @@ -15,7 +15,10 @@ #include #include #include +#include #include +#include +#include #include #include #include @@ -29,6 +32,9 @@ #include #include =20 +/* Arbitrary limit since channels are dynamic. */ +#define ADS112C14_MAX_MEASUREMENT_CHANNELS 16 + /* Datasheet t_d(RST) - time to wait after reset before next I2C use. */ #define ADS112C14_DELAY_RESET_US 500 =20 @@ -255,6 +261,8 @@ struct ads112c14_data { u32 num_measurements; u8 sys_mon_chan_short_gain_val; int sys_mon_chan_short_scale_available[ARRAY_SIZE(ads112c14_pga_gains_x10= )][2]; + IIO_DECLARE_BUFFER_WITH_TS(__be32, scan, ADS112C14_MAX_MEASUREMENT_CHANNE= LS + + ARRAY_SIZE(ads112c14_sys_mon_channels)); }; =20 static bool ads112c14_writeable_reg(struct device *dev, unsigned int reg) @@ -575,7 +583,7 @@ static int ads112c14_prepare_sys_mon_channel(struct ads= 112c14_data *data, =20 static int ads112c14_single_conversion(struct ads112c14_data *data, const struct iio_chan_spec *chan, - u8 *buf) + u8 *buf, bool for_scan) { struct i2c_client *client =3D to_i2c_client(regmap_get_device(data->regma= p)); u32 reg_val; @@ -605,6 +613,22 @@ static int ads112c14_single_conversion(struct ads112c1= 4_data *data, if (ret) return ret; =20 + /* + * When doing buffered read, we don't check the CRC, but rather pass it + * along with the raw data. + */ + if (for_scan) { + u8 len =3D BITS_TO_BYTES(data->chip_info->resolution_bits) + + (data->i2c_crc_enabled ? 1 : 0); + + ret =3D i2c_smbus_read_i2c_block_data(client, ADS112C14_CMD_RDATA, + len, buf); + if (ret < 0) + return ret; + + return 0; + } + return ads112c14_i2c_read_bytes(client, ADS112C14_CMD_RDATA, buf, BITS_TO_BYTES(data->chip_info->resolution_bits), data->i2c_crc_enabled); @@ -639,7 +663,7 @@ static int ads112c14_read_raw(struct iio_dev *indio_dev, if (IIO_DEV_ACQUIRE_FAILED(claim)) return -EBUSY; =20 - ret =3D ads112c14_single_conversion(data, chan, buf); + ret =3D ads112c14_single_conversion(data, chan, buf, false); if (ret < 0) return ret; =20 @@ -765,6 +789,10 @@ static int ads112c14_write_raw(struct iio_dev *indio_d= ev, const int (*scale_avail)[2]; u8 *gain_val; =20 + IIO_DEV_ACQUIRE_DIRECT_MODE(indio_dev, claim); + if (IIO_DEV_ACQUIRE_FAILED(claim)) + return -EBUSY; + switch (mask) { case IIO_CHAN_INFO_SCALE: { guard(mutex)(&data->lock); @@ -863,6 +891,37 @@ static int ads112c14_read_label(struct iio_dev *indio_= dev, return sysfs_emit(label, "%s\n", label_source); } =20 +static irqreturn_t ads112c14_trigger_handler(int irq, void *private) +{ + struct iio_poll_func *pf =3D private; + struct iio_dev *indio_dev =3D pf->indio_dev; + struct ads112c14_data *data =3D iio_priv(indio_dev); + u32 offset =3D 0; + u32 i; + int ret; + + iio_for_each_active_channel(indio_dev, i) { + const struct iio_chan_spec *chan =3D &indio_dev->channels[i]; + + ret =3D ads112c14_single_conversion(data, chan, + (u8 *)&data->scan[offset++], + true); + if (ret) { + dev_err_once(indio_dev->dev.parent, + "failed to read channel %d: %pe; additional errors will be suppre= ssed\n", + chan->channel, ERR_PTR(ret)); + goto out; + } + } + + iio_push_to_buffers_with_ts(indio_dev, data->scan, + sizeof(data->scan), pf->timestamp); +out: + iio_trigger_notify_done(indio_dev->trig); + + return IRQ_HANDLED; +} + static const struct iio_info ads112c14_info =3D { .read_raw =3D ads112c14_read_raw, .read_avail =3D ads112c14_read_avail, @@ -908,7 +967,7 @@ static int ads112c14_parse_channels(struct iio_dev *ind= io_dev, return -ENOMEM; =20 channels =3D devm_kcalloc(dev, num_child_nodes + - ARRAY_SIZE(ads112c14_sys_mon_channels), + ARRAY_SIZE(ads112c14_sys_mon_channels) + 1, sizeof(*channels), GFP_KERNEL); if (!channels) return -ENOMEM; @@ -1069,14 +1128,44 @@ static int ads112c14_parse_channels(struct iio_dev = *indio_dev, if (spec->type =3D=3D IIO_RESISTANCE) spec->differential =3D 0; =20 + spec->scan_type =3D (struct iio_scan_type){ + .format =3D measurement->bipolar ? + IIO_SCAN_FORMAT_SIGNED_INT : + IIO_SCAN_FORMAT_UNSIGNED_INT, + .realbits =3D data->chip_info->resolution_bits, + .storagebits =3D 32, + .shift =3D 32 - data->chip_info->resolution_bits, + .endianness =3D IIO_BE, + }; + i++; } =20 data->num_measurements =3D i; + if (data->num_measurements >=3D ADS112C14_MAX_MEASUREMENT_CHANNELS) + return dev_err_probe(dev, -EINVAL, + "too many measurement channels defined\n"); + memcpy(channels + i, ads112c14_sys_mon_channels, sizeof(ads112c14_sys_mon= _channels)); =20 + for (u32 j =3D 0; j < ARRAY_SIZE(ads112c14_sys_mon_channels); j++) { + struct iio_chan_spec *spec =3D &channels[i + j]; + + spec->scan_index =3D i + j; + spec->scan_type =3D (struct iio_scan_type){ + .format =3D IIO_SCAN_FORMAT_SIGNED_INT, + .realbits =3D data->chip_info->resolution_bits, + .storagebits =3D 32, + .shift =3D 32 - data->chip_info->resolution_bits, + .endianness =3D IIO_BE, + }; + } + indio_dev->channels =3D channels; - indio_dev->num_channels =3D i + ARRAY_SIZE(ads112c14_sys_mon_channels); + indio_dev->num_channels =3D i + ARRAY_SIZE(ads112c14_sys_mon_channels) + = 1; + + i =3D indio_dev->num_channels - 1; + channels[i] =3D IIO_CHAN_SOFT_TIMESTAMP(i); =20 return 0; } @@ -1304,6 +1393,12 @@ static int ads112c14_probe(struct i2c_client *client) indio_dev->modes =3D INDIO_DIRECT_MODE; indio_dev->info =3D &ads112c14_info; =20 + ret =3D devm_iio_triggered_buffer_setup(dev, indio_dev, + iio_pollfunc_store_time, + ads112c14_trigger_handler, NULL); + if (ret) + return ret; + return devm_iio_device_register(dev, indio_dev); } =20 --=20 2.43.0