From nobody Sat Jul 25 19:38:57 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0C9E636F917; Tue, 14 Jul 2026 10:28:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784024927; cv=none; b=o2m1pBfwzCsdoynbw9YSr7M/zfEhairaM6dhufn8h+y5axJvk0PXfl9IL6A20ORPDkgWlkXcAi6FWfaY6+vnRni0FMQPUQA9H11Vf0Vldao8Q+Bc2TkxujOFvV0O6KKI7FHYVorjhJn5/Me2cABUDswb3ZrYMTbvG5s3Wyz+Po4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784024927; c=relaxed/simple; bh=iYf+yTaMENGjFsDxnE24W2KARirES+DFL3au5+1XiJQ=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Y5OhNWTBc4MUaTdQjfgajef4m5GnY5dqR/5nmggj65IcgQr3LuTCL15SjxIIBUWc90Wdu3XaxfYFLK3jAjsIXzfT6vWrbbBjrEY74fjn8vWUMHAoQxeLSalo3i4A6mjXWWtEE2NtgK6WOrKCnRYavIa/D4/6nFZFO0VhEcJLam8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=ZIUHCgSz; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="ZIUHCgSz" Received: by smtp.kernel.org (Postfix) with ESMTPS id A820BC2BCB9; Tue, 14 Jul 2026 10:28:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1784024926; bh=iYf+yTaMENGjFsDxnE24W2KARirES+DFL3au5+1XiJQ=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=ZIUHCgSzj39tkxHLYUQ4MebnOJLrT/lHqKRaXjRSIlfqNLSAO2tb4Qa1et0dLp/Rq 4YiLIVy4W9GWcZjLjCtdflNZQv02J7+T4a4WTGKzhUiLgaqmigxUvWChdjUrmwNl8/ m46IDreE217aN9H6WveMlX56oVlgf8HlB4VcA02ubhcOQqzUzQMBoh13zsZMhxTaNu wNdEovr1mVgbkRDZ5rA7/LE0J1Pz7wXAnmiEOMCrYacNCho2ydQfEgxfpeBcVvPllg CFKOJY/29CDjcHFTYhC3iAOimq15pGeeFS14iwOSEOz/gJpNWv3jnjuDl84rAR6ktu wKpO4P5HeX/wQ== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 96FA1C43458; Tue, 14 Jul 2026 10:28:46 +0000 (UTC) From: Haoning CHENG via B4 Relay Date: Tue, 14 Jul 2026 18:28:41 +0800 Subject: [PATCH v8 1/3] dt-bindings: thermal: imx: Document calibration offset property Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260714-b4-symana21-11221-imx-thermal-support-upstream-6-18-v8-1-d54d8690e16e@cn.bosch.com> References: <20260714-b4-symana21-11221-imx-thermal-support-upstream-6-18-v8-0-d54d8690e16e@cn.bosch.com> In-Reply-To: <20260714-b4-symana21-11221-imx-thermal-support-upstream-6-18-v8-0-d54d8690e16e@cn.bosch.com> To: "Rafael J. Wysocki" , Daniel Lezcano , Zhang Rui , Lukasz Luba , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam Cc: linux-pm@vger.kernel.org, devicetree@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Haoning CHENG , Krzysztof Kozlowski X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1784024921; l=1880; i=Haoning.CHENG@cn.bosch.com; s=20260709; h=from:subject:message-id; bh=nULSe7w+6eN/dShLGlTXQ9Ef2waMpR9fIpFXwVCcgbM=; b=XW7laTS3jmFBvwYfw0Vi5xaGOgzpQbSuw20YTRxO7gi2LtZWLpki5zAtjZv6X8rBwGZIWoPyM H5/WxyIgczRDrr6mD4hFI/X/Tc1YQnHyQXG44rfb3mfHFaj7mMDYhZB X-Developer-Key: i=Haoning.CHENG@cn.bosch.com; a=ed25519; pk=glQGwad/fosRS5gZUJYbLDPPLGe7rFTrTV2VxY/ySdc= X-Endpoint-Received: by B4 Relay for Haoning.CHENG@cn.bosch.com/20260709 with auth_id=860 X-Original-From: Haoning CHENG Reply-To: Haoning.CHENG@cn.bosch.com From: Haoning CHENG Some boards need a small per-design correction to align the reported CPU temperature with board-level measurements. Document the optional fsl,temp-calibration-offset-millicelsius property, a signed offset in millicelsius that is added to the calculated sensor temperature. The property is optional and the existing behavior is kept when it is omitted. Update the binding example to show its usage. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Haoning CHENG Reviewed-by: Lukasz Luba --- Documentation/devicetree/bindings/thermal/imx-thermal.yaml | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/Documentation/devicetree/bindings/thermal/imx-thermal.yaml b/D= ocumentation/devicetree/bindings/thermal/imx-thermal.yaml index 949b154856c5..44365aac8115 100644 --- a/Documentation/devicetree/bindings/thermal/imx-thermal.yaml +++ b/Documentation/devicetree/bindings/thermal/imx-thermal.yaml @@ -59,6 +59,16 @@ properties: clocks: maxItems: 1 =20 + fsl,temp-calibration-offset-millicelsius: + minimum: -20000 + maximum: 20000 + description: + A signed calibration offset, in millicelsius, added to the calculated + sensor temperature to compensate for board-level measurement + differences. The range is limited to =C2=B120 =C2=B0C because a temp= erature + sensor with such a high deviation would be unusable. When absent, + no offset is applied. + "#thermal-sensor-cells": const: 0 =20 @@ -109,6 +119,7 @@ examples: nvmem-cells =3D <&tempmon_calib>, <&tempmon_temp_grade>; nvmem-cell-names =3D "calib", "temp_grade"; clocks =3D <&clks IMX6SX_CLK_PLL3_USB_OTG>; + fsl,temp-calibration-offset-millicelsius =3D <(-6400)>; #thermal-sensor-cells =3D <0>; }; }; --=20 2.43.0 From nobody Sat Jul 25 19:38:57 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0CA6B370ADA; Tue, 14 Jul 2026 10:28:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784024927; cv=none; b=oCu0EP52uCsMS/8mw4hfRFH+rHCd9ohZSKZqUeuK+0baNoUCC0lbCLmZJlZ80jxKSRStkdq+QOKoj9pZYznS0wkMmRhGvhxvuxD+28plEZC/FRCGGWrdqDZ6X83V9nGt6d7NEALAC0FhSVT+Bk3uUbAXVj7mRJddi2CTKnh5i6o= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784024927; c=relaxed/simple; bh=LTBMkiOmw98UTxWEbpAQ9H5QlhAKTpgEXEjclnTOmAE=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=jdtWgwVJxGU/qnYLMx+D+vaeslbS66hGvutATk8bO9p/USYq+sueLj2abLhvD4QIMJpjPPncTTgO+edh3hEFzGhhfLLnyP5Iue3845OfXEY7R/W9uFiq7+d/GLOAqHS9053SlCUntGseyihXf4a/MWlXJjiOaW6wHvXYbrYieYU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=gHr3YTi8; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="gHr3YTi8" Received: by smtp.kernel.org (Postfix) with ESMTPS id BA166C2BCF6; Tue, 14 Jul 2026 10:28:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1784024926; bh=LTBMkiOmw98UTxWEbpAQ9H5QlhAKTpgEXEjclnTOmAE=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=gHr3YTi8pKSiWEpP/wdKvUSQTH0i2dzJvyxIFBCvT58XPSFYabymZ0G07KdkDbDa4 qSupei/lgH8Dcz2caJOalvi3ITWOl/0U/EwN/A1lD1W/lgFVUeqqW7QxlnanzX9O1q 9oULsevwSyVNgOMncHN+rfCJJlQMmExjPVLqVN435ML9YH+W4DjISzep3SF4qXm7sA i8qpIfMtFxSqnwFvgtVIKDiaJPivCRAXdHXIqvJpKMNldTMzoMilunvcLNq1dXIrB8 WT6b3+0VpQJkwWL24vyjqsFvPlN8PmSmm3eyF7qo8KqDEKqyLAtsUxUWW4WB2aX7EA 1LXXLFfis6qtg== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id A7E89C44508; Tue, 14 Jul 2026 10:28:46 +0000 (UTC) From: Haoning CHENG via B4 Relay Date: Tue, 14 Jul 2026 18:28:42 +0800 Subject: [PATCH v8 2/3] thermal/drivers/imx: Fix rounding and clamp for i.MX7D alarm Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260714-b4-symana21-11221-imx-thermal-support-upstream-6-18-v8-2-d54d8690e16e@cn.bosch.com> References: <20260714-b4-symana21-11221-imx-thermal-support-upstream-6-18-v8-0-d54d8690e16e@cn.bosch.com> In-Reply-To: <20260714-b4-symana21-11221-imx-thermal-support-upstream-6-18-v8-0-d54d8690e16e@cn.bosch.com> To: "Rafael J. Wysocki" , Daniel Lezcano , Zhang Rui , Lukasz Luba , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam Cc: linux-pm@vger.kernel.org, devicetree@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Haoning CHENG X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1784024921; l=1614; i=Haoning.CHENG@cn.bosch.com; s=20260709; h=from:subject:message-id; bh=1JBV0u3QEY1X06yF+bBAxZo8ixtbx4eg4tQIOMJHWHs=; b=LslAkJd+wyxZebCbOnxK6QkqPn42J1gBAC0+EEqd81HxjetCdZIuFcuu9dcZflFdJgFrONEix D0jBwdItWe3AExsdqpDQrGB5K5kdWq6HGSMGBbC1D+V0wco9qbQ3O3z X-Developer-Key: i=Haoning.CHENG@cn.bosch.com; a=ed25519; pk=glQGwad/fosRS5gZUJYbLDPPLGe7rFTrTV2VxY/ySdc= X-Endpoint-Received: by B4 Relay for Haoning.CHENG@cn.bosch.com/20260709 with auth_id=860 X-Original-From: Haoning CHENG Reply-To: Haoning.CHENG@cn.bosch.com From: Haoning CHENG Convert the alarm temperature from millicelsius to degrees for i.MX7D using ceiling division instead of integer division, ensuring rounding errors do not cause the alarm to trigger below the intended threshold. Use DIV_ROUND_UP() for non-negative values and plain integer division for negative values, since C rounds toward zero which is equivalent to ceiling when the divisor is positive. Add clamp() to ensure the hardware register value stays within the 9-bit range (0..0x1ff) of the i.MX7D alarm field, preventing silent truncation if an out-of-range value is written. Signed-off-by: Haoning CHENG Reviewed-by: Frank Li Reviewed-by: Lukasz Luba --- drivers/thermal/imx_thermal.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/drivers/thermal/imx_thermal.c b/drivers/thermal/imx_thermal.c index 38c993d1bcb3..7f7d1116b9d6 100644 --- a/drivers/thermal/imx_thermal.c +++ b/drivers/thermal/imx_thermal.c @@ -240,10 +240,16 @@ static void imx_set_alarm_temp(struct imx_thermal_dat= a *data, =20 data->alarm_temp =3D alarm_temp; =20 - if (data->socdata->version =3D=3D TEMPMON_IMX7D) - alarm_value =3D alarm_temp / 1000 + data->c1 - 25; - else + if (data->socdata->version =3D=3D TEMPMON_IMX7D) { + if (alarm_temp >=3D 0) + alarm_temp =3D DIV_ROUND_UP(alarm_temp, 1000); + else + alarm_temp /=3D 1000; + alarm_value =3D alarm_temp + data->c1 - 25; + alarm_value =3D clamp(alarm_value, 0, 0x1ff); + } else { alarm_value =3D (data->c2 - alarm_temp) / data->c1; + } =20 regmap_write(map, soc_data->high_alarm_ctrl + REG_CLR, soc_data->high_alarm_mask); --=20 2.43.0 From nobody Sat Jul 25 19:38:57 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4490F372EE2; Tue, 14 Jul 2026 10:28:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784024927; cv=none; b=trWudTvmqdakjiOi0TRsO3qjW4+qxJwHof5xwoNZMYOAxv7bz4hFkDtJfYzUrGoZ/LO+CSQ4xniypqcJD+L+YdzJu+W/cAeLSFiHSubvDxu/ldTCZ5wRzDkNMymVV6DXOpqnTsbiK5RBsc6xeCILemFignpeYk+9WUyI/F83fGw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784024927; c=relaxed/simple; bh=iVgLZlJQ+vMNolXxqzGao5tv1EtYdzquxCIotgcJLJc=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=O0FqnZuDbDupI4OzDlANydpdfnqNqh5MdDa8Njm93/v4TrR5eQp1oO4aviYiQu6kLO1mBs9PxnsS/80Xey/yvfTXGjmT/eQ5lCSjcM3BJSJU0in4ZOZg0Qp/VYIvy3EOUJfLSF5gzHuWMLOT78hSKG669bt2zbkAkt8fi8L334k= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=t35gmi7u; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="t35gmi7u" Received: by smtp.kernel.org (Postfix) with ESMTPS id CAD5EC2BD00; Tue, 14 Jul 2026 10:28:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1784024926; bh=iVgLZlJQ+vMNolXxqzGao5tv1EtYdzquxCIotgcJLJc=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=t35gmi7uKtBrLA+I1udsLGXZpkRUxo7suahFfAGRqAJA8sLMFqJgUtkJ2egOTVi7i 0DVjTwK2cGvlxNYpRGn6+XlMLl/6z3NVE2gyTj8UIq6ZIqPK+WUuSnN78TMOcisYOA e2lUyvyRE5GLSuMPiM5RIu+BpflpdRGFAoWXDew75QYuAaCzJdmeeArc0HQEX+M6ID LAc/tQKmQXNt0NGdEa1VgBpFAR8aREJts7gHgobU7q94BrE3Sn68x17E+A8NFn3EJL wXmXM3Ak1t2aRw3kk5z9W/Sx1GCtzQpWlg+1bg2RDLFDJa7YTgPrZIj1YuJctpF9F/ Oxr5e6ku5TPUA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id B8759C44507; Tue, 14 Jul 2026 10:28:46 +0000 (UTC) From: Haoning CHENG via B4 Relay Date: Tue, 14 Jul 2026 18:28:43 +0800 Subject: [PATCH v8 3/3] thermal/drivers/imx: Add calibration offset support Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260714-b4-symana21-11221-imx-thermal-support-upstream-6-18-v8-3-d54d8690e16e@cn.bosch.com> References: <20260714-b4-symana21-11221-imx-thermal-support-upstream-6-18-v8-0-d54d8690e16e@cn.bosch.com> In-Reply-To: <20260714-b4-symana21-11221-imx-thermal-support-upstream-6-18-v8-0-d54d8690e16e@cn.bosch.com> To: "Rafael J. Wysocki" , Daniel Lezcano , Zhang Rui , Lukasz Luba , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam Cc: linux-pm@vger.kernel.org, devicetree@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Haoning CHENG X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1784024921; l=4200; i=Haoning.CHENG@cn.bosch.com; s=20260709; h=from:subject:message-id; bh=fVZ8/nh0Wo4y9uiBm2vp04dsfqXgZZNI2dShzcEryTw=; b=/WnMq2zuNxvlbasuk2ft8ic81S5ZQT/nP29GZ+kVVgzJyYNVKsh42yxesFUiCuu0l94a4R6EH jNpzUSgxAk+AinG6HBgTnVpMp+wV9sQvEhQDlQAGyMwUq6U5P8ZiuYB X-Developer-Key: i=Haoning.CHENG@cn.bosch.com; a=ed25519; pk=glQGwad/fosRS5gZUJYbLDPPLGe7rFTrTV2VxY/ySdc= X-Endpoint-Received: by B4 Relay for Haoning.CHENG@cn.bosch.com/20260709 with auth_id=860 X-Original-From: Haoning CHENG Reply-To: Haoning.CHENG@cn.bosch.com From: Haoning CHENG Some boards need a small per-design correction to align the reported CPU temperature with board-level measurements. Read the optional fsl,temp-calibration-offset-millicelsius property from DT and apply it uniformly to the i.MX6/6SX/7D calibration formulas. The offset is applied symmetrically at two points to ensure the thermal framework sees calibrated temperatures while hardware thresholds remain correctly positioned: 1. In imx_set_alarm_temp() and imx_set_panic_temp(): the temperature threshold is *subtracted* by the offset before being converted to a hardware register value. This shifts the hardware IRQ trigger to the physical temperature that corresponds to the intended threshold. 2. In imx_get_temp(): after computing physical temperature from the hardware register, the offset is *added* back. The thermal framework always sees the calibrated temperature. For example, if DT sets offset =3D +3000 m=C2=B0C (board reads 3=C2=B0C too= low) and the passive trip is 95=C2=B0C: imx_set_alarm_temp(95000): alarm_temp =3D 95000 - 3000 =3D 92000 =E2=86=92 hardware register programmed for 92=C2=B0C physical Hardware IRQ fires at 92=C2=B0C physical imx_get_temp(): reads hardware, computes 92=C2=B0C physical *temp =3D 92000 + 3000 =3D 95000 =E2=86=92 thermal framework sees 95=C2=B0C =E2=86=92 correct trip When the property is not present, the offset defaults to 0, preserving the current behavior. Signed-off-by: Haoning CHENG Reviewed-by: Frank Li Reviewed-by: Lukasz Luba --- drivers/thermal/imx_thermal.c | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/drivers/thermal/imx_thermal.c b/drivers/thermal/imx_thermal.c index 7f7d1116b9d6..d471acc16bce 100644 --- a/drivers/thermal/imx_thermal.c +++ b/drivers/thermal/imx_thermal.c @@ -85,6 +85,10 @@ enum imx_thermal_trip { #define TEMPMON_IMX6SX 2 #define TEMPMON_IMX7D 3 =20 +/* Calibration offset limits (=C2=B120 =C2=B0C in millicelsius) */ +#define IMX_TEMP_CALIB_OFFSET_MIN (-20000) +#define IMX_TEMP_CALIB_OFFSET_MAX 20000 + struct thermal_soc_data { u32 version; =20 @@ -207,6 +211,7 @@ struct imx_thermal_data { struct regmap *tempmon; u32 c1, c2; /* See formula in imx_init_calib() */ int temp_max; + s32 calibration_offset; int alarm_temp; int last_temp; bool irq_enabled; @@ -223,6 +228,7 @@ static void imx_set_panic_temp(struct imx_thermal_data = *data, struct regmap *map =3D data->tempmon; int critical_value; =20 + panic_temp -=3D data->calibration_offset; critical_value =3D (data->c2 - panic_temp) / data->c1; =20 regmap_write(map, soc_data->panic_alarm_ctrl + REG_CLR, @@ -239,6 +245,7 @@ static void imx_set_alarm_temp(struct imx_thermal_data = *data, int alarm_value; =20 data->alarm_temp =3D alarm_temp; + alarm_temp -=3D data->calibration_offset; =20 if (data->socdata->version =3D=3D TEMPMON_IMX7D) { if (alarm_temp >=3D 0) @@ -283,6 +290,7 @@ static int imx_get_temp(struct thermal_zone_device *tz,= int *temp) *temp =3D (n_meas - data->c1 + 25) * 1000; else *temp =3D data->c2 - n_meas * data->c1; + *temp +=3D data->calibration_offset; =20 /* Update alarm value to next higher trip point for TEMPMON_IMX6Q */ if (data->socdata->version =3D=3D TEMPMON_IMX6Q) { @@ -635,6 +643,25 @@ static int imx_thermal_probe(struct platform_device *p= dev) =20 platform_set_drvdata(pdev, data); =20 + if (of_property_present(dev->of_node, + "fsl,temp-calibration-offset-millicelsius")) { + ret =3D of_property_read_s32(dev->of_node, + "fsl,temp-calibration-offset-millicelsius", + &data->calibration_offset); + if (ret) + return dev_err_probe(dev, ret, + "failed to read calibration offset\n"); + + if (data->calibration_offset < IMX_TEMP_CALIB_OFFSET_MIN || + data->calibration_offset > IMX_TEMP_CALIB_OFFSET_MAX) + return dev_err_probe(dev, -EINVAL, + "calibration offset %d millicelsius out of range\n", + data->calibration_offset); + + dev_dbg(dev, "calibration offset: %d millicelsius\n", + data->calibration_offset); + } + if (of_property_present(dev->of_node, "nvmem-cells")) { ret =3D imx_init_from_nvmem_cells(pdev); if (ret) --=20 2.43.0