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Most of them were comments but some of them were variable declarations with unusual indents having mixed space/tab alignments. Signed-off-by: Yash Pratap Kulshrestha --- .../staging/rtl8723bs/hal/HalPhyRf_8723B.c | 116 +++++++++--------- 1 file changed, 58 insertions(+), 58 deletions(-) diff --git a/drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c b/drivers/stagi= ng/rtl8723bs/hal/HalPhyRf_8723B.c index 70b68f473d58..ebebc202971c 100644 --- a/drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c +++ b/drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c @@ -354,14 +354,14 @@ static u8 phy_PathA_IQK_8723B( /* leave IQK mode */ PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000); =20 - /* enable path A PA in TXIQK mode */ + /* enable path A PA in TXIQK mode */ PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_WE_LUT, 0x80000, 0x1); PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x= 18000); PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0= x0003f); PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0= xc7f87); - /* disable path B PA in TXIQK mode */ -/* PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, 0xed, bRFRegOffsetMask, 0x00= 020); */ -/* PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, 0x43, bRFRegOffsetMask, 0x40= ec1); */ + /* disable path B PA in TXIQK mode */ +/* PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, 0xed, bRFRegOffsetMask, 0x000= 20); */ +/* PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, 0x43, bRFRegOffsetMask, 0x40e= c1); */ =20 /* 1 Tx IQK */ /* IQK setting */ @@ -372,7 +372,7 @@ static u8 phy_PathA_IQK_8723B( PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_Tone_A, bMaskDWord, 0x38008c1c); PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_Tone_B, bMaskDWord, 0x38008c1c); PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_Tone_B, bMaskDWord, 0x38008c1c); -/* PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_PI_A, bMaskDWord, 0x8214010a); = */ +/* PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_PI_A, bMaskDWord, 0x8214010a); */ PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_PI_A, bMaskDWord, 0x821303ea); PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_PI_A, bMaskDWord, 0x28110000); PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_PI_B, bMaskDWord, 0x82110000); @@ -458,7 +458,7 @@ static u8 phy_PathA_RxIQK8723B( PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0= x0001f); /* LNA2 off, PA on for Dcut */ PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0= xf7fb7); -/* PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_WE_LUT, 0x80000, 0x0); */ +/* PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_WE_LUT, 0x80000, 0x0); */ PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x808000); =20 /* IQK setting */ @@ -471,7 +471,7 @@ static u8 phy_PathA_RxIQK8723B( PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_Tone_B, bMaskDWord, 0x38008c1c); PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_Tone_B, bMaskDWord, 0x38008c1c); =20 -/* PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_PI_A, bMaskDWord, 0x82160c1f); = */ +/* PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_PI_A, bMaskDWord, 0x82160c1f); */ PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_PI_A, bMaskDWord, 0x82130ff0); PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_PI_A, bMaskDWord, 0x28110000); PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_PI_B, bMaskDWord, 0x82110000); @@ -542,7 +542,7 @@ static u8 phy_PathA_RxIQK8723B( PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0= x0001f); /* LAN2 on, PA off for Dcut */ PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0= xf7d77); -/* PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_WE_LUT, 0x80000, 0x0); */ +/* PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_WE_LUT, 0x80000, 0x0); */ =20 /* PA, PAD setting */ PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, 0xdf, bRFRegOffsetMask, 0xf80); @@ -558,7 +558,7 @@ static u8 phy_PathA_RxIQK8723B( PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_Tone_B, bMaskDWord, 0x38008c1c); =20 PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_PI_A, bMaskDWord, 0x82110000); -/* PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_PI_A, bMaskDWord, 0x281604c2); = */ +/* PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_PI_A, bMaskDWord, 0x281604c2); */ PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_PI_A, bMaskDWord, 0x2813001f); PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_PI_B, bMaskDWord, 0x82110000); PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_PI_B, bMaskDWord, 0x28110000); @@ -600,7 +600,7 @@ static u8 phy_PathA_RxIQK8723B( regEAC =3D PHY_QueryBBReg(pDM_Odm->Adapter, rRx_Power_After_IQK_A_2, bMas= kDWord); regEA4 =3D PHY_QueryBBReg(pDM_Odm->Adapter, rRx_Power_Before_IQK_A_2, bMa= skDWord); =20 - /* PA/PAD controlled by 0x0 */ + /* PA/PAD controlled by 0x0 */ /* leave IQK mode */ PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000); PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, 0xdf, bRFRegOffsetMask, 0x780); @@ -637,12 +637,12 @@ static u8 phy_PathB_IQK_8723B(struct adapter *padapte= r) /* leave IQK mode */ PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000); =20 - /* in TXIQK mode */ -/* PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_WE_LUT, 0x80000, 0x1); */ -/* PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask,= 0x20000); */ -/* PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask= , 0x0003f); */ -/* PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask= , 0xc7f87); */ - /* enable path B PA in TXIQK mode */ + /* in TXIQK mode */ +/* PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_WE_LUT, 0x80000, 0x1); */ +/* PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, = 0x20000); */ +/* PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask,= 0x0003f); */ +/* PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask,= 0xc7f87); */ + /* enable path B PA in TXIQK mode */ PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, 0xed, 0x20, 0x1); PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, 0x43, bRFRegOffsetMask, 0x30fc1= ); =20 @@ -656,7 +656,7 @@ static u8 phy_PathB_IQK_8723B(struct adapter *padapter) PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_Tone_B, bMaskDWord, 0x38008c1c); PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_Tone_B, bMaskDWord, 0x38008c1c); =20 -/* PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_PI_A, bMaskDWord, 0x82140114); = */ +/* PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_PI_A, bMaskDWord, 0x82140114); */ PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_PI_A, bMaskDWord, 0x821303ea); PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_PI_A, bMaskDWord, 0x28110000); PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_PI_B, bMaskDWord, 0x82110000); @@ -670,7 +670,7 @@ static u8 phy_PathB_IQK_8723B(struct adapter *padapter) =20 /* switch to path B */ PHY_SetBBReg(pDM_Odm->Adapter, 0x948, bMaskDWord, 0x00000280); -/* PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, 0xb0, bRFRegOffsetMask, 0xef= fe0); */ +/* PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, 0xb0, bRFRegOffsetMask, 0xeff= e0); */ =20 /* GNT_BT =3D 0 */ PHY_SetBBReg(pDM_Odm->Adapter, 0x764, bMaskDWord, 0x00000800); @@ -748,7 +748,7 @@ static u8 phy_PathB_RxIQK8723B(struct adapter *padapter= , bool configPathB) PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_Tone_B, bMaskDWord, 0x38008c1c); PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_Tone_B, bMaskDWord, 0x38008c1c); =20 -/* PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_PI_A, bMaskDWord, 0x82160c1f); = */ +/* PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_PI_A, bMaskDWord, 0x82160c1f); */ PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_PI_A, bMaskDWord, 0x82130ff0); PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_PI_A, bMaskDWord, 0x28110000); PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_PI_B, bMaskDWord, 0x82110000); @@ -762,7 +762,7 @@ static u8 phy_PathB_RxIQK8723B(struct adapter *padapter= , bool configPathB) =20 /* switch to path B */ PHY_SetBBReg(pDM_Odm->Adapter, 0x948, bMaskDWord, 0x00000280); -/* PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, 0xb0, bRFRegOffsetMask, 0xef= fe0); */ +/* PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, 0xb0, bRFRegOffsetMask, 0xeff= e0); */ =20 /* GNT_BT =3D 0 */ PHY_SetBBReg(pDM_Odm->Adapter, 0x764, bMaskDWord, 0x00000800); @@ -815,15 +815,15 @@ static u8 phy_PathB_RxIQK8723B(struct adapter *padapt= er, bool configPathB) PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x= 18000); PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0= x0001f); PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0= xf7d77); -/* PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_WE_LUT, 0x80000, 0x0); */ +/* PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_WE_LUT, 0x80000, 0x0); */ =20 /* open PA S1 & close SMIXER */ PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, 0xed, 0x20, 0x1); PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, 0x43, bRFRegOffsetMask, 0x30ebd= ); =20 /* PA, PAD setting */ -/* PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, 0xdf, bRFRegOffsetMask, 0xf8= 0); */ -/* PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, 0x56, bRFRegOffsetMask, 0x51= 000); */ +/* PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, 0xdf, bRFRegOffsetMask, 0xf80= ); */ +/* PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, 0x56, bRFRegOffsetMask, 0x510= 00); */ =20 /* IQK setting */ PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK, bMaskDWord, 0x01004800); @@ -835,7 +835,7 @@ static u8 phy_PathB_RxIQK8723B(struct adapter *padapter= , bool configPathB) PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_Tone_B, bMaskDWord, 0x38008c1c); =20 PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_PI_A, bMaskDWord, 0x82110000); -/* PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_PI_A, bMaskDWord, 0x281604c2); = */ +/* PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_PI_A, bMaskDWord, 0x281604c2); */ PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_PI_A, bMaskDWord, 0x2813001f); PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_PI_B, bMaskDWord, 0x82110000); PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_PI_B, bMaskDWord, 0x28110000); @@ -848,7 +848,7 @@ static u8 phy_PathB_RxIQK8723B(struct adapter *padapter= , bool configPathB) =20 /* switch to path B */ PHY_SetBBReg(pDM_Odm->Adapter, 0x948, bMaskDWord, 0x00000280); -/* PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, 0xb0, bRFRegOffsetMask, 0xef= fe0); */ +/* PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, 0xb0, bRFRegOffsetMask, 0xeff= e0); */ =20 /* GNT_BT =3D 0 */ PHY_SetBBReg(pDM_Odm->Adapter, 0x764, bMaskDWord, 0x00000800); @@ -873,10 +873,10 @@ static u8 phy_PathB_RxIQK8723B(struct adapter *padapt= er, bool configPathB) regEAC =3D PHY_QueryBBReg(pDM_Odm->Adapter, rRx_Power_After_IQK_A_2, bMas= kDWord); regEA4 =3D PHY_QueryBBReg(pDM_Odm->Adapter, rRx_Power_Before_IQK_A_2, bMa= skDWord); =20 - /* PA/PAD controlled by 0x0 */ + /* PA/PAD controlled by 0x0 */ /* leave IQK mode */ -/* PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, 0xffffff00, 0x00000000); */ -/* PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_B, 0xdf, bRFRegOffsetMask, 0x18= 0); */ +/* PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, 0xffffff00, 0x00000000); */ +/* PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_B, 0xdf, bRFRegOffsetMask, 0x180= ); */ =20 /* Allen 20131125 */ tmp =3D (regEAC & 0x03FF0000)>>16; @@ -948,7 +948,7 @@ static void _PHY_PathAFillIQKMatrix8723B( pRFCalibrateInfo->RxIQC_8723B[PATH_S1][IDX_0xCA0][KEY] =3D rOFDM0_RxIQE= xtAnta; pRFCalibrateInfo->RxIQC_8723B[PATH_S1][IDX_0xCA0][VAL] =3D 0xfffffff & = PHY_QueryBBReg(pDM_Odm->Adapter, rOFDM0_RxIQExtAnta, bMaskDWord); pRFCalibrateInfo->RxIQC_8723B[PATH_S1][IDX_0xC14][KEY] =3D rOFDM0_XARxI= QImbalance; -/* pRFCalibrateInfo->RxIQC_8723B[PATH_S1][IDX_0xC14][VAL] =3D PHY_Query= BBReg(pDM_Odm->Adapter, rOFDM0_XARxIQImbalance, bMaskDWord); */ +/* pRFCalibrateInfo->RxIQC_8723B[PATH_S1][IDX_0xC14][VAL] =3D PHY_QueryBBR= eg(pDM_Odm->Adapter, rOFDM0_XARxIQImbalance, bMaskDWord); */ pRFCalibrateInfo->RxIQC_8723B[PATH_S1][IDX_0xC14][VAL] =3D 0x40000100; return; } @@ -1008,8 +1008,8 @@ static void _PHY_PathBFillIQKMatrix8723B( =20 /* 2 Tx IQC */ PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XDTxAFE, 0xF0000000, ((TX1_C&0x3C0= )>>6)); -/* pRFCalibrateInfo->TxIQC_8723B[PATH_S0][IDX_0xC9C][KEY] =3D rOFDM0_XDT= xAFE; */ -/* pRFCalibrateInfo->TxIQC_8723B[PATH_S0][IDX_0xC9C][VAL] =3D PHY_QueryB= BReg(pDM_Odm->Adapter, rOFDM0_XDTxAFE, bMaskDWord); */ +/* pRFCalibrateInfo->TxIQC_8723B[PATH_S0][IDX_0xC9C][KEY] =3D rOFDM0_XDTxA= FE; */ +/* pRFCalibrateInfo->TxIQC_8723B[PATH_S0][IDX_0xC9C][VAL] =3D PHY_QueryBBR= eg(pDM_Odm->Adapter, rOFDM0_XDTxAFE, bMaskDWord); */ pRFCalibrateInfo->TxIQC_8723B[PATH_S0][IDX_0xC94][KEY] =3D rOFDM0_XCTxAF= E; pRFCalibrateInfo->TxIQC_8723B[PATH_S0][IDX_0xC94][VAL] =3D PHY_QueryBBRe= g(pDM_Odm->Adapter, rOFDM0_XDTxAFE, bMaskDWord); =20 @@ -1023,7 +1023,7 @@ static void _PHY_PathBFillIQKMatrix8723B( =20 if (bTxOnly) { pRFCalibrateInfo->RxIQC_8723B[PATH_S0][IDX_0xC14][KEY] =3D rOFDM0_XARxI= QImbalance; -/* pRFCalibrateInfo->RxIQC_8723B[PATH_S0][IDX_0xC14][VAL] =3D PHY_Query= BBReg(pDM_Odm->Adapter, rOFDM0_XARxIQImbalance, bMaskDWord); */ +/* pRFCalibrateInfo->RxIQC_8723B[PATH_S0][IDX_0xC14][VAL] =3D PHY_QueryBBR= eg(pDM_Odm->Adapter, rOFDM0_XARxIQImbalance, bMaskDWord); */ pRFCalibrateInfo->RxIQC_8723B[PATH_S0][IDX_0xC14][VAL] =3D 0x40000100; pRFCalibrateInfo->RxIQC_8723B[PATH_S0][IDX_0xCA0][KEY] =3D rOFDM0_RxIQE= xtAnta; pRFCalibrateInfo->RxIQC_8723B[PATH_S0][IDX_0xCA0][VAL] =3D 0x0fffffff &= PHY_QueryBBReg(pDM_Odm->Adapter, rOFDM0_RxIQExtAnta, bMaskDWord); @@ -1039,7 +1039,7 @@ static void _PHY_PathBFillIQKMatrix8723B( pRFCalibrateInfo->RxIQC_8723B[PATH_S0][IDX_0xC14][VAL] =3D PHY_QueryBBRe= g(pDM_Odm->Adapter, rOFDM0_XBRxIQImbalance, bMaskDWord); =20 reg =3D (result[final_candidate][7] >> 6) & 0xF; -/* PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_AGCRSSITable, 0x0000F000, reg);= */ +/* PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_AGCRSSITable, 0x0000F000, reg); */ pRFCalibrateInfo->RxIQC_8723B[PATH_S0][IDX_0xCA0][KEY] =3D rOFDM0_RxIQEx= tAnta; pRFCalibrateInfo->RxIQC_8723B[PATH_S0][IDX_0xCA0][VAL] =3D (reg << 28)|(= PHY_QueryBBReg(pDM_Odm->Adapter, rOFDM0_RxIQExtAnta, bMaskDWord)&0x0fffffff= ); } @@ -1322,7 +1322,7 @@ static void phy_IQCalibrate_8723B( const u32 retryCount =3D 2; =20 /* Note: IQ calibration must be performed after loading */ - /* PHY_REG.txt , and radio_a, radio_b.txt */ + /* PHY_REG.txt , and radio_a, radio_b.txt */ =20 /* u32 bbvalue; */ =20 @@ -1339,8 +1339,8 @@ static void phy_IQCalibrate_8723B( /* no serial mode */ =20 /* save RF path for 8723B */ -/* Path_SEL_BB =3D PHY_QueryBBReg(pDM_Odm->Adapter, 0x948, bMaskDWord); */ -/* Path_SEL_RF =3D PHY_QueryRFReg(pDM_Odm->Adapter, RF_PATH_A, 0xb0, 0xff= fff); */ +/* Path_SEL_BB =3D PHY_QueryBBReg(pDM_Odm->Adapter, 0x948, bMaskDWord); */ +/* Path_SEL_RF =3D PHY_QueryRFReg(pDM_Odm->Adapter, RF_PATH_A, 0xb0, 0xfff= ff); */ =20 /* MAC settings */ _PHY_MACSettingCalibration8723B(padapter, IQK_MAC_REG, pDM_Odm->RFCalibra= teInfo.IQK_MAC_backup); @@ -1352,10 +1352,10 @@ static void phy_IQCalibrate_8723B( PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_TRMuxPar, bMaskDWord, 0x000800e4); PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_XCD_RFInterfaceSW, bMaskDWord, 0x22= 204000); =20 -/* PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_XAB_RFInterfaceSW, BIT10, 0x01);= */ -/* PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_XAB_RFInterfaceSW, BIT26, 0x01);= */ -/* PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_XA_RFInterfaceOE, BIT10, 0x00); = */ -/* PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_XB_RFInterfaceOE, BIT10, 0x00); = */ +/* PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_XAB_RFInterfaceSW, BIT10, 0x01); = */ +/* PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_XAB_RFInterfaceSW, BIT26, 0x01); = */ +/* PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_XA_RFInterfaceOE, BIT10, 0x00); */ +/* PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_XB_RFInterfaceOE, BIT10, 0x00); */ =20 /* RX IQ calibration setting for 8723B D cut large current issue when leav= ing IPS */ =20 @@ -1370,7 +1370,7 @@ static void phy_IQCalibrate_8723B( /* path A TX IQK */ for (i =3D 0 ; i < retryCount ; i++) { PathAOK =3D phy_PathA_IQK_8723B(padapter, is2T, RF_Path); -/* if (PathAOK =3D=3D 0x03) { */ +/* if (PathAOK =3D=3D 0x03) { */ if (PathAOK =3D=3D 0x01) { /* Path A Tx IQK Success */ PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000); @@ -1388,8 +1388,8 @@ static void phy_IQCalibrate_8723B( for (i =3D 0 ; i < retryCount ; i++) { PathAOK =3D phy_PathA_RxIQK8723B(padapter, is2T, RF_Path); if (PathAOK =3D=3D 0x03) { -/* result[t][0] =3D (PHY_QueryBBReg(pDM_Odm->Adapter, rTx_Power_Before= _IQK_A, bMaskDWord)&0x3FF0000)>>16; */ -/* result[t][1] =3D (PHY_QueryBBReg(pDM_Odm->Adapter, rTx_Power_After_= IQK_A, bMaskDWord)&0x3FF0000)>>16; */ +/* result[t][0] =3D (PHY_QueryBBReg(pDM_Odm->Adapter, rTx_Power_Before_IQK= _A, bMaskDWord)&0x3FF0000)>>16; */ +/* result[t][1] =3D (PHY_QueryBBReg(pDM_Odm->Adapter, rTx_Power_After_IQK_= A, bMaskDWord)&0x3FF0000)>>16; */ result[t][2] =3D (PHY_QueryBBReg(pDM_Odm->Adapter, rRx_Power_Before_IQ= K_A_2, bMaskDWord)&0x3FF0000)>>16; result[t][3] =3D (PHY_QueryBBReg(pDM_Odm->Adapter, rRx_Power_After_IQK= _A_2, bMaskDWord)&0x3FF0000)>>16; break; @@ -1417,8 +1417,8 @@ static void phy_IQCalibrate_8723B( for (i =3D 0 ; i < retryCount ; i++) { PathBOK =3D phy_PathB_RxIQK8723B(padapter, is2T); if (PathBOK =3D=3D 0x03) { -/* result[t][0] =3D (PHY_QueryBBReg(pDM_Odm->Adapter, rTx_Power_Before= _IQK_A, bMaskDWord)&0x3FF0000)>>16; */ -/* result[t][1] =3D (PHY_QueryBBReg(pDM_Odm->Adapter, rTx_Power_After_= IQK_A, bMaskDWord)&0x3FF0000)>>16; */ +/* result[t][0] =3D (PHY_QueryBBReg(pDM_Odm->Adapter, rTx_Power_Before_IQK= _A, bMaskDWord)&0x3FF0000)>>16; */ +/* result[t][1] =3D (PHY_QueryBBReg(pDM_Odm->Adapter, rTx_Power_After_IQK_= A, bMaskDWord)&0x3FF0000)>>16; */ result[t][6] =3D (PHY_QueryBBReg(pDM_Odm->Adapter, rRx_Power_Before_IQ= K_A_2, bMaskDWord)&0x3FF0000)>>16; result[t][7] =3D (PHY_QueryBBReg(pDM_Odm->Adapter, rRx_Power_After_IQK= _A_2, bMaskDWord)&0x3FF0000)>>16; break; @@ -1441,8 +1441,8 @@ static void phy_IQCalibrate_8723B( _PHY_ReloadADDARegisters8723B(padapter, IQK_BB_REG_92C, pDM_Odm->RFCalib= rateInfo.IQK_BB_backup, IQK_BB_REG_NUM); =20 /* Reload RF path */ -/* PHY_SetBBReg(pDM_Odm->Adapter, 0x948, bMaskDWord, Path_SEL_BB); */ -/* PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, 0xb0, 0xfffff, Path_SEL_RF)= ; */ +/* PHY_SetBBReg(pDM_Odm->Adapter, 0x948, bMaskDWord, Path_SEL_BB); */ +/* PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, 0xb0, 0xfffff, Path_SEL_RF); = */ =20 /* Allen initial gain 0xc50 */ /* Restore RX initial gain */ @@ -1553,8 +1553,8 @@ void PHY_IQCalibrate_8723B( rOFDM0_XDTxAFE, rOFDM0_RxIQExtAnta }; -/* u32 Path_SEL_BB =3D 0; */ - u32 GNT_BT_default; +/* u32 Path_SEL_BB =3D 0; */ + u32 GNT_BT_default; =20 if (!ODM_CheckPowerStatus(padapter)) return; @@ -1619,12 +1619,12 @@ void PHY_IQCalibrate_8723B( /* save default GNT_BT */ GNT_BT_default =3D PHY_QueryBBReg(pDM_Odm->Adapter, 0x764, bMaskDWord); /* Save RF Path */ -/* Path_SEL_BB =3D PHY_QueryBBReg(pDM_Odm->Adapter, 0x948, bMaskDWord); */ -/* Path_SEL_RF =3D PHY_QueryRFReg(pDM_Odm->Adapter, RF_PATH_A, 0xb0, 0xff= fff); */ +/* Path_SEL_BB =3D PHY_QueryBBReg(pDM_Odm->Adapter, 0x948, bMaskDWord); */ +/* Path_SEL_RF =3D PHY_QueryRFReg(pDM_Odm->Adapter, RF_PATH_A, 0xb0, 0xfff= ff); */ =20 /* set GNT_BT =3D 0, pause BT traffic */ -/* PHY_SetBBReg(pDM_Odm->Adapter, 0x764, BIT12, 0x0); */ -/* PHY_SetBBReg(pDM_Odm->Adapter, 0x764, BIT11, 0x1); */ +/* PHY_SetBBReg(pDM_Odm->Adapter, 0x764, BIT12, 0x0); */ +/* PHY_SetBBReg(pDM_Odm->Adapter, 0x764, BIT11, 0x1); */ =20 for (i =3D 0; i < 8; i++) { result[0][i] =3D 0; @@ -1717,8 +1717,8 @@ void PHY_IQCalibrate_8723B( /* restore GNT_BT */ PHY_SetBBReg(pDM_Odm->Adapter, 0x764, bMaskDWord, GNT_BT_default); /* Restore RF Path */ -/* PHY_SetBBReg(pDM_Odm->Adapter, 0x948, bMaskDWord, Path_SEL_BB); */ -/* PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, 0xb0, 0xfffff, Path_SEL_RF);= */ +/* PHY_SetBBReg(pDM_Odm->Adapter, 0x948, bMaskDWord, Path_SEL_BB); */ +/* PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, 0xb0, 0xfffff, Path_SEL_RF); = */ =20 /* Resotr RX mode table parameter */ PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_WE_LUT, 0x80000, 0x1); @@ -1729,8 +1729,8 @@ void PHY_IQCalibrate_8723B( PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, 0x43, bRFRegOffsetMask, 0x300bd= ); =20 /* set GNT_BT =3D HW control */ -/* PHY_SetBBReg(pDM_Odm->Adapter, 0x764, BIT12, 0x0); */ -/* PHY_SetBBReg(pDM_Odm->Adapter, 0x764, BIT11, 0x0); */ +/* PHY_SetBBReg(pDM_Odm->Adapter, 0x764, BIT12, 0x0); */ +/* PHY_SetBBReg(pDM_Odm->Adapter, 0x764, BIT11, 0x0); */ =20 if (Is2ant) { if (RF_Path =3D=3D 0x0) /* S1 */ @@ -1745,7 +1745,7 @@ void PHY_IQCalibrate_8723B( void PHY_LCCalibrate_8723B(struct dm_odm_t *pDM_Odm) { bool bSingleTone =3D false, bCarrierSuppression =3D false; - u32 timeout =3D 2000, timecount =3D 0; + u32 timeout =3D 2000, timecount =3D 0; =20 if (!(pDM_Odm->SupportAbility & ODM_RF_CALIBRATION)) return; --=20 2.54.0