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[103.229.18.19]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-13b87b92b27sm25435361c88.6.2026.07.12.23.32.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 12 Jul 2026 23:32:43 -0700 (PDT) From: Varadarajan Narayanan Date: Mon, 13 Jul 2026 12:02:17 +0530 Subject: [PATCH v13 1/6] firmware: qcom_scm: ipq5332: add support to pass metadata size Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260713-rproc-v13-1-41011cbcda3e@oss.qualcomm.com> References: <20260713-rproc-v13-0-41011cbcda3e@oss.qualcomm.com> In-Reply-To: <20260713-rproc-v13-0-41011cbcda3e@oss.qualcomm.com> To: Bjorn Andersson , Konrad Dybcio , Mathieu Poirier , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Manikanta Mylavarapu Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, Konrad Dybcio , Gokul Sriram Palanisamy , Dmitry Baryshkov , Vignesh Viswanathan , Varadarajan Narayanan X-Mailer: b4 0.14.3 X-Authority-Analysis: v=2.4 cv=Nq3htcdJ c=1 sm=1 tr=0 ts=6a5486cf cx=c_pps a=m5Vt/hrsBiPMCU0y4gIsQw==:117 a=Ou0eQOY4+eZoSc0qltEV5Q==:17 a=IkcTkHD0fZMA:10 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=DJpcGTmdVt4CTyJn9g5Z:22 a=EUspDBNiAAAA:8 a=Hho1wTqgLjreKoR7ChkA:9 a=QEXdDO2ut3YA:10 a=IoOABgeZipijB_acs4fv:22 X-Proofpoint-ORIG-GUID: M-9JyKFSqfuC7OAlSjMu0wy6PC7-dEBd X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzEzMDA2NiBTYWx0ZWRfX6qOH//dSvok+ hqCbTDwBIkLXgKt4EEf5VBLwZlD9aGjfoPq61FCSD+pGPmyTt4bFHVMLg8NCw3ixvOr2r/MjU3W F6HJL5LCZAukIjiuDctmfp1ttbwy//wSBBNRxa1h68bPVc8yYA/QrxQ9qr9ufHQ1eo5y+ITNQ8S S5JKQSuiJQTG79nNEZSWZDGn0lXTESx8cyMqSKJ6z/DWnR5z4bMeERi3pzrHV8B0WQ+H/SigBEo Yj+26miRiVjuUIEBYYXKfZ5/+kQP3STefdVUMKx1MPiTsH/NNF0FLafsCTOQhIn5SYWhbbduQxh QzjLpTV9eOqXnwY105HBK09QEVw1Zw7NbNGwYqQBCvyGtWjIvviR5Fl5jgyV9lKqZ9rwfqnLF4g u0h20Sggm2tuKccCgiEL6lEzHk0GXzUAvEL5SI9k8GhresqFEDRzCfCAKy6xHa7qtXOOf+XYrlP K8TuBjVySt8yDdBtCfg== X-Proofpoint-GUID: M-9JyKFSqfuC7OAlSjMu0wy6PC7-dEBd X-Proofpoint-Spam-Info: AW1haW4tMjYwNzEzMDA2NiBTYWx0ZWRfXzwvhTAyPDRJ3 I0/YNofXsUdr3dN2WGEAoYFqOztw6pfyZeMoP9LOb3b4TJ///QyufhA1ZMnKwmplhyNgHIC26T5 bqJoKqPF1SBOUphu3TQhLDnXrVZddAc= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-07-13_02,2026-07-10_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 bulkscore=0 adultscore=0 suspectscore=0 malwarescore=0 phishscore=0 lowpriorityscore=0 spamscore=0 priorityscore=1501 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607130066 From: Manikanta Mylavarapu IPQ5332 security software running under trustzone requires metadata size. With new command support added in TrustZone that includes a size parameter, pass metadata size as well. Reviewed-by: Konrad Dybcio Signed-off-by: Manikanta Mylavarapu Signed-off-by: Gokul Sriram Palanisamy Reviewed-by: Dmitry Baryshkov Tested-by: Vignesh Viswanathan Signed-off-by: Varadarajan Narayanan --- drivers/firmware/qcom/qcom_scm.c | 14 +++++++++++--- drivers/firmware/qcom/qcom_scm.h | 1 + 2 files changed, 12 insertions(+), 3 deletions(-) diff --git a/drivers/firmware/qcom/qcom_scm.c b/drivers/firmware/qcom/qcom_= scm.c index 7933e55803dc..4a51d2a2b519 100644 --- a/drivers/firmware/qcom/qcom_scm.c +++ b/drivers/firmware/qcom/qcom_scm.c @@ -575,7 +575,7 @@ EXPORT_SYMBOL_GPL(devm_qcom_scm_pas_context_alloc); =20 static int __qcom_scm_pas_init_image(struct device *dev, u32 pas_id, dma_addr_t mdata_phys, - struct qcom_scm_res *res) + struct qcom_scm_res *res, size_t size) { struct qcom_scm_desc desc =3D { .svc =3D QCOM_SCM_SVC_PIL, @@ -596,6 +596,14 @@ static int __qcom_scm_pas_init_image(struct device *de= v, u32 pas_id, =20 desc.args[1] =3D mdata_phys; =20 + if (__qcom_scm_is_call_available(__scm->dev, QCOM_SCM_SVC_PIL, + QCOM_SCM_PIL_PAS_INIT_IMAGE_V2)) { + desc.cmd =3D QCOM_SCM_PIL_PAS_INIT_IMAGE_V2; + desc.arginfo =3D QCOM_SCM_ARGS(3, QCOM_SCM_VAL, QCOM_SCM_RW, + QCOM_SCM_VAL); + desc.args[2] =3D size; + } + ret =3D qcom_scm_call(dev, &desc, res); qcom_scm_bw_disable(); =20 @@ -621,7 +629,7 @@ static int qcom_scm_pas_prep_and_init_image(struct devi= ce *dev, memcpy(mdata_buf, metadata, size); mdata_phys =3D qcom_tzmem_to_phys(mdata_buf); =20 - ret =3D __qcom_scm_pas_init_image(dev, ctx->pas_id, mdata_phys, &res); + ret =3D __qcom_scm_pas_init_image(dev, ctx->pas_id, mdata_phys, &res, siz= e); if (ret < 0) qcom_tzmem_free(mdata_buf); else @@ -660,7 +668,7 @@ static int __qcom_scm_pas_init_image2(struct device *de= v, u32 pas_id, =20 memcpy(mdata_buf, metadata, size); =20 - ret =3D __qcom_scm_pas_init_image(dev, pas_id, mdata_phys, &res); + ret =3D __qcom_scm_pas_init_image(dev, pas_id, mdata_phys, &res, size); if (ret < 0 || !ctx) { dma_free_coherent(dev, size, mdata_buf, mdata_phys); } else if (ctx) { diff --git a/drivers/firmware/qcom/qcom_scm.h b/drivers/firmware/qcom/qcom_= scm.h index caab80a73e17..cb80e22a3d90 100644 --- a/drivers/firmware/qcom/qcom_scm.h +++ b/drivers/firmware/qcom/qcom_scm.h @@ -105,6 +105,7 @@ int qcom_scm_shm_bridge_enable(struct device *scm_dev); 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[103.229.18.19]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-13b87b92b27sm25435361c88.6.2026.07.12.23.32.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 12 Jul 2026 23:32:49 -0700 (PDT) From: Varadarajan Narayanan Date: Mon, 13 Jul 2026 12:02:18 +0530 Subject: [PATCH v13 2/6] dt-bindings: remoteproc: qcom: document hexagon based WCSS secure PIL Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260713-rproc-v13-2-41011cbcda3e@oss.qualcomm.com> References: <20260713-rproc-v13-0-41011cbcda3e@oss.qualcomm.com> In-Reply-To: <20260713-rproc-v13-0-41011cbcda3e@oss.qualcomm.com> To: Bjorn Andersson , Konrad Dybcio , Mathieu Poirier , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Manikanta Mylavarapu Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, Gokul Sriram Palanisamy , George Moussalem , Krzysztof Kozlowski , Vignesh Viswanathan , Varadarajan Narayanan X-Mailer: b4 0.14.3 X-Proofpoint-Spam-Info: AW1haW4tMjYwNzEzMDA2NiBTYWx0ZWRfX01amVMBT9I9p H0oeA0bE5s+X8G126ClwYsVn+GQzmJ4dXcWgETk44JOHoqlHI0V1nNBdiLguDUNfvjJ0BSq1d/4 SJaftcBq0WWa7fiEXEXnTX8eujyHA1s= X-Authority-Analysis: v=2.4 cv=OsJ/DS/t c=1 sm=1 tr=0 ts=6a5486d0 cx=c_pps a=oF/VQ+ItUULfLr/lQ2/icg==:117 a=Ou0eQOY4+eZoSc0qltEV5Q==:17 a=IkcTkHD0fZMA:10 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=YMgV9FUhrdKAYTUUvYB2:22 a=gEfo2CItAAAA:8 a=EUspDBNiAAAA:8 a=UqCG9HQmAAAA:8 a=fvnyRN_YwKOm8-nVNuIA:9 a=QEXdDO2ut3YA:10 a=3WC7DwWrALyhR5TkjVHa:22 a=sptkURWiP4Gy88Gu7hUp:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzEzMDA2NiBTYWx0ZWRfX2/3L0o5XSB45 np8Tp9CBNOZSQhoGWO6ccdbxuOQjH4tX4umbnc41wVuaQmE2BSgtdG5eThUASu401YahUrL2ZwF XovSbatCl87bhdiG9/i1DoIhH3I9qbLaiYMscnS6rll1dJjDbqIw/nqrvTnfblGqLLGCKsoEqUm 4SALu58JXGQlQN5qiF7ElvTx3xmQDMVAhqsFWXSc3fCNxd+ssSW+SybKG/nO/0jG4OQSPZbq09a 5MFU8oY36RR5cZpJ4EE6tYvhNT35cxpC5YmlaE9dVlBgK5kvSHlTKK7o7vswc6IvWs7SS9ZWWp8 LzJ6YAxxcD78xv1WmVrRitsSzU6EllTqt45RxwFR+XxHBwGh4em0m0djUM107pob8KXWCAPj6hw pQKa8rPHrE3if2yZMVYOEBrDHl6I5wdr8zEo8CQh5xt16w5ua9mnHh31pxfPsu33p8AHPtOxOA5 CoIOwhO495xvMUQyrIg== X-Proofpoint-GUID: nyuwvBZiYJPIDz8_jrbReRkg4llBbcQA X-Proofpoint-ORIG-GUID: nyuwvBZiYJPIDz8_jrbReRkg4llBbcQA X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-07-13_02,2026-07-10_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 spamscore=0 clxscore=1015 impostorscore=0 phishscore=0 adultscore=0 lowpriorityscore=0 bulkscore=0 suspectscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607130066 From: Manikanta Mylavarapu Add new binding document for hexagon based WCSS secure PIL remoteproc. IPQ5018, IPQ5332 and IPQ9574 follow secure PIL remoteproc. Signed-off-by: Manikanta Mylavarapu Signed-off-by: Gokul Sriram Palanisamy Signed-off-by: George Moussalem [ Dropped ipq5424 support ] Reviewed-by: Krzysztof Kozlowski Tested-by: Vignesh Viswanathan Signed-off-by: Varadarajan Narayanan --- .../remoteproc/qcom,ipq5018-wcss-sec-pil.yaml | 178 +++++++++++++++++= ++++ 1 file changed, 178 insertions(+) diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,ipq5018-wcss= -sec-pil.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,ipq5018-w= css-sec-pil.yaml new file mode 100644 index 000000000000..a6fc3a9db621 --- /dev/null +++ b/Documentation/devicetree/bindings/remoteproc/qcom,ipq5018-wcss-sec-pi= l.yaml @@ -0,0 +1,178 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/remoteproc/qcom,ipq5018-wcss-sec-pil.ya= ml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm WCSS Secure Peripheral Image Loader + +maintainers: + - Manikanta Mylavarapu + +description: + Wireless Connectivity Subsystem (WCSS) Secure Peripheral Image Loader lo= ads + firmware and power up QDSP6 remoteproc on the Qualcomm IPQ series SoC. + +properties: + compatible: + enum: + - qcom,ipq5018-wcss-sec-pil + - qcom,ipq5332-wcss-sec-pil + - qcom,ipq9574-wcss-sec-pil + + reg: + maxItems: 1 + + firmware-name: + maxItems: 1 + description: Firmware name for the Hexagon core + + interrupts: + items: + - description: Watchdog interrupt + - description: Fatal interrupt + - description: Ready interrupt + - description: Handover interrupt + - description: Stop acknowledge interrupt + + interrupt-names: + items: + - const: wdog + - const: fatal + - const: ready + - const: handover + - const: stop-ack + + clocks: + minItems: 1 + items: + - description: sleep clock + - description: AHB interconnect clock + + clock-names: + minItems: 1 + items: + - const: sleep + - const: interconnect + + mboxes: + items: + - description: TMECom mailbox driver + + qcom,smem-states: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: States used by the AP to signal the remote processor + items: + - description: Stop Q6 + - description: Shutdown Q6 + + qcom,smem-state-names: + description: + Names of the states used by the AP to signal the remote processor + items: + - const: stop + - const: shutdown + + memory-region: + items: + - description: Q6 reserved region + + glink-edge: + $ref: /schemas/remoteproc/qcom,glink-edge.yaml# + description: + Qualcomm G-Link subnode which represents communication edge, channels + and devices related to the Modem. + unevaluatedProperties: false + +required: + - compatible + - reg + - firmware-name + - interrupts + - interrupt-names + - qcom,smem-states + - qcom,smem-state-names + - memory-region + +allOf: + - if: + properties: + compatible: + contains: + const: qcom,ipq5018-wcss-sec-pil + then: + properties: + clocks: + items: + - description: sleep clock + - description: AHB interconnect clock + clock-names: + items: + - const: sleep + - const: interconnect + required: + - clocks + - clock-names + + - if: + properties: + compatible: + contains: + const: qcom,ipq5332-wcss-sec-pil + then: + properties: + clocks: + items: + - description: sleep clock + clock-names: + items: + - const: sleep + required: + - clocks + - clock-names + + - if: + properties: + compatible: + contains: + enum: + - qcom,ipq9574-wcss-sec-pil + then: + properties: + clocks: false + clock-names: false + +additionalProperties: false + +examples: + - | + #include + + q6v5_wcss: remoteproc@cd00000 { + compatible =3D "qcom,ipq9574-wcss-sec-pil"; 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[103.229.18.19]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-13b87b92b27sm25435361c88.6.2026.07.12.23.32.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 12 Jul 2026 23:32:55 -0700 (PDT) From: Varadarajan Narayanan Date: Mon, 13 Jul 2026 12:02:19 +0530 Subject: [PATCH v13 3/6] remoteproc: qcom: add hexagon based WCSS secure PIL driver Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260713-rproc-v13-3-41011cbcda3e@oss.qualcomm.com> References: <20260713-rproc-v13-0-41011cbcda3e@oss.qualcomm.com> In-Reply-To: <20260713-rproc-v13-0-41011cbcda3e@oss.qualcomm.com> To: Bjorn Andersson , Konrad Dybcio , Mathieu Poirier , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Manikanta Mylavarapu Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, Vignesh Viswanathan , Gokul Sriram Palanisamy , George Moussalem , Dmitry Baryshkov , Varadarajan Narayanan X-Mailer: b4 0.14.3 X-Proofpoint-Spam-Info: AW1haW4tMjYwNzEzMDA2NiBTYWx0ZWRfX3E6NI5B4gDAS 5mDYrQ8qj4jukcqEEE2vYq/2qs53lRzvUtqyttx0KIn+eDcjyA58RQeiCPeKnzUr1PvRCDS0Uni Ed/13RT9PXYbLN8a9cEoTsnlBCu4bLU= X-Authority-Analysis: v=2.4 cv=OK8XGyaB c=1 sm=1 tr=0 ts=6a54869d cx=c_pps a=Qgeoaf8Lrialg5Z894R3/Q==:117 a=Ou0eQOY4+eZoSc0qltEV5Q==:17 a=IkcTkHD0fZMA:10 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=eoimf2acIAo5FJnRuUoq:22 a=EUspDBNiAAAA:8 a=UqCG9HQmAAAA:8 a=2haS3Ga0fGOBmvNocw8A:9 a=QEXdDO2ut3YA:10 a=x9snwWr2DeNwDh03kgHS:22 X-Proofpoint-GUID: Yxc3cGOEZMfAnI5LRtDxQMJ0-VMCaOEX X-Proofpoint-ORIG-GUID: Yxc3cGOEZMfAnI5LRtDxQMJ0-VMCaOEX X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzEzMDA2NiBTYWx0ZWRfX6IIQfXL6nXsm pXHp/3ufwZORaB9quMJoNlPsGphmZpPVK99/kxflpGaa7sbsfqSpC2cmr0P9O9NJj9QTVZCDWUZ 5fxNUL5yV921VYh428suPLNUDknXoPT6Kcaatqw9LQ3SvCd3y3O8t+upbYw5H7xwvPkQIt/ITcb IEm9QOWY0P0nneLaX+4JukEZY8sFJO0qjNZxp1tdhOHn3eASm5/vf0Bq28QRArm0Zit5WuuU7sS TSypWxWhn0jNr6ALn8rnsoS1oxzCwaWQlBjv1mjb9GOVD1JjYHycL7uKsUNvOYOgVrIayfzG/01 5FCXNd8cMu6z7RBiVmn7rvXLKenlXMAyOxAI1rAa29Aw6vqWuEMqqNsNJlm0nBXlh/Gm4AS2cm/ Bs2wyZWbkIPs+FR/qaETArtQWAxpMoE7cURB7Vkm+Zw/V1lDjOOa5692ay0dnOvnbc9v9UZUw6Q w6sLLBKdXDhxGB8lIWw== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-07-13_02,2026-07-10_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 phishscore=0 spamscore=0 adultscore=0 clxscore=1015 impostorscore=0 suspectscore=0 lowpriorityscore=0 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607130066 From: Vignesh Viswanathan Add support to bring up hexagon based WCSS using secure PIL. All IPQxxxx SoCs support secure Peripheral Image Loading (PIL). Secure PIL image is signed firmware image which only trusted software such as TrustZone (TZ) can authenticate and load. Linux kernel will send a Peripheral Authentication Service (PAS) request to TZ to authenticate and load the PIL images. In order to avoid overloading the existing WCSS driver or PAS driver, we came up with this new PAS based IPQ WCSS driver. Signed-off-by: Vignesh Viswanathan Signed-off-by: Manikanta Mylavarapu Signed-off-by: Gokul Sriram Palanisamy Signed-off-by: George Moussalem [ Dropped ipq5424 support ] Reviewed-by: Dmitry Baryshkov Tested-by: Vignesh Viswanathan Signed-off-by: Varadarajan Narayanan --- drivers/remoteproc/Kconfig | 19 ++ drivers/remoteproc/Makefile | 1 + drivers/remoteproc/qcom_q6v5_wcss_sec.c | 325 ++++++++++++++++++++++++++++= ++++ include/linux/remoteproc.h | 2 + 4 files changed, 347 insertions(+) diff --git a/drivers/remoteproc/Kconfig b/drivers/remoteproc/Kconfig index 65befdbfa5f7..38aa10c5ee2a 100644 --- a/drivers/remoteproc/Kconfig +++ b/drivers/remoteproc/Kconfig @@ -258,6 +258,25 @@ config QCOM_Q6V5_WCSS Hexagon V5 based WCSS remote processors on e.g. IPQ8074. This is a non-TrustZone wireless subsystem. =20 +config QCOM_Q6V5_WCSS_SEC + tristate "Qualcomm Hexagon based WCSS Secure Peripheral Image Loader" + depends on OF && ARCH_QCOM + depends on QCOM_SMEM + depends on RPMSG_QCOM_GLINK_SMEM || RPMSG_QCOM_GLINK_SMEM=3Dn + depends on RPMSG_QCOM_GLINK || RPMSG_QCOM_GLINK=3Dn + select QCOM_MDT_LOADER + select QCOM_PIL_INFO + select QCOM_Q6V5_COMMON + select QCOM_RPROC_COMMON + select QCOM_SCM + help + Say y here to support the Qualcomm Secure Peripheral Image Loader + for the Hexagon based remote processors on e.g. IPQ5332. + + This is TrustZone wireless subsystem. The firmware is + verified and booted with the help of the Peripheral Authentication + System (PAS) in TrustZone. + config QCOM_SYSMON tristate "Qualcomm sysmon driver" depends on RPMSG diff --git a/drivers/remoteproc/Makefile b/drivers/remoteproc/Makefile index 1c7598b8475d..08705ef62bce 100644 --- a/drivers/remoteproc/Makefile +++ b/drivers/remoteproc/Makefile @@ -28,6 +28,7 @@ obj-$(CONFIG_QCOM_Q6V5_ADSP) +=3D qcom_q6v5_adsp.o obj-$(CONFIG_QCOM_Q6V5_MSS) +=3D qcom_q6v5_mss.o obj-$(CONFIG_QCOM_Q6V5_PAS) +=3D qcom_q6v5_pas.o obj-$(CONFIG_QCOM_Q6V5_WCSS) +=3D qcom_q6v5_wcss.o +obj-$(CONFIG_QCOM_Q6V5_WCSS_SEC) +=3D qcom_q6v5_wcss_sec.o obj-$(CONFIG_QCOM_SYSMON) +=3D qcom_sysmon.o obj-$(CONFIG_QCOM_WCNSS_PIL) +=3D qcom_wcnss_pil.o qcom_wcnss_pil-y +=3D qcom_wcnss.o diff --git a/drivers/remoteproc/qcom_q6v5_wcss_sec.c b/drivers/remoteproc/q= com_q6v5_wcss_sec.c new file mode 100644 index 000000000000..10a69fcd20f0 --- /dev/null +++ b/drivers/remoteproc/qcom_q6v5_wcss_sec.c @@ -0,0 +1,325 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ +#include +#include +#include +#include +#include +#include +#include + +#include "qcom_common.h" +#include "qcom_q6v5.h" +#include "qcom_pil_info.h" + +#define WCSS_CRASH_REASON 421 + +#define WCSS_PAS_ID 0x6 +#define MPD_WCSS_PAS_ID 0xd + +#define Q6_WAIT_TIMEOUT (5 * HZ) + +struct wcss_sec { + struct device *dev; + struct qcom_rproc_glink glink_subdev; + struct qcom_rproc_ssr ssr_subdev; + struct qcom_q6v5 q6; + phys_addr_t mem_phys; + phys_addr_t mem_reloc; + void *mem_region; + size_t mem_size; + const struct wcss_data *desc; +}; + +struct wcss_data { + u32 pasid; + const char *ss_name; + bool auto_boot; +}; + +static int wcss_sec_start(struct rproc *rproc) +{ + struct wcss_sec *wcss =3D rproc->priv; + struct device *dev =3D wcss->dev; + int ret; + + ret =3D qcom_q6v5_prepare(&wcss->q6); + if (ret) + return ret; + + ret =3D qcom_scm_pas_auth_and_reset(wcss->desc->pasid); + if (ret) { + dev_err(dev, "wcss_reset failed\n"); + goto unprepare; + } + + ret =3D qcom_q6v5_wait_for_start(&wcss->q6, Q6_WAIT_TIMEOUT); + if (ret =3D=3D -ETIMEDOUT) + dev_err(dev, "start timed out\n"); + +unprepare: + qcom_q6v5_unprepare(&wcss->q6); + + return ret; +} + +static int wcss_sec_stop(struct rproc *rproc) +{ + struct wcss_sec *wcss =3D rproc->priv; + struct device *dev =3D wcss->dev; + int ret; + + ret =3D qcom_scm_pas_shutdown(wcss->desc->pasid); + if (ret) { + dev_err(dev, "not able to shutdown\n"); + return ret; + } + + qcom_q6v5_unprepare(&wcss->q6); + + return 0; +} + +static void *wcss_sec_da_to_va(struct rproc *rproc, u64 da, size_t len, + bool *is_iomem) +{ + struct wcss_sec *wcss =3D rproc->priv; + int offset; + + offset =3D da - wcss->mem_reloc; + if (offset < 0 || offset + len > wcss->mem_size) + return NULL; + + return wcss->mem_region + offset; +} + +static int wcss_sec_load(struct rproc *rproc, const struct firmware *fw) +{ + struct wcss_sec *wcss =3D rproc->priv; + struct device *dev =3D wcss->dev; + int ret; + + ret =3D qcom_mdt_load(dev, fw, rproc->firmware, wcss->desc->pasid, wcss->= mem_region, + wcss->mem_phys, wcss->mem_size, &wcss->mem_reloc); + if (ret) + return ret; + + qcom_pil_info_store("wcss", wcss->mem_phys, wcss->mem_size); + + return 0; +} + +static unsigned long wcss_sec_panic(struct rproc *rproc) +{ + struct wcss_sec *wcss =3D rproc->priv; + + return qcom_q6v5_panic(&wcss->q6); +} + +static void wcss_sec_copy_segment(struct rproc *rproc, + struct rproc_dump_segment *segment, + void *dest, size_t offset, size_t size) +{ + struct wcss_sec *wcss =3D rproc->priv; + struct device *dev =3D wcss->dev; + + if (!segment->io_ptr) + segment->io_ptr =3D ioremap_wc(segment->da, segment->size); + + if (!segment->io_ptr) { + dev_err(dev, "Failed to ioremap segment %pad size 0x%zx\n", + &segment->da, segment->size); + return; + } + + if (offset + size < segment->size) { + memcpy(dest, segment->io_ptr + offset, size); + } else { + iounmap(segment->io_ptr); + segment->io_ptr =3D NULL; + } +} + +static int wcss_sec_dump_segments(struct rproc *rproc, + const struct firmware *fw) +{ + struct device *dev =3D rproc->dev.parent; + struct reserved_mem *rmem =3D NULL; + struct device_node *node; + int num_segs, index; + int ret; + + /* + * Parse through additional reserved memory regions for the rproc + * and add them to the coredump segments + */ + num_segs =3D of_count_phandle_with_args(dev->of_node, + "memory-region", NULL); + for (index =3D 0; index < num_segs; index++) { + node =3D of_parse_phandle(dev->of_node, + "memory-region", index); + if (!node) + return -EINVAL; + + rmem =3D of_reserved_mem_lookup(node); + of_node_put(node); + if (!rmem) { + dev_err(dev, "unable to acquire memory-region index %d num_segs %d\n", + index, num_segs); + return -EINVAL; + } + + dev_dbg(dev, "Adding segment 0x%pa size 0x%pa", + &rmem->base, &rmem->size); + ret =3D rproc_coredump_add_custom_segment(rproc, + rmem->base, + rmem->size, + wcss_sec_copy_segment, + NULL); + if (ret) + return ret; + } + + return 0; +} + +static const struct rproc_ops wcss_sec_ops =3D { + .start =3D wcss_sec_start, + .stop =3D wcss_sec_stop, + .da_to_va =3D wcss_sec_da_to_va, + .load =3D wcss_sec_load, + .get_boot_addr =3D rproc_elf_get_boot_addr, + .panic =3D wcss_sec_panic, + .parse_fw =3D wcss_sec_dump_segments, +}; + +static int wcss_sec_alloc_memory_region(struct wcss_sec *wcss) +{ + struct device *dev =3D wcss->dev; + struct resource res; + int ret; + + ret =3D of_reserved_mem_region_to_resource(dev->of_node, 0, &res); + if (ret) { + dev_err(dev, "unable to acquire memory-region resource\n"); + return ret; + } + + wcss->mem_phys =3D res.start; + wcss->mem_reloc =3D res.start; + wcss->mem_size =3D resource_size(&res); + wcss->mem_region =3D devm_ioremap_resource_wc(dev, &res); + if (!wcss->mem_region) { + dev_err(dev, "unable to map memory region: %pR\n", &res); + return -ENOMEM; + } + + return 0; +} + +static int wcss_sec_probe(struct platform_device *pdev) +{ + const struct wcss_data *desc =3D of_device_get_match_data(&pdev->dev); + const char *fw_name =3D NULL; + struct wcss_sec *wcss; + struct clk *sleep_clk; + struct clk *int_clk; + struct rproc *rproc; + int ret; + + ret =3D of_property_read_string(pdev->dev.of_node, "firmware-name", + &fw_name); + if (ret < 0) + return ret; + + rproc =3D devm_rproc_alloc(&pdev->dev, desc->ss_name, &wcss_sec_ops, + fw_name, sizeof(*wcss)); + if (!rproc) { + dev_err(&pdev->dev, "failed to allocate rproc\n"); + return -ENOMEM; + } + + wcss =3D rproc->priv; + wcss->dev =3D &pdev->dev; + wcss->desc =3D desc; + + ret =3D wcss_sec_alloc_memory_region(wcss); + if (ret) + return ret; + + sleep_clk =3D devm_clk_get_optional_enabled(&pdev->dev, "sleep"); + if (IS_ERR(sleep_clk)) + return dev_err_probe(&pdev->dev, PTR_ERR(sleep_clk), + "Failed to get sleep clock\n"); + + int_clk =3D devm_clk_get_optional_enabled(&pdev->dev, "interconnect"); + if (IS_ERR(int_clk)) + return dev_err_probe(&pdev->dev, PTR_ERR(int_clk), + "Failed to get interconnect clock\n"); + + ret =3D qcom_q6v5_init(&wcss->q6, pdev, rproc, + WCSS_CRASH_REASON, NULL, NULL); + if (ret) + return ret; + + qcom_add_glink_subdev(rproc, &wcss->glink_subdev, desc->ss_name); + qcom_add_ssr_subdev(rproc, &wcss->ssr_subdev, desc->ss_name); + + rproc->auto_boot =3D false; + rproc->dump_conf =3D RPROC_COREDUMP_INLINE; + rproc_coredump_set_elf_info(rproc, ELFCLASS32, EM_NONE); + + ret =3D devm_rproc_add(&pdev->dev, rproc); + if (ret) { + qcom_remove_glink_subdev(rproc, &wcss->glink_subdev); + qcom_remove_ssr_subdev(rproc, &wcss->ssr_subdev); + return ret; + } + + platform_set_drvdata(pdev, rproc); + + return 0; +} + +static void wcss_sec_remove(struct platform_device *pdev) +{ + struct rproc *rproc =3D platform_get_drvdata(pdev); + struct wcss_sec *wcss =3D rproc->priv; + + qcom_remove_glink_subdev(rproc, &wcss->glink_subdev); + qcom_remove_ssr_subdev(rproc, &wcss->ssr_subdev); + qcom_q6v5_deinit(&wcss->q6); +} + +static const struct wcss_data wcss_sec_ipq5332_res_init =3D { + .pasid =3D MPD_WCSS_PAS_ID, + .ss_name =3D "q6wcss", +}; + +static const struct wcss_data wcss_sec_ipq9574_res_init =3D { + .pasid =3D WCSS_PAS_ID, + .ss_name =3D "q6wcss", +}; + +static const struct of_device_id wcss_sec_of_match[] =3D { + { .compatible =3D "qcom,ipq5018-wcss-sec-pil", .data =3D &wcss_sec_ipq533= 2_res_init }, + { .compatible =3D "qcom,ipq5332-wcss-sec-pil", .data =3D &wcss_sec_ipq533= 2_res_init }, + { .compatible =3D "qcom,ipq9574-wcss-sec-pil", .data =3D &wcss_sec_ipq957= 4_res_init }, + { }, +}; +MODULE_DEVICE_TABLE(of, wcss_sec_of_match); + +static struct platform_driver wcss_sec_driver =3D { + .probe =3D wcss_sec_probe, + .remove =3D wcss_sec_remove, + .driver =3D { + .name =3D "qcom-wcss-secure-pil", + .of_match_table =3D wcss_sec_of_match, + }, +}; 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[103.229.18.19]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-13b87b92b27sm25435361c88.6.2026.07.12.23.32.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 12 Jul 2026 23:33:01 -0700 (PDT) From: Varadarajan Narayanan Date: Mon, 13 Jul 2026 12:02:20 +0530 Subject: [PATCH v13 4/6] arm64: dts: qcom: ipq5018: add nodes to bring up q6 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260713-rproc-v13-4-41011cbcda3e@oss.qualcomm.com> References: <20260713-rproc-v13-0-41011cbcda3e@oss.qualcomm.com> In-Reply-To: <20260713-rproc-v13-0-41011cbcda3e@oss.qualcomm.com> To: Bjorn Andersson , Konrad Dybcio , Mathieu Poirier , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Manikanta Mylavarapu Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, George Moussalem , Dmitry Baryshkov , Konrad Dybcio , Vignesh Viswanathan , Varadarajan Narayanan X-Mailer: b4 0.14.3 X-Proofpoint-Spam-Info: AW1haW4tMjYwNzEzMDA2NiBTYWx0ZWRfX9j8erMmiH+zC VO0Gmjs6T8kgG1JaF1mCKj+UVkoZFpxgnCKUAsYEtyHbNBtoUAliCodyx9WgGUZoXIsWgSBIl08 rQNgkZXL4MqVYvw4KL/pnorgFfcCiVw= X-Authority-Analysis: v=2.4 cv=OK8XGyaB c=1 sm=1 tr=0 ts=6a5486de cx=c_pps a=Qgeoaf8Lrialg5Z894R3/Q==:117 a=Ou0eQOY4+eZoSc0qltEV5Q==:17 a=IkcTkHD0fZMA:10 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=eoimf2acIAo5FJnRuUoq:22 a=UqCG9HQmAAAA:8 a=EUspDBNiAAAA:8 a=bkM7E5Y1nIw_8vhdTpAA:9 a=QEXdDO2ut3YA:10 a=x9snwWr2DeNwDh03kgHS:22 X-Proofpoint-GUID: 2tqE0T0yl_4ohtfm3QTOgw59ftQGG0GU X-Proofpoint-ORIG-GUID: 2tqE0T0yl_4ohtfm3QTOgw59ftQGG0GU X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzEzMDA2NiBTYWx0ZWRfXyWvbwwjeK3yY iqKZqor18GPDx1uAPuNNEaL0D6rVxWc1xB8qX/X761pUGVhKc5dTPmLeVtK/tO0V5gRDFhCQZ9d fSjyteU1m9Rwotofj+U4b9ClTuP56+OdZ4GvCglacHZ/WqkXza++GeFdTLqmB1mFURQCU7gDw1p r1UYSqbFqwTRZm7wnvP9v/KzQow/17P9gLb1WsVVU+a2Ig7w5MozEWV4lbMURxitZmTWjCRhEwb TVzelLoQLzBtvAKG4AnFIxseOlEHlqbZByH5YZ7kuaRt7uzcoYba5+VXTvR+t88TPoJzz1B0lOd ICcz529hHWqFxsPyRYiKU6+G6UlURzEn7XyxTwQgi07mE0f1O8CDO5x0WFE18gzVMuxEkA/l3uo cVI+nV84RAXz42/tPgjj4lnZg0p4tOpiFB87t61wmZWyRTVRcmJigfspwiuEMw6i3MifPYlNYLv 2mFFiCyBlKmDl/SFDLw== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-07-13_02,2026-07-10_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 phishscore=0 spamscore=0 adultscore=0 clxscore=1015 impostorscore=0 suspectscore=0 lowpriorityscore=0 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607130066 From: George Moussalem Enable nodes required for q6 remoteproc bring up. Reviewed-by: Dmitry Baryshkov Signed-off-by: George Moussalem [ Change 'qcom,smem-state-names' order to resolve dt-bindings-check error ] Reviewed-by: Konrad Dybcio Tested-by: Vignesh Viswanathan Signed-off-by: Varadarajan Narayanan --- arch/arm64/boot/dts/qcom/ipq5018.dtsi | 64 +++++++++++++++++++++++++++++++= ++++ 1 file changed, 64 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/ipq5018.dtsi b/arch/arm64/boot/dts/qc= om/ipq5018.dtsi index edff89257468..86e8f837bb09 100644 --- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi @@ -158,6 +158,35 @@ tz_region: tz@4ac00000 { reg =3D <0x0 0x4ac00000 0x0 0x200000>; no-map; }; + + q6_region: wcss@4b000000 { + no-map; + reg =3D <0x0 0x4b000000 0x0 0x1b00000>; + }; + }; + + wcss: smp2p-wcss { + compatible =3D "qcom,smp2p"; + qcom,smem =3D <435>, <428>; + + interrupt-parent =3D <&intc>; + interrupts =3D ; + + mboxes =3D <&apcs_glb 9>; + + qcom,local-pid =3D <0>; + qcom,remote-pid =3D <1>; + + wcss_smp2p_out: master-kernel { + qcom,entry-name =3D "master-kernel"; + #qcom,smem-state-cells =3D <1>; + }; + + wcss_smp2p_in: slave-kernel { + qcom,entry-name =3D "slave-kernel"; + interrupt-controller; + #interrupt-cells =3D <2>; + }; }; =20 soc: soc@0 { @@ -731,6 +760,41 @@ frame@b128000 { }; }; =20 + q6v5_wcss: remoteproc@cd00000 { + compatible =3D "qcom,ipq5018-wcss-sec-pil"; + reg =3D <0x0cd00000 0x10000>; + firmware-name =3D "ath11k/IPQ5018/hw1.0/q6_fw.mbn"; + interrupts-extended =3D <&intc GIC_SPI 291 IRQ_TYPE_EDGE_RISING>, + <&wcss_smp2p_in 0 IRQ_TYPE_NONE>, + <&wcss_smp2p_in 1 IRQ_TYPE_NONE>, + <&wcss_smp2p_in 2 IRQ_TYPE_NONE>, + <&wcss_smp2p_in 3 IRQ_TYPE_NONE>; + interrupt-names =3D "wdog", + "fatal", + "ready", + "handover", + "stop-ack"; + + clocks =3D <&gcc GCC_SLEEP_CLK_SRC>, + <&gcc GCC_SYS_NOC_WCSS_AHB_CLK>; + clock-names =3D "sleep", + "interconnect"; + + qcom,smem-states =3D <&wcss_smp2p_out 1>, + <&wcss_smp2p_out 0>; + qcom,smem-state-names =3D "stop", + "shutdown"; + + memory-region =3D <&q6_region>; + + glink-edge { + interrupts =3D ; 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Signed-off-by: Manikanta Mylavarapu Signed-off-by: Gokul Sriram Palanisamy Signed-off-by: George Moussalem Reviewed-by: Konrad Dybcio Reviewed-by: Dmitry Baryshkov Tested-by: Vignesh Viswanathan Signed-off-by: Varadarajan Narayanan --- arch/arm64/boot/dts/qcom/ipq5332.dtsi | 62 +++++++++++++++++++++++++++++++= ++++ 1 file changed, 62 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/ipq5332.dtsi b/arch/arm64/boot/dts/qc= om/ipq5332.dtsi index 74d9de8d7641..0ecca5a0e68f 100644 --- a/arch/arm64/boot/dts/qcom/ipq5332.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq5332.dtsi @@ -159,6 +159,35 @@ smem@4a800000 { =20 hwlocks =3D <&tcsr_mutex 3>; }; + + q6_region: wcss@4a900000 { + reg =3D <0x0 0x4a900000 0x0 0x2b00000>; + no-map; + }; + }; + + wcss: smp2p-wcss { + compatible =3D "qcom,smp2p"; + qcom,smem =3D <435>, <428>; + + interrupt-parent =3D <&intc>; + interrupts =3D ; + + mboxes =3D <&apcs_glb 9>; + + qcom,local-pid =3D <0>; + qcom,remote-pid =3D <1>; + + smp2p_wcss_out: master-kernel { + qcom,entry-name =3D "master-kernel"; + #qcom,smem-state-cells =3D <1>; + }; + + smp2p_wcss_in: slave-kernel { + qcom,entry-name =3D "slave-kernel"; + interrupt-controller; + #interrupt-cells =3D <2>; + }; }; =20 soc@0 { @@ -656,6 +685,39 @@ frame@b128000 { }; }; =20 + q6v5_wcss: remoteproc@d100000 { + compatible =3D "qcom,ipq5332-wcss-sec-pil"; + reg =3D <0x0d100000 0x10000>; + firmware-name =3D "ath12k/IPQ5332/hw1.0/q6_fw0.mbn"; + interrupts-extended =3D <&intc GIC_SPI 421 IRQ_TYPE_EDGE_RISING>, + <&smp2p_wcss_in 0 IRQ_TYPE_NONE>, + <&smp2p_wcss_in 1 IRQ_TYPE_NONE>, + <&smp2p_wcss_in 2 IRQ_TYPE_NONE>, + <&smp2p_wcss_in 3 IRQ_TYPE_NONE>; + interrupt-names =3D "wdog", + "fatal", + "ready", + "handover", + "stop-ack"; + + clocks =3D <&gcc GCC_IM_SLEEP_CLK>; + clock-names =3D "sleep"; + + qcom,smem-states =3D <&smp2p_wcss_out 1>, + <&smp2p_wcss_out 0>; + qcom,smem-state-names =3D "stop", + "shutdown"; + + memory-region =3D <&q6_region>; + + glink-edge { + interrupts =3D ; + label =3D "rtr"; + qcom,remote-pid =3D <1>; + mboxes =3D <&apcs_glb 8>; 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[103.229.18.19]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-13b87b92b27sm25435361c88.6.2026.07.12.23.33.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 12 Jul 2026 23:33:13 -0700 (PDT) From: Varadarajan Narayanan Date: Mon, 13 Jul 2026 12:02:22 +0530 Subject: [PATCH v13 6/6] arm64: dts: qcom: ipq9574: add nodes to bring up q6 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260713-rproc-v13-6-41011cbcda3e@oss.qualcomm.com> References: <20260713-rproc-v13-0-41011cbcda3e@oss.qualcomm.com> In-Reply-To: <20260713-rproc-v13-0-41011cbcda3e@oss.qualcomm.com> To: Bjorn Andersson , Konrad Dybcio , Mathieu Poirier , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Manikanta Mylavarapu Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, Gokul Sriram Palanisamy , George Moussalem , Konrad Dybcio , Dmitry Baryshkov , Vignesh Viswanathan , Varadarajan Narayanan X-Mailer: b4 0.14.3 X-Proofpoint-Spam-Info: AW1haW4tMjYwNzEzMDA2NiBTYWx0ZWRfX/H/daQ01FuPV 1SphVmw5VY+680Xgx5DtwTyERRdbP7UWlyORL+aRfp5J9/rcXmCbe7chWwTrWIYxEJO38iPFieS EB5TEfrACtkFtpEf6iW9knIkvlOIJcc= X-Proofpoint-GUID: areV2pzPcSCV96Zm1mDrmXOLffsTo1Q1 X-Proofpoint-ORIG-GUID: areV2pzPcSCV96Zm1mDrmXOLffsTo1Q1 X-Authority-Analysis: v=2.4 cv=dJSWXuZb c=1 sm=1 tr=0 ts=6a5486ea cx=c_pps a=Qgeoaf8Lrialg5Z894R3/Q==:117 a=Ou0eQOY4+eZoSc0qltEV5Q==:17 a=IkcTkHD0fZMA:10 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=gowsoOTTUOVcmtlkKump:22 a=EUspDBNiAAAA:8 a=UqCG9HQmAAAA:8 a=VFxxlfVBB3dI8x85gZMA:9 a=QEXdDO2ut3YA:10 a=x9snwWr2DeNwDh03kgHS:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzEzMDA2NiBTYWx0ZWRfXzl/SG7IhvadV /UBGkgWSDQRyRpPIiv1b2ztoK2Lmj/1a6sxserqdH0K0I59ElTiyHYMWZfrPumJQhNfqQU+UraO d2Fz5gOoMIjYJYyQKD/bHDbu8azevBiiPrByVWTqZ708o0MFd/IeAcV4zM3BbhaMOdR6PusWpu+ U9vMfOiMDG1F4cPWX7H53zkHbAIPRpzmSSwRIXGsvf4Phx86I701bDwPMtRYY2N3IW6T4WZ1Ssp C34BY+U6I5FIlHLOULBUSj1CNCRCAqd6kzBPskbD82HKhsnLcEZel/MGvwAmouhK3ZmU1ZdmAJw +r1H3V2ht4Fu5v+CHAnjCNYDDgsDXD4+iQ2/UewP1aUR4Gntn6S3Q6TIfV4+6xSSV/UpdKtn0Ig CgCmhYo5cX22zTRAZWr17PsOko8vmlLvN7KvfB1vAcgUjReHb+s8caPmyxUuWEWBcpu/dCcNdni d/fFMeQ/n+JCEIf+nKA== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-07-13_02,2026-07-10_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 impostorscore=0 suspectscore=0 phishscore=0 clxscore=1015 spamscore=0 priorityscore=1501 lowpriorityscore=0 adultscore=0 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607130066 From: Manikanta Mylavarapu Enable nodes required for q6 remoteproc bring up. Signed-off-by: Manikanta Mylavarapu Signed-off-by: Gokul Sriram Palanisamy Signed-off-by: George Moussalem Reviewed-by: Konrad Dybcio Reviewed-by: Dmitry Baryshkov Tested-by: Vignesh Viswanathan Signed-off-by: Varadarajan Narayanan --- arch/arm64/boot/dts/qcom/ipq9574.dtsi | 60 +++++++++++++++++++++++++++++++= +++- 1 file changed, 59 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi b/arch/arm64/boot/dts/qc= om/ipq9574.dtsi index 451c2076f6a7..fd9fd801eb98 100644 --- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi @@ -3,7 +3,7 @@ * IPQ9574 SoC device tree source * * Copyright (c) 2020-2021 The Linux Foundation. All rights reserved. - * Copyright (c) 2023-2024, Qualcomm Innovation Center, Inc. All rights re= served. + * Copyright (c) 2023-2025, Qualcomm Innovation Center, Inc. All rights re= served. */ =20 #include @@ -222,6 +222,35 @@ smem@4aa00000 { hwlocks =3D <&tcsr_mutex 3>; no-map; }; + + q6_region: wcss@4ab00000 { + reg =3D <0x0 0x4ab00000 0x0 0x2b00000>; + no-map; + }; + }; + + wcss: smp2p-wcss { + compatible =3D "qcom,smp2p"; + qcom,smem =3D <435>, <428>; + + interrupt-parent =3D <&intc>; + interrupts =3D ; + + mboxes =3D <&apcs_glb 9>; + + qcom,local-pid =3D <0>; + qcom,remote-pid =3D <1>; + + smp2p_wcss_out: master-kernel { + qcom,entry-name =3D "master-kernel"; + #qcom,smem-state-cells =3D <1>; + }; + + smp2p_wcss_in: slave-kernel { + qcom,entry-name =3D "slave-kernel"; + interrupt-controller; + #interrupt-cells =3D <2>; + }; }; =20 soc: soc@0 { @@ -924,6 +953,35 @@ frame@b128000 { }; }; =20 + q6v5_wcss: remoteproc@cd00000 { + compatible =3D "qcom,ipq9574-wcss-sec-pil"; + reg =3D <0x0cd00000 0x10000>; + firmware-name =3D "ath11k/IPQ9574/hw1.0/q6_fw.mbn"; + interrupts-extended =3D <&intc GIC_SPI 325 IRQ_TYPE_EDGE_RISING>, + <&smp2p_wcss_in 0 IRQ_TYPE_NONE>, + <&smp2p_wcss_in 1 IRQ_TYPE_NONE>, + <&smp2p_wcss_in 2 IRQ_TYPE_NONE>, + <&smp2p_wcss_in 3 IRQ_TYPE_NONE>; + interrupt-names =3D "wdog", + "fatal", + "ready", + "handover", + "stop-ack"; + + qcom,smem-states =3D <&smp2p_wcss_out 1>, + <&smp2p_wcss_out 0>; + qcom,smem-state-names =3D "stop", + "shutdown"; + memory-region =3D <&q6_region>; + + glink-edge { + interrupts =3D ; + label =3D "rtr"; + qcom,remote-pid =3D <1>; + mboxes =3D <&apcs_glb 8>; + }; + }; + pcie1: pcie@10000000 { compatible =3D "qcom,pcie-ipq9574"; reg =3D <0x10000000 0xf1d>, --=20 2.34.1