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[129.46.96.20]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-31174accb0esm78609864eec.30.2026.07.13.22.22.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 13 Jul 2026 22:22:58 -0700 (PDT) From: Fenglin Wu Date: Mon, 13 Jul 2026 22:22:54 -0700 Subject: [PATCH v3 1/3] dt-bindings: input: Add Qualcomm SPMI PMIC haptics Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260713-qcom-spmi-haptics-v3-1-c931bb7cb94f@oss.qualcomm.com> References: <20260713-qcom-spmi-haptics-v3-0-c931bb7cb94f@oss.qualcomm.com> In-Reply-To: <20260713-qcom-spmi-haptics-v3-0-c931bb7cb94f@oss.qualcomm.com> To: linux-arm-msm@vger.kernel.org, Dmitry Torokhov , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lee Jones , Stephen Boyd , Bjorn Andersson , Konrad Dybcio Cc: David Collins , Subbaraman Narayanamurthy , Kamal Wadhwa , kernel@oss.qualcomm.com, linux-input@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Fenglin Wu X-Mailer: b4 0.16-dev-17187 X-Developer-Signature: v=1; a=ed25519-sha256; t=1784006577; l=6254; i=fenglin.wu@oss.qualcomm.com; s=20260324; h=from:subject:message-id; bh=rS3MvqNewoAeiT3D77tq2VCGJ+QrQtS/FkD4B+sxN9I=; b=u73MK8Ri6wtOpWB4iDqyHgoiRhLmRGa1q80W7ytYqJo4GJBPiEFg+SRvpE7ZIO1SWvDeOPKsR zHWvMWG2NLrC7BhlR8DmSFM0/x2FoWJz0jX6+gqVNIDIUxvEFO+WsSw X-Developer-Key: i=fenglin.wu@oss.qualcomm.com; a=ed25519; pk=hJdt3E7o54lql+miD2GaxwF74cDyhgNwMbmFOZ46bRU= X-Proofpoint-GUID: ZBqzBuBW9DwmeH8oVf8nZFTenw_ffptV X-Proofpoint-ORIG-GUID: ZBqzBuBW9DwmeH8oVf8nZFTenw_ffptV X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzE0MDA1MyBTYWx0ZWRfX2t5U8KlbVtuo oaKoSJGmpJ4HV+G5FMarihiNu5YdlsVHsQ35cJnY+N4sWrSjoVTIEjie4uh94FVscyh8iYfTVDW EuQBMQI7e+wB1LDTA1bi3QagW4gI0qEhtGW53LqPaPue+ZMS5v+p93NYem+66zvIdLP/EviHXzH VchJPqfLK5ByeejqQhDArzaDkfS0GDNiXZZ+wErjtyzlVrC7wfAlPGCklsghQH/99U+Cz/qT0Pt lXjFvCJ0qnATUykYFeOcj7re3IGphyzcAK2Xn0/bLhrNCQw0gedFgA2z/ZsyixJEmhK6cSLNOwm KRuGmJKfraNqiupBogYoOxe8ntYvi5CjAsfNG9hbKEKUsrovkD9rDk0fxslbCquGyXK5yR2Utcx LV4qitqv1JtSxgY0sQikKY/I5hKRQ1eg1TM+9v+FdK1ofE0M2Ip1O0TxQcN/RjpXrc2TcF8k6Rt QnuxyvIkpveKG2oWI5w== X-Authority-Analysis: v=2.4 cv=F5hnsKhN c=1 sm=1 tr=0 ts=6a55c7b5 cx=c_pps a=oF/VQ+ItUULfLr/lQ2/icg==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=IkcTkHD0fZMA:10 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=gowsoOTTUOVcmtlkKump:22 a=gEfo2CItAAAA:8 a=EUspDBNiAAAA:8 a=bI6yuv9Qsz7HNVLwNVgA:9 a=QEXdDO2ut3YA:10 a=3WC7DwWrALyhR5TkjVHa:22 a=sptkURWiP4Gy88Gu7hUp:22 X-Proofpoint-Spam-Info: AW1haW4tMjYwNzE0MDA1MyBTYWx0ZWRfX+YoS7OirfruZ pRsaOn3dMTveFKgtF32S3DC2yo+Ouqr7zSPC/1U3yXSx9gNwCOeK1d1CXQC/BDE1R5QEM6rHjFI NntSvB/SOYI5pZlmD7C0Lkmr+7OH4Qk= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-07-14_01,2026-07-10_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 bulkscore=0 malwarescore=0 priorityscore=1501 suspectscore=0 clxscore=1015 adultscore=0 impostorscore=0 lowpriorityscore=0 spamscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607140053 Add binding document for the haptics module inside Qualcomm PMIC PMIH0108. Assisted-by: Claude:claude-4-8-opus Signed-off-by: Fenglin Wu Reviewed-by: Krzysztof Kozlowski --- .../bindings/input/qcom,spmi-haptics.yaml | 136 +++++++++++++++++= ++++ 1 file changed, 136 insertions(+) diff --git a/Documentation/devicetree/bindings/input/qcom,spmi-haptics.yaml= b/Documentation/devicetree/bindings/input/qcom,spmi-haptics.yaml new file mode 100644 index 000000000000..b1a69e9886ee --- /dev/null +++ b/Documentation/devicetree/bindings/input/qcom,spmi-haptics.yaml @@ -0,0 +1,136 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/input/qcom,spmi-haptics.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Haptics device inside Qualcomm Technologies, Inc. PMIC + +maintainers: + - Fenglin Wu + +description: | + Certain Qualcomm PMICs integrate a haptics module, such as the HAP530_HV= haptics + module in the PMIH0108 PMIC, which drives an LRA (Linear Resonant Actuat= or) with + an output voltage up to 10 V. Several play modes are supported in HAP530= _HV: + + DIRECT_PLAY: The hardware outputs sinusoidal waveforms whose period is + defined by qcom,lra-period-us and whose peak voltage is defined by + qcom,vmax-microvolt. The driving amplitude can be scaled in the range + [0, 255] via a single register byte. Hardware-based LRA auto-resona= nce + tracking is enabled by default in this mode, allowing the haptics en= gine + to follow the actual resonant frequency of the LRA and update the dr= iving + period accordingly to achieve stronger vibration magnitude. + + FIFO: The hardware can play an arbitrary waveform composed of a sequen= ce + of 8-bit samples at a configurable play rate. Samples are pre-filled + into the internal FIFO memory of the haptics module and continuously + replenished via the FIFO-empty IRQ until all samples have been playe= d. + An 8K-byte FIFO memory bank is available in the HAP530_HV haptics mo= dule, + shared between the FIFO and PAT_MEM play modes. The memory partition + between the two modes is configurable via registers, and FIFO mode a= lways + uses the 1st partition starting from offset 0. + + PAT_MEM: This mode is very similar to FIFO streaming mode but without = the + data refilling capability. It is designed mainly for short, latency-= critical + vibrations. The memory space for PAT_MEM mode must be reserved for d= edicated + usage, and the waveform data should be preloaded and remain unchanged + thereafter. The haptics module can play the waveform data from the m= emory + region specified by the PAT_MEM play start address and length regist= ers. + + In either FIFO mode or PAT_MEM mode, the following play rates are supp= orted: + -- 0(T_LRA): each FIFO byte drives one full sinusoidal cycle with the + period defined in qcom,lra-period-us. + -- 1/2/3(T_LRA_DIV_2/4/8): each FIFO byte drives a half/quarter/eigh= th + sinusoidal cycle with the period defined in qcom,lra-period-us. + -- 4/5/6(T_LRA_X_2/4/8): each FIFO byte drives 2/4/8 sinusoidal cycl= es + with the period defined in qcom,lra-period-us. + -- 8/9/10/11/12/13(8KHz/16KHz/24KHz/32KHz/44.1KHz/48KHz): the FIFO + data is treated as PCM samples and drives the output with an + arbitrarily shaped waveform. This mode is typically used to define + custom driving waveforms for specific vibration effects such as fa= st + attack, crisp brake, etc. + + The drive voltage in FIFO or PAT_MEM mode can exceed the value defined= in + qcom,vmax-microvolt to achieve a special vibration effect, but the wav= eform + must be short enough to prevent the LRA from being damaged by operatin= g at + an overvoltage. + + Also, hardware-based LRA auto-resonance tracking is normally disabled = in + FIFO or PAT_MEM mode, as these modes are intended to drive arbitrary + waveforms that may not follow the resonant frequency; autonomous hardw= are + resonance correction would interfere with the intended output. + +properties: + compatible: + items: + - const: qcom,pmih0108-haptics + - const: qcom,spmi-haptics + + reg: + items: + - description: HAP_CFG module base address + - description: HAP_PTN module base address + + reg-names: + items: + - const: cfg + - const: ptn + + interrupts: + maxItems: 1 + + interrupt-names: + items: + - const: fifo-empty + + qcom,vmax-microvolt: + description: + Maximum allowed output driving voltage in microvolts, must be a mult= iple + of 50,000 uV. This is the peak driving voltage in DIRECT_PLAY mode, + which outputs sinusoidal waveforms. The value should be equal to the + square root of 2 times the Vrms voltage of the LRA. + minimum: 50000 + maximum: 10000000 + multipleOf: 50000 + + qcom,lra-period-us: + description: + LRA actuator initial resonance period in microseconds + (1,000,000 / resonant_freq_hz). Used to configure T_LRA-based play + rates and the auto-resonance zero-crossing window. It could be also = used + as the initial period if the LRA wants to be driven off resonance. + minimum: 5 + maximum: 20475 + multipleOf: 5 + +required: + - compatible + - reg + - reg-names + - interrupts + - interrupt-names + - qcom,vmax-microvolt + - qcom,lra-period-us + +additionalProperties: false + +examples: + - | + #include + + pmic { + #address-cells =3D <1>; + #size-cells =3D <0>; + + haptics@f000 { + compatible =3D "qcom,pmih0108-haptics", "qcom,spmi-haptics"; + reg =3D <0xf000>, <0xf100>; + reg-names =3D "cfg", "ptn"; + interrupts =3D <0x7 0xf0 0x1 IRQ_TYPE_EDGE_RISING>; + interrupt-names =3D "fifo-empty"; + + qcom,vmax-microvolt =3D <1300000>; + qcom,lra-period-us =3D <5880>; + }; + }; --=20 2.43.0 From nobody Sat Jul 25 20:06:06 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8606F3264C1 for ; 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Signed-off-by: Fenglin Wu Reviewed-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml b/Do= cumentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml index 644c42b5e2e5..773f4cba5935 100644 --- a/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml +++ b/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml @@ -165,6 +165,10 @@ patternProperties: type: object $ref: /schemas/pinctrl/qcom,pmic-gpio.yaml# =20 + "^haptics@[0-9a-f]+$": + type: object + $ref: /schemas/input/qcom,spmi-haptics.yaml# + "^led-controller@[0-9a-f]+$": type: object $ref: /schemas/leds/qcom,spmi-flash-led.yaml# --=20 2.43.0 From nobody Sat Jul 25 20:06:06 2026 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 772AF329371 for ; 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[129.46.96.20]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-31174accb0esm78609864eec.30.2026.07.13.22.23.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 13 Jul 2026 22:23:01 -0700 (PDT) From: Fenglin Wu Date: Mon, 13 Jul 2026 22:22:56 -0700 Subject: [PATCH v3 3/3] input: misc: Add Qualcomm SPMI PMIC haptics driver Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260713-qcom-spmi-haptics-v3-3-c931bb7cb94f@oss.qualcomm.com> References: <20260713-qcom-spmi-haptics-v3-0-c931bb7cb94f@oss.qualcomm.com> In-Reply-To: <20260713-qcom-spmi-haptics-v3-0-c931bb7cb94f@oss.qualcomm.com> To: linux-arm-msm@vger.kernel.org, Dmitry Torokhov , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lee Jones , Stephen Boyd , Bjorn Andersson , Konrad Dybcio Cc: David Collins , Subbaraman Narayanamurthy , Kamal Wadhwa , kernel@oss.qualcomm.com, linux-input@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Fenglin Wu X-Mailer: b4 0.16-dev-17187 X-Developer-Signature: v=1; a=ed25519-sha256; t=1784006577; l=35104; i=fenglin.wu@oss.qualcomm.com; s=20260324; h=from:subject:message-id; bh=ObGh6NEsLBZOcf4NGA8sXlRs8XO89ICGKMwC1CWLiPY=; b=SAC+L2+3wLi5G7dMJS4Jnl+NrynMklbqvxSDRsLnn5nwBzmywA9iRa31+hXDnE5BjorxX4bAG fr+2C65s7BvA9hUdkmJELe9TcZ3t0U99JdkHw9HFUlbAfIolPiFFioa X-Developer-Key: i=fenglin.wu@oss.qualcomm.com; a=ed25519; pk=hJdt3E7o54lql+miD2GaxwF74cDyhgNwMbmFOZ46bRU= X-Proofpoint-GUID: _heXYxEiH-s8PDMcOh1jj6IGC4Xqr_5A X-Proofpoint-ORIG-GUID: _heXYxEiH-s8PDMcOh1jj6IGC4Xqr_5A X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzE0MDA1MyBTYWx0ZWRfXy31dD+pUZQWm uGLdfyAn7aTIuiyXjhEjMa6tf22tJJheen8NHzXXY5cH9Qow1jOe/8/WzdMPVfCXpFq3rAWg8A3 HylTsDJFjUTBqMPe/R5i0ZsEuEv58nsNOJIMv7wU5bAyFzdu7kRudEVq6Vl4L8hWA7PUZGpjqo2 qFW0x2ZTeKvkuQeS8Rqm3LHjpo+BRORKWMY+klSt1lYr7PQJ86n2ucLGdDcPvv+7wCsSTf1BDMb LMbOQkZd1MMHJtpRccKZnyXM6MfqvQWJl/GfE+P7fFQ8tPmy+UngB3XLjbGjnstRfcAyFHxd5OR gGKuokWDddXiKiLHuER2TgJ97XOumv0sMIpabo/UKtVo2npAK8EqnImcKl5Jzm9SWZeW2lw81dc lNngMyf9GoWyLZ/MW6zpgI4kEReGLNwKfL3eI4rp2L1jVGd8tu446LpR5NiDA2oV4zxMusVFcCr 7+rNBI7WvgkFuHzsyww== X-Authority-Analysis: v=2.4 cv=F5hnsKhN c=1 sm=1 tr=0 ts=6a55c7ba cx=c_pps a=Oh5Dbbf/trHjhBongsHeRQ==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=IkcTkHD0fZMA:10 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=gowsoOTTUOVcmtlkKump:22 a=EUspDBNiAAAA:8 a=tiPXcSdVw975Ug70q0YA:9 a=wVMyrRT0KRx5ck5g:21 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=_Vgx9l1VpLgwpw_dHYaR:22 X-Proofpoint-Spam-Info: AW1haW4tMjYwNzE0MDA1MyBTYWx0ZWRfX4/qRmUXDWrW7 imQr7RPVZUl3Kao8y0Svryc/FTCLwVz4KAMHPpTcsLimRJWVZEsCvVkVG1EAG/kQfgYAB3KboO/ lYcGgV62+qQX0KA51/Rp8HwRexu+ir8= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-07-14_01,2026-07-10_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 bulkscore=0 malwarescore=0 priorityscore=1501 suspectscore=0 clxscore=1015 adultscore=0 impostorscore=0 lowpriorityscore=0 spamscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607140053 Add an initial driver for the Qualcomm PMIH0108 PMIC haptics module, named as HAP530_HV. This module supports several play modes, including DIRECT_PLAY, FIFO, PAT_MEM, and SWR, each with distinct data sourcing and hardware data handling logic. Currently, the driver provides support for two play modes using the input force-feedback framework: FF_CONSTANT effect for DIRECT_PLAY mode and FF_PERIODIC effect with FF_CUSTOM waveform for FIFO mode. Assisted-by: Claude:claude-4-8-opus Signed-off-by: Fenglin Wu --- drivers/input/misc/Kconfig | 11 + drivers/input/misc/Makefile | 1 + drivers/input/misc/qcom-spmi-haptics.c | 1160 ++++++++++++++++++++++++++++= ++++ 3 files changed, 1172 insertions(+) diff --git a/drivers/input/misc/Kconfig b/drivers/input/misc/Kconfig index 1f6c57dba030..4f40940973e4 100644 --- a/drivers/input/misc/Kconfig +++ b/drivers/input/misc/Kconfig @@ -236,6 +236,17 @@ config INPUT_PMIC8XXX_PWRKEY To compile this driver as a module, choose M here: the module will be called pmic8xxx-pwrkey. =20 +config INPUT_QCOM_SPMI_HAPTICS + tristate "Qualcomm SPMI PMIC haptics support" + depends on MFD_SPMI_PMIC + help + Say Y to enable support for the Qualcomm PMIH0108 SPMI PMIC haptics + module. Supports DIRECT_PLAY, FIFO streaming play modes via the + Linux input force-feedback framework. + + To compile this driver as a module, choose M here: the module will + be called qcom-spmi-haptics. + config INPUT_SPARCSPKR tristate "SPARC Speaker support" depends on PCI && SPARC64 diff --git a/drivers/input/misc/Makefile b/drivers/input/misc/Makefile index 2281d6803fce..c5c9aa139a11 100644 --- a/drivers/input/misc/Makefile +++ b/drivers/input/misc/Makefile @@ -69,6 +69,7 @@ obj-$(CONFIG_INPUT_PMIC8XXX_PWRKEY) +=3D pmic8xxx-pwrkey.o obj-$(CONFIG_INPUT_POWERMATE) +=3D powermate.o obj-$(CONFIG_INPUT_PWM_BEEPER) +=3D pwm-beeper.o obj-$(CONFIG_INPUT_PWM_VIBRA) +=3D pwm-vibra.o +obj-$(CONFIG_INPUT_QCOM_SPMI_HAPTICS) +=3D qcom-spmi-haptics.o obj-$(CONFIG_INPUT_QNAP_MCU) +=3D qnap-mcu-input.o obj-$(CONFIG_INPUT_RAVE_SP_PWRBUTTON) +=3D rave-sp-pwrbutton.o obj-$(CONFIG_INPUT_RB532_BUTTON) +=3D rb532_button.o diff --git a/drivers/input/misc/qcom-spmi-haptics.c b/drivers/input/misc/qc= om-spmi-haptics.c new file mode 100644 index 000000000000..ffbef7453459 --- /dev/null +++ b/drivers/input/misc/qcom-spmi-haptics.c @@ -0,0 +1,1160 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* HAP_CFG register offsets, bit fields, value constants */ +#define HAP_CFG_INT_RT_STS_REG 0x10 +#define FIFO_EMPTY_BIT BIT(1) +#define HAP_CFG_EN_CTL_REG 0x46 +#define HAPTICS_EN_BIT BIT(7) +#define HAP_CFG_VMAX_REG 0x48 +#define VMAX_STEP_MV 50 +#define VMAX_MV_MAX 10000 +#define HAP_CFG_SPMI_PLAY_REG 0x4C +#define PLAY_EN_BIT BIT(7) +#define PAT_SRC_MASK GENMASK(2, 0) +#define PAT_SRC_FIFO 0 +#define PAT_SRC_DIRECT_PLAY 1 +#define HAP_CFG_TLRA_OL_HIGH_REG 0x5C +#define TLRA_OL_MSB_MASK GENMASK(3, 0) +#define TLRA_STEP_US 5 +#define TLRA_US_MAX 20475 +#define HAP_CFG_TLRA_OL_LOW_REG 0x5D +#define HAP_CFG_DRV_DUTY_CFG_REG 0x60 +#define ADT_DRV_DUTY_EN_BIT BIT(7) +#define ADT_BRK_DUTY_EN_BIT BIT(6) +#define DRV_DUTY_MASK GENMASK(5, 3) +#define AUTORES_DRV_DUTY_62P5 2 +#define BRK_DUTY_MASK GENMASK(2, 0) +#define AUTORES_BRK_DUTY_62P5 5 +#define HAP_CFG_ZX_WIND_CFG_REG 0x62 +#define ZX_DEBOUNCE_MASK GENMASK(6, 4) +#define AUTORES_ZX_DEBOUNCE 3 +#define ZX_WIN_HEIGHT_MASK GENMASK(2, 0) +#define AUTORES_ZX_WIN_HEIGHT 2 +#define HAP_CFG_AUTORES_CFG_REG 0x63 +#define AUTORES_EN_BIT BIT(7) +#define AUTORES_EN_DLY_MASK GENMASK(6, 2) +#define AUTORES_EN_DLY_CYCLES 10 +#define AUTORES_ERR_WIN_MASK GENMASK(1, 0) +#define AUTORES_ERR_WIN_25PCT 1 +#define HAP_CFG_FAULT_CLR_REG 0x66 +#define ZX_TO_FAULT_CLR_BIT BIT(4) +#define SC_CLR_BIT BIT(2) +#define AUTO_RES_ERR_CLR_BIT BIT(1) +#define HPWR_RDY_FAULT_CLR_BIT BIT(0) +#define FAULT_CLR_ALL (ZX_TO_FAULT_CLR_BIT | SC_CLR_BIT | \ + AUTO_RES_ERR_CLR_BIT | HPWR_RDY_FAULT_CLR_BIT) +#define HAP_CFG_RAMP_DN_CFG2_REG 0x86 +#define AUTORES_PRE_HIZ_DLY_10US 1 + +/* HAP_PTN register offsets, bit fields, value constants */ +#define HAP_PTN_REVISION2_REG 0x01 +#define HAP_PTN_FIFO_DIN_0_REG 0x20 +#define HAP_PTN_FIFO_PLAY_RATE_REG 0x24 +#define FIFO_PLAY_RATE_MASK GENMASK(3, 0) +#define HAP_PTN_DIRECT_PLAY_REG 0x26 +#define HAP_PTN_FIFO_EMPTY_CFG_REG 0x2A +#define FIFO_THRESH_LSB 64 +#define HAP_PTN_FIFO_DIN_1B_REG 0x2C +#define HAP_PTN_MEM_OP_ACCESS_REG 0x2D +#define MEM_FLUSH_RELOAD_BIT BIT(0) +#define HAP_PTN_MMAP_FIFO_REG 0xA0 +#define MMAP_FIFO_EXIST_BIT BIT(7) +#define MMAP_FIFO_LEN_MASK GENMASK(6, 0) +#define HAP_PTN_PATX_PLAY_CFG_REG 0xA2 + +#define HAP530_MEM_TOTAL_BYTES 8192 +#define FIFO_EMPTY_THRESH 280 +#define FIFO_INIT_FILL 320 + +#define HAPTICS_AUTOSUSPEND_MS 1000 + +/* + * FF_CUSTOM data layout (custom_data[] of type s16): + * [0] =3D play rate (PLAY_RATE_*) + * [1] =3D vmax in mV (0 =3D use device default from qcom,vmax-microvolt) + * [2..N-1] =3D signed 8-bit PCM samples packed one per s16 (lower byte = used) + */ +#define CUSTOM_DATA_RATE_IDX 0 +#define CUSTOM_DATA_VMAX_IDX 1 +#define CUSTOM_DATA_SAMPLE_START 2 +#define CUSTOM_DATA_MAX_LEN (48 * 1024) + +#define HAPTICS_MAX_EFFECTS 8 + +enum qcom_haptics_mode { + HAPTICS_MODE_NONE, + HAPTICS_DIRECT_PLAY, + HAPTICS_FIFO, +}; + +enum qcom_haptics_play_rate { + PLAY_RATE_T_LRA =3D 0, + PLAY_RATE_T_LRA_DIV_2 =3D 1, + PLAY_RATE_T_LRA_DIV_4 =3D 2, + PLAY_RATE_T_LRA_DIV_8 =3D 3, + PLAY_RATE_T_LRA_X_2 =3D 4, + PLAY_RATE_T_LRA_X_4 =3D 5, + PLAY_RATE_T_LRA_X_8 =3D 6, + PLAY_RATE_RESERVED =3D 7, + PLAY_RATE_F_8KHZ =3D 8, + PLAY_RATE_F_16KHZ =3D 9, + PLAY_RATE_F_24KHZ =3D 10, + PLAY_RATE_F_32KHZ =3D 11, + PLAY_RATE_F_44P1KHZ =3D 12, + PLAY_RATE_F_48KHZ =3D 13, + PLAY_RATE_MAX =3D PLAY_RATE_F_48KHZ, +}; + +/** + * struct qcom_haptics_effect: A haptics effect + * @mode: haptics HW play mode + * @vmax_mv: peak voltage of the haptics output waveform + * @length_us: vibration play duration + * @amplitude: DIRECT_PLAY mode output waveform amplitude + * @play_rate: FIFO mode play rate + * @fifo_data: 8-bit data samples consumed in FIFO mode + * @data_len: length of the FIFO data samples + */ +struct qcom_haptics_effect { + enum qcom_haptics_mode mode; + u32 vmax_mv; + u32 length_us; + + u8 amplitude; + + enum qcom_haptics_play_rate play_rate; + s8 *fifo_data; + u32 data_len; +}; + +/** + * struct haptics_play_req: A haptics play request + * @node: list node of the request + * @effect_id: effect index of the request + * @play: flag of starting or stopping the play + */ +struct haptics_play_req { + struct list_head node; + int effect_id; + bool play; +}; + +/** + * struct qcom_haptics + * @dev: underlying SPMI device + * @regmap: regmap for SPMI register access + * @input: input device exposing the FF interface + * @cfg_base: base address of the CFG peripheral + * @ptn_base: base address of the PTN peripheral + * @t_lra_us: LRA resonance period in microseconds + * @vmax_mv: maximum actuator drive voltage in millivolts + * @fifo_len: programmed HW FIFO depth in bytes + * @gain: playback gain scaler + * @play_work: delayed work that plays the queued requests + * @play_lock: mutex lock to serialize playbacks + * @play_queue_lock: spinlock protecting @play_queue + * @play_queue: The list of pending start/stop requests + * @active_effect_id: index into @effects[] currently under play + * @active_mode: mode of the effect currently armed in hardware + * @fifo_empty_irq: IRQ number for the FIFO-empty interrupt + * @pm_ref_held: true while a pm_runtime_get is held + * @irq_enabled: true if fifo_empty_irq is enabled + * @fifo_lock: mutex protecting the FIFO streaming data + * @fifo_data: pointer of the data buffer for FIFO streaming + * @data_len: length of the data buffer for current effect + * @data_written: number of samples written to the hardware FIFO + * @effects: table of the effects + */ +struct qcom_haptics { + struct device *dev; + struct regmap *regmap; + struct input_dev *input; + + u32 cfg_base; + u32 ptn_base; + u32 t_lra_us; + u32 vmax_mv; + u32 fifo_len; + atomic_t gain; + + struct delayed_work play_work; + struct mutex play_lock; /* mutex used to serialize playbacks */ + + spinlock_t play_queue_lock; /* protects play_queue */ + struct list_head play_queue; + + int active_effect_id; + enum qcom_haptics_mode active_mode; + + int fifo_empty_irq; + bool pm_ref_held; + bool irq_enabled; + + struct mutex fifo_lock; /* protect the FIFO data during play */ + const s8 *fifo_data; + u32 data_len; + u32 data_written; + + struct qcom_haptics_effect effects[HAPTICS_MAX_EFFECTS]; +}; + +static int cfg_write(struct qcom_haptics *h, u32 off, u32 val) +{ + return regmap_write(h->regmap, h->cfg_base + off, val); +} + +static int cfg_update_bits(struct qcom_haptics *h, u32 off, u32 mask, u32 = val) +{ + return regmap_update_bits(h->regmap, h->cfg_base + off, mask, val); +} + +static int ptn_write(struct qcom_haptics *h, u32 off, u32 val) +{ + return regmap_write(h->regmap, h->ptn_base + off, val); +} + +static int ptn_update_bits(struct qcom_haptics *h, u32 off, u32 mask, u32 = val) +{ + return regmap_update_bits(h->regmap, h->ptn_base + off, mask, val); +} + +static int ptn_bulk_write(struct qcom_haptics *h, u32 off, + const void *buf, size_t count) +{ + return regmap_bulk_write(h->regmap, h->ptn_base + off, buf, count); +} + +static int haptics_clear_faults(struct qcom_haptics *h) +{ + return cfg_write(h, HAP_CFG_FAULT_CLR_REG, FAULT_CLR_ALL); +} + +static int haptics_set_vmax(struct qcom_haptics *h, u32 vmax_mv) +{ + return cfg_write(h, HAP_CFG_VMAX_REG, vmax_mv / VMAX_STEP_MV); +} + +static int haptics_config_lra_period(struct qcom_haptics *h) +{ + u32 tmp =3D h->t_lra_us / TLRA_STEP_US; + int ret; + + ret =3D cfg_write(h, HAP_CFG_TLRA_OL_HIGH_REG, (tmp >> 8) & TLRA_OL_MSB_M= ASK); + if (ret) + return ret; + + return cfg_write(h, HAP_CFG_TLRA_OL_LOW_REG, tmp & 0xFF); +} + +static int haptics_enable_module(struct qcom_haptics *h, bool enable) +{ + return cfg_update_bits(h, HAP_CFG_EN_CTL_REG, HAPTICS_EN_BIT, + enable ? HAPTICS_EN_BIT : 0); +} + +static int haptics_configure_autores(struct qcom_haptics *h) +{ + int ret; + + /* AUTORES_CFG: enable, 10-cycle delay, 25% error window */ + ret =3D cfg_write(h, HAP_CFG_AUTORES_CFG_REG, + AUTORES_EN_BIT | + FIELD_PREP(AUTORES_EN_DLY_MASK, AUTORES_EN_DLY_CYCLES) | + FIELD_PREP(AUTORES_ERR_WIN_MASK, AUTORES_ERR_WIN_25PCT)); + if (ret) + return ret; + + /* DRV_DUTY: adaptive drive/brake duty cycles at 62.5% */ + ret =3D cfg_write(h, HAP_CFG_DRV_DUTY_CFG_REG, + ADT_DRV_DUTY_EN_BIT | ADT_BRK_DUTY_EN_BIT | + FIELD_PREP(DRV_DUTY_MASK, AUTORES_DRV_DUTY_62P5) | + FIELD_PREP(BRK_DUTY_MASK, AUTORES_BRK_DUTY_62P5)); + if (ret) + return ret; + + /* Pre-HIZ delay: 10 =C2=B5s */ + ret =3D cfg_write(h, HAP_CFG_RAMP_DN_CFG2_REG, AUTORES_PRE_HIZ_DLY_10US); + if (ret) + return ret; + + /* Zero-cross window: debounce 3, no hysteresis, height 2 */ + return cfg_write(h, HAP_CFG_ZX_WIND_CFG_REG, + FIELD_PREP(ZX_DEBOUNCE_MASK, AUTORES_ZX_DEBOUNCE) | + FIELD_PREP(ZX_WIN_HEIGHT_MASK, AUTORES_ZX_WIN_HEIGHT)); +} + +static int haptics_write_fifo_chunk(struct qcom_haptics *h, + const s8 *data, u32 len) +{ + u32 bulk_len =3D ALIGN_DOWN(len, 4); + int i, ret; + + /* + * FIFO data writing supports both 4-byte bulk writes using registers + * [HAP_PTN_FIFO_DIN_0_REG ... HAP_PTN_FIFO_DIN_3_REG], and 1-byte writes + * using the HAP_PTN_FIFO_DIN_1B_REG register. The 4-byte bulk write is m= ore + * efficient, so use 4-byte writes for the initial 4-byte aligned data, + * and 1-byte writes for any trailing remainder. + */ + for (i =3D 0; i < bulk_len; i +=3D 4) { + ret =3D ptn_bulk_write(h, HAP_PTN_FIFO_DIN_0_REG, &data[i], 4); + if (ret) + return ret; + } + + for (; i < len; i++) { + ret =3D ptn_write(h, HAP_PTN_FIFO_DIN_1B_REG, (u8)data[i]); + if (ret) + return ret; + } + + return 0; +} + +static int haptics_configure_fifo_mmap(struct qcom_haptics *h) +{ + u32 fifo_len, fifo_units; + + /* Config all memory space for FIFO usage for now */ + fifo_len =3D HAP530_MEM_TOTAL_BYTES; + fifo_len =3D ALIGN_DOWN(fifo_len, 64); + fifo_units =3D fifo_len / 64; + h->fifo_len =3D fifo_len; + + return ptn_write(h, HAP_PTN_MMAP_FIFO_REG, + MMAP_FIFO_EXIST_BIT | + FIELD_PREP(MMAP_FIFO_LEN_MASK, fifo_units - 1)); +} + +static u32 haptics_gain_scaled_vmax(struct qcom_haptics *h, u32 vmax_mv) +{ + u16 gain =3D atomic_read(&h->gain); + u32 v =3D mult_frac(vmax_mv, gain, 0xFFFF); + + return max_t(u32, v, VMAX_STEP_MV); +} + +static void haptics_fifo_irq_enable(struct qcom_haptics *h, bool enable) +{ + if (h->irq_enabled =3D=3D enable) + return; + + if (enable) + enable_irq(h->fifo_empty_irq); + else + disable_irq(h->fifo_empty_irq); + + h->irq_enabled =3D enable; +} + +static int haptics_enqueue_play_req(struct qcom_haptics *h, int effect_id,= bool play) +{ + struct haptics_play_req *req; + + guard(spinlock_irqsave)(&h->play_queue_lock); + + /* + * Coalesce with an already queued request for + * the same effect instead of appending. + */ + list_for_each_entry(req, &h->play_queue, node) { + if (req->effect_id =3D=3D effect_id) { + req->play =3D play; + return 0; + } + } + + req =3D kmalloc_obj(*req, GFP_ATOMIC); + if (!req) + return -ENOMEM; + + req->effect_id =3D effect_id; + req->play =3D play; + + list_add_tail(&req->node, &h->play_queue); + + return 0; +} + +static struct haptics_play_req *haptics_dequeue_play_req(struct qcom_hapti= cs *h) +{ + struct haptics_play_req *req =3D NULL; + + guard(spinlock_irqsave)(&h->play_queue_lock); + + if (!list_empty(&h->play_queue)) { + req =3D list_first_entry(&h->play_queue, struct haptics_play_req, node); + list_del(&req->node); + } + + return req; +} + +static bool haptics_queue_pending(struct qcom_haptics *h) +{ + guard(spinlock_irqsave)(&h->play_queue_lock); + + return !list_empty(&h->play_queue); +} + +static void haptics_queue_remove_effect(struct qcom_haptics *h, int effect= _id) +{ + struct haptics_play_req *req, *tmp; + + guard(spinlock_irqsave)(&h->play_queue_lock); + + list_for_each_entry_safe(req, tmp, &h->play_queue, node) { + if (req->effect_id =3D=3D effect_id) { + list_del(&req->node); + kfree(req); + } + } +} + +static void haptics_queue_flush(struct qcom_haptics *h) +{ + struct haptics_play_req *req, *tmp; + + guard(spinlock_irqsave)(&h->play_queue_lock); + + list_for_each_entry_safe(req, tmp, &h->play_queue, node) { + list_del(&req->node); + kfree(req); + } +} + +static int haptics_start_direct_play(struct qcom_haptics *h, int effect_id) +{ + struct qcom_haptics_effect *eff =3D &h->effects[effect_id]; + int ret; + + ret =3D haptics_clear_faults(h); + if (ret) + return ret; + + /* Enable auto-resonance for DIRECT_PLAY mode */ + ret =3D cfg_update_bits(h, HAP_CFG_AUTORES_CFG_REG, + AUTORES_EN_BIT, AUTORES_EN_BIT); + if (ret) + return ret; + + ret =3D haptics_set_vmax(h, haptics_gain_scaled_vmax(h, h->vmax_mv)); + if (ret) + return ret; + + ret =3D ptn_write(h, HAP_PTN_DIRECT_PLAY_REG, eff->amplitude); + if (ret) + return ret; + + return cfg_write(h, HAP_CFG_SPMI_PLAY_REG, + PLAY_EN_BIT | FIELD_PREP(PAT_SRC_MASK, PAT_SRC_DIRECT_PLAY)); +} + +static int haptics_start_fifo(struct qcom_haptics *h, int effect_id) +{ + struct qcom_haptics_effect *eff =3D &h->effects[effect_id]; + u32 vmax =3D eff->vmax_mv ? eff->vmax_mv : h->vmax_mv; + u32 init_len; + bool data_done; + int ret; + + if (!eff->fifo_data || !eff->data_len) + return -EINVAL; + + ret =3D haptics_clear_faults(h); + if (ret) + return ret; + + /* Disable auto-resonance for FIFO mode */ + ret =3D cfg_update_bits(h, HAP_CFG_AUTORES_CFG_REG, AUTORES_EN_BIT, 0); + if (ret) + return ret; + + ret =3D haptics_set_vmax(h, haptics_gain_scaled_vmax(h, vmax)); + if (ret) + return ret; + + ret =3D ptn_update_bits(h, HAP_PTN_FIFO_PLAY_RATE_REG, + FIFO_PLAY_RATE_MASK, + FIELD_PREP(FIFO_PLAY_RATE_MASK, eff->play_rate)); + if (ret) + return ret; + + /* Flush FIFO before loading new data */ + ret =3D ptn_write(h, HAP_PTN_MEM_OP_ACCESS_REG, MEM_FLUSH_RELOAD_BIT); + if (ret) + return ret; + ret =3D ptn_write(h, HAP_PTN_MEM_OP_ACCESS_REG, 0); + if (ret) + return ret; + + guard(mutex)(&h->fifo_lock); + + /* Write the initial chunk and initialise streaming state */ + init_len =3D min_t(u32, eff->data_len, FIFO_INIT_FILL); + ret =3D haptics_write_fifo_chunk(h, eff->fifo_data, init_len); + if (ret) + return ret; + + h->fifo_data =3D eff->fifo_data; + h->data_len =3D eff->data_len; + h->data_written =3D init_len; + + /* + * Set empty threshold. When threshold > 0 the hardware fires the + * FIFO-empty interrupt when occupancy drops below the threshold, + * allowing the driver to refill. A threshold of 0 disables the IRQ. + */ + data_done =3D (h->data_written >=3D h->data_len); + if (!data_done) { + ret =3D ptn_write(h, HAP_PTN_FIFO_EMPTY_CFG_REG, + FIFO_EMPTY_THRESH / FIFO_THRESH_LSB); + if (ret) + goto free_fifo; + + haptics_fifo_irq_enable(h, true); + } + + ret =3D cfg_write(h, HAP_CFG_SPMI_PLAY_REG, + PLAY_EN_BIT | FIELD_PREP(PAT_SRC_MASK, PAT_SRC_FIFO)); + if (ret) { + dev_err(h->dev, "trigger FIFO play failed, ret=3D%d\n", ret); + goto fail; + } + + return 0; + +fail: + ptn_write(h, HAP_PTN_FIFO_EMPTY_CFG_REG, 0); + haptics_fifo_irq_enable(h, false); +free_fifo: + h->fifo_data =3D NULL; + return ret; +} + +/* + * haptics_fifo_empty_irq: Threaded IRQ handler for the FIFO-empty interru= pt. + * + * While a FIFO play is in progress the hardware fires this interrupt when + * the number of samples in the FIFO drops below the programmed threshold. + * The handler refills the FIFO from the effect's data buffer. When all + * samples have been written the threshold is set to zero. The HW would + * stop the play automatically after all of the samples in FIFO memory are + * played out. + */ +static irqreturn_t haptics_fifo_empty_irq(int irq, void *dev_id) +{ + struct qcom_haptics *h =3D dev_id; + u32 sts, to_write; + int ret; + + ret =3D regmap_read(h->regmap, + h->cfg_base + HAP_CFG_INT_RT_STS_REG, &sts); + if (ret || !(sts & FIFO_EMPTY_BIT)) + return IRQ_HANDLED; + + guard(mutex)(&h->fifo_lock); + + if (!h->fifo_data) + return IRQ_HANDLED; + + /* Refill: write the next chunk */ + to_write =3D min_t(u32, h->data_len - h->data_written, + h->fifo_len - FIFO_EMPTY_THRESH); + ret =3D haptics_write_fifo_chunk(h, &h->fifo_data[h->data_written], to_wr= ite); + if (ret) { + dev_err(h->dev, "refill FIFO samples failed, ret=3D%d\n", ret); + return IRQ_HANDLED; + } + + h->data_written +=3D to_write; + + /* Disable the interrupt after all the data is queued */ + if (h->data_written >=3D h->data_len) + ptn_write(h, HAP_PTN_FIFO_EMPTY_CFG_REG, 0); + + return IRQ_HANDLED; +} + +/* + * haptics_stop_locked: stop play in HW and put runtime PM + * @h: haptics device + * @put_noidle: a flag to put noidle + * + * Stop HW play, clear the FIFO data if the active effect was FIFO-mode, a= nd + * put runtime PM into either noidle or autosuspend based on put_noidle fl= ag. + * + * Must be called with play_lock held. + */ +static void haptics_stop_locked(struct qcom_haptics *h, bool put_noidle) +{ + cfg_write(h, HAP_CFG_SPMI_PLAY_REG, 0); + + if (h->active_mode =3D=3D HAPTICS_FIFO) { + ptn_write(h, HAP_PTN_FIFO_EMPTY_CFG_REG, 0); + haptics_fifo_irq_enable(h, false); + scoped_guard(mutex, &h->fifo_lock) { + h->fifo_data =3D NULL; + } + } + + h->active_effect_id =3D -1; + h->active_mode =3D HAPTICS_MODE_NONE; + + if (h->pm_ref_held) { + if (put_noidle) + pm_runtime_put_noidle(h->dev); + else + pm_runtime_put_autosuspend(h->dev); + + h->pm_ref_held =3D false; + } +} + +/* + * haptics_start_locked: start to play an effect + * @h: haptics device + * @effect_id: the index of the effect + * + * If an effect is currently active, stop it 1st. Acquires a PM ref + * if not already held, and then trigger the play based on the + * play mode. Update active_effect_id/active_mode on success. + * + * Must be called with play_lock held. + */ +static int haptics_start_locked(struct qcom_haptics *h, int effect_id) +{ + int ret; + + if (h->active_effect_id !=3D -1) + haptics_stop_locked(h, false); + + if (!h->pm_ref_held) { + ret =3D pm_runtime_resume_and_get(h->dev); + if (ret < 0) { + dev_err(h->dev, "failed to resume device: %d\n", ret); + return ret; + } + + h->pm_ref_held =3D true; + } + + switch (h->effects[effect_id].mode) { + case HAPTICS_DIRECT_PLAY: + ret =3D haptics_start_direct_play(h, effect_id); + break; + case HAPTICS_FIFO: + ret =3D haptics_start_fifo(h, effect_id); + break; + default: + ret =3D -EINVAL; + } + + if (ret) { + dev_err(h->dev, "failed to start effect %d: %d\n", effect_id, ret); + if (h->pm_ref_held) { + pm_runtime_put_autosuspend(h->dev); + h->pm_ref_held =3D false; + } + + return ret; + } + + h->active_effect_id =3D effect_id; + h->active_mode =3D h->effects[effect_id].mode; + + return 0; +} + +static void haptics_play_work(struct work_struct *work) +{ + struct qcom_haptics *h =3D container_of(to_delayed_work(work), + struct qcom_haptics, play_work); + struct haptics_play_req *req =3D haptics_dequeue_play_req(h); + bool rearmed =3D false; + u32 length_us; + int ret; + + guard(mutex)(&h->play_lock); + + if (req && req->play) { + ret =3D haptics_start_locked(h, req->effect_id); + if (ret) { + dev_err(h->dev, "play haptics failed, ret=3D%d\n", ret); + } else { + /* + * Re-arm the work to stop the play or advance + * to next play after the play duration + */ + length_us =3D h->effects[req->effect_id].length_us; + if (length_us) { + schedule_delayed_work(&h->play_work, + usecs_to_jiffies(length_us)); + rearmed =3D true; + } + } + } else { + haptics_stop_locked(h, false); + } + + kfree(req); + + /* + * Handle the remaining requests if doesn't need to wait + */ + if (!rearmed && haptics_queue_pending(h)) + schedule_delayed_work(&h->play_work, 0); +} + +static void haptics_clear_effect(struct qcom_haptics *h, + struct qcom_haptics_effect *effect) +{ + guard(mutex)(&h->fifo_lock); + + if (h->fifo_data =3D=3D effect->fifo_data) + h->fifo_data =3D NULL; + + kvfree(effect->fifo_data); + effect->fifo_data =3D NULL; + effect->data_len =3D 0; +} + +/* + * haptics_fifo_length_us: Calculate the play duration of a FIFO effect. + * @h: haptics device pointer + * @rate: FIFO data play rate + * @data_len: FFO data length + * + * Each FIFO sample is played out over one play-rate period, so the total + * duration is the number of samples times that period: + * + * length_us =3D (clk_base * data_len * multiplier) / divider + * + * For T_LRA-based rates the period derives from the LRA resonance period + * (h->t_lra_us): DIV_2/4/8 shorten it, X_2/4/8 lengthen it. For the + * kHz-based rates the period is 1000 us / freq_khz. + */ +static u32 haptics_fifo_length_us(struct qcom_haptics *h, + enum qcom_haptics_play_rate rate, + u32 data_len) +{ + u32 clk_base =3D 1000, multiplier =3D 1, divider =3D 1; + + switch (rate) { + case PLAY_RATE_T_LRA: + clk_base =3D h->t_lra_us; + break; + case PLAY_RATE_T_LRA_DIV_2: + clk_base =3D h->t_lra_us; + divider =3D 2; + break; + case PLAY_RATE_T_LRA_DIV_4: + clk_base =3D h->t_lra_us; + divider =3D 4; + break; + case PLAY_RATE_T_LRA_DIV_8: + clk_base =3D h->t_lra_us; + divider =3D 8; + break; + case PLAY_RATE_T_LRA_X_2: + clk_base =3D h->t_lra_us; + multiplier =3D 2; + break; + case PLAY_RATE_T_LRA_X_4: + clk_base =3D h->t_lra_us; + multiplier =3D 4; + break; + case PLAY_RATE_T_LRA_X_8: + clk_base =3D h->t_lra_us; + multiplier =3D 8; + break; + case PLAY_RATE_F_8KHZ: + divider =3D 8; + break; + case PLAY_RATE_F_16KHZ: + divider =3D 16; + break; + case PLAY_RATE_F_24KHZ: + divider =3D 24; + break; + case PLAY_RATE_F_32KHZ: + divider =3D 32; + break; + case PLAY_RATE_F_44P1KHZ: + clk_base *=3D 10; + divider =3D 441; + break; + case PLAY_RATE_F_48KHZ: + divider =3D 48; + break; + default: + /* Unexpected rate: fall back to the resonance period. */ + clk_base =3D h->t_lra_us; + break; + } + + return div_u64((u64)clk_base * data_len * multiplier, divider); +} + +static int haptics_upload_effect(struct input_dev *dev, + struct ff_effect *effect, + struct ff_effect *old) +{ + struct qcom_haptics *h =3D input_get_drvdata(dev); + struct qcom_haptics_effect *priv; + int id =3D effect->id; + u32 data_len, level; + s8 *fifo; + + s16 *buf __free(kvfree) =3D NULL; + + guard(mutex)(&h->play_lock); + + if (id < 0 || id >=3D HAPTICS_MAX_EFFECTS) + return -EINVAL; + + if (id =3D=3D h->active_effect_id) { + dev_err(h->dev, "effect %d is under playing\n", id); + return -EBUSY; + } + + priv =3D &h->effects[id]; + + switch (effect->type) { + case FF_CONSTANT: + haptics_clear_effect(h, priv); + level =3D effect->u.constant.level <=3D 0 ? 0 : effect->u.constant.level; + priv->amplitude =3D (u8)mult_frac(level, 255, 0x7FFF); + priv->length_us =3D effect->replay.length * USEC_PER_MSEC; + priv->mode =3D HAPTICS_DIRECT_PLAY; + return 0; + + case FF_PERIODIC: + if (effect->u.periodic.waveform !=3D FF_CUSTOM) + return -EINVAL; + /* + * Minimum 3 elements: play-rate code + vmax + at least one sample. + * Limit the maximum data length to ~48K so that it can at least + * handle ~1s vibration at the fast (48K) play rate. + */ + if (effect->u.periodic.custom_len < 3 || + effect->u.periodic.custom_len > CUSTOM_DATA_MAX_LEN + 2) + return -EINVAL; + + buf =3D vmemdup_array_user(effect->u.periodic.custom_data, + effect->u.periodic.custom_len, + sizeof(s16)); + if (IS_ERR(buf)) + return PTR_ERR(no_free_ptr(buf)); + + if (buf[CUSTOM_DATA_RATE_IDX] < 0 || + buf[CUSTOM_DATA_RATE_IDX] > PLAY_RATE_MAX || + buf[CUSTOM_DATA_RATE_IDX] =3D=3D PLAY_RATE_RESERVED) + return -EINVAL; + + data_len =3D effect->u.periodic.custom_len - CUSTOM_DATA_SAMPLE_START; + + fifo =3D kvmalloc(data_len, GFP_KERNEL); + if (!fifo) + return -ENOMEM; + + /* Pack: one s8 sample per s16 slot (lower byte) */ + for (int i =3D 0; i < data_len; i++) + fifo[i] =3D (s8)buf[CUSTOM_DATA_SAMPLE_START + i]; + + haptics_clear_effect(h, priv); + + scoped_guard(mutex, &h->fifo_lock) { + priv->fifo_data =3D fifo; + priv->data_len =3D data_len; + } + + priv->play_rate =3D (u8)buf[CUSTOM_DATA_RATE_IDX]; + priv->vmax_mv =3D (u32)clamp_val(buf[CUSTOM_DATA_VMAX_IDX], 0, VMAX_MV= _MAX); + priv->length_us =3D haptics_fifo_length_us(h, priv->play_rate, data_len); + priv->mode =3D HAPTICS_FIFO; + + return 0; + + default: + return -EINVAL; + } +} + +static int haptics_playback(struct input_dev *dev, int effect_id, int val) +{ + struct qcom_haptics *h =3D input_get_drvdata(dev); + int ret; + + ret =3D haptics_enqueue_play_req(h, effect_id, val > 0); + if (ret) + return ret; + + if (val > 0) + /* + * Queue the play. If a duration re-arm is already pending this + * is a no-op, so the new play waits for the current effect to + * finish before the worker dequeues it. + */ + schedule_delayed_work(&h->play_work, 0); + else + /* + * Run the worker now, cancelling any pending duration re-arm, + * so an explicit stop takes effect immediately. + */ + mod_delayed_work(system_percpu_wq, &h->play_work, 0); + + return 0; +} + +static int haptics_erase(struct input_dev *dev, int effect_id) +{ + struct qcom_haptics *h =3D input_get_drvdata(dev); + struct qcom_haptics_effect *priv =3D &h->effects[effect_id]; + + guard(mutex)(&h->play_lock); + + haptics_queue_remove_effect(h, effect_id); + + if (h->active_effect_id =3D=3D effect_id) + haptics_stop_locked(h, false); + + haptics_clear_effect(h, priv); + priv->mode =3D HAPTICS_MODE_NONE; + + return 0; +} + +static void haptics_set_gain(struct input_dev *dev, u16 gain) +{ + struct qcom_haptics *h =3D input_get_drvdata(dev); + + atomic_set(&h->gain, gain); +} + +static int qcom_haptics_probe(struct platform_device *pdev) +{ + struct qcom_haptics *h; + struct input_dev *input; + struct ff_device *ff; + u32 regs[2], vmax_uv; + int ret, irq; + + h =3D devm_kzalloc(&pdev->dev, sizeof(*h), GFP_KERNEL); + if (!h) + return -ENOMEM; + + h->dev =3D &pdev->dev; + + h->regmap =3D dev_get_regmap(pdev->dev.parent, NULL); + if (!h->regmap) + return dev_err_probe(h->dev, -ENODEV, "no regmap from parent\n"); + + ret =3D device_property_read_u32_array(h->dev, "reg", regs, ARRAY_SIZE(re= gs)); + if (ret) + return dev_err_probe(h->dev, ret, "failed to read 'reg' property\n"); + + h->cfg_base =3D regs[0]; + h->ptn_base =3D regs[1]; + + ret =3D device_property_read_u32(h->dev, "qcom,lra-period-us", &h->t_lra_= us); + if (ret) + return dev_err_probe(h->dev, ret, "missing qcom,lra-period-us\n"); + + h->t_lra_us =3D clamp(h->t_lra_us, (u32)TLRA_STEP_US, (u32)TLRA_US_MAX); + + ret =3D device_property_read_u32(h->dev, "qcom,vmax-microvolt", &vmax_uv); + if (ret) + return dev_err_probe(h->dev, ret, "missing qcom,vmax-microvolt\n"); + + h->vmax_mv =3D clamp(vmax_uv / 1000, (u32)VMAX_STEP_MV, (u32)VMAX_MV_MAX); + + ret =3D haptics_config_lra_period(h); + if (ret) + return ret; + + ret =3D haptics_configure_autores(h); + if (ret) + return ret; + + ret =3D haptics_set_vmax(h, h->vmax_mv); + if (ret) + return ret; + + ret =3D haptics_configure_fifo_mmap(h); + if (ret) + return ret; + + mutex_init(&h->play_lock); + mutex_init(&h->fifo_lock); + spin_lock_init(&h->play_queue_lock); + INIT_LIST_HEAD(&h->play_queue); + INIT_DELAYED_WORK(&h->play_work, haptics_play_work); + atomic_set(&h->gain, 0xFFFF); + h->active_effect_id =3D -1; + + irq =3D platform_get_irq_byname(pdev, "fifo-empty"); + if (irq < 0) + return dev_err_probe(h->dev, irq, "failed to get fifo-empty IRQ\n"); + + ret =3D devm_request_threaded_irq(h->dev, irq, NULL, + haptics_fifo_empty_irq, + IRQF_ONESHOT | IRQF_NO_AUTOEN, + "qcom-haptics-fifo-empty", h); + if (ret) + return dev_err_probe(h->dev, ret, "failed to request fifo-empty IRQ\n"); + + h->fifo_empty_irq =3D irq; + platform_set_drvdata(pdev, h); + + pm_runtime_use_autosuspend(h->dev); + pm_runtime_set_autosuspend_delay(h->dev, HAPTICS_AUTOSUSPEND_MS); + ret =3D devm_pm_runtime_enable(h->dev); + if (ret) + return dev_err_probe(h->dev, ret, "enable runtime PM failed\n"); + + input =3D devm_input_allocate_device(h->dev); + if (!input) + return -ENOMEM; + + input->name =3D "qcom-spmi-haptics"; + input_set_drvdata(input, h); + h->input =3D input; + + input_set_capability(input, EV_FF, FF_CONSTANT); + input_set_capability(input, EV_FF, FF_PERIODIC); + input_set_capability(input, EV_FF, FF_CUSTOM); + input_set_capability(input, EV_FF, FF_GAIN); + + ret =3D input_ff_create(input, HAPTICS_MAX_EFFECTS); + if (ret) + return ret; + + ff =3D input->ff; + ff->upload =3D haptics_upload_effect; + ff->playback =3D haptics_playback; + ff->erase =3D haptics_erase; + ff->set_gain =3D haptics_set_gain; + + ret =3D input_register_device(input); + if (ret) { + input_ff_destroy(input); + return dev_err_probe(h->dev, ret, "failed to register input device\n"); + } + + return 0; +} + +static void qcom_haptics_remove(struct platform_device *pdev) +{ + struct qcom_haptics *h =3D platform_get_drvdata(pdev); + + /* + * Unregister the input device explicitly at the beginning + * to avoid the input device being used after the resources + * are freed. + */ + input_unregister_device(h->input); + disable_delayed_work_sync(&h->play_work); + scoped_guard(mutex, &h->play_lock) { + haptics_queue_flush(h); + haptics_stop_locked(h, true); + } + + haptics_enable_module(h, false); + + scoped_guard(mutex, &h->fifo_lock) { + for (int i =3D 0; i < HAPTICS_MAX_EFFECTS; i++) { + kvfree(h->effects[i].fifo_data); + h->effects[i].fifo_data =3D NULL; + } + } +} + +static int qcom_haptics_runtime_suspend(struct device *dev) +{ + struct qcom_haptics *h =3D dev_get_drvdata(dev); + + return haptics_enable_module(h, false); +} + +static int qcom_haptics_runtime_resume(struct device *dev) +{ + struct qcom_haptics *h =3D dev_get_drvdata(dev); + + return haptics_enable_module(h, true); +} + +static int qcom_haptics_suspend(struct device *dev) +{ + struct qcom_haptics *h =3D dev_get_drvdata(dev); + int ret; + + disable_delayed_work_sync(&h->play_work); + scoped_guard(mutex, &h->play_lock) { + haptics_queue_flush(h); + haptics_stop_locked(h, true); + } + + ret =3D pm_runtime_force_suspend(dev); + if (ret) + enable_delayed_work(&h->play_work); + + return ret; +} + +static int qcom_haptics_resume(struct device *dev) +{ + struct qcom_haptics *h =3D dev_get_drvdata(dev); + + enable_delayed_work(&h->play_work); + + return pm_runtime_force_resume(dev); +} + +static const struct dev_pm_ops qcom_haptics_pm_ops =3D { + SYSTEM_SLEEP_PM_OPS(qcom_haptics_suspend, qcom_haptics_resume) + RUNTIME_PM_OPS(qcom_haptics_runtime_suspend, qcom_haptics_runtime_resume, + NULL) +}; + +static const struct of_device_id qcom_haptics_of_match[] =3D { + { .compatible =3D "qcom,spmi-haptics" }, + {} +}; +MODULE_DEVICE_TABLE(of, qcom_haptics_of_match); + +static struct platform_driver qcom_haptics_driver =3D { + .probe =3D qcom_haptics_probe, + .remove =3D qcom_haptics_remove, + .driver =3D { + .name =3D "qcom-spmi-haptics", + .of_match_table =3D qcom_haptics_of_match, + .pm =3D pm_ptr(&qcom_haptics_pm_ops), + }, +}; +module_platform_driver(qcom_haptics_driver); + +MODULE_DESCRIPTION("Qualcomm SPMI PMIC Haptics driver"); +MODULE_LICENSE("GPL"); --=20 2.43.0