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PMM8654AU implements additional registers added to the "hlos" register address spaces, so add qcom,pmm8654au-pon as a fallback to qcom,pmk8350-pon to distinguish it from the baseline PMK8350 PON implementation. The GEN3 PON peripheral requires two register address spaces: "hlos" for the primary PON block and "pbs" for the address needs to be specified to facilitate software debouncing. Set minItems: 2 for reg in the qcom,pmk8350-pon if/then constraint to enforce that both address spaces are always present. Reviewed-by: Dmitry Baryshkov Signed-off-by: Rakesh Kota --- Changes in v5: - Set minItems: 2 for reg in the PMK8350 if/then block to enforce that both hlos and pbs address spaces are required for GEN3 PON peripherals. Changes in v4: - Remove the contain for PMK8350 and new if:then for PMM8654AU as suggested by Krzysztof Kozlowski Changes in v3: - Update the commit message. Changes in v2: - Introduces PMM8654AU compatible strings as suggested by Konrad Dybcio. --- .../devicetree/bindings/power/reset/qcom,pon.yaml | 19 +++++++++++----= ---- 1 file changed, 11 insertions(+), 8 deletions(-) diff --git a/Documentation/devicetree/bindings/power/reset/qcom,pon.yaml b/= Documentation/devicetree/bindings/power/reset/qcom,pon.yaml index 979a377cb4ffd577bfa51b9a3cd089acc202de0c..09eea48c709e5e42c45c1949ee1= d06298dea1f91 100644 --- a/Documentation/devicetree/bindings/power/reset/qcom,pon.yaml +++ b/Documentation/devicetree/bindings/power/reset/qcom,pon.yaml @@ -17,12 +17,16 @@ description: | =20 properties: compatible: - enum: - - qcom,pm8916-pon - - qcom,pm8941-pon - - qcom,pms405-pon - - qcom,pm8998-pon - - qcom,pmk8350-pon + oneOf: + - enum: + - qcom,pm8916-pon + - qcom,pm8941-pon + - qcom,pms405-pon + - qcom,pm8998-pon + - qcom,pmk8350-pon + - items: + - const: qcom,pmm8654au-pon + - const: qcom,pmk8350-pon =20 reg: description: | @@ -105,10 +109,9 @@ allOf: then: properties: reg: - minItems: 1 + minItems: 2 maxItems: 2 reg-names: - minItems: 1 items: - const: hlos - const: pbs --=20 2.34.1 From nobody Sat Jul 25 21:24:06 2026 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 658313F4DDA for ; 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Mon, 13 Jul 2026 04:58:31 -0700 (PDT) Received: from hu-kotarake-hyd.qualcomm.com ([202.46.23.25]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-31174ae6cd9sm74546638eec.31.2026.07.13.04.58.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 13 Jul 2026 04:58:31 -0700 (PDT) From: Rakesh Kota Date: Mon, 13 Jul 2026 17:28:15 +0530 Subject: [PATCH v5 2/2] arm64: dts: qcom: monaco-pmics: Add PON power key and reset inputs Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260713-b4-add_pwrkey_and_resin-v5-2-3bea476e1453@oss.qualcomm.com> References: <20260713-b4-add_pwrkey_and_resin-v5-0-3bea476e1453@oss.qualcomm.com> In-Reply-To: <20260713-b4-add_pwrkey_and_resin-v5-0-3bea476e1453@oss.qualcomm.com> To: Sebastian Reichel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Vinod Koul , Bjorn Andersson , Konrad Dybcio Cc: linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Rakesh Kota , Kamal Wadhwa , Jishnu Prakash , Konrad Dybcio X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; 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Reviewed-by: Konrad Dybcio Signed-off-by: Rakesh Kota --- Changes in v3: - Disable the resin as suggested by the Konrad. Changes in v2: - Add new PMM8654AU compatible strings as suggested by the Konrad. --- arch/arm64/boot/dts/qcom/monaco-pmics.dtsi | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/monaco-pmics.dtsi b/arch/arm64/boot/d= ts/qcom/monaco-pmics.dtsi index e990d7367719beaa9e0cea87d9c183ae18c3ebc8..af4c38309efae89479f9a11fcb9= 70a4c18f03a91 100644 --- a/arch/arm64/boot/dts/qcom/monaco-pmics.dtsi +++ b/arch/arm64/boot/dts/qcom/monaco-pmics.dtsi @@ -13,6 +13,26 @@ pmm8620au_0: pmic@0 { #address-cells =3D <1>; #size-cells =3D <0>; =20 + pmm8654au_0_pon: pon@1200 { + compatible =3D "qcom,pmm8654au-pon", "qcom,pmk8350-pon"; + reg =3D <0x1200>, <0x800>; + reg-names =3D "hlos", "pbs"; + + pmm8654au_0_pon_pwrkey: pwrkey { + compatible =3D "qcom,pmm8654au-pwrkey", "qcom,pmk8350-pwrkey"; + interrupts-extended =3D <&spmi_bus 0x0 0x12 0x7 IRQ_TYPE_EDGE_BOTH>; + linux,code =3D ; + debounce =3D <15625>; + }; + + pmm8654au_0_pon_resin: resin { + compatible =3D "qcom,pmm8654au-resin", "qcom,pmk8350-resin"; + interrupts-extended =3D <&spmi_bus 0x0 0x12 0x6 IRQ_TYPE_EDGE_BOTH>; + debounce =3D <15625>; + status =3D "disabled"; + }; + }; + pmm8620au_0_rtc: rtc@6100 { compatible =3D "qcom,pmk8350-rtc"; reg =3D <0x6100>, <0x6200>; --=20 2.34.1