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[95.117.112.249]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-493eb6f373csm519430965e9.14.2026.07.12.13.56.24 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Sun, 12 Jul 2026 13:56:25 -0700 (PDT) From: Karl Mehltretter To: Vladimir Zapolskiy , Piotr Wojtaszczyk Cc: Arnd Bergmann , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Karl Mehltretter Subject: [PATCH] ARM: lpc32xx: only run arch_initcalls on LPC32xx hardware Date: Sun, 12 Jul 2026 22:56:17 +0200 Message-Id: <20260712205617.44944-1-kmehltretter@gmail.com> X-Mailer: git-send-email 2.39.5 (Apple Git-154) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" lpc32xx_check_uid() and lpc32xx_pm_init() are arch_initcalls that poke LPC32xx-only registers (the CLKPWR unique-ID and the EMC control register). Since the multiplatform conversion they also run on other ARCH_MULTI_V5 boards, where the access faults, e.g. on versatile: Unable to handle kernel paging request at virtual address f4004130 PC is at lpc32xx_check_uid+0x2c/0x9c Bail out of both unless we are running on an LPC32xx SoC, reusing the machine's DT_MACHINE compatible list so the guard can't drift from it. Fixes: 75bf1bd7d2f9 ("ARM: lpc32xx: allow multiplatform build") Signed-off-by: Karl Mehltretter --- arch/arm/mach-lpc32xx/common.c | 10 ++++++++++ arch/arm/mach-lpc32xx/common.h | 2 ++ arch/arm/mach-lpc32xx/phy3250.c | 2 +- arch/arm/mach-lpc32xx/pm.c | 3 +++ 4 files changed, 16 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-lpc32xx/common.c b/arch/arm/mach-lpc32xx/common.c index 304ea61a0716..50b91316d553 100644 --- a/arch/arm/mach-lpc32xx/common.c +++ b/arch/arm/mach-lpc32xx/common.c @@ -8,6 +8,7 @@ */ =20 #include +#include #include =20 #include @@ -106,10 +107,19 @@ void __init lpc32xx_map_io(void) iotable_init(lpc32xx_io_desc, ARRAY_SIZE(lpc32xx_io_desc)); } =20 +/* The arch_initcalls below poke LPC32xx-only registers; skip other SoCs. = */ +bool __init lpc32xx_is_present(void) +{ + return of_machine_compatible_match(lpc32xx_dt_compat); +} + static int __init lpc32xx_check_uid(void) { u32 uid[4]; =20 + if (!lpc32xx_is_present()) + return 0; + lpc32xx_get_uid(uid); =20 printk(KERN_INFO "LPC32XX unique ID: %08x%08x%08x%08x\n", diff --git a/arch/arm/mach-lpc32xx/common.h b/arch/arm/mach-lpc32xx/common.h index 32f0ad217807..d00b6761796d 100644 --- a/arch/arm/mach-lpc32xx/common.h +++ b/arch/arm/mach-lpc32xx/common.h @@ -17,6 +17,8 @@ */ extern void __init lpc32xx_map_io(void); extern void __init lpc32xx_serial_init(void); +extern bool __init lpc32xx_is_present(void); +extern const char *const lpc32xx_dt_compat[]; =20 /* * Returns the LPC32xx unique 128-bit chip ID diff --git a/arch/arm/mach-lpc32xx/phy3250.c b/arch/arm/mach-lpc32xx/phy325= 0.c index 66701bf43248..b1ee31b9d2d2 100644 --- a/arch/arm/mach-lpc32xx/phy3250.c +++ b/arch/arm/mach-lpc32xx/phy3250.c @@ -76,7 +76,7 @@ static void __init lpc3250_machine_init(void) of_platform_default_populate(NULL, lpc32xx_auxdata_lookup, NULL); } =20 -static const char *const lpc32xx_dt_compat[] __initconst =3D { +const char *const lpc32xx_dt_compat[] __initconst =3D { "nxp,lpc3220", "nxp,lpc3230", "nxp,lpc3240", diff --git a/arch/arm/mach-lpc32xx/pm.c b/arch/arm/mach-lpc32xx/pm.c index 2572bd89a5e8..2ad2b2d7cd72 100644 --- a/arch/arm/mach-lpc32xx/pm.c +++ b/arch/arm/mach-lpc32xx/pm.c @@ -122,6 +122,9 @@ static const struct platform_suspend_ops lpc32xx_pm_ops= =3D { #define EMC_CTRL_REG io_p2v(LPC32XX_EMC_BASE + EMC_DYN_MEM_CTRL_OFS) static int __init lpc32xx_pm_init(void) { + if (!lpc32xx_is_present()) + return 0; + /* * Setup SDRAM self-refresh clock to automatically disable o * start of self-refresh. This only needs to be done once. --=20 2.39.5 (Apple Git-154)