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Sun, 12 Jul 2026 04:57:37 -0700 (PDT) From: Pengyu Luo To: mitltlatltl@gmail.com, Frank.Li@nxp.com, conor+dt@kernel.org, devicetree@vger.kernel.org, festevam@gmail.com, hverkuil@kernel.org, imx@lists.linux.dev, kernel@pengutronix.de, krzk+dt@kernel.org, martink@posteo.de, mchehab@kernel.org, robh@kernel.org, s.hauer@pengutronix.de, sakari.ailus@linux.intel.com, sebastian.krzyszkowiak@puri.sm Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-media@vger.kernel.org Subject: [PATCH v5 1/5] media: hi846: Fix hi846_write_reg_16 handling Date: Sun, 12 Jul 2026 19:55:53 +0800 Message-ID: <20260712115553.92564-1-mitltlatltl@gmail.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260712115012.91600-1-mitltlatltl@gmail.com> References: <20260712115012.91600-1-mitltlatltl@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" hi846_write_reg_16() does not clear a positive *err value on success. pm_runtime_get_if_in_use() returns a positive value when the device is already in use. When hi846_set_ctrl() passes &ret holding this positive value) to hi846_write_reg_16(), the function returns with ret as is, the positive value propagates back as a return code, which callers interpret as an error. Fix this by resetting *err to 0 only when it is positive. Fixes: 04fc06f6dc15 ("media: hi846: fix usage of pm_runtime_get_if_in_use()= ") Signed-off-by: Pengyu Luo --- drivers/media/i2c/hi846.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/media/i2c/hi846.c b/drivers/media/i2c/hi846.c index a3f77b8434ca..7f069aca0fce 100644 --- a/drivers/media/i2c/hi846.c +++ b/drivers/media/i2c/hi846.c @@ -1271,6 +1271,8 @@ static void hi846_write_reg_16(struct hi846 *hi846, u= 16 reg, u16 val, int *err) if (*err < 0) return; =20 + *err =3D 0; + put_unaligned_be16(reg, buf); put_unaligned_be16(val, buf + 2); ret =3D i2c_master_send(client, buf, sizeof(buf)); --=20 2.54.0 From nobody Sat Jul 25 23:03:29 2026 Received: from mail-pl1-f171.google.com (mail-pl1-f171.google.com [209.85.214.171]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F31A43A4267 for ; Sun, 12 Jul 2026 11:52:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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Sun, 12 Jul 2026 04:52:11 -0700 (PDT) Received: from nuvole ([144.202.86.13]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2ccc9bfe040sm84538295ad.31.2026.07.12.04.52.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 12 Jul 2026 04:52:11 -0700 (PDT) From: Pengyu Luo To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Sakari Ailus , Martin Kepplinger-Novakovic , Mauro Carvalho Chehab , Hans Verkuil , Sebastian Krzyszkowiak Cc: devicetree@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-media@vger.kernel.org, Pengyu Luo Subject: [PATCH v5 2/5] media: hi846: Fix link frequency handling Date: Sun, 12 Jul 2026 19:50:09 +0800 Message-ID: <20260712115012.91600-3-mitltlatltl@gmail.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260712115012.91600-1-mitltlatltl@gmail.com> References: <20260712115012.91600-1-mitltlatltl@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Link frequency is tied to PLL configuration, lane count, and external clock rate, so use runtime here instead of hardcoding for specific configuration. To implement this, we do 1. Drop exposed link_freq as a v4l2_ctrl, it is inconvenient to expose it as an int_menu when freq_links are varies between mclk rates, this will not break v4l2_get_link_freq() since it can be calculated back from pixel rate which is previously from the dynamic link frequency. 2. Attach mipi_clk_div_{2,4}lane to current mode, and use the div with mclk clock, lane count to calculate link frequency. 3. Drop mclk clock rate check. Fixes: e8c0882685f9 ("media: i2c: add driver for the SK Hynix Hi-846 8M pix= el camera") Signed-off-by: Pengyu Luo --- v5: - Use separated fields instead of raw register values for PLL cfg (Sakari) - Use mul_u64_u32_div() to avoid loss of pricision and u64/u32 issues (Saka= ri) - Drop line break (Sakari) --- Hi, Sakari. I did not follow to use v4l2_link_freq_to_bitmap(), which you mentioned in v4, since we have no fixed int_menu for link_freq. --- drivers/media/i2c/hi846.c | 82 ++++++++++++++++++--------------------- 1 file changed, 37 insertions(+), 45 deletions(-) diff --git a/drivers/media/i2c/hi846.c b/drivers/media/i2c/hi846.c index 7f069aca0fce..6bcd862aee30 100644 --- a/drivers/media/i2c/hi846.c +++ b/drivers/media/i2c/hi846.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0 // Copyright (c) 2021 Purism SPC =20 -#include +#include #include #include #include @@ -11,6 +11,7 @@ #include #include #include +#include #include #include #include @@ -219,8 +220,8 @@ struct hi846_mode { /* Horizontal timing size */ u32 llp; =20 - /* Link frequency needed for this resolution */ - u8 link_freq_index; + u8 mipi_clk_div_2lane; + u8 mipi_clk_div_4lane; =20 u16 fps; =20 @@ -1040,13 +1041,6 @@ static const char * const hi846_test_pattern_menu[] = =3D { "Resolution Pattern", }; =20 -#define FREQ_INDEX_640 0 -#define FREQ_INDEX_1280 1 -static const s64 hi846_link_freqs[] =3D { - [FREQ_INDEX_640] =3D 80000000, - [FREQ_INDEX_1280] =3D 200000000, -}; - static const struct hi846_reg_list hi846_init_regs_list_2lane =3D { .num_of_regs =3D ARRAY_SIZE(hi846_init_2lane), .regs =3D hi846_init_2lane, @@ -1061,7 +1055,13 @@ static const struct hi846_mode supported_modes[] =3D= { { .width =3D 640, .height =3D 480, - .link_freq_index =3D FREQ_INDEX_640, + .mipi_clk_div_2lane =3D 4, + /* + * Dummy but necessary if we set this mode default, otherwise + * hi846_calc_pixel_rate() will be broken in + * hi846_init_controls() + */ + .mipi_clk_div_4lane =3D 8, .fps =3D 120, .frame_len =3D 631, .llp =3D HI846_LINE_LENGTH, @@ -1086,7 +1086,8 @@ static const struct hi846_mode supported_modes[] =3D { { .width =3D 1280, .height =3D 720, - .link_freq_index =3D FREQ_INDEX_1280, + .mipi_clk_div_2lane =3D 2, + .mipi_clk_div_4lane =3D 4, .fps =3D 90, .frame_len =3D 842, .llp =3D HI846_LINE_LENGTH, @@ -1112,7 +1113,8 @@ static const struct hi846_mode supported_modes[] =3D { { .width =3D 1632, .height =3D 1224, - .link_freq_index =3D FREQ_INDEX_1280, + .mipi_clk_div_2lane =3D 2, + .mipi_clk_div_4lane =3D 4, .fps =3D 30, .frame_len =3D 2526, .llp =3D HI846_LINE_LENGTH, @@ -1161,7 +1163,6 @@ struct hi846 { struct v4l2_ctrl_handler ctrl_handler; u8 nr_lanes; =20 - struct v4l2_ctrl *link_freq; struct v4l2_ctrl *pixel_rate; struct v4l2_ctrl *vblank; struct v4l2_ctrl *hblank; @@ -1192,21 +1193,28 @@ static const struct hi846_datafmt *hi846_find_dataf= mt(u32 code) return NULL; } =20 -static inline u8 hi846_get_link_freq_index(struct hi846 *hi846) +static u64 +hi846_get_link_freq(struct hi846 *hi846, const struct hi846_mode *mode) { - return hi846->cur_mode->link_freq_index; -} + u64 mclk =3D clk_get_rate(hi846->clock); + u8 mipi_clk_div; =20 -static u64 hi846_get_link_freq(struct hi846 *hi846) -{ - u8 index =3D hi846_get_link_freq_index(hi846); + if (hi846->nr_lanes =3D=3D 2) + mipi_clk_div =3D mode->mipi_clk_div_2lane; + else + mipi_clk_div =3D mode->mipi_clk_div_4lane; =20 - return hi846_link_freqs[index]; + /* + * HI846_REG_PLL_CFG_MIPI1_H =3D 0x025a, it is fixed in listed modes + * [11:8]: 0x02 =3D> pre_div =3D 3 + * [7:0]: 0x5a =3D> multiplier =3D 90 + */ + return mul_u64_u32_div(mclk, 90, 3 * mipi_clk_div); } =20 static u64 hi846_calc_pixel_rate(struct hi846 *hi846) { - u64 link_freq =3D hi846_get_link_freq(hi846); + u64 link_freq =3D hi846_get_link_freq(hi846, hi846->cur_mode); u64 pixel_rate =3D link_freq * 2 * hi846->nr_lanes; =20 do_div(pixel_rate, HI846_RGB_DEPTH); @@ -1426,14 +1434,6 @@ static int hi846_init_controls(struct hi846 *hi846) =20 ctrl_hdlr->lock =3D &hi846->mutex; =20 - hi846->link_freq =3D - v4l2_ctrl_new_int_menu(ctrl_hdlr, &hi846_ctrl_ops, - V4L2_CID_LINK_FREQ, - ARRAY_SIZE(hi846_link_freqs) - 1, - 0, hi846_link_freqs); - if (hi846->link_freq) - hi846->link_freq->flags |=3D V4L2_CTRL_FLAG_READ_ONLY; - hi846->pixel_rate =3D v4l2_ctrl_new_std(ctrl_hdlr, &hi846_ctrl_ops, V4L2_CID_PIXEL_RATE, 0, @@ -1503,10 +1503,9 @@ static int hi846_set_video_mode(struct hi846 *hi846,= int fps) u64 frame_length; int ret =3D 0; int dummy_lines; - u64 link_freq =3D hi846_get_link_freq(hi846); + u64 link_freq =3D hi846_get_link_freq(hi846, hi846->cur_mode); =20 - dev_dbg(&client->dev, "%s: link freq: %llu\n", __func__, - hi846_get_link_freq(hi846)); + dev_dbg(&client->dev, "%s: link freq: %llu\n", __func__, link_freq); =20 do_div(link_freq, fps); frame_length =3D link_freq; @@ -1749,7 +1748,6 @@ static int hi846_set_format(struct v4l2_subdev *sd, mf->code =3D HI846_MEDIA_BUS_FORMAT; mf->field =3D V4L2_FIELD_NONE; =20 - __v4l2_ctrl_s_ctrl(hi846->link_freq, hi846_get_link_freq_index(hi846)); __v4l2_ctrl_s_ctrl_int64(hi846->pixel_rate, hi846_calc_pixel_rate(hi846)); =20 @@ -1950,16 +1948,17 @@ static int hi846_identify_module(struct hi846 *hi84= 6) static s64 hi846_check_link_freqs(struct hi846 *hi846, struct v4l2_fwnode_endpoint *ep) { - const s64 *freqs =3D hi846_link_freqs; - int freqs_count =3D ARRAY_SIZE(hi846_link_freqs); + int freqs_count =3D ARRAY_SIZE(supported_modes); + u64 link_freq; int i, j; =20 for (i =3D 0; i < freqs_count; i++) { + link_freq =3D hi846_get_link_freq(hi846, &supported_modes[i]); for (j =3D 0; j < ep->nr_of_link_frequencies; j++) - if (freqs[i] =3D=3D ep->link_frequencies[j]) + if (link_freq =3D=3D ep->link_frequencies[j]) break; if (j =3D=3D ep->nr_of_link_frequencies) - return freqs[i]; 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charset="utf-8" When using 4-lane, v4l2_find_nearest_size may return an unsupported mode, 640x480 mode, use v4l2_find_nearest_size_conditional() to fix it. Reported-by: Sebastian Krzyszkowiak Closes: https://lore.kernel.org/linux-media/OmTXoHZJTSGePymL9I-1Cw@puri.sm Fixes: e8c0882685f9 ("media: i2c: add driver for the SK Hynix Hi-846 8M pix= el camera") Signed-off-by: Pengyu Luo --- v5: - Use v4l2_find_nearest_size_conditional() to filter for different lane cas= es. (Sakari) --- drivers/media/i2c/hi846.c | 58 +++++++++++++++++++++++---------------- 1 file changed, 34 insertions(+), 24 deletions(-) diff --git a/drivers/media/i2c/hi846.c b/drivers/media/i2c/hi846.c index 6bcd862aee30..1223567641c4 100644 --- a/drivers/media/i2c/hi846.c +++ b/drivers/media/i2c/hi846.c @@ -1688,6 +1688,16 @@ static int __maybe_unused hi846_resume(struct device= *dev) return hi846_power_on(hi846); } =20 +static bool filter_by_mipi_lanes(const void *array, size_t index, + const void *context) +{ + const struct hi846_mode *mode =3D array; + const struct hi846 *hi846 =3D context; + + return (hi846->nr_lanes =3D=3D 2 && mode->reg_list_2lane.num_of_regs) || + (hi846->nr_lanes =3D=3D 4 && mode->reg_list_4lane.num_of_regs); +} + static int hi846_set_format(struct v4l2_subdev *sd, struct v4l2_subdev_state *sd_state, struct v4l2_subdev_format *format) @@ -1710,20 +1720,6 @@ static int hi846_set_format(struct v4l2_subdev *sd, return 0; } =20 - if (hi846->nr_lanes =3D=3D 2) { - if (!hi846->cur_mode->reg_list_2lane.num_of_regs) { - dev_err(&client->dev, - "this mode is not supported for 2 lanes\n"); - return -EINVAL; - } - } else { - if (!hi846->cur_mode->reg_list_4lane.num_of_regs) { - dev_err(&client->dev, - "this mode is not supported for 4 lanes\n"); - return -EINVAL; - } - } - mutex_lock(&hi846->mutex); =20 if (hi846->streaming) { @@ -1734,9 +1730,12 @@ static int hi846_set_format(struct v4l2_subdev *sd, hi846->fmt =3D fmt; =20 hi846->cur_mode =3D - v4l2_find_nearest_size(supported_modes, - ARRAY_SIZE(supported_modes), - width, height, mf->width, mf->height); + v4l2_find_nearest_size_conditional(supported_modes, + ARRAY_SIZE(supported_modes), + width, height, + mf->width, mf->height, + filter_by_mipi_lanes, hi846); + dev_dbg(&client->dev, "%s: found mode: %dx%d\n", __func__, hi846->cur_mode->width, hi846->cur_mode->height); =20 @@ -1819,6 +1818,8 @@ static int hi846_enum_frame_size(struct v4l2_subdev *= sd, struct v4l2_subdev_frame_size_enum *fse) { struct i2c_client *client =3D v4l2_get_subdevdata(sd); + struct hi846 *hi846 =3D to_hi846(sd); + int i, count; =20 if (fse->pad || fse->index >=3D ARRAY_SIZE(supported_modes)) return -EINVAL; @@ -1828,15 +1829,24 @@ static int hi846_enum_frame_size(struct v4l2_subdev= *sd, return -EINVAL; } =20 - fse->min_width =3D supported_modes[fse->index].width; - fse->max_width =3D supported_modes[fse->index].width; - fse->min_height =3D supported_modes[fse->index].height; - fse->max_height =3D supported_modes[fse->index].height; + for (count =3D i =3D 0; i < ARRAY_SIZE(supported_modes); i++) { + if (!filter_by_mipi_lanes(&supported_modes[i], i, hi846)) + continue; + + if (count =3D=3D fse->index) { + fse->min_width =3D supported_modes[i].width; + fse->max_width =3D fse->min_width; + fse->min_height =3D supported_modes[i].height; + fse->max_height =3D fse->min_height; + dev_dbg(&client->dev, "%s: max width: %d max height: %d\n", __func__, + fse->max_width, fse->max_height); + return 0; + } =20 - dev_dbg(&client->dev, "%s: max width: %d max height: %d\n", __func__, - fse->max_width, fse->max_height); + count++; + } =20 - return 0; + return -EINVAL; } =20 static int hi846_get_selection(struct v4l2_subdev *sd, --=20 2.54.0 From nobody Sat Jul 25 23:03:29 2026 Received: from mail-pl1-f175.google.com (mail-pl1-f175.google.com [209.85.214.175]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3094F3A4267 for ; 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Sun, 12 Jul 2026 04:52:26 -0700 (PDT) Received: from nuvole ([144.202.86.13]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2ccc9bfe040sm84538295ad.31.2026.07.12.04.52.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 12 Jul 2026 04:52:26 -0700 (PDT) From: Pengyu Luo To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Sakari Ailus , Martin Kepplinger-Novakovic , Mauro Carvalho Chehab , Hans Verkuil , Sebastian Krzyszkowiak Cc: devicetree@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-media@vger.kernel.org, Pengyu Luo Subject: [PATCH v5 4/5] media: hi846: Add 6MP and 8MP modes support Date: Sun, 12 Jul 2026 19:50:11 +0800 Message-ID: <20260712115012.91600-5-mitltlatltl@gmail.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260712115012.91600-1-mitltlatltl@gmail.com> References: <20260712115012.91600-1-mitltlatltl@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Hi846 is an 8MP sensor, but the upstream driver has only supported 2MP mode for years. This patch adds 6MP and 8MP modes to maximize sensor utilization. Note that these modes require 4-lane MIPI CSI-2, as the downstream driver only exposes 2MP, 6MP, and 8MP configurations in 4-lane operation on the target device. The register sequences are extracted from the downstream Windows driver. Signed-off-by: Pengyu Luo --- v5: - Use separated fields instead of raw register values for PLL cfg (Sakari) --- drivers/media/i2c/hi846.c | 154 +++++++++++++++++++++++++++++++++++++- 1 file changed, 153 insertions(+), 1 deletion(-) diff --git a/drivers/media/i2c/hi846.c b/drivers/media/i2c/hi846.c index 1223567641c4..cb06fc4188a6 100644 --- a/drivers/media/i2c/hi846.c +++ b/drivers/media/i2c/hi846.c @@ -1028,6 +1028,106 @@ static const struct hi846_reg mode_1632x1224_mipi_4= lane[] =3D { {HI846_REG_TG_ENABLE, 0x0100}, }; =20 +static const struct hi846_reg mode_3264x1836_config[] =3D { + {HI846_REG_MODE_SELECT, 0x0000}, + {HI846_REG_Y_ODD_INC_FOBP, 0x1111}, + {HI846_REG_Y_ODD_INC_VACT, 0x1111}, + {HI846_REG_Y_ADDR_START_VACT_H, 0x0172}, + {HI846_REG_Y_ADDR_END_VACT_H, 0x089d}, + {HI846_REG_UNKNOWN_005C, 0x2101}, + {HI846_REG_FLL, 0x09de}, + {HI846_REG_LLP, 0x0ed8}, + {HI846_REG_BINNING_MODE, 0x0022}, + {HI846_REG_HBIN_MODE, 0x0000}, + {HI846_REG_UNKNOWN_0A24, 0x0000}, + {HI846_REG_X_START_H, 0x0000}, + {HI846_REG_X_OUTPUT_SIZE_H, 0x0cc0}, + {HI846_REG_Y_OUTPUT_SIZE_H, 0x072c}, + {HI846_REG_EXPOSURE, 0x09d8}, + + /* For OTP */ + {HI846_REG_UNKNOWN_021C, 0x0001}, + {HI846_REG_UNKNOWN_021E, 0x0235}, + + {HI846_REG_ISP_EN_H, 0x014a}, + {HI846_REG_UNKNOWN_0418, 0x023e}, + {HI846_REG_UNKNOWN_0B02, 0xe04d}, + {HI846_REG_UNKNOWN_0B10, 0x6821}, + {HI846_REG_UNKNOWN_0B12, 0x0120}, + {HI846_REG_UNKNOWN_0B14, 0x0001}, + {HI846_REG_UNKNOWN_2008, 0x38fd}, + {HI846_REG_UNKNOWN_326E, 0x0000}, +}; + +static const struct hi846_reg mode_3264x1836_mipi_4lane[] =3D { + {HI846_REG_UNKNOWN_0900, 0x0300}, + {HI846_REG_MIPI_TX_OP_MODE, 0xc319}, + {HI846_REG_UNKNOWN_0914, 0xc109}, + {HI846_REG_TCLK_PREPARE, 0x061a}, + {HI846_REG_UNKNOWN_0918, 0x0407}, + {HI846_REG_THS_ZERO, 0x0a0b}, + {HI846_REG_TCLK_POST, 0x0e08}, + {HI846_REG_UNKNOWN_091E, 0x0a00}, + {HI846_REG_UNKNOWN_090C, 0x0427}, + {HI846_REG_UNKNOWN_090E, 0x0059}, + {HI846_REG_UNKNOWN_0954, 0x0089}, + {HI846_REG_UNKNOWN_0956, 0x0000}, + {HI846_REG_UNKNOWN_0958, 0xca80}, + {HI846_REG_UNKNOWN_095A, 0x9240}, + {HI846_REG_PLL_CFG_MIPI2_H, 0x4124}, + {HI846_REG_TG_ENABLE, 0x0100}, +}; + +static const struct hi846_reg mode_3264x2448_config[] =3D { + {HI846_REG_MODE_SELECT, 0x0000}, + {HI846_REG_Y_ODD_INC_FOBP, 0x1111}, + {HI846_REG_Y_ODD_INC_VACT, 0x1111}, + {HI846_REG_Y_ADDR_START_VACT_H, 0x0040}, + {HI846_REG_Y_ADDR_END_VACT_H, 0x09cf}, + {HI846_REG_UNKNOWN_005C, 0x2101}, + {HI846_REG_FLL, 0x09de}, + {HI846_REG_LLP, 0x0ed8}, + {HI846_REG_BINNING_MODE, 0x0022}, + {HI846_REG_HBIN_MODE, 0x0000}, + {HI846_REG_UNKNOWN_0A24, 0x0000}, + {HI846_REG_X_START_H, 0x0000}, + {HI846_REG_X_OUTPUT_SIZE_H, 0x0cc0}, + {HI846_REG_Y_OUTPUT_SIZE_H, 0x0990}, + {HI846_REG_EXPOSURE, 0x09d8}, + + /* For OTP */ + {HI846_REG_UNKNOWN_021C, 0x0001}, + {HI846_REG_UNKNOWN_021E, 0x0235}, + + {HI846_REG_ISP_EN_H, 0x014a}, + {HI846_REG_UNKNOWN_0418, 0x0000}, + {HI846_REG_UNKNOWN_0B02, 0xe04d}, + {HI846_REG_UNKNOWN_0B10, 0x6821}, + {HI846_REG_UNKNOWN_0B12, 0x0120}, + {HI846_REG_UNKNOWN_0B14, 0x0001}, + {HI846_REG_UNKNOWN_2008, 0x38fd}, + {HI846_REG_UNKNOWN_326E, 0x0000}, +}; + +static const struct hi846_reg mode_3264x2448_mipi_4lane[] =3D { + {HI846_REG_UNKNOWN_0900, 0x0300}, + {HI846_REG_MIPI_TX_OP_MODE, 0xc319}, + {HI846_REG_UNKNOWN_0914, 0xc109}, + {HI846_REG_TCLK_PREPARE, 0x061a}, + {HI846_REG_UNKNOWN_0918, 0x0407}, + {HI846_REG_THS_ZERO, 0x0a0b}, + {HI846_REG_TCLK_POST, 0x0e08}, + {HI846_REG_UNKNOWN_091E, 0x0a00}, + {HI846_REG_UNKNOWN_090C, 0x0427}, + {HI846_REG_UNKNOWN_090E, 0x0059}, + {HI846_REG_UNKNOWN_0954, 0x0089}, + {HI846_REG_UNKNOWN_0956, 0x0000}, + {HI846_REG_UNKNOWN_0958, 0xca80}, + {HI846_REG_UNKNOWN_095A, 0x9240}, + {HI846_REG_PLL_CFG_MIPI2_H, 0x4124}, + {HI846_REG_TG_ENABLE, 0x0100}, +}; + static const char * const hi846_test_pattern_menu[] =3D { "Disabled", "Solid Colour", @@ -1136,7 +1236,59 @@ static const struct hi846_mode supported_modes[] =3D= { .width =3D 1632 * 2, .height =3D 1224 * 2, }, - } + }, + { + .width =3D 3264, + .height =3D 1836, + .mipi_clk_div_2lane =3D 1, /* dummy */ + .mipi_clk_div_4lane =3D 2, + .fps =3D 30, + .frame_len =3D 2526, + .llp =3D HI846_LINE_LENGTH, + .reg_list_config =3D { + .num_of_regs =3D ARRAY_SIZE(mode_3264x1836_config), + .regs =3D mode_3264x1836_config, + }, + .reg_list_2lane =3D { + .num_of_regs =3D 0, + }, + .reg_list_4lane =3D { + .num_of_regs =3D ARRAY_SIZE(mode_3264x1836_mipi_4lane), + .regs =3D mode_3264x1836_mipi_4lane, + }, + .crop =3D { + .left =3D 0x46, + .top =3D 0x172, + .width =3D 3264, + .height =3D 1836, + }, + }, + { + .width =3D 3264, + .height =3D 2448, + .mipi_clk_div_2lane =3D 1, /* dummy */ + .mipi_clk_div_4lane =3D 2, + .fps =3D 30, + .frame_len =3D 2526, + .llp =3D HI846_LINE_LENGTH, + .reg_list_config =3D { + .num_of_regs =3D ARRAY_SIZE(mode_3264x2448_config), + .regs =3D mode_3264x2448_config, + }, + .reg_list_2lane =3D { + .num_of_regs =3D 0, + }, + .reg_list_4lane =3D { + .num_of_regs =3D ARRAY_SIZE(mode_3264x2448_mipi_4lane), + .regs =3D mode_3264x2448_mipi_4lane, + }, + .crop =3D { + .left =3D 0x46, + .top =3D 0x40, + .width =3D 3264, + .height =3D 2448, + }, + }, }; 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Sun, 12 Jul 2026 04:52:34 -0700 (PDT) From: Pengyu Luo To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Sakari Ailus , Martin Kepplinger-Novakovic , Mauro Carvalho Chehab , Hans Verkuil , Sebastian Krzyszkowiak Cc: devicetree@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-media@vger.kernel.org, Pengyu Luo Subject: [PATCH v5 5/5] arm64: dts: imx8mq-librem5: Correct link frequency list Date: Sun, 12 Jul 2026 19:50:12 +0800 Message-ID: <20260712115012.91600-6-mitltlatltl@gmail.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260712115012.91600-1-mitltlatltl@gmail.com> References: <20260712115012.91600-1-mitltlatltl@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" According to the hi846 datasheet and the register lists, they are mclk / prediv * multiplier / mipi_clk_div1 / mipi_clk_div2 =3D 25Mhz / 3 * 90 / 2 / {1,2} =3D 187.5Mhz, 375Mhz Signed-off-by: Pengyu Luo --- v5: - Rename post_div to mipi_clk_div - Correct div1 number from 1 to 2 --- arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi b/arch/arm64= /boot/dts/freescale/imx8mq-librem5.dtsi index f5d529c5baf3..cc5604172192 100644 --- a/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi @@ -1122,7 +1122,7 @@ port { camera1_ep: endpoint { data-lanes =3D <1 2>; link-frequencies =3D /bits/ 64 - <80000000 200000000 300000000>; + <187500000 375000000>; remote-endpoint =3D <&mipi1_sensor_ep>; }; }; --=20 2.54.0