From nobody Sat Jul 25 23:03:59 2026 Received: from mx.nabladev.com (mx.nabladev.com [178.251.229.89]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4BCA12BE7BA; Sat, 11 Jul 2026 21:01:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=178.251.229.89 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783803717; cv=none; b=TKOaHZAj3wenbDhyYxu3ITZreiKUNpTHuW/FobbqT5E6ip3fDcGWjosyBqVfPwN1KIDbVZtQhylyD8HpAmUxGydPKUToLaPW8mnFRVPUGFM8VT29e4BpDmX4eEpGlE0ZZcNwNvTFHDYZuerSXCJ1MjSxbntqtMb+MRHGncgazKU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783803717; c=relaxed/simple; bh=MzqgoMuJIdGP189HE9PGMmOiYz8iwUT82y8AbS4CGZM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=AQopnC4EJ9NjopUW+qdzLP0yFy8gtSnpasisgHcRrQfOz2De7QDQV7C2+rc36BvzMy1ckTmUOzsXxqd9FQoFLTp7/0yLRf6+obzzuZpjWeRx0Xm8VEMDnqTWtKmNEIDwRU/C658tNWUyD7e4o49pjfYfHoKJE4+8CFOxSGD2FKM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nabladev.com; spf=pass smtp.mailfrom=nabladev.com; dkim=pass (2048-bit key) header.d=nabladev.com header.i=@nabladev.com header.b=LHmh6EZp; arc=none smtp.client-ip=178.251.229.89 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nabladev.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=nabladev.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=nabladev.com header.i=@nabladev.com header.b="LHmh6EZp" Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 5581A119823; Sat, 11 Jul 2026 23:01:47 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nabladev.com; s=dkim; t=1783803707; h=from:subject:date:message-id:to:cc:mime-version: content-transfer-encoding:in-reply-to:references; bh=2eerO83FR9XLVJDLYJUhN9olbnCS8UH6ub1IdYOkeRY=; b=LHmh6EZpP36TorzqAJRec9nu4MuXA3Ib02qlFKHh/CKqDTtfKCvwv1lpmJ4Gf+pc0/ndjN sRLAkTQgtn0xPJCBpr+6GrTQwPqi0LWqUly8VpB0RQ831jGPwBOmGjFqB8/YTgA/Wxmna2 HGYYA5tvT7YjeHaPfqn0Q2lbxcMjDU3GFy58uXcj88X7j4A0aRdKt+fNQIosw3hIPNKT5F 4jpV+lYTd9uFrntsOMEp8+8Rbc4avOG1lRpdzumtxc7o19IUaxQ3JBekob0it8QbOvDzXg l03Oekbdw4dzgaKSKYAJ878xaIPJTn0A5fVWkLS4oFGqD+Plt0RlK+47d72Ccg== From: Marek Vasut To: linux-arm-kernel@lists.infradead.org Cc: Marek Vasut , Alexandre Torgue , Bartosz Golaszewski , Conor Dooley , Krzysztof Kozlowski , Linus Walleij , Rob Herring , devicetree@vger.kernel.org, kernel@dh-electronics.com, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com Subject: [PATCH 01/10] dt-bindings: arm: stm32: Document STM32MP23xx/STM32MP25xx DHCOS SoM and Breakout Board and DHSBC Date: Sat, 11 Jul 2026 22:59:30 +0200 Message-ID: <20260711210131.236025-2-marex@nabladev.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260711210131.236025-1-marex@nabladev.com> References: <20260711210131.236025-1-marex@nabladev.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Last-TLS-Session-Version: TLSv1.3 Content-Type: text/plain; charset="utf-8" This stm32mp25xx-dhcos-bb board is a stack of DHCOS SoM based on STM32MP25xx SoC (1200MHz / crypto capabilities) populated on SoM Breakout Board, the stm32mp255c-dhcos-dhsbc is the SoM populated on DHSBC carrier board. The stm32mp23xx-dhcos-bb is a stack with STM32MP23xx SoC. The SoM contains the following peripherals: - STPMIC (power delivery) - 4GiB LPDDR4 memory - eMMC and SDIO WiFi module The Breakout Board carrier board contains the following peripherals: - USB-C peripheral port, power supply plug The DHSBC carrier board contains the following peripherals: - Two RGMII Ethernet ports - MicroSD slot - LVDS connector - MIPI CSI2 connector - USB-A Host port, USB-C power supply plug - USB-C / DP port - Expansion connector Signed-off-by: Marek Vasut Reviewed-by: Krzysztof Kozlowski --- Cc: Alexandre Torgue Cc: Bartosz Golaszewski Cc: Conor Dooley Cc: Krzysztof Kozlowski Cc: Linus Walleij Cc: Rob Herring Cc: devicetree@vger.kernel.org Cc: kernel@dh-electronics.com Cc: linux-arm-kernel@lists.infradead.org Cc: linux-gpio@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: linux-stm32@st-md-mailman.stormreply.com --- .../devicetree/bindings/arm/stm32/stm32.yaml | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/stm32/stm32.yaml b/Docum= entation/devicetree/bindings/arm/stm32/stm32.yaml index c6af3a46364fc..2045dc2e54a60 100644 --- a/Documentation/devicetree/bindings/arm/stm32/stm32.yaml +++ b/Documentation/devicetree/bindings/arm/stm32/stm32.yaml @@ -196,6 +196,18 @@ properties: - const: ultratronik,stm32mp157c-ultra-fly-sbc - const: st,stm32mp157 =20 + - description: DH STM32MP251 DHCOS SoM based Boards + items: + - const: dh,stm32mp251a-dhcos-bb + - const: dh,stm32mp251a-dhcos-som + - const: st,stm32mp251 + + - description: DH STM32MP255 DHCOS SoM based Boards + items: + - const: dh,stm32mp255c-dhcos-dhsbc + - const: dh,stm32mp255c-dhcos-som + - const: st,stm32mp255 + - description: ST STM32MP257 based Boards items: - enum: @@ -203,6 +215,12 @@ properties: - st,stm32mp257f-ev1 - const: st,stm32mp257 =20 + - description: DH STM32MP231 DHCOS SoM based Boards + items: + - const: dh,stm32mp231a-dhcos-bb + - const: dh,stm32mp231a-dhcos-som + - const: st,stm32mp231 + - description: ST STM32MP235 based Boards items: - enum: --=20 2.53.0 From nobody Sat Jul 25 23:03:59 2026 Received: from mx.nabladev.com (mx.nabladev.com [178.251.229.89]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 53F402BEC55; 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arc=none smtp.client-ip=178.251.229.89 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nabladev.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=nabladev.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=nabladev.com header.i=@nabladev.com header.b="OKYLE/VV" Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 4C983119826; Sat, 11 Jul 2026 23:01:48 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nabladev.com; s=dkim; t=1783803708; h=from:subject:date:message-id:to:cc:mime-version: content-transfer-encoding:in-reply-to:references; bh=IQ/2jO9kY86PBveaA7H07jnCAULpl2h71VwR4VV58eY=; b=OKYLE/VVcOkNBDQn2Yd4FgbE+2flqHj5p4DN0VcY+B4XF0gEyGkfvODqgGNUlrT9QqzxQU 0hqzG2VUxj4bbpUNS1cXmLtvaaGZ2r5ZSNy1XSsB1O7/dlGSpHP/24m7f7EZfC0G9zaLVW GmlJYO2VqdTqEiMzZhKQukhXp2McDoiV2khX766HzS+uDeE+kLp6SGaXky8M53Vqkb45oJ 8s1Ackks7Tyoi8KCVyOXXKJYYykLVPocsGjGZirKcGf4vQgbanMpt739gsn2AQ0MfpRI3t E4ymYcHNTo5aiAzli4NpwtlkIU2hGT8tGxFO/X0fYYvTDkgjUnm/PjrY7UwTVg== From: Marek Vasut To: linux-arm-kernel@lists.infradead.org Cc: Marek Vasut , Alexandre Torgue , Bartosz Golaszewski , Conor Dooley , Krzysztof Kozlowski , Linus Walleij , Rob Herring , devicetree@vger.kernel.org, kernel@dh-electronics.com, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com Subject: [PATCH 02/10] dt-bindings: gpio: pca95xx: Document Kinetic KTS1622 Date: Sat, 11 Jul 2026 22:59:31 +0200 Message-ID: <20260711210131.236025-3-marex@nabladev.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260711210131.236025-1-marex@nabladev.com> References: <20260711210131.236025-1-marex@nabladev.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Last-TLS-Session-Version: TLSv1.3 Content-Type: text/plain; charset="utf-8" The Kinetic Technologies KTS1622 is a 16-bit general-purpose I/O expander via the I2C bus for microcontrollers when additional I/Os are needed while keeping interconnections to the minimum. Datasheet comparison suggests that it is compatible with TCAL6416, add the compatible string and TCAL6416 as a fallback compatible. Signed-off-by: Marek Vasut Acked-by: Krzysztof Kozlowski --- Cc: Alexandre Torgue Cc: Bartosz Golaszewski Cc: Conor Dooley Cc: Krzysztof Kozlowski Cc: Linus Walleij Cc: Rob Herring Cc: devicetree@vger.kernel.org Cc: kernel@dh-electronics.com Cc: linux-arm-kernel@lists.infradead.org Cc: linux-gpio@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: linux-stm32@st-md-mailman.stormreply.com --- Documentation/devicetree/bindings/gpio/gpio-pca95xx.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/gpio/gpio-pca95xx.yaml b/Doc= umentation/devicetree/bindings/gpio/gpio-pca95xx.yaml index 4f955f855e1ab..4631388a7d914 100644 --- a/Documentation/devicetree/bindings/gpio/gpio-pca95xx.yaml +++ b/Documentation/devicetree/bindings/gpio/gpio-pca95xx.yaml @@ -22,6 +22,9 @@ properties: - items: - const: diodes,pi4ioe5v6534q - const: nxp,pcal6534 + - items: + - const: kinetic,kts1622 + - const: ti,tcal6416 - items: - enum: - exar,xra1202 --=20 2.53.0 From nobody Sat Jul 25 23:03:59 2026 Received: from mx.nabladev.com (mx.nabladev.com [178.251.229.89]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5B5EB315D29; Sat, 11 Jul 2026 21:01:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=178.251.229.89 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783803719; cv=none; b=gFZAAfGRvJ9KH3mV7FG8/ADByezuyv18k7oji9+IqXfebuP4KnzVgQXiG6vIpqnU9sbzsduVu3RWybhML6T01rSw7SOHa09Xkh8NmwpS9GLLPRb3GkXiuTiTqffAy9u/B1uBjfbFju0sN+7IC6ntO7zqZBlN2tA8TgLIek02ZT4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783803719; c=relaxed/simple; bh=7B4HlN9m6+lCaBISeVnHmFcI4fwTIFTHSJvLW/oQdVY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=udXcXzKjfZhB/rCtrKp1siZAHQe8E2d7eeAZEubSiXm/Phu8Np8Q3txNM/YN8WHLoHz9gEylPvRmb8CkoFMheFJ/u3mSnqPOIdJfiNGc8YJJaNgfvUmfIhEU4NOdDzPprhaAunIyu0GMjuKcUntRBM5IyWUDa5rsGhQsO7YIlRk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nabladev.com; spf=pass smtp.mailfrom=nabladev.com; dkim=pass (2048-bit key) header.d=nabladev.com header.i=@nabladev.com header.b=ZGujiJqR; arc=none smtp.client-ip=178.251.229.89 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nabladev.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=nabladev.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=nabladev.com header.i=@nabladev.com header.b="ZGujiJqR" Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 17FF6119847; Sat, 11 Jul 2026 23:01:49 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nabladev.com; s=dkim; t=1783803709; h=from:subject:date:message-id:to:cc:mime-version: content-transfer-encoding:in-reply-to:references; bh=PxOheComZsT6yxnkUvSnvmdiUDv7GpiTTASR486Q+Ko=; b=ZGujiJqR+iMIpvYV6aLG0wtsmR4mSSle4HsUHt63FFCrKFzLt6F8NQyRhWR9Ckx49tFkwZ nQqWcr0HNqI/divQFP2crS9XkXAExBw18sYM6qRf9Ghne7fvcdLY3Yj2xmKsYg6g+TOVLi VxXaxewRYVlDgf3a+V+3/f87sO0t0nnoYNfXX9tyGfAeKd35HaPkvuMHBJf5VGHUUMFo37 N2BNPIfbEjtN2Q3eMjSjhaYlYI+8Cl8oXcdyeCaW/1kfmFslzQXiFBiLk8JxmA7SLLl22g Z0DmvBxmFpQehs4n0g9tnxRWUcMv8VQ8kCsimm20k/d/5FlJUY5cyT77g5fxFQ== From: Marek Vasut To: linux-arm-kernel@lists.infradead.org Cc: Marek Vasut , Alexandre Torgue , Bartosz Golaszewski , Conor Dooley , Krzysztof Kozlowski , Linus Walleij , Rob Herring , devicetree@vger.kernel.org, kernel@dh-electronics.com, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com Subject: [PATCH 03/10] arm64: dts: st: Fix SDMMC1 indent on stm32mp231 Date: Sat, 11 Jul 2026 22:59:32 +0200 Message-ID: <20260711210131.236025-4-marex@nabladev.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260711210131.236025-1-marex@nabladev.com> References: <20260711210131.236025-1-marex@nabladev.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Last-TLS-Session-Version: TLSv1.3 Content-Type: text/plain; charset="utf-8" Drop bogus space. No functional change. Signed-off-by: Marek Vasut --- Cc: Alexandre Torgue Cc: Bartosz Golaszewski Cc: Conor Dooley Cc: Krzysztof Kozlowski Cc: Linus Walleij Cc: Rob Herring Cc: devicetree@vger.kernel.org Cc: kernel@dh-electronics.com Cc: linux-arm-kernel@lists.infradead.org Cc: linux-gpio@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: linux-stm32@st-md-mailman.stormreply.com --- arch/arm64/boot/dts/st/stm32mp231.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/st/stm32mp231.dtsi b/arch/arm64/boot/dts/s= t/stm32mp231.dtsi index 9e1d240888ff2..a9de9fc5eb411 100644 --- a/arch/arm64/boot/dts/st/stm32mp231.dtsi +++ b/arch/arm64/boot/dts/st/stm32mp231.dtsi @@ -720,7 +720,7 @@ sdmmc1: mmc@48220000 { reg =3D <0x48220000 0x400>, <0x44230400 0x8>; arm,primecell-periphid =3D <0x00353180>; interrupts =3D ; - clocks =3D <&rcc CK_KER_SDMMC1 >; + clocks =3D <&rcc CK_KER_SDMMC1>; clock-names =3D "apb_pclk"; resets =3D <&rcc SDMMC1_R>; cap-sd-highspeed; --=20 2.53.0 From nobody Sat Jul 25 23:03:59 2026 Received: from mx.nabladev.com (mx.nabladev.com [178.251.229.89]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4F9DB3242BE; Sat, 11 Jul 2026 21:01:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=178.251.229.89 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783803720; cv=none; b=ZRk/U8d+YAeECkCIgT8BjglfFxFE3AWuN23U8LFK1QE4tdVaDQ0YxSGLBs2j2oR+Y8MPsSC1e2hYrGw8lwmJLJTZRtUU/FjU012UWT4goZ9CXpK8nhELw23d1iIT1E5sSY9IOtNEk16znWyANSa9tCLJ81YZEHKcxhyJZi+mLl8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783803720; c=relaxed/simple; bh=s0dEhrOCQrtcXpiGq1CCSSLYUMnExIP36w9JRaVSwEM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=mRGpZJaFGKfNs4iraqigyXiDycKZrSgLTSX90OsVJ6LbN7LHehxUH47ln/r6K8bkvlyOTGnH20mdbrjn64Ff4Ha9RL5KHwqQn6qfGfL2fQLnjYCa1rpv25Bt3brODZV3U3sGNQC9+YcwuPVFb0lRT5KlEW56oTYfN5TjmngiO+8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nabladev.com; spf=pass smtp.mailfrom=nabladev.com; dkim=pass (2048-bit key) header.d=nabladev.com header.i=@nabladev.com header.b=Nmt32673; arc=none smtp.client-ip=178.251.229.89 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nabladev.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=nabladev.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=nabladev.com header.i=@nabladev.com header.b="Nmt32673" Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id E2117119846; Sat, 11 Jul 2026 23:01:49 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nabladev.com; s=dkim; t=1783803710; h=from:subject:date:message-id:to:cc:mime-version: content-transfer-encoding:in-reply-to:references; bh=YxKx3is/yCeVSwU3UhNrLTwlQPWlNmb1dz/uD0wRxXw=; b=Nmt32673ywguMRBqEVI498ph9uGH3f01nXTPRFB2E2pb5njYXYCnLc6sJKfdMPjDPlNTJC W+kKpPEBZnDeZ2E9GIkCv2E88lfg7dVZ3dnzhNnhBeRdsOPB7/ZRd/GAWvf+nDpAWrcP1V 8EZfuabofjtadEeGIbzkuLq2skXrU3m4Yj1QIDYBlDuQDQXTZaMPPFqBujk5jn6XbC27SI WHi1P6/rQoyUbyqBWYzqpEa+a81U8tMNo72GV1LUAehYirKUYuEnZFuer2DruNxujBZe/r CaGw04XUOVA6Kecw3u/JdWKfskErUQtjPp7vL4ygxSlYtDTLpCLCXN3rAMh0MA== From: Marek Vasut To: linux-arm-kernel@lists.infradead.org Cc: Marek Vasut , Alexandre Torgue , Bartosz Golaszewski , Conor Dooley , Krzysztof Kozlowski , Linus Walleij , Rob Herring , devicetree@vger.kernel.org, kernel@dh-electronics.com, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com Subject: [PATCH 04/10] arm64: dts: st: Fix SDMMC1 indent on stm32mp251 Date: Sat, 11 Jul 2026 22:59:33 +0200 Message-ID: <20260711210131.236025-5-marex@nabladev.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260711210131.236025-1-marex@nabladev.com> References: <20260711210131.236025-1-marex@nabladev.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Last-TLS-Session-Version: TLSv1.3 Content-Type: text/plain; charset="utf-8" Drop bogus space. No functional change. Signed-off-by: Marek Vasut --- Cc: Alexandre Torgue Cc: Bartosz Golaszewski Cc: Conor Dooley Cc: Krzysztof Kozlowski Cc: Linus Walleij Cc: Rob Herring Cc: devicetree@vger.kernel.org Cc: kernel@dh-electronics.com Cc: linux-arm-kernel@lists.infradead.org Cc: linux-gpio@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: linux-stm32@st-md-mailman.stormreply.com --- arch/arm64/boot/dts/st/stm32mp251.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/st/stm32mp251.dtsi b/arch/arm64/boot/dts/s= t/stm32mp251.dtsi index 9c63fdb5a885a..66f3f83b8731f 100644 --- a/arch/arm64/boot/dts/st/stm32mp251.dtsi +++ b/arch/arm64/boot/dts/st/stm32mp251.dtsi @@ -1657,7 +1657,7 @@ sdmmc1: mmc@48220000 { arm,primecell-periphid =3D <0x00353180>; reg =3D <0x48220000 0x400>, <0x44230400 0x8>; interrupts =3D ; - clocks =3D <&rcc CK_KER_SDMMC1 >; + clocks =3D <&rcc CK_KER_SDMMC1>; clock-names =3D "apb_pclk"; resets =3D <&rcc SDMMC1_R>; cap-sd-highspeed; --=20 2.53.0 From nobody Sat Jul 25 23:03:59 2026 Received: from mx.nabladev.com (mx.nabladev.com [178.251.229.89]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 97C163264F6; Sat, 11 Jul 2026 21:01:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=178.251.229.89 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783803723; cv=none; b=Fv9+RLWFEylEF2zm28LK0zgdGGndgLtGAGoNRMewzVCbmKlgx2BM1QllUzoxwCU1C9/Lia1K0OD0UT7i3puus2BibRsUOJTkFWzXQmAnNWNGEzY0y98Sq8mwk+/tj/4bvirdaXRBYOes8RaiqogrmoHoDZ6XrriwhHOecr8KWsc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783803723; c=relaxed/simple; bh=HI+0VwoX6NSOf0cZ3ucA69VcKxi64Um+l0I7RARKxTI=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=ecVjQkWILn5B63/VKx5kT++OqfiaTBU7FGQPzFQNJ7snEEL7rppodkd0+27YThQkpa/IMb/aZ29DTDyOVkdIdiSSvdWMj55uQK1pVW9nHd4POp10K4UthX+xangCZefLtM65qhQ2BB4hRrBaDuKKSk4YBtRz1/8uoguscjIqoqQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nabladev.com; spf=pass smtp.mailfrom=nabladev.com; dkim=pass (2048-bit key) header.d=nabladev.com header.i=@nabladev.com header.b=b6nquMRo; arc=none smtp.client-ip=178.251.229.89 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nabladev.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=nabladev.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=nabladev.com header.i=@nabladev.com header.b="b6nquMRo" Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id BA05711984F; Sat, 11 Jul 2026 23:01:50 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nabladev.com; s=dkim; t=1783803711; h=from:subject:date:message-id:to:cc:mime-version: content-transfer-encoding:in-reply-to:references; bh=sLCyXf4fSaul0KJMCLi1kEMoFgnLRGwVU3DVuKnCCcU=; b=b6nquMRojWyPdQHGg8IzliPYNnFVNTXutLtEoMZb5Kg34ut3o5p2yVHL23YoHDwxVlCO9z UNNxud59Y2/3I8o2oPxjNMVYlbnmgOs5HSZgHfombumdoKMFef3kPI4chfWZWtEqSoPGcz 0L9X7omWlNj1sZHcTBdCvyCuyTzmp+e/dZT66POo5p9AgilTriMehuWUonKpI6+7bF0eJK HSu1CpDxEvL/l3RNihtoFnLxxbypRexIPJzK074RV4wBOUZqMKVVpA2kspHN3fTQvtOwuv y1d9AqZdSeryGUFU005rC9td1Ftr52wfqIOa2GriT/PwhAAmXyJBTZK7Zn+doA== From: Marek Vasut To: linux-arm-kernel@lists.infradead.org Cc: Marek Vasut , Alexandre Torgue , Bartosz Golaszewski , Conor Dooley , Krzysztof Kozlowski , Linus Walleij , Rob Herring , devicetree@vger.kernel.org, kernel@dh-electronics.com, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com Subject: [PATCH 05/10] arm64: dts: st: Add SDMMC2 and SDMMC3 nodes on stm32mp231 Date: Sat, 11 Jul 2026 22:59:34 +0200 Message-ID: <20260711210131.236025-6-marex@nabladev.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260711210131.236025-1-marex@nabladev.com> References: <20260711210131.236025-1-marex@nabladev.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Last-TLS-Session-Version: TLSv1.3 Content-Type: text/plain; charset="utf-8" Add DT nodes for the remaining SDMMC controllers 2 and 3. Signed-off-by: Marek Vasut --- Cc: Alexandre Torgue Cc: Bartosz Golaszewski Cc: Conor Dooley Cc: Krzysztof Kozlowski Cc: Linus Walleij Cc: Rob Herring Cc: devicetree@vger.kernel.org Cc: kernel@dh-electronics.com Cc: linux-arm-kernel@lists.infradead.org Cc: linux-gpio@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: linux-stm32@st-md-mailman.stormreply.com --- arch/arm64/boot/dts/st/stm32mp231.dtsi | 30 ++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/arch/arm64/boot/dts/st/stm32mp231.dtsi b/arch/arm64/boot/dts/s= t/stm32mp231.dtsi index a9de9fc5eb411..d70812f094142 100644 --- a/arch/arm64/boot/dts/st/stm32mp231.dtsi +++ b/arch/arm64/boot/dts/st/stm32mp231.dtsi @@ -730,6 +730,36 @@ sdmmc1: mmc@48220000 { status =3D "disabled"; }; =20 + sdmmc2: mmc@48230000 { + compatible =3D "st,stm32mp25-sdmmc2", "arm,pl18x", "arm,primecell"; + arm,primecell-periphid =3D <0x00353180>; + reg =3D <0x48230000 0x400>, <0x44230800 0x8>; + interrupts =3D ; + clocks =3D <&rcc CK_KER_SDMMC2>; + clock-names =3D "apb_pclk"; + resets =3D <&rcc SDMMC2_R>; + cap-sd-highspeed; + cap-mmc-highspeed; + max-frequency =3D <166000000>; + access-controllers =3D <&rifsc 77>; + status =3D "disabled"; + }; + + sdmmc3: mmc@48240000 { + compatible =3D "st,stm32mp25-sdmmc2", "arm,pl18x", "arm,primecell"; + arm,primecell-periphid =3D <0x00353180>; + reg =3D <0x48240000 0x400>, <0x44230c00 0x8>; + interrupts =3D ; + clocks =3D <&rcc CK_KER_SDMMC3>; + clock-names =3D "apb_pclk"; + resets =3D <&rcc SDMMC3_R>; + cap-sd-highspeed; + cap-mmc-highspeed; + max-frequency =3D <166000000>; + access-controllers =3D <&rifsc 78>; + status =3D "disabled"; + }; + ethernet1: ethernet@482c0000 { compatible =3D "st,stm32mp25-dwmac", "snps,dwmac-5.20"; reg =3D <0x482c0000 0x4000>; --=20 2.53.0 From nobody Sat Jul 25 23:03:59 2026 Received: from mx.nabladev.com (mx.nabladev.com [178.251.229.89]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 97CCA3264F9; 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charset="utf-8" Add DT nodes for the remaining SDMMC controllers 2 and 3. Signed-off-by: Marek Vasut --- Cc: Alexandre Torgue Cc: Bartosz Golaszewski Cc: Conor Dooley Cc: Krzysztof Kozlowski Cc: Linus Walleij Cc: Rob Herring Cc: devicetree@vger.kernel.org Cc: kernel@dh-electronics.com Cc: linux-arm-kernel@lists.infradead.org Cc: linux-gpio@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: linux-stm32@st-md-mailman.stormreply.com --- arch/arm64/boot/dts/st/stm32mp251.dtsi | 30 ++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/arch/arm64/boot/dts/st/stm32mp251.dtsi b/arch/arm64/boot/dts/s= t/stm32mp251.dtsi index 66f3f83b8731f..6e985f115b195 100644 --- a/arch/arm64/boot/dts/st/stm32mp251.dtsi +++ b/arch/arm64/boot/dts/st/stm32mp251.dtsi @@ -1667,6 +1667,36 @@ sdmmc1: mmc@48220000 { status =3D "disabled"; }; =20 + sdmmc2: mmc@48230000 { + compatible =3D "st,stm32mp25-sdmmc2", "arm,pl18x", "arm,primecell"; + arm,primecell-periphid =3D <0x00353180>; + reg =3D <0x48230000 0x400>, <0x44230800 0x8>; + interrupts =3D ; + clocks =3D <&rcc CK_KER_SDMMC2>; + clock-names =3D "apb_pclk"; + resets =3D <&rcc SDMMC2_R>; + cap-sd-highspeed; + cap-mmc-highspeed; + max-frequency =3D <166000000>; + access-controllers =3D <&rifsc 77>; + status =3D "disabled"; + }; + + sdmmc3: mmc@48240000 { + compatible =3D "st,stm32mp25-sdmmc2", "arm,pl18x", "arm,primecell"; + arm,primecell-periphid =3D <0x00353180>; + reg =3D <0x48240000 0x400>, <0x44230c00 0x8>; + interrupts =3D ; + clocks =3D <&rcc CK_KER_SDMMC3>; + clock-names =3D "apb_pclk"; + resets =3D <&rcc SDMMC3_R>; + cap-sd-highspeed; + cap-mmc-highspeed; + max-frequency =3D <166000000>; + access-controllers =3D <&rifsc 78>; + status =3D "disabled"; + }; + ethernet1: ethernet@482c0000 { compatible =3D "st,stm32mp25-dwmac", "snps,dwmac-5.20"; reg =3D <0x482c0000 0x4000>; --=20 2.53.0 From nobody Sat Jul 25 23:03:59 2026 Received: from mx.nabladev.com (mx.nabladev.com [178.251.229.89]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E654D32861F; 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charset="utf-8" Add Octo Memory Manager (OMM) entry on stm32mp231 and its two OSPI instance. Signed-off-by: Marek Vasut --- Cc: Alexandre Torgue Cc: Bartosz Golaszewski Cc: Conor Dooley Cc: Krzysztof Kozlowski Cc: Linus Walleij Cc: Rob Herring Cc: devicetree@vger.kernel.org Cc: kernel@dh-electronics.com Cc: linux-arm-kernel@lists.infradead.org Cc: linux-gpio@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: linux-stm32@st-md-mailman.stormreply.com --- arch/arm64/boot/dts/st/stm32mp231.dtsi | 54 ++++++++++++++++++++++++++ 1 file changed, 54 insertions(+) diff --git a/arch/arm64/boot/dts/st/stm32mp231.dtsi b/arch/arm64/boot/dts/s= t/stm32mp231.dtsi index d70812f094142..4505fc0e3b537 100644 --- a/arch/arm64/boot/dts/st/stm32mp231.dtsi +++ b/arch/arm64/boot/dts/st/stm32mp231.dtsi @@ -222,6 +222,60 @@ hpdma3: dma-controller@40420000 { #dma-cells =3D <3>; }; =20 + ommanager: ommanager@40500000 { + compatible =3D "st,stm32mp25-omm"; + reg =3D <0x40500000 0x400>, <0x60000000 0x10000000>; + reg-names =3D "regs", "memory_map"; + ranges =3D <0 0 0x40430000 0x400>, + <1 0 0x40440000 0x400>; + clocks =3D <&rcc CK_BUS_OSPIIOM>, + <&scmi_clk CK_SCMI_OSPI1>, + <&scmi_clk CK_SCMI_OSPI2>; + clock-names =3D "omm", "ospi1", "ospi2"; + resets =3D <&rcc OSPIIOM_R>, + <&scmi_reset RST_SCMI_OSPI1>, + <&scmi_reset RST_SCMI_OSPI2>; + reset-names =3D "omm", "ospi1", "ospi2"; + access-controllers =3D <&rifsc 111>; + power-domains =3D <&cluster_pd>; + #address-cells =3D <2>; + #size-cells =3D <1>; + st,syscfg-amcr =3D <&syscfg 0x2c00 0x7>; + status =3D "disabled"; + + ospi1: spi@0 { + compatible =3D "st,stm32mp25-ospi"; + reg =3D <0 0 0x400>; + interrupts =3D ; + dmas =3D <&hpdma 2 0x62 0x3121>, + <&hpdma 2 0x42 0x3112>; + dma-names =3D "tx", "rx"; + clocks =3D <&scmi_clk CK_SCMI_OSPI1>; + resets =3D <&scmi_reset RST_SCMI_OSPI1>, + <&scmi_reset RST_SCMI_OSPI1DLL>; + access-controllers =3D <&rifsc 74>; + power-domains =3D <&cluster_pd>; + st,syscfg-dlyb =3D <&syscfg 0x1000>; + status =3D "disabled"; + }; + + ospi2: spi@1 { + compatible =3D "st,stm32mp25-ospi"; + reg =3D <1 0 0x400>; + interrupts =3D ; + dmas =3D <&hpdma 3 0x62 0x3121>, + <&hpdma 3 0x42 0x3112>; + dma-names =3D "tx", "rx"; + clocks =3D <&scmi_clk CK_SCMI_OSPI2>; + resets =3D <&scmi_reset RST_SCMI_OSPI2>, + <&scmi_reset RST_SCMI_OSPI2DLL>; + access-controllers =3D <&rifsc 75>; + power-domains =3D <&cluster_pd>; + st,syscfg-dlyb =3D <&syscfg 0x1400>; + status =3D "disabled"; + }; + }; + rifsc: bus@42080000 { compatible =3D "st,stm32mp25-rifsc", "simple-bus"; reg =3D <0x42080000 0x1000>; --=20 2.53.0 From nobody Sat Jul 25 23:03:59 2026 Received: from mx.nabladev.com (mx.nabladev.com [178.251.229.89]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E989C328B56; Sat, 11 Jul 2026 21:01:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=178.251.229.89 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783803727; cv=none; b=j2cnjBHmxfn/yZGCz32DLXhgBbVchsTfpBAvJI8DDiz+AfRrG3Frtv3/Lec75X08iBXkNpBF2oMx+hyxxk6ShxELDbw4WcLjk0oT7IM2T1p6AiA22jgSslROrcPJdWj2/trjhzyTccNCFNfo8eQ5MCKGSph3kslQz3Q2r6/ZOmw= ARC-Message-Signature: i=1; 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Sat, 11 Jul 2026 23:01:53 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nabladev.com; s=dkim; t=1783803714; h=from:subject:date:message-id:to:cc:mime-version: content-transfer-encoding:in-reply-to:references; bh=VbelV6kMKLwt1ovagDKTC4aicrv3CH9g6/cgnCIdd/8=; b=DZVBoKIUBLjRDr5OVo9oweeK2Gi6GOhuBjVgosmYvZIBdK5L5NCHKsHJu/wdQeccN7rpsp nxKW4QY2IWqGkBP20/EfcSnsFzdbxrd464ZvDBHDJvaBUf5cDNKsrZx6ot5611muQ6PPBV 9rx3iS/boqxeAgI1sTebOuVmYbpCf1uGGL3SVWMPoyyYS9sNiBRHYaow3VzyWwq+m7J22O DGQ1noCsNrA5LZfsWSgTqyxeDKjsTir//I7VTGQQ6CJzk1mj48VZdhrNIZvmVpFsclnzUG /0lwyfKgyoq0ibwdnQjPAwZWJkGNhKH2U1bzyDHV20WO7kdxDRHRIxdG2O3wgw== From: Marek Vasut To: linux-arm-kernel@lists.infradead.org Cc: Marek Vasut , Alexandre Torgue , Bartosz Golaszewski , Conor Dooley , Krzysztof Kozlowski , Linus Walleij , Rob Herring , devicetree@vger.kernel.org, kernel@dh-electronics.com, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com Subject: [PATCH 08/10] arm64: dts: st: Add pinmux nodes for DH electronics STM32MP23xx/STM32MP25xx DHCOS SoM and Breakout Board Date: Sat, 11 Jul 2026 22:59:37 +0200 Message-ID: <20260711210131.236025-9-marex@nabladev.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260711210131.236025-1-marex@nabladev.com> References: <20260711210131.236025-1-marex@nabladev.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Last-TLS-Session-Version: TLSv1.3 Content-Type: text/plain; charset="utf-8" Add new pinmux nodes for DH electronics STM32MP2 DHCOS SoM and BB board. The following pinmux nodes are added: - ETH2 pins - I2C8 pins - MCO1 pins - SDMMC1,2,3 pins - SPI1,8 pins - UART8,9 pins - USART1,2,6 pins Signed-off-by: Marek Vasut --- Cc: Alexandre Torgue Cc: Bartosz Golaszewski Cc: Conor Dooley Cc: Krzysztof Kozlowski Cc: Linus Walleij Cc: Rob Herring Cc: devicetree@vger.kernel.org Cc: kernel@dh-electronics.com Cc: linux-arm-kernel@lists.infradead.org Cc: linux-gpio@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: linux-stm32@st-md-mailman.stormreply.com --- arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi | 564 ++++++++++++++++++ 1 file changed, 564 insertions(+) diff --git a/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi b/arch/arm64/boo= t/dts/st/stm32mp25-pinctrl.dtsi index 456ece7f8ebc3..1aadbc6b47da9 100644 --- a/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi +++ b/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi @@ -182,6 +182,30 @@ pins5 { }; }; =20 + /omit-if-no-ref/ + eth2_mdio_pins_a: eth2-mdio-0 { + pins1 { + pinmux =3D ; /* ETH_MDC */ + bias-disable; + drive-push-pull; + slew-rate =3D <3>; + }; + pins2 { + pinmux =3D ; /* ETH_MDIO */ + bias-disable; + drive-push-pull; + slew-rate =3D <0>; + }; + }; + + /omit-if-no-ref/ + eth2_mdio_sleep_pins_a: eth2-mdio-sleep-0 { + pins { + pinmux =3D , /* ETH_MDC */ + ; /* ETH_MDIO */ + }; + }; + /omit-if-no-ref/ eth2_rgmii_sleep_pins_a: eth2-rgmii-sleep-0 { pins { @@ -203,6 +227,68 @@ pins { }; }; =20 + /omit-if-no-ref/ + eth2_rgmii_pins_b: eth2-rgmii-1 { + pins1 { + pinmux =3D , /* ETH_RGMII_TXD0 */ + , /* ETH_RGMII_TXD1 */ + , /* ETH_RGMII_TXD2 */ + , /* ETH_RGMII_TXD3 */ + ; /* ETH_RGMII_TX_CTL */ + bias-disable; + drive-push-pull; + slew-rate =3D <3>; + }; + pins2 { + pinmux =3D , /* ETH_RGMII_CLK125 */ + ; /* ETH_MDC */ + bias-disable; + drive-push-pull; + slew-rate =3D <3>; + }; + pins3 { + pinmux =3D , /* ETH_RGMII_RXD0 */ + , /* ETH_RGMII_RXD1 */ + , /* ETH_RGMII_RXD2 */ + , /* ETH_RGMII_RXD3 */ + ; /* ETH_RGMII_RX_CTL */ + bias-disable; + }; + pins4 { + pinmux =3D ; /* ETH_RGMII_RX_CLK */ + bias-disable; + }; + }; + + /omit-if-no-ref/ + eth2_rgmii_sleep_pins_b: eth2-rgmii-sleep-1 { + pins { + pinmux =3D , /* ETH_RGMII_TXD0 */ + , /* ETH_RGMII_TXD1 */ + , /* ETH_RGMII_TXD2 */ + , /* ETH_RGMII_TXD3 */ + , /* ETH_RGMII_TX_CTL */ + , /* ETH_RGMII_CLK125 */ + , /* ETH_RGMII_GTX_CLK */ + , /* ETH_RGMII_RXD0 */ + , /* ETH_RGMII_RXD1 */ + , /* ETH_RGMII_RXD2 */ + , /* ETH_RGMII_RXD3 */ + , /* ETH_RGMII_RX_CTL */ + ; /* ETH_RGMII_RX_CLK */ + }; + }; + + /omit-if-no-ref/ + mco1_pins_a: mco1-0 { + pins { + pinmux =3D ; /* MCO1 */ + bias-disable; + drive-push-pull; + slew-rate =3D <2>; + }; + }; + /omit-if-no-ref/ i2c2_pins_a: i2c2-0 { pins { @@ -394,6 +480,26 @@ pins2 { }; }; =20 + /omit-if-no-ref/ + sdmmc1_b4_pins_b: sdmmc1-b4-1 { + pins1 { + pinmux =3D , /* SDMMC1_D0 */ + , /* SDMMC1_D1 */ + , /* SDMMC1_D2 */ + , /* SDMMC1_D3 */ + ; /* SDMMC1_CMD */ + slew-rate =3D <1>; + drive-push-pull; + bias-disable; + }; + pins2 { + pinmux =3D ; /* SDMMC1_CK */ + slew-rate =3D <2>; + drive-push-pull; + bias-disable; + }; + }; + /omit-if-no-ref/ sdmmc1_b4_od_pins_a: sdmmc1-b4-od-0 { pins1 { @@ -419,6 +525,31 @@ pins3 { }; }; =20 + /omit-if-no-ref/ + sdmmc1_b4_od_pins_b: sdmmc1-b4-od-1 { + pins1 { + pinmux =3D , /* SDMMC1_D0 */ + , /* SDMMC1_D1 */ + , /* SDMMC1_D2 */ + ; /* SDMMC1_D3 */ + slew-rate =3D <1>; + drive-push-pull; + bias-disable; + }; + pins2 { + pinmux =3D ; /* SDMMC1_CK */ + slew-rate =3D <2>; + drive-push-pull; + bias-disable; + }; + pins3 { + pinmux =3D ; /* SDMMC1_CMD */ + slew-rate =3D <1>; + drive-open-drain; + bias-disable; + }; + }; + /omit-if-no-ref/ sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sleep-0 { pins { @@ -431,6 +562,187 @@ pins { }; }; =20 + /omit-if-no-ref/ + sdmmc2_b4_pins_a: sdmmc2-b4-0 { + pins1 { + pinmux =3D , /* SDMMC2_D0 */ + , /* SDMMC2_D1 */ + , /* SDMMC2_D2 */ + , /* SDMMC2_D3 */ + ; /* SDMMC2_CMD */ + slew-rate =3D <1>; + drive-push-pull; + bias-pull-up; + }; + pins2 { + pinmux =3D ; /* SDMMC2_CK */ + slew-rate =3D <2>; + drive-push-pull; + bias-pull-up; + }; + }; + + /omit-if-no-ref/ + sdmmc2_b4_od_pins_a: sdmmc2-b4-od-0 { + pins1 { + pinmux =3D , /* SDMMC2_D0 */ + , /* SDMMC2_D1 */ + , /* SDMMC2_D2 */ + ; /* SDMMC2_D3 */ + slew-rate =3D <1>; + drive-push-pull; + bias-pull-up; + }; + pins2 { + pinmux =3D ; /* SDMMC2_CK */ + slew-rate =3D <2>; + drive-push-pull; + bias-pull-up; + }; + pins3 { + pinmux =3D ; /* SDMMC2_CMD */ + slew-rate =3D <1>; + drive-open-drain; + bias-pull-up; + }; + }; + + /omit-if-no-ref/ + sdmmc2_b4_sleep_pins_a: sdmmc2-b4-sleep-0 { + pins { + pinmux =3D , /* SDMMC2_D0 */ + , /* SDMMC2_D1 */ + , /* SDMMC2_D2 */ + , /* SDMMC2_D3 */ + , /* SDMMC2_CK */ + ; /* SDMMC2_CMD */ + }; + }; + + /omit-if-no-ref/ + sdmmc2_d47_pins_a: sdmmc2-d47-0 { + pins { + pinmux =3D , /* SDMMC2_D4 */ + , /* SDMMC2_D5 */ + , /* SDMMC2_D6 */ + ; /* SDMMC2_D7 */ + slew-rate =3D <1>; + drive-push-pull; + bias-pull-up; + }; + }; + + /omit-if-no-ref/ + sdmmc2_d47_sleep_pins_a: sdmmc2-d47-sleep-0 { + pins { + pinmux =3D , /* SDMMC2_D4 */ + , /* SDMMC2_D5 */ + , /* SDMMC2_D6 */ + ; /* SDMMC2_D7 */ + }; + }; + + /omit-if-no-ref/ + sdmmc3_b4_pins_a: sdmmc3-b4-0 { + pins1 { + pinmux =3D , /* SDMMC3_D0 */ + , /* SDMMC3_D1 */ + , /* SDMMC3_D2 */ + , /* SDMMC3_D3 */ + ; /* SDMMC3_CMD */ + slew-rate =3D <0>; + drive-push-pull; + bias-pull-up; + }; + pins2 { + pinmux =3D ; /* SDMMC3_CK */ + slew-rate =3D <1>; + drive-push-pull; + bias-pull-up; + }; + }; + + /omit-if-no-ref/ + sdmmc3_b4_pins_b: sdmmc3-b4-1 { + pins1 { + pinmux =3D , /* SDMMC3_D0 */ + , /* SDMMC3_D1 */ + , /* SDMMC3_D2 */ + , /* SDMMC3_D3 */ + ; /* SDMMC3_CMD */ + slew-rate =3D <0>; + drive-push-pull; + bias-pull-up; + }; + pins2 { + pinmux =3D ; /* SDMMC3_CK */ + slew-rate =3D <1>; + drive-push-pull; + bias-pull-up; + }; + }; + + /omit-if-no-ref/ + sdmmc3_b4_od_pins_b: sdmmc3-b4-od-1 { + pins1 { + pinmux =3D , /* SDMMC3_D0 */ + , /* SDMMC3_D1 */ + , /* SDMMC3_D2 */ + ; /* SDMMC3_D3 */ + slew-rate =3D <2>; + drive-push-pull; + bias-disable; + }; + pins2 { + pinmux =3D ; /* SDMMC3_CK */ + slew-rate =3D <3>; + drive-push-pull; + bias-disable; + }; + pins3 { + pinmux =3D ; /* SDMMC3_CMD */ + slew-rate =3D <2>; + drive-open-drain; + bias-disable; + }; + }; + + /omit-if-no-ref/ + sdmmc3_b4_sleep_pins_b: sdmmc3-b4-sleep-1 { + pins { + pinmux =3D , /* SDMMC3_D0 */ + , /* SDMMC3_D1 */ + , /* SDMMC3_D2 */ + , /* SDMMC3_D3 */ + , /* SDMMC3_CK */ + ; /* SDMMC3_CMD */ + }; + }; + + /omit-if-no-ref/ + spi1_pins_a: spi1-0 { + pins1 { + pinmux =3D , /* SPI1_SCK */ + ; /* SPI1_MOSI */ + drive-push-pull; + bias-disable; + slew-rate =3D <1>; + }; + pins2 { + pinmux =3D ; /* SPI1_MISO */ + bias-disable; + }; + }; + + /omit-if-no-ref/ + spi1_sleep_pins_a: spi1-sleep-0 { + pins1 { + pinmux =3D , /* SPI1_SCK */ + , /* SPI1_MOSI */ + ; /* SPI1_MISO */ + }; + }; + /omit-if-no-ref/ spi3_pins_a: spi3-0 { pins1 { @@ -471,6 +783,50 @@ pins { }; }; =20 + /omit-if-no-ref/ + usart1_pins_a: usart1-0 { + pins1 { + pinmux =3D , /* USART1_TX */ + ; /* USART1_RTS */ + bias-disable; + drive-push-pull; + slew-rate =3D <0>; + }; + pins2 { + pinmux =3D , /* USART1_RX */ + ; /* USART1_CTS_NSS */ + bias-pull-up; + }; + }; + + /omit-if-no-ref/ + usart1_idle_pins_a: usart1-idle-0 { + pins1 { + pinmux =3D , /* USART1_TX */ + ; /* USART1_CTS_NSS */ + }; + pins2 { + pinmux =3D ; /* USART1_RTS */ + bias-disable; + drive-push-pull; + slew-rate =3D <0>; + }; + pins3 { + pinmux =3D ; /* USART1_RX */ + bias-pull-up; + }; + }; + + /omit-if-no-ref/ + usart1_sleep_pins_a: usart1-sleep-0 { + pins { + pinmux =3D , /* USART1_TX */ + , /* USART1_RTS */ + , /* USART1_CTS_NSS */ + ; /* USART1_RX */ + }; + }; + /omit-if-no-ref/ usart2_pins_a: usart2-0 { pins1 { @@ -504,6 +860,50 @@ pins { }; }; =20 + /omit-if-no-ref/ + usart2_pins_b: usart2-1 { + pins1 { + pinmux =3D , /* USART2_TX */ + ; /* USART2_RTS */ + bias-disable; + drive-push-pull; + slew-rate =3D <0>; + }; + pins2 { + pinmux =3D , /* USART2_RX */ + ; /* USART2_CTS_NSS */ + bias-disable; + }; + }; + + /omit-if-no-ref/ + usart2_idle_pins_b: usart2-idle-1 { + pins1 { + pinmux =3D , /* USART2_TX */ + ; /* USART2_CTS_NSS */ + }; + pins2 { + pinmux =3D ; /* USART2_RTS */ + bias-disable; + drive-push-pull; + slew-rate =3D <0>; + }; + pins3 { + pinmux =3D ; /* USART2_RX */ + bias-pull-up; + }; + }; + + /omit-if-no-ref/ + usart2_sleep_pins_b: usart2-sleep-1 { + pins { + pinmux =3D , /* USART2_TX */ + , /* USART2_RTS */ + , /* USART2_CTS_NSS */ + ; /* USART2_RX */ + }; + }; + /omit-if-no-ref/ usart6_pins_a: usart6-0 { pins1 { @@ -547,6 +947,127 @@ pins { ; /* USART6_RX */ }; }; + + /omit-if-no-ref/ + usart6_pins_b: usart6-1 { + pins1 { + pinmux =3D ; /* USART6_TX */ + bias-disable; + drive-push-pull; + slew-rate =3D <0>; + }; + pins2 { + pinmux =3D ; /* USART6_RX */ + bias-disable; + }; + }; + + /omit-if-no-ref/ + usart6_idle_pins_b: usart6-idle-1 { + pins1 { + pinmux =3D ; /* USART6_TX */ + }; + pins2 { + pinmux =3D ; /* USART6_RX */ + bias-disable; + }; + }; + + /omit-if-no-ref/ + usart6_sleep_pins_b: usart6-sleep-1 { + pins { + pinmux =3D , /* USART6_TX */ + ; /* USART6_RX */ + }; + }; + + /omit-if-no-ref/ + uart8_pins_a: uart8-0 { + pins1 { + pinmux =3D , /* UART8_TX */ + ; /* UART8_RTS */ + bias-disable; + drive-push-pull; + slew-rate =3D <0>; + }; + pins2 { + pinmux =3D , /* UART8_RX */ + ; /* UART8_CTS_NSS */ + bias-pull-up; + }; + }; + + /omit-if-no-ref/ + uart8_idle_pins_a: uart8-idle-0 { + pins1 { + pinmux =3D , /* UART8_TX */ + ; /* UART8_CTS_NSS */ + }; + pins2 { + pinmux =3D ; /* UART8_RTS */ + bias-disable; + drive-push-pull; + slew-rate =3D <0>; + }; + pins3 { + pinmux =3D ; /* UART8_RX */ + bias-pull-up; + }; + }; + + /omit-if-no-ref/ + uart8_sleep_pins_a: uart8-sleep-0 { + pins { + pinmux =3D , /* UART8_TX */ + , /* UART8_RTS */ + , /* UART8_CTS_NSS */ + ; /* UART8_RX */ + }; + }; + + /omit-if-no-ref/ + uart9_pins_a: uart9-0 { + pins1 { + pinmux =3D , /* UART9_TX */ + ; /* UART9_RTS */ + bias-disable; + drive-push-pull; + slew-rate =3D <0>; + }; + pins2 { + pinmux =3D , /* UART9_RX */ + ; /* UART9_CTS_NSS */ + bias-pull-up; + }; + }; + + /omit-if-no-ref/ + uart9_idle_pins_a: uart9-idle-0 { + pins1 { + pinmux =3D , /* UART9_TX */ + ; /* UART9_CTS_NSS */ + }; + pins2 { + pinmux =3D ; /* UART9_RTS */ + bias-disable; + drive-push-pull; + slew-rate =3D <0>; + }; + pins3 { + pinmux =3D ; /* UART9_RX */ + bias-pull-up; + }; + }; + + /omit-if-no-ref/ + uart9_sleep_pins_a: uart9-sleep-0 { + pins { + pinmux =3D , /* UART9_TX */ + , /* UART9_RTS */ + , /* UART9_CTS_NSS */ + ; /* UART9_RX */ + }; + }; }; =20 &pinctrl_z { @@ -569,6 +1090,25 @@ pins { }; }; =20 + /omit-if-no-ref/ + i2c8_pins_b: i2c8-1 { + pins { + pinmux =3D , /* I2C1_SCL */ + ; /* I2C1_SDA */ + bias-disable; + drive-open-drain; + slew-rate =3D <0>; + }; + }; + + /omit-if-no-ref/ + i2c8_sleep_pins_b: i2c8-sleep-1 { + pins { + pinmux =3D , /* I2C1_SCL */ + ; /* I2C1_SDA */ + }; + }; + /omit-if-no-ref/ spi8_pins_a: spi8-0 { pins1 { @@ -592,4 +1132,28 @@ pins1 { ; /* SPI8_MISO */ }; }; + + /omit-if-no-ref/ + spi8_pins_b: spi8-1 { + pins1 { + pinmux =3D , /* SPI8_SCK */ + ; /* SPI8_MOSI */ + drive-push-pull; + bias-disable; + slew-rate =3D <1>; + }; + pins2 { + pinmux =3D ; /* SPI8_MISO */ + bias-disable; + }; + }; + + /omit-if-no-ref/ + spi8_sleep_pins_b: spi8-sleep-1 { + pins1 { + pinmux =3D , /* SPI8_SCK */ + , /* SPI8_MOSI */ + ; /* SPI8_MISO */ + }; + }; }; --=20 2.53.0 From nobody Sat Jul 25 23:03:59 2026 Received: from mx.nabladev.com (mx.nabladev.com [178.251.229.89]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 72466318B85; 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charset="utf-8" This stm32mp25xx-dhcos-bb board is a stack of DHCOS SoM based on STM32MP25xx SoC (1200MHz / crypto capabilities) populated on SoM Breakout Board, the stm32mp255c-dhcos-dhsbc is the SoM populated on DHSBC carrier board. The stm32mp23xx-dhcos-bb is a stack with STM32MP23xx SoC. The SoM contains the following peripherals: - STPMIC (power delivery) - 4GiB LPDDR4 memory - eMMC and SDIO WiFi module The Breakout Board carrier board contains the following peripherals: - USB-C peripheral port, power supply plug The DHSBC carrier board contains the following peripherals: - Two RGMII Ethernet ports - MicroSD slot - LVDS connector - MIPI CSI2 connector - USB-A Host port, USB-C power supply plug - USB-C / DP port - Expansion connector Signed-off-by: Marek Vasut --- Cc: Alexandre Torgue Cc: Bartosz Golaszewski Cc: Conor Dooley Cc: Krzysztof Kozlowski Cc: Linus Walleij Cc: Rob Herring Cc: devicetree@vger.kernel.org Cc: kernel@dh-electronics.com Cc: linux-arm-kernel@lists.infradead.org Cc: linux-gpio@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: linux-stm32@st-md-mailman.stormreply.com --- arch/arm64/boot/dts/st/Makefile | 10 + arch/arm64/boot/dts/st/stm32mp23xc.dtsi | 7 + .../boot/dts/st/stm32mp23xx-dhcos-bb.dts | 15 + .../boot/dts/st/stm32mp23xx-dhcos-som.dtsi | 51 ++ ...mp255c-dhcos-dhsbc-overlay-imx219-x10.dtso | 111 +++++ .../boot/dts/st/stm32mp255c-dhcos-dhsbc.dts | 189 ++++++++ arch/arm64/boot/dts/st/stm32mp25xc.dtsi | 7 + .../boot/dts/st/stm32mp25xx-dhcos-bb.dts | 15 + .../boot/dts/st/stm32mp25xx-dhcos-som.dtsi | 51 ++ .../boot/dts/st/stm32mp2xxx-dhcos-som.dtsi | 442 ++++++++++++++++++ 10 files changed, 898 insertions(+) create mode 100644 arch/arm64/boot/dts/st/stm32mp23xc.dtsi create mode 100644 arch/arm64/boot/dts/st/stm32mp23xx-dhcos-bb.dts create mode 100644 arch/arm64/boot/dts/st/stm32mp23xx-dhcos-som.dtsi create mode 100644 arch/arm64/boot/dts/st/stm32mp255c-dhcos-dhsbc-overlay-= imx219-x10.dtso create mode 100644 arch/arm64/boot/dts/st/stm32mp255c-dhcos-dhsbc.dts create mode 100644 arch/arm64/boot/dts/st/stm32mp25xc.dtsi create mode 100644 arch/arm64/boot/dts/st/stm32mp25xx-dhcos-bb.dts create mode 100644 arch/arm64/boot/dts/st/stm32mp25xx-dhcos-som.dtsi create mode 100644 arch/arm64/boot/dts/st/stm32mp2xxx-dhcos-som.dtsi diff --git a/arch/arm64/boot/dts/st/Makefile b/arch/arm64/boot/dts/st/Makef= ile index 63908113ae36b..8614554caedd3 100644 --- a/arch/arm64/boot/dts/st/Makefile +++ b/arch/arm64/boot/dts/st/Makefile @@ -1,6 +1,16 @@ # SPDX-License-Identifier: GPL-2.0-only + +stm32mp255c-dhcos-dhsbc-overlay-imx219-x10-dtbs :=3D \ + stm32mp255c-dhcos-dhsbc.dtb \ + stm32mp255c-dhcos-dhsbc-overlay-imx219-x10.dtbo + dtb-$(CONFIG_ARCH_STM32) +=3D \ stm32mp215f-dk.dtb \ stm32mp235f-dk.dtb \ + stm32mp23xx-dhcos-bb.dtb \ + stm32mp25xx-dhcos-bb.dtb \ + stm32mp255c-dhcos-dhsbc.dtb \ + stm32mp255c-dhcos-dhsbc-overlay-imx219-x10.dtb \ + stm32mp255c-dhcos-dhsbc-overlay-imx219-x10.dtbo \ stm32mp257f-dk.dtb \ stm32mp257f-ev1.dtb diff --git a/arch/arm64/boot/dts/st/stm32mp23xc.dtsi b/arch/arm64/boot/dts/= st/stm32mp23xc.dtsi new file mode 100644 index 0000000000000..56872fb1deeb0 --- /dev/null +++ b/arch/arm64/boot/dts/st/stm32mp23xc.dtsi @@ -0,0 +1,7 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause) +/* + * Copyright (C) 2026 Marek Vasut + */ + +/ { +}; diff --git a/arch/arm64/boot/dts/st/stm32mp23xx-dhcos-bb.dts b/arch/arm64/b= oot/dts/st/stm32mp23xx-dhcos-bb.dts new file mode 100644 index 0000000000000..125c76fe3e7be --- /dev/null +++ b/arch/arm64/boot/dts/st/stm32mp23xx-dhcos-bb.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause) +/* + * Copyright (C) 2026 Marek Vasut + */ + +/dts-v1/; + +#include "stm32mp235.dtsi" +#include "stm32mp23xc.dtsi" +#include "stm32mp23xx-dhcos-som.dtsi" + +/ { + model =3D "DH electronics STM32MP23xx DHCOS Breakout Board"; + compatible =3D "dh,stm32mp231a-dhcos-bb", "dh,stm32mp231a-dhcos-som", "st= ,stm32mp231"; +}; diff --git a/arch/arm64/boot/dts/st/stm32mp23xx-dhcos-som.dtsi b/arch/arm64= /boot/dts/st/stm32mp23xx-dhcos-som.dtsi new file mode 100644 index 0000000000000..ffdcceb2fa237 --- /dev/null +++ b/arch/arm64/boot/dts/st/stm32mp23xx-dhcos-som.dtsi @@ -0,0 +1,51 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) +/* + * Copyright (C) 2025-2026 Marek Vasut + */ + +#include +#include +#include +#include "stm32mp25-pinctrl.dtsi" +#include "stm32mp25xxak-pinctrl.dtsi" +#include "stm32mp2xxx-dhcos-som.dtsi" + +/ { + model =3D "DH electronics STM32MP23xx DHCOS SoM"; + compatible =3D "dh,stm32mp231a-dhcos-som", "st,stm32mp231"; + + aliases { + serial1 =3D &usart1; + serial2 =3D &usart2; + }; +}; + +&rv3032 { + interrupts-extended =3D <&gpiod 10 IRQ_TYPE_EDGE_FALLING>; +}; + +/* Bluetooth */ +&usart1 { + pinctrl-names =3D "default", "sleep", "idle"; + pinctrl-0 =3D <&usart1_pins_a>; + pinctrl-1 =3D <&usart1_sleep_pins_a>; + pinctrl-2 =3D <&usart1_idle_pins_a>; + uart-has-rtscts; + status =3D "okay"; + + bluetooth { + compatible =3D "infineon,cyw55572-bt"; + brcm,requires-autobaud-mode; + max-speed =3D <3000000>; + shutdown-gpios =3D <&ioexp 2 GPIO_ACTIVE_HIGH>; + }; +}; + +&usart2 { + pinctrl-names =3D "default", "sleep", "idle"; + pinctrl-0 =3D <&usart2_pins_b>; + pinctrl-1 =3D <&usart2_sleep_pins_b>; + pinctrl-2 =3D <&usart2_idle_pins_b>; + uart-has-rtscts; + status =3D "okay"; +}; diff --git a/arch/arm64/boot/dts/st/stm32mp255c-dhcos-dhsbc-overlay-imx219-= x10.dtso b/arch/arm64/boot/dts/st/stm32mp255c-dhcos-dhsbc-overlay-imx219-x1= 0.dtso new file mode 100644 index 0000000000000..fbec84eb7720f --- /dev/null +++ b/arch/arm64/boot/dts/st/stm32mp255c-dhcos-dhsbc-overlay-imx219-x10.dtso @@ -0,0 +1,111 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause) +/* + * Copyright (C) 2026 Marek Vasut + * + * Set up pipeline for raw bayer capture: + * $ media-ctl -d platform:48030000.dcmipp -r + * $ media-ctl -d platform:48030000.dcmipp -l '"48020000.csi":1->"dcmipp_i= nput":0[1]' + * $ media-ctl -d platform:48030000.dcmipp -l "'dcmipp_input':1->'dcmipp_d= ump_postproc':0[1]" + * $ media-ctl -d platform:48030000.dcmipp --set-v4l2 "'imx219 0-0010':0[f= mt:SRGGB8_1X8/1920x1080]" + * $ media-ctl -d platform:48030000.dcmipp --set-v4l2 "'48020000.csi':1[fm= t:SRGGB8_1X8/1920x1080]" + * $ media-ctl -d platform:48030000.dcmipp --set-v4l2 "'dcmipp_input':1[fm= t:SRGGB8_1X8/1920x1080 field:none]" + * $ media-ctl -d platform:48030000.dcmipp --set-v4l2 "'dcmipp_dump_postpr= oc':0[compose:(0,0)/1920x1080]" + * $ media-ctl -d platform:48030000.dcmipp --set-v4l2 "'dcmipp_dump_postpr= oc':1[fmt:SRGGB8_1X8/1920x1080]" + * $ v4l2-ctl -d /dev/video0 --set-fmt-video=3Dwidth=3D1920,height=3D1080,= pixelformat=3DRGGB + * + * Capture frame using v4l2-ctl: + * $ v4l2-ctl -d /dev/video0 --stream-mmap --stream-count=3D1 --stream-to= =3D/frame.raw + * + * Capture frame using gstreamer: + * $ gst-launch-1.0 v4l2src device=3D/dev/video0 num-buffers=3D1 ! \ + * video/x-bayer,width=3D1920,height=3D1080,format=3Drggb= ! \ + * bayer2rgb ! jpegenc ! filesink location=3D/test.jpg + */ + +/dts-v1/; +/plugin/; + +#include + +&{/} { + clk_cam_x10: clk-cam-j1 { + compatible =3D "fixed-clock"; + #clock-cells =3D <0>; + clock-frequency =3D <24000000>; + }; + + /* Page 29 / CSI_IF_CN / J1 */ + reg_cam_x10: reg-cam-j1 { + compatible =3D "regulator-fixed"; + regulator-name =3D "cam-X10"; + enable-active-high; + gpios =3D <&ioexp 13 GPIO_ACTIVE_HIGH>; + }; +}; + +&csi { + vdd-supply =3D <&scmi_vddcore>; + vdda18-supply =3D <&scmi_v1v8>; + status =3D "okay"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + + csi_sink: endpoint { + remote-endpoint =3D <&imx219_x10_out>; + data-lanes =3D <1 2>; + bus-type =3D <4>; + }; + }; + port@1 { + reg =3D <1>; + + csi_source: endpoint { + remote-endpoint =3D <&dcmipp_0>; + }; + }; + }; +}; + +&dcmipp { + status =3D "okay"; + + port { + dcmipp_0: endpoint { + remote-endpoint =3D <&csi_source>; + bus-type =3D <4>; + }; + }; +}; + +&i2c2 { + #address-cells =3D <1>; + #size-cells =3D <0>; + + cam@10 { + compatible =3D "sony,imx219"; + reg =3D <0x10>; + + clocks =3D <&clk_cam_x10>; + + VANA-supply =3D <®_cam_x10>; + VDIG-supply =3D <®_cam_x10>; + VDDL-supply =3D <®_cam_x10>; + + orientation =3D <2>; + rotation =3D <0>; + + port { + imx219_x10_out: endpoint { + clock-noncontinuous; + link-frequencies =3D /bits/ 64 <456000000>; + data-lanes =3D <1 2>; + remote-endpoint =3D <&csi_sink>; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/st/stm32mp255c-dhcos-dhsbc.dts b/arch/arm6= 4/boot/dts/st/stm32mp255c-dhcos-dhsbc.dts new file mode 100644 index 0000000000000..1d750d2787d6f --- /dev/null +++ b/arch/arm64/boot/dts/st/stm32mp255c-dhcos-dhsbc.dts @@ -0,0 +1,189 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause) +/* + * Copyright (C) 2025-2026 Marek Vasut + */ + +/dts-v1/; + +#include "stm32mp255.dtsi" +#include "stm32mp25xc.dtsi" +#include "stm32mp25xx-dhcos-som.dtsi" + +/ { + model =3D "DH electronics STM32MP255C DHCOS DHSBC"; + compatible =3D "dh,stm32mp255c-dhcos-dhsbc", "dh,stm32mp255c-dhcos-som", = "st,stm32mp255"; + + aliases { + ethernet0 =3D ðernet1; + ethernet1 =3D ðernet2; + }; +}; + +ðernet1 { + phy-handle =3D <ðphy1>; + phy-mode =3D "rgmii-id"; + pinctrl-0 =3D <ð1_mdio_pins_a ð1_rgmii_pins_a>; + pinctrl-1 =3D <ð1_mdio_sleep_pins_a ð1_rgmii_sleep_pins_a>; + pinctrl-names =3D "default", "sleep"; + st,ext-phyclk; + status =3D "okay"; + + mdio { + #address-cells =3D <1>; + #size-cells =3D <0>; + compatible =3D "snps,dwmac-mdio"; + + ethphy1: ethernet-phy@1 { + /* RTL8211F */ + compatible =3D "ethernet-phy-id001c.c916"; + interrupt-parent =3D <&gpioc>; + interrupts =3D <6 IRQ_TYPE_LEVEL_LOW>; + reg =3D <1>; + realtek,clkout-disable; + realtek,clkout-ssc-enable; + realtek,rxc-ssc-enable; + realtek,sysclk-ssc-enable; + reset-assert-us =3D <15000>; + reset-deassert-us =3D <55000>; + reset-gpios =3D <&ioexp 1 GPIO_ACTIVE_LOW>; + + leds { + #address-cells =3D <1>; + #size-cells =3D <0>; + + led@0 { + reg =3D <0>; + color =3D ; + function =3D LED_FUNCTION_WAN; + linux,default-trigger =3D "netdev"; + }; + + led@1 { + reg =3D <1>; + color =3D ; + function =3D LED_FUNCTION_WAN; + linux,default-trigger =3D "netdev"; + }; + }; + }; + }; +}; + +ðernet2 { + phy-handle =3D <ðphy2>; + phy-mode =3D "rgmii-id"; + pinctrl-0 =3D <ð2_mdio_pins_a ð2_rgmii_pins_b>; + pinctrl-1 =3D <ð2_mdio_sleep_pins_a ð2_rgmii_sleep_pins_b>; + pinctrl-names =3D "default", "sleep"; + st,ext-phyclk; + status =3D "okay"; + + mdio { + #address-cells =3D <1>; + #size-cells =3D <0>; + compatible =3D "snps,dwmac-mdio"; + + ethphy2: ethernet-phy@1 { + /* RTL8211F */ + compatible =3D "ethernet-phy-id001c.c916"; + interrupt-parent =3D <&gpiog>; + interrupts =3D <3 IRQ_TYPE_LEVEL_LOW>; + reg =3D <1>; + realtek,clkout-disable; + realtek,clkout-ssc-enable; + realtek,rxc-ssc-enable; + realtek,sysclk-ssc-enable; + reset-assert-us =3D <15000>; + reset-deassert-us =3D <55000>; + reset-gpios =3D <&ioexp 0 GPIO_ACTIVE_LOW>; + + leds { + #address-cells =3D <1>; + #size-cells =3D <0>; + + led@0 { + reg =3D <0>; + color =3D ; + function =3D LED_FUNCTION_LAN; + linux,default-trigger =3D "netdev"; + }; + + led@1 { + reg =3D <1>; + color =3D ; + function =3D LED_FUNCTION_LAN; + linux,default-trigger =3D "netdev"; + }; + }; + }; + }; +}; + +&gpioa { + gpio-line-names =3D "DHSBC_HW-CODE_0", "DHSBC_HW-CODE_1", "DHSBC_HW-CODE_= 2", "", + "DHCOS-E", "DHCOS-J", "", "", + "DHCOS-D", "", "", "", + "", "", "", ""; +}; + +&i2c2 { + #address-cells =3D <1>; + #size-cells =3D <0>; + pinctrl-names =3D "default", "sleep"; + pinctrl-0 =3D <&i2c2_pins_a>; + pinctrl-1 =3D <&i2c2_sleep_pins_a>; + i2c-scl-rising-time-ns =3D <57>; + i2c-scl-falling-time-ns =3D <7>; + clock-frequency =3D <400000>; + status =3D "okay"; +}; + +&scmi_vddio1 { + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <3300000>; + regulator-settling-time-up-us =3D <1000>; + regulator-settling-time-down-us =3D <100000>; +}; + +&sdmmc1 { + pinctrl-names =3D "default", "opendrain", "sleep"; + pinctrl-0 =3D <&sdmmc1_b4_pins_b>; + pinctrl-1 =3D <&sdmmc1_b4_od_pins_b>; + pinctrl-2 =3D <&sdmmc1_b4_sleep_pins_a>; + cd-gpios =3D <&ioexp 8 GPIO_ACTIVE_HIGH>; + disable-wp; + st,neg-edge; + bus-width =3D <4>; + vmmc-supply =3D <&scmi_v3v3>; + vqmmc-supply =3D <&scmi_vddio1>; + sd-uhs-sdr12; + sd-uhs-sdr25; + sd-uhs-sdr50; + sd-uhs-ddr50; + sd-uhs-sdr104; + status =3D "okay"; +}; + +&spi1 { + pinctrl-names =3D "default", "sleep"; + pinctrl-0 =3D <&spi1_pins_a>; + pinctrl-1 =3D <&spi1_sleep_pins_a>; + cs-gpios =3D <&gpioh 3 0>; + status =3D "okay"; + + st33htph: tpm@0 { + compatible =3D "st,st33htpm-spi", "tcg,tpm_tis-spi"; + reg =3D <0>; + interrupt-parent =3D <&gpioa>; + interrupts =3D <5 IRQ_TYPE_LEVEL_LOW>; + reset-gpios =3D <&gpioh 2 GPIO_ACTIVE_LOW>; + spi-max-frequency =3D <24000000>; + }; +}; + +&spi8 { + pinctrl-names =3D "default", "sleep"; + pinctrl-0 =3D <&spi8_pins_b>; + pinctrl-1 =3D <&spi8_sleep_pins_b>; + cs-gpios =3D <&gpioz 6 0>; +}; diff --git a/arch/arm64/boot/dts/st/stm32mp25xc.dtsi b/arch/arm64/boot/dts/= st/stm32mp25xc.dtsi new file mode 100644 index 0000000000000..56872fb1deeb0 --- /dev/null +++ b/arch/arm64/boot/dts/st/stm32mp25xc.dtsi @@ -0,0 +1,7 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause) +/* + * Copyright (C) 2026 Marek Vasut + */ + +/ { +}; diff --git a/arch/arm64/boot/dts/st/stm32mp25xx-dhcos-bb.dts b/arch/arm64/b= oot/dts/st/stm32mp25xx-dhcos-bb.dts new file mode 100644 index 0000000000000..cf66e8e48c99a --- /dev/null +++ b/arch/arm64/boot/dts/st/stm32mp25xx-dhcos-bb.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause) +/* + * Copyright (C) 2025-2026 Marek Vasut + */ + +/dts-v1/; + +#include "stm32mp255.dtsi" +#include "stm32mp25xc.dtsi" +#include "stm32mp25xx-dhcos-som.dtsi" + +/ { + model =3D "DH electronics STM32MP25xx DHCOS Breakout Board"; + compatible =3D "dh,stm32mp251a-dhcos-bb", "dh,stm32mp251a-dhcos-som", "st= ,stm32mp251"; +}; diff --git a/arch/arm64/boot/dts/st/stm32mp25xx-dhcos-som.dtsi b/arch/arm64= /boot/dts/st/stm32mp25xx-dhcos-som.dtsi new file mode 100644 index 0000000000000..23c25ea086445 --- /dev/null +++ b/arch/arm64/boot/dts/st/stm32mp25xx-dhcos-som.dtsi @@ -0,0 +1,51 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) +/* + * Copyright (C) 2025-2026 Marek Vasut + */ + +#include +#include +#include +#include "stm32mp25-pinctrl.dtsi" +#include "stm32mp25xxak-pinctrl.dtsi" +#include "stm32mp2xxx-dhcos-som.dtsi" + +/ { + model =3D "DH electronics STM32MP25xx DHCOS SoM"; + compatible =3D "dh,stm32mp251a-dhcos-som", "st,stm32mp251"; + + aliases { + serial1 =3D &uart8; + serial2 =3D &uart9; + }; +}; + +&rv3032 { + interrupts-extended =3D <&gpioi 10 IRQ_TYPE_EDGE_FALLING>; +}; + +/* Bluetooth */ +&uart8 { + pinctrl-names =3D "default", "sleep", "idle"; + pinctrl-0 =3D <&uart8_pins_a>; + pinctrl-1 =3D <&uart8_sleep_pins_a>; + pinctrl-2 =3D <&uart8_idle_pins_a>; + uart-has-rtscts; + status =3D "okay"; + + bluetooth { + compatible =3D "infineon,cyw55572-bt"; + brcm,requires-autobaud-mode; + max-speed =3D <3000000>; + shutdown-gpios =3D <&ioexp 2 GPIO_ACTIVE_HIGH>; + }; +}; + +&uart9 { + pinctrl-names =3D "default", "sleep", "idle"; + pinctrl-0 =3D <&uart9_pins_a>; + pinctrl-1 =3D <&uart9_sleep_pins_a>; + pinctrl-2 =3D <&uart9_idle_pins_a>; + uart-has-rtscts; + status =3D "okay"; +}; diff --git a/arch/arm64/boot/dts/st/stm32mp2xxx-dhcos-som.dtsi b/arch/arm64= /boot/dts/st/stm32mp2xxx-dhcos-som.dtsi new file mode 100644 index 0000000000000..330c7c6768b6c --- /dev/null +++ b/arch/arm64/boot/dts/st/stm32mp2xxx-dhcos-som.dtsi @@ -0,0 +1,442 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) +/* + * Copyright (C) 2025-2026 Marek Vasut + */ + +/ { + aliases { + mmc0 =3D &sdmmc2; + mmc1 =3D &sdmmc3; + serial0 =3D &usart6; + serial1 =3D &uart8; + eeprom0 =3D &eeprom0; + eeprom0wl =3D &eeprom0wl; + rtc0 =3D &rv3032; + rtc1 =3D &rtc; + }; + + chosen { + stdout-path =3D "serial0:115200n8"; + }; + + memory@80000000 { + device_type =3D "memory"; + reg =3D <0x0 0x80000000 0x1 0x0>; + }; + + reserved-memory { + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + + /* Internal RAM reserved memory declaration */ + tfa_bl31: tfa-bl31@a000000 { + reg =3D <0x0 0xa000000 0x0 0x20000>; + no-map; + }; + + hpdma1_lli: hpdma1-lli@a020000 { + reg =3D <0x0 0xa020000 0x0 0xf0f0>; + no-map; + }; + + hpdma2_lli: hpdma2-lli@a02f0f0 { + reg =3D <0x0 0xa02f0f0 0x0 0xf0f0>; + no-map; + }; + + hpdma3_lli: hpdma3-lli@a03e1e0 { + reg =3D <0x0 0xa03e1e0 0x0 0x1e20>; + no-map; + }; + + bsec_mirror: bsec-mirror@a040000 { + reg =3D <0x0 0xa040000 0x0 0x1000>; + no-map; + }; + + scmi_cid2_s: scmi-cid2-s@a041000 { + reg =3D <0x0 0xa041000 0x0 0x1000>; + no-map; + }; + + scmi_cid2_ns: scmi-cid2-ns@a042000 { + reg =3D <0x0 0xa042000 0x0 0x1000>; + no-map; + }; + + cm33_sram1: cm33-sram1@a043000 { + reg =3D <0x0 0xa043000 0x0 0x1d000>; + no-map; + }; + + cm33_sram2: cm33-sram2@a060000 { + reg =3D <0x0 0xa060000 0x0 0x20000>; + no-map; + }; + + cm33_retram: cm33-retram@a080000 { + reg =3D <0x0 0xa080000 0x0 0x1f000>; + no-map; + }; + + ddr_param: ddr-param@a09f000 { + reg =3D <0x0 0xa09f000 0x0 0x1000>; + no-map; + }; + + cm0_cube_fw: cm0-cube-fw@200C0000 { + compatible =3D "shared-dma-pool"; + reg =3D <0x0 0x200C0000 0x0 0x4000>; + no-map; + }; + + cm0_cube_data: cm0-cube-data@200C4000 { + compatible =3D "shared-dma-pool"; + reg =3D <0x0 0x200C4000 0x0 0x2000>; + no-map; + }; + + ipc_shmem_2: ipc-shmem-2@200C6000{ + compatible =3D "shared-dma-pool"; + reg =3D <0x0 0x200C6000 0x0 0x2000>; + no-map; + }; + + /* Backup RAM reserved memory declaration */ + bl31_lowpower: bl31-lowpower@42000000 { + reg =3D <0x0 0x42000000 0x0 0x1000>; + no-map; + }; + + tfm_its: tfm-its@42001000 { + reg =3D <0x0 0x42001000 0x0 0x1000>; + no-map; + }; + + /* Octo Memory Manager reserved memory declaration */ + mm_ospi1: mm-ospi@60000000 { + reg =3D <0x0 0x60000000 0x0 0x10000000>; + no-map; + }; + + /* DDR reserved memory declaration */ + tfm_code: tfm-code@80000000 { + reg =3D <0x0 0x80000000 0x0 0x100000>; + no-map; + }; + + cm33_cube_fw: cm33-cube-fw@80100000 { + reg =3D <0x0 0x80100000 0x0 0x800000>; + no-map; + }; + + tfm_data: tfm-data@80900000 { + reg =3D <0x0 0x80900000 0x0 0x100000>; + no-map; + }; + + cm33_cube_data: cm33-cube-data@80a00000 { + reg =3D <0x0 0x80a00000 0x0 0x800000>; + no-map; + }; + + ipc_shmem_1: ipc-shmem-1@81200000 { + compatible =3D "shared-dma-pool"; + reg =3D <0x0 0x81200000 0x0 0xf8000>; + no-map; + }; + + vdev0vring0: vdev0vring0@812f8000 { + compatible =3D "shared-dma-pool"; + reg =3D <0x0 0x812f8000 0x0 0x1000>; + no-map; + }; + + vdev0vring1: vdev0vring1@812f9000 { + compatible =3D "shared-dma-pool"; + reg =3D <0x0 0x812f9000 0x0 0x1000>; + no-map; + }; + + vdev0buffer: vdev0buffer@812fa000 { + compatible =3D "shared-dma-pool"; + reg =3D <0x0 0x812fa000 0x0 0x6000>; + no-map; + }; + + spare1: spare1@81300000 { + reg =3D <0x0 0x81300000 0x0 0xcc0000>; + no-map; + }; + + bl31_context: bl31-context@81fc0000 { + reg =3D <0x0 0x81fc0000 0x0 0x40000>; + no-map; + }; + + op_tee: op-tee@82000000 { + reg =3D <0x0 0x82000000 0x0 0x2000000>; + no-map; + }; + + gpu_reserved: gpu-reserved@fa800000 { + reg =3D <0x0 0xfa800000 0x0 0x4000000>; + no-map; + }; + + ltdc_sec_layer: ltdc-sec-layer@fe800000 { + reg =3D <0x0 0xfe800000 0x0 0x800000>; + no-map; + }; + + ltdc_sec_rotation: ltdc-sec-rotation@ff000000 { + reg =3D <0x0 0xff000000 0x0 0x1000000>; + no-map; + }; + + /* global autoconfigured region for contiguous allocations */ + linux,cma { + compatible =3D "shared-dma-pool"; + reusable; + alloc-ranges =3D <0 0x80000000 0 0x80000000>; + size =3D <0x0 0x8000000>; + alignment =3D <0x0 0x2000>; + linux,cma-default; + }; + }; + + sdio_pwrseq: sdio-pwrseq { + compatible =3D "mmc-pwrseq-simple"; + post-power-on-delay-ms =3D <50>; + reset-gpios =3D <&ioexp 3 GPIO_ACTIVE_LOW>; + }; +}; + +&arm_wdt { + timeout-sec =3D <32>; + status =3D "okay"; +}; + +&gpioa { + gpio-line-names =3D "", "DHCOS-M", "DHCOS-K", "DHCOS-L", + "DHCOS-E", "DHCOS-J", "", "", + "DHCOS-D", "", "", "", + "", "", "", ""; +}; + +&gpiof { + gpio-line-names =3D "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "DHCOS_RAM-CODE_2"; +}; + +&gpiog { + gpio-line-names =3D "", "", "", "", + "", "", "", "", + "", "DHCOS_RAM-CODE_0", "DHCOS_RAM-CODE_1", "", + "", "", "DHCOS-F", "DHCOS_HW-CODE_0"; +}; + +&gpioh { + gpio-line-names =3D "", "", "DHCOS-I", "DHCOS-N", + "", "", "DHCOS-O", "DHCOS-H", + "DHCOS-G", "", "", "", + "", "", "", ""; +}; + +&gpioi { + gpio-line-names =3D "DHCOS_HW-CODE_1", "DHCOS_HW-CODE_2", "", "", + "", "", "", "", + "", "DHCOS-C", "", "", + "", "", "", ""; +}; + +&gpioz { + gpio-line-names =3D "", "", "DHCOS-A", "DHCOS-B", + "", "", "", "", + "", "", "", "", + "", "", "", ""; +}; + +&i2c8 { + pinctrl-names =3D "default", "sleep"; + pinctrl-0 =3D <&i2c8_pins_b>; + pinctrl-1 =3D <&i2c8_sleep_pins_b>; + i2c-scl-rising-time-ns =3D <57>; + i2c-scl-falling-time-ns =3D <7>; + clock-frequency =3D <400000>; + status =3D "okay"; + + ioexp: gpio@20 { + compatible =3D "kinetic,kts1622", "ti,tcal6416"; + reg =3D <0x20>; + gpio-controller; + #gpio-cells =3D <2>; + interrupts-extended =3D <&gpiod 11 IRQ_TYPE_LEVEL_LOW>; + interrupt-controller; + #interrupt-cells =3D <2>; + wakeup-source; + + gpio-line-names =3D + "#ETH1_RST_P0_0", "#ETH0_RST_P0_1", + "BT_REG_ON_P0_2", "WL_REG_ON_P0_3", + "USB1_PWR_EN_P0_4", "USB1_PWR_STAT_P0_5", + "USB0_PWR_EN_P0_6", "USB0_PWR_STAT_P0_7", + "SDIO0_CD_P1_0", "USB0_SS_SEL_P1_1", + "#PCIe_RST_1_2", "#PCIe_Wake_P1_3", + "#QSPI_RST_P1_4", "#CSI0_PWDN_P1_5", + "#CSI0_RST_P1_6", "#ETH3_RST_P1_7"; + }; + + eeprom0: eeprom@50 { + compatible =3D "atmel,24c256"; /* ST M24256 */ + reg =3D <0x50>; + pagesize =3D <64>; + }; + + rv3032: rtc@51 { + compatible =3D "microcrystal,rv3032"; + reg =3D <0x51>; + wakeup-source; + }; + + eeprom0wl: eeprom@58 { + compatible =3D "st,24256e-wl"; /* ST M24256E WL page of 0x50 */ + pagesize =3D <64>; + reg =3D <0x58>; + }; +}; + +&ommanager { + memory-region =3D <&mm_ospi1>; + pinctrl-names =3D "default", "sleep"; + pinctrl-0 =3D <&ospi_port1_clk_pins_a + &ospi_port1_io03_pins_a + &ospi_port1_cs0_pins_a>; + pinctrl-1 =3D <&ospi_port1_clk_sleep_pins_a + &ospi_port1_io03_sleep_pins_a + &ospi_port1_cs0_sleep_pins_a>; + pinctrl-names =3D "default", "sleep"; + status =3D "okay"; +}; + +&ospi1 { + #address-cells =3D <1>; + #size-cells =3D <0>; + memory-region =3D <&mm_ospi1>; + status =3D "okay"; + + flash0: flash@0 { + compatible =3D "jedec,spi-nor"; + reg =3D <0>; + spi-rx-bus-width =3D <4>; + spi-tx-bus-width =3D <4>; + spi-max-frequency =3D <100000000>; + }; +}; + +&rtc { + status =3D "okay"; +}; + +&scmi_regu { + scmi_vddcore: regulator@b { + reg =3D ; + regulator-name =3D "vddcore"; + }; + + regulator@c { + reg =3D ; + regulator-name =3D "vddgpu"; + regulator-always-on; + }; + + scmi_v1v8: regulator@e { + reg =3D ; + regulator-name =3D "v1v8"; + regulator-always-on; + }; + + scmi_v3v3: regulator@10 { + reg =3D ; + regulator-name =3D "v3v3"; + regulator-always-on; + }; + + scmi_vdd_emmc: regulator@12 { + reg =3D ; + regulator-name =3D "vdd_emmc"; + }; + + scmi_vdd3v3_usb: regulator@14 { + reg =3D ; + regulator-name =3D "vdd3v3_usb"; + }; + + scmi_vdd_sdcard: regulator@17 { + reg =3D ; + regulator-name =3D "vdd_sdcard"; + }; +}; + +&scmi_vddio3 { + regulator-always-on; +}; + +&scmi_vddio4 { + regulator-always-on; +}; + +&sdmmc2 { + pinctrl-names =3D "default", "opendrain", "sleep"; + pinctrl-0 =3D <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_a>; + pinctrl-1 =3D <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_a>; + pinctrl-2 =3D <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_a>; + non-removable; + no-sd; + no-sdio; + st,neg-edge; + bus-width =3D <8>; + vmmc-supply =3D <&scmi_vdd_emmc>; + vqmmc-supply =3D <&scmi_vddio2>; + mmc-ddr-1_8v; + mmc-hs200-1_8v; + status =3D "okay"; +}; + +&sdmmc3 { + pinctrl-names =3D "default", "opendrain", "sleep"; + pinctrl-0 =3D <&sdmmc3_b4_pins_b>; + pinctrl-1 =3D <&sdmmc3_b4_od_pins_b>; + pinctrl-2 =3D <&sdmmc3_b4_sleep_pins_b>; + bus-width =3D <4>; + keep-power-in-suspend; + non-removable; + no-sd; + no-mmc; + st,neg-edge; + vmmc-supply =3D <&scmi_v3v3>; + vqmmc-supply =3D <&scmi_v1v8>; + mmc-pwrseq =3D <&sdio_pwrseq>; + status =3D "okay"; + + #address-cells =3D <1>; + #size-cells =3D <0>; + + brcmf: wifi@1 { /* muRata 2FY */ + reg =3D <1>; + compatible =3D "brcm,bcm4329-fmac"; + }; +}; + +&usart6 { + pinctrl-names =3D "default", "idle", "sleep"; + pinctrl-0 =3D <&usart6_pins_b>; + pinctrl-1 =3D <&usart6_idle_pins_b>; + pinctrl-2 =3D <&usart6_sleep_pins_b>; + /delete-property/dmas; + /delete-property/dma-names; + status =3D "okay"; +}; --=20 2.53.0 From nobody Sat Jul 25 23:03:59 2026 Received: from mx.nabladev.com (mx.nabladev.com [178.251.229.89]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 85526318B9B; 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charset="utf-8" Add another SoM type N: match and update email address to an up to date one in the process. Signed-off-by: Marek Vasut --- Cc: Alexandre Torgue Cc: Bartosz Golaszewski Cc: Conor Dooley Cc: Krzysztof Kozlowski Cc: Linus Walleij Cc: Rob Herring Cc: devicetree@vger.kernel.org Cc: kernel@dh-electronics.com Cc: linux-arm-kernel@lists.infradead.org Cc: linux-gpio@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: linux-stm32@st-md-mailman.stormreply.com --- MAINTAINERS | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/MAINTAINERS b/MAINTAINERS index 8729cea57c3dd..3532d425e41f1 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -7518,11 +7518,12 @@ F: drivers/iio/chemical/sen0322.c =20 DH ELECTRONICS DHSOM SOM AND BOARD SUPPORT M: Christoph Niedermaier -M: Marek Vasut +M: Marek Vasut L: kernel@dh-electronics.com S: Maintained N: dhcom N: dhcor +N: dhcos N: dhsom =20 DIALOG SEMICONDUCTOR DRIVERS --=20 2.53.0