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Fri, 10 Jul 2026 09:20:30 -0700 (PDT) From: Jerome Brunet Date: Fri, 10 Jul 2026 18:19:25 +0200 Subject: [PATCH v2 1/3] dt-bindings: mfd: x-powers,axp152: Document AXP318W Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260710-axp318-regulator-v2-1-ee5f1c56b49f@baylibre.com> References: <20260710-axp318-regulator-v2-0-ee5f1c56b49f@baylibre.com> In-Reply-To: <20260710-axp318-regulator-v2-0-ee5f1c56b49f@baylibre.com> To: Lee Jones , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Liam Girdwood , Mark Brown Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Andre Przywara , Conor Dooley , Jerome Brunet X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=3753; i=jbrunet@baylibre.com; h=from:subject:message-id; bh=wv1nTWnn872ufIVhbI4UCIkelK8ryXZIIeZU5j5xa5o=; b=owEBbQKS/ZANAwAKAeb8Dxw38tqFAcsmYgBqURvCPvWDmUocb0ozN84vyqLMjXQYhmrK2kmUy D7f8VzY2L+JAjMEAAEKAB0WIQT04VmuGPP1bV8btxvm/A8cN/LahQUCalEbwgAKCRDm/A8cN/La hX0wEACj3voA56xlqeu69E5GM33lAnjk0PaJCDliBPz1qMBlAU6quyg86muFinkqx3q8a+rE4rU HLpNsYCnYJQ+jU/2CW6z8od1yW42Py8FJYD7kIsPzZKyRQuUGvLZCb/q+YfqJrsfvorNwLS5PlB 6S3mwWtTJ3g+krMeAmlRCDCZCaYJwKAbynXzA3MQ+R+RHbqhIBvE9U52U9xCelBe7C1tZMbQT66 eZqrrVQY7zpciKh0mQTCZ384xt+JFwHhZ9t/oX1wtDk2aKG1LS/aVYGBeC5+F1WB5XZEfMpneUY rIVajX+vj72QnVydhL7lpqr9632l7plbH+fBSpAJ7ORTCYR4B90YyMuNQPagt86olP4hkJ0OeEu qIlFIfztopLk2IrhPtN/GeAaB5Gq0woACs/hOAELSIog4MPzeBglw+l0v6s1yxkF1Njdtk2nVIX oCbVKu4r30tRNntPA8FPDMGGPv795kR4mUKpGojQy/SxfcMbm3/Xh6OXSZ2ufg3vhlQ4WTXZ0W3 RB72WcG6Sg4u7e4qpzzzSd4lIMFe3sO8jnJLMAhTjgmm+kc6XJeGD599laRKylNi5a90vUNeaZX QzoPBc3bhD1vEMSHpGJ3VGmDnbmLbzwsI0HywNL/Cz4Tzz/MIQKj9KMsyyntqlHRrvIZA7EbRc6 OkaMM65F5eqHDbg== X-Developer-Key: i=jbrunet@baylibre.com; a=openpgp; fpr=F29F26CF27BAE1A9719AE6BDC3C92AAF3E60AED9 From: Andre Przywara The X-Powers AXP318W is a PMIC used on some newer Allwinner devices. Among a large number of both DCDC and LDO regulators it features the usual ADC/IRQ/power key parts. Like other recent PMICs, it lacks the DC/DC converter PWM frequency control register, that rate is fixed here (1.5MHz on DCDC1, 3 MHz on the others). Add the new compatible string, and add that to the list of PMICs without the PWM frequency property. Also add more input supply properties, for the split DCDC and ALDO supplies. The PMIC features *two* switched outputs, hanging of DCDC1, and the manual calls them swout1 and swout2, so follow suit here and add those names to the pattern for matching the node names. Signed-off-by: Andre Przywara Reviewed-by: Chen-Yu Tsai Acked-by: Conor Dooley Signed-off-by: Jerome Brunet --- .../devicetree/bindings/mfd/x-powers,axp152.yaml | 28 ++++++++++++++++++= +++- 1 file changed, 27 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/mfd/x-powers,axp152.yaml b/D= ocumentation/devicetree/bindings/mfd/x-powers,axp152.yaml index 45f015d63df1..1bed19fc91ec 100644 --- a/Documentation/devicetree/bindings/mfd/x-powers,axp152.yaml +++ b/Documentation/devicetree/bindings/mfd/x-powers,axp152.yaml @@ -83,6 +83,7 @@ allOf: contains: enum: - x-powers,axp313a + - x-powers,axp318w - x-powers,axp323 - x-powers,axp15060 - x-powers,axp717 @@ -102,6 +103,7 @@ properties: - x-powers,axp221 - x-powers,axp223 - x-powers,axp313a + - x-powers,axp318w - x-powers,axp323 - x-powers,axp717 - x-powers,axp803 @@ -156,10 +158,18 @@ properties: description: > DCDC1 power supply node, if present. =20 + vin19-supply: + description: > + Combined DCDC1/DCDC9 power supply node, if present. + vin2-supply: description: > DCDC2 power supply node, if present. =20 + vin23-supply: + description: > + Combined DCDC2/DCDC3 power supply node, if present. + vin3-supply: description: > DCDC3 power supply node, if present. @@ -168,6 +178,10 @@ properties: description: > DCDC4 power supply node, if present. =20 + vin45-supply: + description: > + Combined DCDC4/DCDC5 power supply node, if present. + vin5-supply: description: > DCDC5 power supply node, if present. @@ -176,6 +190,10 @@ properties: description: > DCDC6 power supply node, if present. =20 + vin678-supply: + description: > + Combined DCDC6/DCDC7/DCDC8 power supply node, if present. + vin7-supply: description: > DCDC7 power supply node, if present. @@ -220,6 +238,14 @@ properties: description: > ALDO* power supply node, if present. =20 + aldo156in-supply: + description: > + ALDO* power supply node, if present. + + aldo234in-supply: + description: > + ALDO* power supply node, if present. + bldoin-supply: description: > BLDO* power supply node, if present. @@ -277,7 +303,7 @@ properties: Defines the work frequency of DC-DC in kHz. =20 patternProperties: - "^(([a-f])?ldo[0-9]|dcdc[0-7a-e]|ldo(_|-)io(0|1)|(dc1)?sw|rtc(_|-)ld= o|cpusldo|drivevbus|dc5ldo|boost)$": + "^(([a-f])?ldo[0-9]|dcdc[0-7a-e]|ldo(_|-)io(0|1)|(dc1)?sw|swout[1-9]= |rtc(_|-)ldo|cpusldo|drivevbus|dc5ldo|boost)$": $ref: /schemas/regulator/regulator.yaml# type: object unevaluatedProperties: false --=20 2.47.3 From nobody Sat Jul 11 07:44:04 2026 Received: from mail-wr1-f43.google.com (mail-wr1-f43.google.com [209.85.221.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 82BC2367F39 for ; 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a=openpgp; fpr=F29F26CF27BAE1A9719AE6BDC3C92AAF3E60AED9 From: Andre Przywara The AXP318W is a PMIC chip produced by X-Powers, it can be connected to an I2C bus. It has a large number of regulators: 9(!) DCDC buck converters, and 28 LDOs, also some ADCs, interrupts, and a power key. Describe the regmap and the MFD bits, along with the registers exposed via I2C only. This covers the regulator, interrupts and power key devices for now. Advertise the device using the new compatible string. We use just "318" for the internal identifiers, for easier typing and less churn, but use "318W" for anything externally visible. If something else other than the "AXP318W" shows up, that's an easy change then. Signed-off-by: Andre Przywara Signed-off-by: Jerome Brunet --- drivers/mfd/axp20x-i2c.c | 2 ++ drivers/mfd/axp20x.c | 84 ++++++++++++++++++++++++++++++++++++++++++= ++ include/linux/mfd/axp20x.h | 86 ++++++++++++++++++++++++++++++++++++++++++= ++++ 3 files changed, 172 insertions(+) diff --git a/drivers/mfd/axp20x-i2c.c b/drivers/mfd/axp20x-i2c.c index 5c93136f977e..4e4ebfc78525 100644 --- a/drivers/mfd/axp20x-i2c.c +++ b/drivers/mfd/axp20x-i2c.c @@ -65,6 +65,7 @@ static const struct of_device_id axp20x_i2c_of_match[] = =3D { { .compatible =3D "x-powers,axp221", .data =3D (void *)AXP221_ID }, { .compatible =3D "x-powers,axp223", .data =3D (void *)AXP223_ID }, { .compatible =3D "x-powers,axp313a", .data =3D (void *)AXP313A_ID }, + { .compatible =3D "x-powers,axp318w", .data =3D (void *)AXP318_ID }, { .compatible =3D "x-powers,axp323", .data =3D (void *)AXP323_ID }, { .compatible =3D "x-powers,axp717", .data =3D (void *)AXP717_ID }, { .compatible =3D "x-powers,axp803", .data =3D (void *)AXP803_ID }, @@ -83,6 +84,7 @@ static const struct i2c_device_id axp20x_i2c_id[] =3D { { "axp221" }, { "axp223" }, { "axp313a" }, + { "axp318w" }, { "axp717" }, { "axp803" }, { "axp806" }, diff --git a/drivers/mfd/axp20x.c b/drivers/mfd/axp20x.c index 679364189ea5..956a0370e6a5 100644 --- a/drivers/mfd/axp20x.c +++ b/drivers/mfd/axp20x.c @@ -42,6 +42,7 @@ static const char * const axp20x_model_names[] =3D { [AXP223_ID] =3D "AXP223", [AXP288_ID] =3D "AXP288", [AXP313A_ID] =3D "AXP313a", + [AXP318_ID] =3D "AXP318W", [AXP323_ID] =3D "AXP323", [AXP717_ID] =3D "AXP717", [AXP803_ID] =3D "AXP803", @@ -218,6 +219,31 @@ static const struct regmap_access_table axp313a_volati= le_table =3D { .n_yes_ranges =3D ARRAY_SIZE(axp313a_volatile_ranges), }; =20 +static const struct regmap_range axp318_writeable_ranges[] =3D { + regmap_reg_range(AXP318_DCDC_OUTPUT_CONTROL1, AXP318_IRQ_STATE4), + regmap_reg_range(AXP318_SHUTDOWN_CTRL, AXP318_TEMP_ADC_H_EN), + regmap_reg_range(AXP318_DIE_TEMP_ADC_H_EN, AXP318_DIE_TEMP_ADC_H_EN), + regmap_reg_range(AXP318_GPADC_H_EN, AXP318_GPADC_H_EN), + regmap_reg_range(AXP318_GPIO_CTRL, AXP318_WDOG_CTRL), +}; + +static const struct regmap_range axp318_volatile_ranges[] =3D { + regmap_reg_range(AXP318_IRQ_EN1, AXP318_IRQ_STATE4), + regmap_reg_range(AXP318_POWER_REASON, AXP318_SHUTDOWN_REASON), + regmap_reg_range(AXP318_TEMP_ADC_H_EN, AXP318_GPADC_L), + regmap_reg_range(AXP318_GPIO_INPUT, AXP318_GPIO_INPUT), +}; + +static const struct regmap_access_table axp318_writeable_table =3D { + .yes_ranges =3D axp318_writeable_ranges, + .n_yes_ranges =3D ARRAY_SIZE(axp318_writeable_ranges), +}; + +static const struct regmap_access_table axp318_volatile_table =3D { + .yes_ranges =3D axp318_volatile_ranges, + .n_yes_ranges =3D ARRAY_SIZE(axp318_volatile_ranges), +}; + static const struct regmap_range axp717_writeable_ranges[] =3D { regmap_reg_range(AXP717_PMU_FAULT, AXP717_MODULE_EN_CONTROL_1), regmap_reg_range(AXP717_MIN_SYS_V_CONTROL, AXP717_BOOST_CONTROL), @@ -368,6 +394,11 @@ static const struct resource axp313a_pek_resources[] = =3D { DEFINE_RES_IRQ_NAMED(AXP313A_IRQ_PEK_FAL_EDGE, "PEK_DBF"), }; =20 +static const struct resource axp318_pek_resources[] =3D { + DEFINE_RES_IRQ_NAMED(AXP318_IRQ_PEK_RIS_EDGE, "PEK_DBR"), + DEFINE_RES_IRQ_NAMED(AXP318_IRQ_PEK_FAL_EDGE, "PEK_DBF"), +}; + static const struct resource axp717_pek_resources[] =3D { DEFINE_RES_IRQ_NAMED(AXP717_IRQ_PEK_RIS_EDGE, "PEK_DBR"), DEFINE_RES_IRQ_NAMED(AXP717_IRQ_PEK_FAL_EDGE, "PEK_DBF"), @@ -447,6 +478,15 @@ static const struct regmap_config axp313a_regmap_confi= g =3D { .cache_type =3D REGCACHE_MAPLE, }; =20 +static const struct regmap_config axp318_regmap_config =3D { + .reg_bits =3D 8, + .val_bits =3D 8, + .wr_table =3D &axp318_writeable_table, + .volatile_table =3D &axp318_volatile_table, + .max_register =3D AXP318_WDOG_CTRL, + .cache_type =3D REGCACHE_MAPLE, +}; + static const struct regmap_config axp323_regmap_config =3D { .reg_bits =3D 8, .val_bits =3D 8, @@ -663,6 +703,28 @@ static const struct regmap_irq axp313a_regmap_irqs[] = =3D { INIT_REGMAP_IRQ(AXP313A, DIE_TEMP_HIGH, 0, 0), }; =20 +static const struct regmap_irq axp318_regmap_irqs[] =3D { + INIT_REGMAP_IRQ(AXP318, DCDC8_V_LOW, 0, 7), + INIT_REGMAP_IRQ(AXP318, DCDC7_V_LOW, 0, 6), + INIT_REGMAP_IRQ(AXP318, DCDC6_V_LOW, 0, 5), + INIT_REGMAP_IRQ(AXP318, DCDC5_V_LOW, 0, 4), + INIT_REGMAP_IRQ(AXP318, DCDC4_V_LOW, 0, 3), + INIT_REGMAP_IRQ(AXP318, DCDC3_V_LOW, 0, 2), + INIT_REGMAP_IRQ(AXP318, DCDC2_V_LOW, 0, 1), + INIT_REGMAP_IRQ(AXP318, DCDC1_V_LOW, 0, 0), + INIT_REGMAP_IRQ(AXP318, PEK_RIS_EDGE, 1, 6), + INIT_REGMAP_IRQ(AXP318, PEK_FAL_EDGE, 1, 5), + INIT_REGMAP_IRQ(AXP318, PEK_LONG, 1, 4), + INIT_REGMAP_IRQ(AXP318, PEK_SHORT, 1, 3), + INIT_REGMAP_IRQ(AXP318, DIE_TEMP_HIGH_LV2, 1, 2), + INIT_REGMAP_IRQ(AXP318, DIE_TEMP_HIGH_LV1, 1, 1), + INIT_REGMAP_IRQ(AXP318, DCDC9_V_LOW, 1, 0), + INIT_REGMAP_IRQ(AXP318, GPIO3_INPUT, 2, 6), + INIT_REGMAP_IRQ(AXP318, GPIO2_INPUT, 2, 5), + INIT_REGMAP_IRQ(AXP318, GPIO1_INPUT, 2, 4), + INIT_REGMAP_IRQ(AXP318, WDOG_EXPIRE, 3, 0), +}; + static const struct regmap_irq axp717_regmap_irqs[] =3D { INIT_REGMAP_IRQ(AXP717, SOC_DROP_LVL2, 0, 7), INIT_REGMAP_IRQ(AXP717, SOC_DROP_LVL1, 0, 6), @@ -884,6 +946,17 @@ static const struct regmap_irq_chip axp313a_regmap_irq= _chip =3D { .num_regs =3D 1, }; =20 +static const struct regmap_irq_chip axp318_regmap_irq_chip =3D { + .name =3D "axp318w_irq_chip", + .status_base =3D AXP318_IRQ_STATE1, + .ack_base =3D AXP318_IRQ_STATE1, + .unmask_base =3D AXP318_IRQ_EN1, + .init_ack_masked =3D true, + .irqs =3D axp318_regmap_irqs, + .num_irqs =3D ARRAY_SIZE(axp318_regmap_irqs), + .num_regs =3D 4, +}; + static const struct regmap_irq_chip axp717_regmap_irq_chip =3D { .name =3D "axp717_irq_chip", .status_base =3D AXP717_IRQ0_STATE, @@ -1061,6 +1134,11 @@ static struct mfd_cell axp313a_cells[] =3D { MFD_CELL_RES("axp313a-pek", axp313a_pek_resources), }; =20 +static struct mfd_cell axp318_cells[] =3D { + MFD_CELL_BASIC("axp20x-regulator", NULL, NULL, 0, 1), + MFD_CELL_RES("axp318w-pek", axp318_pek_resources), +}; + static struct mfd_cell axp717_cells[] =3D { MFD_CELL_NAME("axp20x-regulator"), MFD_CELL_RES("axp20x-pek", axp717_pek_resources), @@ -1313,6 +1391,12 @@ int axp20x_match_device(struct axp20x_dev *axp20x) axp20x->regmap_cfg =3D &axp313a_regmap_config; axp20x->regmap_irq_chip =3D &axp313a_regmap_irq_chip; break; + case AXP318_ID: + axp20x->nr_cells =3D ARRAY_SIZE(axp318_cells); + axp20x->cells =3D axp318_cells; + axp20x->regmap_cfg =3D &axp318_regmap_config; + axp20x->regmap_irq_chip =3D &axp318_regmap_irq_chip; + break; case AXP323_ID: axp20x->nr_cells =3D ARRAY_SIZE(axp313a_cells); axp20x->cells =3D axp313a_cells; diff --git a/include/linux/mfd/axp20x.h b/include/linux/mfd/axp20x.h index b352661d99a1..c1f9dc06387a 100644 --- a/include/linux/mfd/axp20x.h +++ b/include/linux/mfd/axp20x.h @@ -19,6 +19,7 @@ enum axp20x_variants { AXP223_ID, AXP288_ID, AXP313A_ID, + AXP318_ID, AXP323_ID, AXP717_ID, AXP803_ID, @@ -116,6 +117,69 @@ enum axp20x_variants { #define AXP313A_IRQ_STATE 0x21 #define AXP323_DCDC_MODE_CTRL2 0x22 =20 +#define AXP318_DCDC_OUTPUT_CONTROL1 0x10 +#define AXP318_DCDC_OUTPUT_CONTROL2 0x11 +#define AXP318_DCDC1_CONTROL 0x12 +#define AXP318_DCDC2_CONTROL 0x13 +#define AXP318_DCDC3_CONTROL 0x14 +#define AXP318_DCDC4_CONTROL 0x15 +#define AXP318_DCDC5_CONTROL 0x16 +#define AXP318_DCDC6_CONTROL 0x17 +#define AXP318_DCDC7_CONTROL 0x18 +#define AXP318_DCDC8_CONTROL 0x19 +#define AXP318_DCDC9_CONTROL 0x1a +#define AXP318_LDO_OUTPUT_CONTROL1 0x20 +#define AXP318_LDO_OUTPUT_CONTROL2 0x21 +#define AXP318_LDO_OUTPUT_CONTROL3 0x22 +#define AXP318_LDO_OUTPUT_CONTROL4 0x23 +#define AXP318_ALDO1_CONTROL 0x24 +#define AXP318_ALDO2_CONTROL 0x25 +#define AXP318_ALDO3_CONTROL 0x26 +#define AXP318_ALDO4_CONTROL 0x27 +#define AXP318_ALDO5_CONTROL 0x28 +#define AXP318_ALDO6_CONTROL 0x29 +#define AXP318_BLDO1_CONTROL 0x2a +#define AXP318_BLDO2_CONTROL 0x2b +#define AXP318_BLDO3_CONTROL 0x2c +#define AXP318_BLDO4_CONTROL 0x2d +#define AXP318_BLDO5_CONTROL 0x2e +#define AXP318_CLDO1_CONTROL 0x2f +#define AXP318_CLDO2_CONTROL 0x30 +#define AXP318_CLDO3_CONTROL 0x31 +#define AXP318_CLDO4_CONTROL 0x32 +#define AXP318_CLDO5_CONTROL 0x33 +#define AXP318_DLDO1_CONTROL 0x34 +#define AXP318_DLDO2_CONTROL 0x35 +#define AXP318_DLDO3_CONTROL 0x36 +#define AXP318_DLDO4_CONTROL 0x37 +#define AXP318_DLDO5_CONTROL 0x38 +#define AXP318_DLDO6_CONTROL 0x39 +#define AXP318_ELDO1_CONTROL 0x3a +#define AXP318_ELDO2_CONTROL 0x3b +#define AXP318_ELDO3_CONTROL 0x3c +#define AXP318_ELDO4_CONTROL 0x3d +#define AXP318_ELDO5_CONTROL 0x3e +#define AXP318_ELDO6_CONTROL 0x3f +#define AXP318_IRQ_EN1 0x40 +#define AXP318_IRQ_EN2 0x41 +#define AXP318_IRQ_EN3 0x42 +#define AXP318_IRQ_EN4 0x43 +#define AXP318_IRQ_STATE1 0x48 +#define AXP318_IRQ_STATE2 0x49 +#define AXP318_IRQ_STATE3 0x4a +#define AXP318_IRQ_STATE4 0x4b +#define AXP318_POWER_REASON 0x50 +#define AXP318_SHUTDOWN_REASON 0x51 +#define AXP318_SHUTDOWN_CTRL 0x52 +#define AXP318_TEMP_ADC_H_EN 0x65 +#define AXP318_TEMP_ADC_L 0x66 +#define AXP318_DIE_TEMP_ADC_H_EN 0x67 +#define AXP318_GPADC_H_EN 0x69 +#define AXP318_GPADC_L 0x6a +#define AXP318_GPIO_CTRL 0x70 +#define AXP318_GPIO_INPUT 0x71 +#define AXP318_WDOG_CTRL 0x77 + #define AXP717_ON_INDICATE 0x00 #define AXP717_PMU_STATUS_2 0x01 #define AXP717_BC_DETECT 0x05 @@ -819,6 +883,28 @@ enum axp313a_irqs { AXP313A_IRQ_PEK_RIS_EDGE, }; =20 +enum axp318_irqs { + AXP318_IRQ_DCDC1_V_LOW, + AXP318_IRQ_DCDC2_V_LOW, + AXP318_IRQ_DCDC3_V_LOW, + AXP318_IRQ_DCDC4_V_LOW, + AXP318_IRQ_DCDC5_V_LOW, + AXP318_IRQ_DCDC6_V_LOW, + AXP318_IRQ_DCDC7_V_LOW, + AXP318_IRQ_DCDC8_V_LOW, + AXP318_IRQ_DCDC9_V_LOW, + AXP318_IRQ_DIE_TEMP_HIGH_LV1, + AXP318_IRQ_DIE_TEMP_HIGH_LV2, + AXP318_IRQ_PEK_SHORT, + AXP318_IRQ_PEK_LONG, + AXP318_IRQ_PEK_FAL_EDGE, + AXP318_IRQ_PEK_RIS_EDGE, + AXP318_IRQ_GPIO1_INPUT =3D 20, + AXP318_IRQ_GPIO2_INPUT, + AXP318_IRQ_GPIO3_INPUT, + AXP318_IRQ_WDOG_EXPIRE =3D 24, +}; + enum axp717_irqs { AXP717_IRQ_VBUS_FAULT, AXP717_IRQ_VBUS_OVER_V, --=20 2.47.3 From nobody Sat Jul 11 07:44:04 2026 Received: from mail-wr1-f45.google.com (mail-wr1-f45.google.com [209.85.221.45]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8141A431E4A for ; Fri, 10 Jul 2026 16:20:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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a=openpgp; fpr=F29F26CF27BAE1A9719AE6BDC3C92AAF3E60AED9 From: Andre Przywara The X-Powers AXP318W is a typical PMIC from X-Powers, featuring nine DC/DC converters and 28 LDOs, on the regulator side. Describe the chip's voltage settings and switch registers, how the voltages are encoded, and connect this to the MFD device via its regulator ID. We use just "318" for the internal identifiers, for easier typing and less churn. If something else other than the "AXP318W" shows up, that's an easy change, externally visible strings carry the additional letter already. Reviewed-by: Mark Brown Signed-off-by: Andre Przywara Co-developed-by: Jerome Brunet Signed-off-by: Jerome Brunet --- drivers/regulator/axp20x-regulator.c | 298 +++++++++++++++++++++++++++++++= +++- include/linux/mfd/axp20x.h | 43 +++++ 2 files changed, 333 insertions(+), 8 deletions(-) diff --git a/drivers/regulator/axp20x-regulator.c b/drivers/regulator/axp20= x-regulator.c index da891415efc0..bc8d3aa2bd67 100644 --- a/drivers/regulator/axp20x-regulator.c +++ b/drivers/regulator/axp20x-regulator.c @@ -138,6 +138,31 @@ #define AXP313A_DCDC_V_OUT_MASK GENMASK(6, 0) #define AXP313A_LDO_V_OUT_MASK GENMASK(4, 0) =20 +#define AXP318_DCDC1_V_OUT_MASK GENMASK(4, 0) +#define AXP318_DCDC2_V_OUT_MASK GENMASK(6, 0) +#define AXP318_LDO_V_OUT_MASK GENMASK(4, 0) +#define AXP318_ELDO_V_OUT_MASK GENMASK(5, 0) +#define AXP318_DCDC2_NUM_VOLTAGES 88 +#define AXP318_DCDC6_NUM_VOLTAGES 128 +#define AXP318_DCDC7_NUM_VOLTAGES 103 +#define AXP318_DCDC8_NUM_VOLTAGES 119 +#define AXP318_THRESHOLD_VOLTAGE 1540000 +/* + * FIXME: + * Some LDOs of the AXP318 may be fed by different supplies and + * the documentation repeatidly warns that output voltage must + * be less than the supply, which is the case for any LDO really. + * + * The best way to let the framework handle this is to set the + * min_dropout_uV field. However the AXP318 documentation + * does not provide any information about this. + * + * Realistically, it can't be less than 1uV so use this + * for all LDOs until we know more. + */ +#define AXP318_LDO_MIN_DROPOUT 1 /* uV */ + + #define AXP717_DCDC1_NUM_VOLTAGES 88 #define AXP717_DCDC2_NUM_VOLTAGES 107 #define AXP717_DCDC3_NUM_VOLTAGES 103 @@ -371,8 +396,8 @@ .ops =3D &axp20x_ops, \ } =20 -#define AXP_DESC(_family, _id, _match, _supply, _min, _max, _step, _vreg, \ - _vmask, _ereg, _emask) \ +#define AXP_DESC_EXT(_family, _id, _match, _supply, _min, _max, _step, _vr= eg, \ + _vmask, _ereg, _emask, _ops, _bpreg, _bpmask, _dropout) \ [_family##_##_id] =3D { \ .name =3D (_match), \ .supply_name =3D (_supply), \ @@ -384,13 +409,32 @@ .owner =3D THIS_MODULE, \ .min_uV =3D (_min) * 1000, \ .uV_step =3D (_step) * 1000, \ + .min_dropout_uV =3D (_dropout), \ .vsel_reg =3D (_vreg), \ .vsel_mask =3D (_vmask), \ .enable_reg =3D (_ereg), \ .enable_mask =3D (_emask), \ - .ops =3D &axp20x_ops, \ + .bypass_reg =3D (_bpreg), \ + .bypass_mask =3D (_bpmask), \ + .ops =3D (_ops), \ } =20 +#define AXP_DESC(_family, _id, _match, _supply, _min, _max, _step, _vreg, \ + _vmask, _ereg, _emask) \ + AXP_DESC_EXT(_family, _id, _match, _supply, _min, _max, _step, _vreg, \ + _vmask, _ereg, _emask, &axp20x_ops, 0, 0, 0) + +#define AXP_DESC_DO(_family, _id, _match, _supply, _min, _max, _step, _vre= g, \ + _vmask, _ereg, _emask, _dropout) \ + AXP_DESC_EXT(_family, _id, _match, _supply, _min, _max, _step, _vreg, \ + _vmask, _ereg, _emask, &axp20x_ops, 0, 0, _dropout) + +#define AXP_DESC_BYPASS(_family, _id, _match, _supply, _min, _max, _step, = _vreg,\ + _vmask, _ereg, _emask, _bpreg, _bpmask, _dropout) \ + AXP_DESC_EXT(_family, _id, _match, _supply, _min, _max, _step, _vreg, \ + _vmask, _ereg, _emask, &axp20x_bypass_ops, _bpreg, \ + _bpmask, _dropout) + #define AXP_DESC_SW(_family, _id, _match, _supply, _ereg, _emask) \ [_family##_##_id] =3D { \ .name =3D (_match), \ @@ -419,8 +463,9 @@ .ops =3D &axp20x_ops_fixed \ } =20 -#define AXP_DESC_RANGES_DELAY(_family, _id, _match, _supply, _ranges, _n_v= oltages, \ - _vreg, _vmask, _ereg, _emask, _ramp_delay) \ +#define AXP_DESC_RANGES_DELAY_OPS(_family, _id, _match, _supply, _ranges, \ + _n_voltages, _vreg, _vmask, _ereg, _emask, \ + _ramp_delay, _ops) \ [_family##_##_id] =3D { \ .name =3D (_match), \ .supply_name =3D (_supply), \ @@ -436,10 +481,23 @@ .enable_mask =3D (_emask), \ .linear_ranges =3D (_ranges), \ .n_linear_ranges =3D ARRAY_SIZE(_ranges), \ - .ramp_delay =3D (_ramp_delay), \ + .ramp_delay =3D (_ramp_delay), \ .ops =3D &axp20x_ops_range, \ } =20 +#define AXP_DESC_RANGES_THRESHOLD(_family, _id, _match, _supply, _ranges, \ + _n_voltages, _vreg, _vmask, _ereg, _emask) \ + AXP_DESC_RANGES_DELAY_OPS(_family, _id, _match, _supply, _ranges, \ + _n_voltages, _vreg, _vmask, _ereg, _emask, \ + 0, &axp318_threshold_ops_range) + +#define AXP_DESC_RANGES_DELAY(_family, _id, _match, _supply, _ranges, \ + _n_voltages, _vreg, _vmask, _ereg, _emask, \ + _ramp_delay) \ + AXP_DESC_RANGES_DELAY_OPS(_family, _id, _match, _supply, _ranges, \ + _n_voltages, _vreg, _vmask, _ereg, _emask, \ + _ramp_delay, &axp20x_ops_range) + #define AXP_DESC_RANGES(_family, _id, _match, _supply, _ranges, _n_voltage= s, \ _vreg, _vmask, _ereg, _emask) \ AXP_DESC_RANGES_DELAY(_family, _id, _match, _supply, _ranges, \ @@ -567,6 +625,49 @@ static int axp20x_regulator_enable_regmap(struct regul= ator_dev *rdev) return regulator_enable_regmap(rdev); }; =20 +static int axp318_threshold_check(struct regulator_dev *rdev, + unsigned int sel) +{ + int old_sel, old_uV, new_uV; + + /* Only applicable if the regulator is enabled */ + if (!rdev->desc->ops->is_enabled(rdev)) + return 0; + + old_sel =3D rdev->desc->ops->get_voltage_sel(rdev); + if (old_sel < 0) + return old_sel; + + old_uV =3D rdev->desc->ops->list_voltage(rdev, old_sel); + if (old_uV < 0) + return old_uV; + + new_uV =3D rdev->desc->ops->list_voltage(rdev, sel); + if (new_uV < 0) + return new_uV; + + /* Crossing the threshold ? */ + if ((old_uV <=3D AXP318_THRESHOLD_VOLTAGE + && new_uV > AXP318_THRESHOLD_VOLTAGE) || + (new_uV <=3D AXP318_THRESHOLD_VOLTAGE + && old_uV > AXP318_THRESHOLD_VOLTAGE)) + return -EBUSY; + + return 0; +} + +static int axp318_threshold_set_voltage_sel(struct regulator_dev *rdev, + unsigned int sel) +{ + int ret; + + ret =3D axp318_threshold_check(rdev, sel); + if (ret < 0) + return ret; + + return regulator_set_voltage_sel_regmap(rdev, sel); +} + static const struct regulator_ops axp20x_ops_fixed =3D { .list_voltage =3D regulator_list_voltage_linear, }; @@ -580,6 +681,15 @@ static const struct regulator_ops axp20x_ops_range =3D= { .is_enabled =3D regulator_is_enabled_regmap, }; =20 +static const struct regulator_ops axp318_threshold_ops_range =3D { + .set_voltage_sel =3D axp318_threshold_set_voltage_sel, + .get_voltage_sel =3D regulator_get_voltage_sel_regmap, + .list_voltage =3D regulator_list_voltage_linear_range, + .enable =3D regulator_enable_regmap, + .disable =3D regulator_disable_regmap, + .is_enabled =3D regulator_is_enabled_regmap, +}; + static const struct regulator_ops axp20x_ops =3D { .set_voltage_sel =3D regulator_set_voltage_sel_regmap, .get_voltage_sel =3D regulator_get_voltage_sel_regmap, @@ -590,6 +700,19 @@ static const struct regulator_ops axp20x_ops =3D { .set_ramp_delay =3D axp20x_set_ramp_delay, }; =20 +static const struct regulator_ops axp20x_bypass_ops =3D { + .set_voltage_sel =3D regulator_set_voltage_sel_regmap, + .get_voltage_sel =3D regulator_get_voltage_sel_regmap, + .list_voltage =3D regulator_list_voltage_linear, + .enable =3D axp20x_regulator_enable_regmap, + .disable =3D regulator_disable_regmap, + .is_enabled =3D regulator_is_enabled_regmap, + .set_ramp_delay =3D axp20x_set_ramp_delay, + .get_bypass =3D regulator_get_bypass_regmap, + .set_bypass =3D regulator_set_bypass_regmap, +}; + + static const struct regulator_ops axp20x_ops_sw =3D { .enable =3D regulator_enable_regmap, .disable =3D regulator_disable_regmap, @@ -765,6 +888,157 @@ static const struct regulator_desc axp313a_regulators= [] =3D { AXP_DESC_FIXED(AXP313A, RTC_LDO, "rtc-ldo", "vin1", 1800), }; =20 +static const struct linear_range axp318_dcdc2_ranges[] =3D { + REGULATOR_LINEAR_RANGE(500000, 0, 70, 10000), + REGULATOR_LINEAR_RANGE(1220000, 71, 87, 20000), +}; + +static const struct linear_range axp318_dcdc6_ranges[] =3D { + REGULATOR_LINEAR_RANGE(500000, 0, 70, 10000), + REGULATOR_LINEAR_RANGE(1220000, 71, 87, 20000), + REGULATOR_LINEAR_RANGE(1800000, 88, 118, 20000), + REGULATOR_LINEAR_RANGE(2440000, 119, 127, 40000), +}; + +static const struct linear_range axp318_dcdc7_ranges[] =3D { + REGULATOR_LINEAR_RANGE(500000, 0, 70, 10000), + REGULATOR_LINEAR_RANGE(1220000, 71, 102, 20000), +}; + +static const struct linear_range axp318_dcdc8_ranges[] =3D { + REGULATOR_LINEAR_RANGE(500000, 0, 70, 10000), + REGULATOR_LINEAR_RANGE(1220000, 71, 102, 20000), + REGULATOR_LINEAR_RANGE(1900000, 103, 118, 100000), +}; + +static const struct regulator_desc axp318_regulators[] =3D { + AXP_DESC(AXP318, DCDC1, "dcdc1", "vin19", 1000, 3400, 100, + AXP318_DCDC1_CONTROL, AXP318_DCDC1_V_OUT_MASK, + AXP318_DCDC_OUTPUT_CONTROL1, BIT(0)), + AXP_DESC_RANGES(AXP318, DCDC2, "dcdc2", "vin23", + axp318_dcdc2_ranges, 88, + AXP318_DCDC2_CONTROL, AXP318_DCDC2_V_OUT_MASK, + AXP318_DCDC_OUTPUT_CONTROL1, BIT(1)), + AXP_DESC_RANGES(AXP318, DCDC3, "dcdc3", "vin23", + axp318_dcdc2_ranges, 88, + AXP318_DCDC3_CONTROL, AXP318_DCDC2_V_OUT_MASK, + AXP318_DCDC_OUTPUT_CONTROL1, BIT(2)), + AXP_DESC_RANGES(AXP318, DCDC4, "dcdc4", "vin45", + axp318_dcdc2_ranges, 88, + AXP318_DCDC4_CONTROL, AXP318_DCDC2_V_OUT_MASK, + AXP318_DCDC_OUTPUT_CONTROL1, BIT(3)), + AXP_DESC_RANGES(AXP318, DCDC5, "dcdc5", "vin45", + axp318_dcdc2_ranges, 88, + AXP318_DCDC5_CONTROL, AXP318_DCDC2_V_OUT_MASK, + AXP318_DCDC_OUTPUT_CONTROL1, BIT(4)), + AXP_DESC_RANGES_THRESHOLD(AXP318, DCDC6, "dcdc6", "vin678", + axp318_dcdc6_ranges, 128, + AXP318_DCDC6_CONTROL, AXP318_DCDC2_V_OUT_MASK, + AXP318_DCDC_OUTPUT_CONTROL1, BIT(5)), + AXP_DESC_RANGES_THRESHOLD(AXP318, DCDC7, "dcdc7", "vin678", + axp318_dcdc7_ranges, 103, + AXP318_DCDC7_CONTROL, AXP318_DCDC2_V_OUT_MASK, + AXP318_DCDC_OUTPUT_CONTROL1, BIT(6)), + AXP_DESC_RANGES_THRESHOLD(AXP318, DCDC8, "dcdc8", "vin678", + axp318_dcdc8_ranges, 119, + AXP318_DCDC8_CONTROL, AXP318_DCDC2_V_OUT_MASK, + AXP318_DCDC_OUTPUT_CONTROL1, BIT(7)), + AXP_DESC_RANGES_THRESHOLD(AXP318, DCDC9, "dcdc9", "vin19", + axp318_dcdc8_ranges, 119, + AXP318_DCDC9_CONTROL, AXP318_DCDC2_V_OUT_MASK, + AXP318_DCDC_OUTPUT_CONTROL2, BIT(0)), + AXP_DESC_SW(AXP318, SWOUT1, "swout1", NULL, + AXP318_DCDC_OUTPUT_CONTROL2, BIT(3)), + AXP_DESC_SW(AXP318, SWOUT2, "swout2", NULL, + AXP318_DCDC_OUTPUT_CONTROL2, BIT(4)), + AXP_DESC_DO(AXP318, ALDO1, "aldo1", "aldo156in", 500, 3400, 100, + AXP318_ALDO1_CONTROL, AXP318_LDO_V_OUT_MASK, + AXP318_LDO_OUTPUT_CONTROL1, BIT(0), AXP318_LDO_MIN_DROPOUT), + AXP_DESC_DO(AXP318, ALDO2, "aldo2", "aldo234in", 500, 3400, 100, + AXP318_ALDO2_CONTROL, AXP318_LDO_V_OUT_MASK, + AXP318_LDO_OUTPUT_CONTROL1, BIT(1), AXP318_LDO_MIN_DROPOUT), + AXP_DESC_DO(AXP318, ALDO3, "aldo3", "aldo234in", 500, 3400, 100, + AXP318_ALDO3_CONTROL, AXP318_LDO_V_OUT_MASK, + AXP318_LDO_OUTPUT_CONTROL1, BIT(2), AXP318_LDO_MIN_DROPOUT), + AXP_DESC_DO(AXP318, ALDO4, "aldo4", "aldo234in", 500, 3400, 100, + AXP318_ALDO4_CONTROL, AXP318_LDO_V_OUT_MASK, + AXP318_LDO_OUTPUT_CONTROL1, BIT(3), AXP318_LDO_MIN_DROPOUT), + AXP_DESC_DO(AXP318, ALDO5, "aldo5", "aldo156in", 500, 3400, 100, + AXP318_ALDO5_CONTROL, AXP318_LDO_V_OUT_MASK, + AXP318_LDO_OUTPUT_CONTROL1, BIT(4), AXP318_LDO_MIN_DROPOUT), + AXP_DESC_DO(AXP318, ALDO6, "aldo6", "aldo156in", 500, 3400, 100, + AXP318_ALDO6_CONTROL, AXP318_LDO_V_OUT_MASK, + AXP318_LDO_OUTPUT_CONTROL1, BIT(5), AXP318_LDO_MIN_DROPOUT), + AXP_DESC_DO(AXP318, BLDO1, "bldo1", "bldoin", 500, 3400, 100, + AXP318_BLDO1_CONTROL, AXP318_LDO_V_OUT_MASK, + AXP318_LDO_OUTPUT_CONTROL1, BIT(6), AXP318_LDO_MIN_DROPOUT), + AXP_DESC_DO(AXP318, BLDO2, "bldo2", "bldoin", 500, 3400, 100, + AXP318_BLDO2_CONTROL, AXP318_LDO_V_OUT_MASK, + AXP318_LDO_OUTPUT_CONTROL1, BIT(7), AXP318_LDO_MIN_DROPOUT), + AXP_DESC_DO(AXP318, BLDO3, "bldo3", "bldoin", 500, 3400, 100, + AXP318_BLDO3_CONTROL, AXP318_LDO_V_OUT_MASK, + AXP318_LDO_OUTPUT_CONTROL2, BIT(0), AXP318_LDO_MIN_DROPOUT), + AXP_DESC_DO(AXP318, BLDO4, "bldo4", "bldoin", 500, 3400, 100, + AXP318_BLDO4_CONTROL, AXP318_LDO_V_OUT_MASK, + AXP318_LDO_OUTPUT_CONTROL2, BIT(1), AXP318_LDO_MIN_DROPOUT), + AXP_DESC_DO(AXP318, BLDO5, "bldo5", "bldoin", 500, 3400, 100, + AXP318_BLDO5_CONTROL, AXP318_LDO_V_OUT_MASK, + AXP318_LDO_OUTPUT_CONTROL2, BIT(2), AXP318_LDO_MIN_DROPOUT), + AXP_DESC_DO(AXP318, CLDO1, "cldo1", "cldoin", 500, 3400, 100, + AXP318_CLDO1_CONTROL, AXP318_LDO_V_OUT_MASK, + AXP318_LDO_OUTPUT_CONTROL2, BIT(3), AXP318_LDO_MIN_DROPOUT), + AXP_DESC_DO(AXP318, CLDO2, "cldo2", "cldoin", 500, 3400, 100, + AXP318_CLDO2_CONTROL, AXP318_LDO_V_OUT_MASK, + AXP318_LDO_OUTPUT_CONTROL2, BIT(4), AXP318_LDO_MIN_DROPOUT), + AXP_DESC_DO(AXP318, CLDO3, "cldo3", "cldoin", 500, 3400, 100, + AXP318_CLDO3_CONTROL, AXP318_LDO_V_OUT_MASK, + AXP318_LDO_OUTPUT_CONTROL2, BIT(5), AXP318_LDO_MIN_DROPOUT), + AXP_DESC_DO(AXP318, CLDO4, "cldo4", "cldoin", 500, 3400, 100, + AXP318_CLDO4_CONTROL, AXP318_LDO_V_OUT_MASK, + AXP318_LDO_OUTPUT_CONTROL2, BIT(6), AXP318_LDO_MIN_DROPOUT), + AXP_DESC_DO(AXP318, CLDO5, "cldo5", "cldoin", 500, 3400, 100, + AXP318_CLDO5_CONTROL, AXP318_LDO_V_OUT_MASK, + AXP318_LDO_OUTPUT_CONTROL2, BIT(7), AXP318_LDO_MIN_DROPOUT), + AXP_DESC_DO(AXP318, DLDO1, "dldo1", "dldoin", 500, 3400, 100, + AXP318_DLDO1_CONTROL, AXP318_LDO_V_OUT_MASK, + AXP318_LDO_OUTPUT_CONTROL3, BIT(0), AXP318_LDO_MIN_DROPOUT), + AXP_DESC_DO(AXP318, DLDO2, "dldo2", "dldoin", 500, 3400, 100, + AXP318_DLDO2_CONTROL, AXP318_LDO_V_OUT_MASK, + AXP318_LDO_OUTPUT_CONTROL3, BIT(1), AXP318_LDO_MIN_DROPOUT), + AXP_DESC_DO(AXP318, DLDO3, "dldo3", "dldoin", 500, 3400, 100, + AXP318_DLDO3_CONTROL, AXP318_LDO_V_OUT_MASK, + AXP318_LDO_OUTPUT_CONTROL3, BIT(2), AXP318_LDO_MIN_DROPOUT), + AXP_DESC_DO(AXP318, DLDO4, "dldo4", "dldoin", 500, 3400, 100, + AXP318_DLDO4_CONTROL, AXP318_LDO_V_OUT_MASK, + AXP318_LDO_OUTPUT_CONTROL3, BIT(3), AXP318_LDO_MIN_DROPOUT), + AXP_DESC_DO(AXP318, DLDO5, "dldo5", "dldoin", 500, 3400, 100, + AXP318_DLDO5_CONTROL, AXP318_LDO_V_OUT_MASK, + AXP318_LDO_OUTPUT_CONTROL3, BIT(4), AXP318_LDO_MIN_DROPOUT), + AXP_DESC_DO(AXP318, DLDO6, "dldo6", "dldoin", 500, 3400, 100, + AXP318_DLDO6_CONTROL, AXP318_LDO_V_OUT_MASK, + AXP318_LDO_OUTPUT_CONTROL3, BIT(5), AXP318_LDO_MIN_DROPOUT), + AXP_DESC_DO(AXP318, ELDO1, "eldo1", "eldoin", 500, 1500, 25, + AXP318_ELDO1_CONTROL, AXP318_ELDO_V_OUT_MASK, + AXP318_LDO_OUTPUT_CONTROL3, BIT(6), AXP318_LDO_MIN_DROPOUT), + AXP_DESC_DO(AXP318, ELDO2, "eldo2", "eldoin", 500, 1500, 25, + AXP318_ELDO2_CONTROL, AXP318_ELDO_V_OUT_MASK, + AXP318_LDO_OUTPUT_CONTROL3, BIT(7), AXP318_LDO_MIN_DROPOUT), + AXP_DESC_DO(AXP318, ELDO3, "eldo3", "eldoin", 500, 1500, 25, + AXP318_ELDO3_CONTROL, AXP318_ELDO_V_OUT_MASK, + AXP318_LDO_OUTPUT_CONTROL4, BIT(0), AXP318_LDO_MIN_DROPOUT), + AXP_DESC_BYPASS(AXP318, ELDO4, "eldo4", "eldoin", 500, 1500, 25, + AXP318_ELDO4_CONTROL, AXP318_ELDO_V_OUT_MASK, + AXP318_LDO_OUTPUT_CONTROL4, BIT(1), + AXP318_ELDO4_CONTROL, BIT(6), AXP318_LDO_MIN_DROPOUT), + AXP_DESC_BYPASS(AXP318, ELDO5, "eldo5", "eldoin", 500, 1500, 25, + AXP318_ELDO5_CONTROL, AXP318_ELDO_V_OUT_MASK, + AXP318_LDO_OUTPUT_CONTROL4, BIT(2), + AXP318_ELDO5_CONTROL, BIT(6), AXP318_LDO_MIN_DROPOUT), + AXP_DESC_DO(AXP318, ELDO6, "eldo6", "eldoin", 500, 1500, 25, + AXP318_ELDO6_CONTROL, AXP318_ELDO_V_OUT_MASK, + AXP318_LDO_OUTPUT_CONTROL4, BIT(3), AXP318_LDO_MIN_DROPOUT), +}; + static const struct linear_range axp717_dcdc1_ranges[] =3D { REGULATOR_LINEAR_RANGE(500000, 0, 70, 10000), REGULATOR_LINEAR_RANGE(1220000, 71, 87, 20000), @@ -1347,6 +1621,7 @@ static int axp20x_set_dcdc_freq(struct platform_devic= e *pdev, u32 dcdcfreq) step =3D 150; break; case AXP313A_ID: + case AXP318_ID: case AXP323_ID: case AXP717_ID: case AXP15060_ID: @@ -1585,6 +1860,10 @@ static int axp20x_regulator_probe(struct platform_de= vice *pdev) regulators =3D axp313a_regulators; nregulators =3D AXP313A_REG_ID_MAX; break; + case AXP318_ID: + regulators =3D axp318_regulators; + nregulators =3D AXP318_REG_ID_MAX; + break; case AXP717_ID: regulators =3D axp717_regulators; nregulators =3D AXP717_REG_ID_MAX; @@ -1651,7 +1930,9 @@ static int axp20x_regulator_probe(struct platform_dev= ice *pdev) if ((regulators =3D=3D axp22x_regulators && i =3D=3D AXP22X_DC1SW) || (regulators =3D=3D axp803_regulators && i =3D=3D AXP803_DC1SW) || (regulators =3D=3D axp809_regulators && i =3D=3D AXP809_DC1SW) || - (regulators =3D=3D axp15060_regulators && i =3D=3D AXP15060_SW)) { + (regulators =3D=3D axp15060_regulators && i =3D=3D AXP15060_SW) || + (regulators =3D=3D axp318_regulators && i =3D=3D AXP318_SWOUT1) || + (regulators =3D=3D axp318_regulators && i =3D=3D AXP318_SWOUT2)) { new_desc =3D devm_kzalloc(&pdev->dev, sizeof(*desc), GFP_KERNEL); if (!new_desc) @@ -1709,7 +1990,8 @@ static int axp20x_regulator_probe(struct platform_dev= ice *pdev) */ if ((regulators =3D=3D axp22x_regulators && i =3D=3D AXP22X_DCDC1) || (regulators =3D=3D axp809_regulators && i =3D=3D AXP809_DCDC1) || - (regulators =3D=3D axp15060_regulators && i =3D=3D AXP15060_DCDC1)) + (regulators =3D=3D axp15060_regulators && i =3D=3D AXP15060_DCDC1) || + (regulators =3D=3D axp318_regulators && i =3D=3D AXP318_DCDC1)) of_property_read_string(rdev->dev.of_node, "regulator-name", &dcdc1_name); diff --git a/include/linux/mfd/axp20x.h b/include/linux/mfd/axp20x.h index c1f9dc06387a..406075db233c 100644 --- a/include/linux/mfd/axp20x.h +++ b/include/linux/mfd/axp20x.h @@ -562,6 +562,49 @@ enum { AXP313A_REG_ID_MAX, }; =20 +enum { + AXP318_DCDC1 =3D 0, + AXP318_DCDC2, + AXP318_DCDC3, + AXP318_DCDC4, + AXP318_DCDC5, + AXP318_DCDC6, + AXP318_DCDC7, + AXP318_DCDC8, + AXP318_DCDC9, + AXP318_ALDO1, + AXP318_ALDO2, + AXP318_ALDO3, + AXP318_ALDO4, + AXP318_ALDO5, + AXP318_ALDO6, + AXP318_BLDO1, + AXP318_BLDO2, + AXP318_BLDO3, + AXP318_BLDO4, + AXP318_BLDO5, + AXP318_CLDO1, + AXP318_CLDO2, + AXP318_CLDO3, + AXP318_CLDO4, + AXP318_CLDO5, + AXP318_DLDO1, + AXP318_DLDO2, + AXP318_DLDO3, + AXP318_DLDO4, + AXP318_DLDO5, + AXP318_DLDO6, + AXP318_ELDO1, + AXP318_ELDO2, + AXP318_ELDO3, + AXP318_ELDO4, + AXP318_ELDO5, + AXP318_ELDO6, + AXP318_SWOUT1, + AXP318_SWOUT2, + AXP318_REG_ID_MAX, +}; + enum { AXP717_DCDC1 =3D 0, AXP717_DCDC2, --=20 2.47.3