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Introduce a sensor_data structure, populated through i2c_get_match_data(), to hold the chip ID, MCLK frequency, link frequencies and supported modes. Test pattern programming is described by a per-sensor callback, and each mode stores its media bus format code (rather than a bits-per-pixel value) so that sensors with a different output format can be supported. Signed-off-by: Wenmeng Liu Reviewed-by: Vladimir Zapolskiy Tested-by: Vladimir Zapolskiy --- drivers/media/i2c/og0ve1b.c | 99 ++++++++++++++++++++++++++++++++---------= ---- 1 file changed, 71 insertions(+), 28 deletions(-) diff --git a/drivers/media/i2c/og0ve1b.c b/drivers/media/i2c/og0ve1b.c index 84a28cdcade10f8fbcf945999e88f84641b9bc0d..041342fbe3c822400388f58a03e= 6057e186f060f 100644 --- a/drivers/media/i2c/og0ve1b.c +++ b/drivers/media/i2c/og0ve1b.c @@ -65,11 +65,23 @@ struct og0ve1b_mode { u32 height; /* Frame height in pixels */ u32 hts; /* Horizontal timing size */ u32 vts; /* Default vertical timing size */ - u32 bpp; /* Bits per pixel */ + u32 code; /* MEDIA_BUS_FMT code */ =20 const struct og0ve1b_reg_list reg_list; /* Sensor register setting */ }; =20 +struct og0ve1b; + +struct og0ve1b_sensor_data { + u64 chip_id; + unsigned long mclk_freq; + int (*enable_test_pattern)(struct og0ve1b *og0ve1b, u32 pattern); + const s64 *link_freq_menu; + int num_link_freqs; + const struct og0ve1b_mode *modes; + int num_modes; +}; + static const char * const og0ve1b_test_pattern_menu[] =3D { "Disabled", "Vertical Colour Bars", @@ -99,6 +111,8 @@ struct og0ve1b { =20 /* Saved register value */ u64 pre_isp; + + const struct og0ve1b_sensor_data *data; }; =20 static const struct cci_reg_sequence og0ve1b_640x480_120fps_mode[] =3D { @@ -247,13 +261,13 @@ static const struct cci_reg_sequence og0ve1b_640x480_= 120fps_mode[] =3D { { CCI_REG8(0x3f47), 0x35 }, }; =20 -static const struct og0ve1b_mode supported_modes[] =3D { +static const struct og0ve1b_mode og0ve1b_supported_modes[] =3D { { .width =3D 640, .height =3D 480, .hts =3D 792, .vts =3D 568, - .bpp =3D 8, + .code =3D MEDIA_BUS_FMT_Y8_1X8, .reg_list =3D { .regs =3D og0ve1b_640x480_120fps_mode, .num_regs =3D ARRAY_SIZE(og0ve1b_640x480_120fps_mode), @@ -273,11 +287,21 @@ static int og0ve1b_enable_test_pattern(struct og0ve1b= *og0ve1b, u32 pattern) return cci_write(og0ve1b->regmap, OG0VE1B_REG_PRE_ISP, val, NULL); } =20 +static const struct og0ve1b_sensor_data og0ve1b_data =3D { + .chip_id =3D OG0VE1B_CHIP_ID, + .mclk_freq =3D OG0VE1B_MCLK_FREQ_24MHZ, + .enable_test_pattern =3D og0ve1b_enable_test_pattern, + .link_freq_menu =3D og0ve1b_link_freq_menu, + .num_link_freqs =3D ARRAY_SIZE(og0ve1b_link_freq_menu), + .modes =3D og0ve1b_supported_modes, + .num_modes =3D ARRAY_SIZE(og0ve1b_supported_modes), +}; + static int og0ve1b_set_ctrl(struct v4l2_ctrl *ctrl) { struct og0ve1b *og0ve1b =3D container_of(ctrl->handler, struct og0ve1b, ctrl_handler); - const struct og0ve1b_mode *mode =3D &supported_modes[0]; + const struct og0ve1b_mode *mode =3D &og0ve1b->data->modes[0]; s64 exposure_max; int ret; =20 @@ -314,7 +338,7 @@ static int og0ve1b_set_ctrl(struct v4l2_ctrl *ctrl) ctrl->val + mode->height, NULL); break; case V4L2_CID_TEST_PATTERN: - ret =3D og0ve1b_enable_test_pattern(og0ve1b, ctrl->val); + ret =3D og0ve1b->data->enable_test_pattern(og0ve1b, ctrl->val); break; default: ret =3D -EINVAL; @@ -330,10 +354,19 @@ static const struct v4l2_ctrl_ops og0ve1b_ctrl_ops = =3D { .s_ctrl =3D og0ve1b_set_ctrl, }; =20 +static s64 og0ve1b_pixel_rate(const struct og0ve1b_sensor_data *data) +{ + const struct og0ve1b_mode *mode =3D &data->modes[0]; + unsigned int bpp =3D mode->code =3D=3D MEDIA_BUS_FMT_Y8_1X8 ? 8 : 10; + + return data->link_freq_menu[0] / bpp; +} + static int og0ve1b_init_controls(struct og0ve1b *og0ve1b) { struct v4l2_ctrl_handler *ctrl_hdlr =3D &og0ve1b->ctrl_handler; - const struct og0ve1b_mode *mode =3D &supported_modes[0]; + const struct og0ve1b_mode *mode =3D &og0ve1b->data->modes[0]; + const struct og0ve1b_sensor_data *data =3D og0ve1b->data; s64 exposure_max, pixel_rate, h_blank, v_blank; struct v4l2_fwnode_device_properties props; struct v4l2_ctrl *ctrl; @@ -343,12 +376,12 @@ static int og0ve1b_init_controls(struct og0ve1b *og0v= e1b) =20 ctrl =3D v4l2_ctrl_new_int_menu(ctrl_hdlr, &og0ve1b_ctrl_ops, V4L2_CID_LINK_FREQ, - ARRAY_SIZE(og0ve1b_link_freq_menu) - 1, - 0, og0ve1b_link_freq_menu); + data->num_link_freqs - 1, + 0, data->link_freq_menu); if (ctrl) ctrl->flags |=3D V4L2_CTRL_FLAG_READ_ONLY; =20 - pixel_rate =3D og0ve1b_link_freq_menu[0] / mode->bpp; + pixel_rate =3D og0ve1b_pixel_rate(data); v4l2_ctrl_new_std(ctrl_hdlr, &og0ve1b_ctrl_ops, V4L2_CID_PIXEL_RATE, 0, pixel_rate, 1, pixel_rate); =20 @@ -407,7 +440,7 @@ static int og0ve1b_init_controls(struct og0ve1b *og0ve1= b) static void og0ve1b_update_pad_format(const struct og0ve1b_mode *mode, struct v4l2_mbus_framefmt *fmt) { - fmt->code =3D MEDIA_BUS_FMT_Y8_1X8; + fmt->code =3D mode->code; fmt->width =3D mode->width; fmt->height =3D mode->height; fmt->field =3D V4L2_FIELD_NONE; @@ -421,8 +454,8 @@ static int og0ve1b_enable_streams(struct v4l2_subdev *s= d, struct v4l2_subdev_state *state, u32 pad, u64 streams_mask) { - const struct og0ve1b_reg_list *reg_list =3D &supported_modes[0].reg_list; struct og0ve1b *og0ve1b =3D to_og0ve1b(sd); + const struct og0ve1b_reg_list *reg_list =3D &og0ve1b->data->modes[0].reg_= list; int ret; =20 ret =3D pm_runtime_resume_and_get(og0ve1b->dev); @@ -484,13 +517,14 @@ static int og0ve1b_set_pad_format(struct v4l2_subdev = *sd, struct v4l2_subdev_state *state, struct v4l2_subdev_format *fmt) { + struct og0ve1b *og0ve1b =3D to_og0ve1b(sd); struct v4l2_mbus_framefmt *format; const struct og0ve1b_mode *mode; =20 format =3D v4l2_subdev_state_get_format(state, 0); =20 - mode =3D v4l2_find_nearest_size(supported_modes, - ARRAY_SIZE(supported_modes), + mode =3D v4l2_find_nearest_size(og0ve1b->data->modes, + og0ve1b->data->num_modes, width, height, fmt->format.width, fmt->format.height); @@ -505,10 +539,12 @@ static int og0ve1b_enum_mbus_code(struct v4l2_subdev = *sd, struct v4l2_subdev_state *sd_state, struct v4l2_subdev_mbus_code_enum *code) { + struct og0ve1b *og0ve1b =3D to_og0ve1b(sd); + if (code->index > 0) return -EINVAL; =20 - code->code =3D MEDIA_BUS_FMT_Y8_1X8; + code->code =3D og0ve1b->data->modes[0].code; =20 return 0; } @@ -517,15 +553,18 @@ static int og0ve1b_enum_frame_size(struct v4l2_subdev= *sd, struct v4l2_subdev_state *sd_state, struct v4l2_subdev_frame_size_enum *fse) { - if (fse->index >=3D ARRAY_SIZE(supported_modes)) + struct og0ve1b *og0ve1b =3D to_og0ve1b(sd); + const struct og0ve1b_sensor_data *data =3D og0ve1b->data; + + if (fse->index >=3D data->num_modes) return -EINVAL; =20 - if (fse->code !=3D MEDIA_BUS_FMT_Y8_1X8) + if (fse->code !=3D data->modes[fse->index].code) return -EINVAL; =20 - fse->min_width =3D supported_modes[fse->index].width; + fse->min_width =3D data->modes[fse->index].width; fse->max_width =3D fse->min_width; - fse->min_height =3D supported_modes[fse->index].height; + fse->min_height =3D data->modes[fse->index].height; fse->max_height =3D fse->min_height; =20 return 0; @@ -534,13 +573,14 @@ static int og0ve1b_enum_frame_size(struct v4l2_subdev= *sd, static int og0ve1b_init_state(struct v4l2_subdev *sd, struct v4l2_subdev_state *state) { + const struct og0ve1b_mode *mode =3D &to_og0ve1b(sd)->data->modes[0]; struct v4l2_subdev_format fmt =3D { .which =3D V4L2_SUBDEV_FORMAT_TRY, .pad =3D 0, .format =3D { - .code =3D MEDIA_BUS_FMT_Y8_1X8, - .width =3D supported_modes[0].width, - .height =3D supported_modes[0].height, + .code =3D mode->code, + .width =3D mode->width, + .height =3D mode->height, }, }; =20 @@ -586,9 +626,9 @@ static int og0ve1b_identify_sensor(struct og0ve1b *og0v= e1b) return ret; } =20 - if (val !=3D OG0VE1B_CHIP_ID) { - dev_err(og0ve1b->dev, "chip id mismatch: %x!=3D%llx\n", - OG0VE1B_CHIP_ID, val); + if (val !=3D og0ve1b->data->chip_id) { + dev_err(og0ve1b->dev, "chip id mismatch: %llx!=3D%llx\n", + og0ve1b->data->chip_id, val); return -ENODEV; } =20 @@ -624,8 +664,8 @@ static int og0ve1b_check_hwcfg(struct og0ve1b *og0ve1b) ret =3D v4l2_link_freq_to_bitmap(og0ve1b->dev, bus_cfg.link_frequencies, bus_cfg.nr_of_link_frequencies, - og0ve1b_link_freq_menu, - ARRAY_SIZE(og0ve1b_link_freq_menu), + og0ve1b->data->link_freq_menu, + og0ve1b->data->num_link_freqs, &freq_bitmap); =20 v4l2_fwnode_endpoint_free(&bus_cfg); @@ -686,6 +726,9 @@ static int og0ve1b_probe(struct i2c_client *client) return -ENOMEM; =20 og0ve1b->dev =3D &client->dev; + og0ve1b->data =3D i2c_get_match_data(client); + if (!og0ve1b->data) + return -ENODEV; =20 v4l2_i2c_subdev_init(&og0ve1b->sd, client, &og0ve1b_subdev_ops); =20 @@ -700,7 +743,7 @@ static int og0ve1b_probe(struct i2c_client *client) "failed to get XVCLK clock\n"); =20 freq =3D clk_get_rate(og0ve1b->xvclk); - if (freq && freq !=3D OG0VE1B_MCLK_FREQ_24MHZ) + if (freq && freq !=3D og0ve1b->data->mclk_freq) return dev_err_probe(og0ve1b->dev, -EINVAL, "XVCLK clock frequency %lu is not supported\n", freq); @@ -819,7 +862,7 @@ static const struct dev_pm_ops og0ve1b_pm_ops =3D { }; =20 static const struct of_device_id og0ve1b_of_match[] =3D { - { .compatible =3D "ovti,og0ve1b" }, + { .compatible =3D "ovti,og0ve1b", .data =3D &og0ve1b_data }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, og0ve1b_of_match); --=20 2.34.1