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Thu, 18 Jun 2026 14:04:20 -0700 (PDT) Received: from [192.168.0.2] ([2a07:7e81:7daa:0:202:c9ff:fe53:eda4]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-5ad57493145sm108586e87.69.2026.06.18.14.04.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 18 Jun 2026 14:04:20 -0700 (PDT) From: Angelo Dureghello X-Google-Original-From: Angelo Dureghello Date: Thu, 18 Jun 2026 23:04:15 +0200 Subject: [PATCH v6 1/2] iio: dac: add mcf54415 DAC Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260618-wip-stmark2-dac-v6-1-48761dbb96d7@baylibre.com> References: <20260618-wip-stmark2-dac-v6-0-48761dbb96d7@baylibre.com> In-Reply-To: <20260618-wip-stmark2-dac-v6-0-48761dbb96d7@baylibre.com> To: Jonathan Cameron , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , Andy Shevchenko , Geert Uytterhoeven , Maxime Coquelin , Alexandre Torgue Cc: linux-kernel@vger.kernel.org, linux-iio@vger.kernel.org, linux-m68k@lists.linux-m68k.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, Angelo Dureghello X-Mailer: b4 0.15.2 From: Angelo Dureghello Add basic version of mcf54415 DAC driver. DAC is embedded in the SoC and DAC configuration registers are mapped in the internal IO address space. The DAC accepts a 12-bit digital signal and creates a monotonic 12-bit analog output varying from DAC_VREFL to DAC_VREFH. The DAC module consists of a conversion unit, an output amplifier, and the associated digital control blocks. Default register values for DAC_VREFL and DAC_VREFH are respectively 0 and 0xfff, left untouched in this initial version. This initial version of the driver is minimalistic, "output raw" only, to be extended in the future. DMA and external sync are disabled, default mode is high speed, default format is right-justified 12-bit on 16-bit word. Signed-off-by: Angelo Dureghello --- Changes in v2: - remove tests from commit message, moved to patch 0 - remove additional blank lines - remove dead code and unused definitions - use regmap - add limit check on raw write - non functional style fixes - add COMPILE_TEST to Kconfig Changes in v3: - add comments where needed - code style changes - remove unneeded variables - use regmap_set_bits where possible - remove macro not needed to define a single channel - set up regmap to big_endian accesses for next patches that will come, that will adjust ColdFire readx/writex as standard LE (links in 0/x). - add return value check on regmap calls - sashiko: remove unneeded .io_port from regmap init. - sashiko: add select REGMAP_MMIO in Kconfig Changes in v4: - remove unused includes - sashiko: return "ret" as regmap_read ret value in case of error - sashiko: using u32 as regmap_read value - use local variable in mcf54415_dac_init() for better readability - sashiko: check mcf54415_dac_init return value also in resume() Changes in v5: - commit syntax fixes - minor code style fixes - use include - removed unneeded cast - disable clock in case of DAC init error - use unsigned int for regmap_read and GENMASK for masking 12 bits - add id table to match "mcfdac" platform device name Changes in v6: - removed pm ops, can't be tested for mcf54415 with mmu enabled - Kconfig desc line rewrap - minor coding style fixes --- drivers/iio/dac/Kconfig | 11 +++ drivers/iio/dac/Makefile | 1 + drivers/iio/dac/mcf54415_dac.c | 183 +++++++++++++++++++++++++++++++++++++= ++++ 3 files changed, 195 insertions(+) diff --git a/drivers/iio/dac/Kconfig b/drivers/iio/dac/Kconfig index cd4870b65415..b23078c8986a 100644 --- a/drivers/iio/dac/Kconfig +++ b/drivers/iio/dac/Kconfig @@ -516,6 +516,17 @@ config MAX5821 Say yes here to build support for Maxim MAX5821 10 bits DAC. =20 +config MCF54415_DAC + tristate "NXP MCF54415 DAC driver" + depends on M5441x || COMPILE_TEST + select REGMAP_MMIO + help + Say yes here if you want to build support for NXP ColdFire + MCF54415/6/7/8 12-bit DAC module. + + To compile this driver as a module, choose M here: the module + will be called mcf54415_dac. + config MCP4725 tristate "MCP4725/6 DAC driver" depends on I2C diff --git a/drivers/iio/dac/Makefile b/drivers/iio/dac/Makefile index 2a80bbf4e80a..1cb93e83d0eb 100644 --- a/drivers/iio/dac/Makefile +++ b/drivers/iio/dac/Makefile @@ -51,6 +51,7 @@ obj-$(CONFIG_MAX517) +=3D max517.o obj-$(CONFIG_MAX22007) +=3D max22007.o obj-$(CONFIG_MAX5522) +=3D max5522.o obj-$(CONFIG_MAX5821) +=3D max5821.o +obj-$(CONFIG_MCF54415_DAC) +=3D mcf54415_dac.o obj-$(CONFIG_MCP4725) +=3D mcp4725.o obj-$(CONFIG_MCP4728) +=3D mcp4728.o obj-$(CONFIG_MCP47FEB02) +=3D mcp47feb02.o diff --git a/drivers/iio/dac/mcf54415_dac.c b/drivers/iio/dac/mcf54415_dac.c new file mode 100644 index 000000000000..986c4c6ac727 --- /dev/null +++ b/drivers/iio/dac/mcf54415_dac.c @@ -0,0 +1,183 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * NXP mcf54415 DAC driver + * + * Copyright 2026 BayLibre - adureghello@baylibre.com + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#define MCF54415_DAC_CR 0x00 +#define MCF54415_DAC_CR_PDN BIT(0) +#define MCF54415_DAC_CR_HSLS BIT(6) +#define MCF54415_DAC_CR_WMLVL GENMASK(9, 8) +#define MCF54415_DAC_CR_FILT BIT(12) + +#define MCF54415_DAC_DATA 0x02 + +struct mcf54415_dac { + struct regmap *map; + struct clk *clk; +}; + +static const struct regmap_config mcf54415_dac_regmap_config =3D { + .reg_bits =3D 16, + .reg_stride =3D 2, + .val_bits =3D 16, + .max_register =3D 0x0c, /* DACX_FILTCNT, R.M. Table 30-2 */ + .val_format_endian =3D REGMAP_ENDIAN_BIG, + .reg_format_endian =3D REGMAP_ENDIAN_BIG, +}; + +static int mcf54415_dac_init(struct mcf54415_dac *info) +{ + u16 val =3D MCF54415_DAC_CR_FILT | FIELD_PREP(MCF54415_DAC_CR_WMLVL, 1); + int ret; + + /* Fixed defaults and enable DAC (bit 0 set to 0) */ + ret =3D regmap_write(info->map, MCF54415_DAC_CR, val); + if (ret) + return ret; + + /* DAC is ready after 12us, from RM table 40-3 */ + fsleep(12); + + return 0; +} + +static void mcf54415_dac_exit(void *data) +{ + struct mcf54415_dac *info =3D data; + + regmap_set_bits(info->map, MCF54415_DAC_CR, MCF54415_DAC_CR_PDN); +} + +static const struct iio_chan_spec mcf54415_dac_iio_channel =3D { + .type =3D IIO_VOLTAGE, + .output =3D 1, + .info_mask_separate =3D BIT(IIO_CHAN_INFO_RAW), + .info_mask_shared_by_type =3D BIT(IIO_CHAN_INFO_SCALE), +}; + +static int mcf54415_read_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + int *val, int *val2, long mask) +{ + struct mcf54415_dac *info =3D iio_priv(indio_dev); + unsigned int reg; + int ret; + + switch (mask) { + case IIO_CHAN_INFO_RAW: + ret =3D regmap_read(info->map, MCF54415_DAC_DATA, ®); + if (ret) + return ret; + *val =3D reg & GENMASK(11, 0); + return IIO_VAL_INT; + case IIO_CHAN_INFO_SCALE: + /* Reference voltage as per ColdFire datasheet is 3.3V */ + *val =3D 3300 /* mV */; + *val2 =3D 12; + return IIO_VAL_FRACTIONAL_LOG2; + default: + return -EINVAL; + } +} + +static int mcf54415_write_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + int val, int val2, long mask) +{ + struct mcf54415_dac *info =3D iio_priv(indio_dev); + + switch (mask) { + case IIO_CHAN_INFO_RAW: + /* Check based on RM 30.3.2 (DACn_DATA) reg. resolution */ + if (val < 0 || val > 4095) + return -EINVAL; + return regmap_write(info->map, MCF54415_DAC_DATA, val); + default: + return -EINVAL; + } +} + +static const struct iio_info mcf54415_dac_iio_info =3D { + .read_raw =3D &mcf54415_read_raw, + .write_raw =3D &mcf54415_write_raw, +}; + +static int mcf54415_dac_probe(struct platform_device *pdev) +{ + struct device *dev =3D &pdev->dev; + struct iio_dev *indio_dev; + struct mcf54415_dac *info; + void __iomem *regs; + int ret; + + indio_dev =3D devm_iio_device_alloc(dev, sizeof(*info)); + if (!indio_dev) + return -ENOMEM; + + info =3D iio_priv(indio_dev); + + regs =3D devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(regs)) + return dev_err_probe(dev, PTR_ERR(regs), "failed to get io regs\n"); + + info->map =3D devm_regmap_init_mmio(dev, regs, &mcf54415_dac_regmap_confi= g); + if (IS_ERR(info->map)) + return PTR_ERR(info->map); + + info->clk =3D devm_clk_get_enabled(dev, "dac"); + if (IS_ERR(info->clk)) + return dev_err_probe(dev, PTR_ERR(info->clk), "failed getting clock\n"); + + platform_set_drvdata(pdev, indio_dev); + + indio_dev->name =3D "mcf54415"; + indio_dev->info =3D &mcf54415_dac_iio_info; + indio_dev->modes =3D INDIO_DIRECT_MODE; + indio_dev->channels =3D &mcf54415_dac_iio_channel; + indio_dev->num_channels =3D 1; + + ret =3D mcf54415_dac_init(info); + if (ret) + return ret; + + ret =3D devm_add_action_or_reset(dev, mcf54415_dac_exit, info); + if (ret) + return ret; + + return devm_iio_device_register(dev, indio_dev); +} + +static const struct platform_device_id mcf54415_dac_ids[] =3D { + { .name =3D "mcfdac" }, + { } +}; +MODULE_DEVICE_TABLE(platform, mcf54415_dac_ids); + +static struct platform_driver mcf54415_dac_driver =3D { + .driver =3D { + .name =3D "mcf54415_dac", + }, + .probe =3D mcf54415_dac_probe, + .id_table =3D mcf54415_dac_ids, +}; +module_platform_driver(mcf54415_dac_driver); + +MODULE_AUTHOR("Angelo Dureghello "); +MODULE_DESCRIPTION("NXP MCF54415 DAC driver"); +MODULE_LICENSE("GPL"); --=20 2.54.0 From nobody Fri Jun 19 07:18:19 2026 Received: from mail-lf1-f45.google.com (mail-lf1-f45.google.com [209.85.167.45]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6C14834D4D6 for ; Thu, 18 Jun 2026 21:04:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.167.45 ARC-Seal: i=1; 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Thu, 18 Jun 2026 14:04:22 -0700 (PDT) Received: from [192.168.0.2] ([2a07:7e81:7daa:0:202:c9ff:fe53:eda4]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-5ad57493145sm108586e87.69.2026.06.18.14.04.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 18 Jun 2026 14:04:21 -0700 (PDT) From: Angelo Dureghello X-Google-Original-From: Angelo Dureghello Date: Thu, 18 Jun 2026 23:04:16 +0200 Subject: [PATCH v6 2/2] m68k: defconfig: update stmark2 defconfig Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260618-wip-stmark2-dac-v6-2-48761dbb96d7@baylibre.com> References: <20260618-wip-stmark2-dac-v6-0-48761dbb96d7@baylibre.com> In-Reply-To: <20260618-wip-stmark2-dac-v6-0-48761dbb96d7@baylibre.com> To: Jonathan Cameron , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , Andy Shevchenko , Geert Uytterhoeven , Maxime Coquelin , Alexandre Torgue Cc: linux-kernel@vger.kernel.org, linux-iio@vger.kernel.org, linux-m68k@lists.linux-m68k.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, Angelo Dureghello X-Mailer: b4 0.15.2 From: Angelo Dureghello Update stmark2 defconfig enabling MCF5441X DACs. Signed-off-by: Angelo Dureghello --- Changes for v5: - move this patch after new Kconfig symbols are added --- arch/m68k/configs/stmark2_defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/m68k/configs/stmark2_defconfig b/arch/m68k/configs/stmark= 2_defconfig index b3fb95f73a95..3941113bc60b 100644 --- a/arch/m68k/configs/stmark2_defconfig +++ b/arch/m68k/configs/stmark2_defconfig @@ -76,6 +76,8 @@ CONFIG_DMADEVICES=3Dy CONFIG_MCF_EDMA=3Dy # CONFIG_VIRTIO_MENU is not set # CONFIG_VHOST_MENU is not set +CONFIG_IIO=3Dy +CONFIG_MCF54415_DAC=3Dy CONFIG_EXT2_FS=3Dy CONFIG_EXT2_FS_XATTR=3Dy CONFIG_EXT2_FS_POSIX_ACL=3Dy --=20 2.54.0