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[61.220.246.151]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866325d1d3sm7138676a12.11.2026.06.14.19.44.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 14 Jun 2026 19:44:25 -0700 (PDT) From: Kyle Hsieh Date: Mon, 15 Jun 2026 10:46:02 +0800 Subject: [PATCH v8 1/2] dt-bindings: arm: aspeed: add Meta ventura2 board Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260615-ventura2_initial_dts-v8-1-c89f92c80447@gmail.com> References: <20260615-ventura2_initial_dts-v8-0-c89f92c80447@gmail.com> In-Reply-To: <20260615-ventura2_initial_dts-v8-0-c89f92c80447@gmail.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Joel Stanley , Andrew Jeffery Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org, Kyle Hsieh , Krzysztof Kozlowski X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=909; i=kylehsieh1995@gmail.com; h=from:subject:message-id; bh=J3z5h5jN99f1BFk7jnvt5xoq1tLRgjc3X0kRzaksvsA=; b=owEBbQGS/pANAwAKAaWDQrcJVsSBAcsmYgBqL2ds9BW16ZZQoO1e5JC8M56v9xEAV+IzijHmA lB0RGhp+EKJATMEAAEKAB0WIQTJHsaNZOdY+THGqJelg0K3CVbEgQUCai9nbAAKCRClg0K3CVbE gXWgCADCprZUJ0z700syJ6zD139+Wivkz9tcUw6CjgrjNq/OnB+mBhvi3Cq6ed/gVHouqFJptUm Fd/0phsYrDe5eT8PXBsktLI0Yrueo2W5QvOgi8PDJUnobF+3XSLjb7ob0hVqqhpuBUz5ltN8/oo YMLheoIJVMkiOIddANX65rvHiLupttXtwCUKgVEOVIxe5nvs/c+WwudZqdahS4U84GXM2y8RLRf kmMb7l+CyL7Jykgj0F/Bmn1MT/yt5EoiuWr3IVXmC24x+YAVRTLR8u2wybRDB62a03VNKv2ZoJt xe8D9O4Fl1GiXWnItAKO9oRU9JLnIgtrb/+MWRTzOcq1ffgP X-Developer-Key: i=kylehsieh1995@gmail.com; a=openpgp; fpr=C91EC68D64E758F931C6A897A58342B70956C481 Document the new compatibles used on Facebook ventura2. Acked-by: Krzysztof Kozlowski Signed-off-by: Kyle Hsieh --- Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml b/Doc= umentation/devicetree/bindings/arm/aspeed/aspeed.yaml index 9298c1a75dd1..d48607c86e8e 100644 --- a/Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml +++ b/Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml @@ -92,6 +92,7 @@ properties: - facebook,harma-bmc - facebook,minerva-cmc - facebook,santabarbara-bmc + - facebook,ventura2-rmc - facebook,yosemite4-bmc - facebook,yosemite5-bmc - ibm,balcones-bmc --=20 2.34.1 From nobody Fri Jun 19 07:53:43 2026 Received: from mail-pj1-f46.google.com (mail-pj1-f46.google.com [209.85.216.46]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 91FAA25B0A7 for ; Mon, 15 Jun 2026 02:44:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.216.46 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781491475; cv=none; b=EeWjePCUMQM6akyw4o0AhhpTPGAhnOUo/Zz+PGux5ptvdMvHZ8TI+hyo8JLG4UdgTYvVSmb/ssO1eTql4yT4FFjFZO9s5o8ap/0Eagqz6iC8A+1itSGTcTZ2MMxST0F9E5y9L0e4aTCEnJFtguMgewnqshNenDfNpdnszhsHy8A= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781491475; c=relaxed/simple; bh=ctr1eSr7yksf2M44uGxKmfOcDVCSZFnTGonrbmnmSik=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=tZYE6xiYIGYY563iwdpsJmaK9awp+aEsBPBBPfyyOSC8IGvLbGtJfRXwdoq42cXMOYIJlKDCJpnBbDdpUE2dP40V245RP9LACl/IpX64jovJ62Yml9hFLj/VQxpsA14RajipIo6whXe55g8lq7/S9/geAx4cVqGsipJVFnMeHgs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=F5Zb4dth; arc=none smtp.client-ip=209.85.216.46 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="F5Zb4dth" Received: by mail-pj1-f46.google.com with SMTP id 98e67ed59e1d1-36b8e1760ccso1755990a91.0 for ; Sun, 14 Jun 2026 19:44:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781491470; x=1782096270; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=cE+R5TJdYIGwpQGfgr/msLXqdL5GcxImZdmxdDpDzeQ=; b=F5Zb4dthIQX41jmz+KXdbhIltuIT1xRYrDDlOsfcbbcpgB6+B8B083qPe/2g6edCCZ z8Ad2DGceadJ2oSoBZ6MmG+uy3bJ2ndq6Ab1yUP7R+MZ78iJCbjW3+GTErJ4Cmc2EreI bUAxOsc+n4cHYGyQ6ozYEnHBntSFcC0lvR7MCIdPVHyzxIU0Ii3YphYRR6Yb3Um5kpr/ /d8ckrnqYFkDgxyomL4l7wM8dxVolCi5G0/2WN7DX3kr0fXozC/GWK3TlVjHBKCnAVcO gMOo44nq8Wjc4d/2froHTeilHLWi/gmVSFxYG3sTfz0jZ7k0oAs9C3QuqBVE/q0e/M/c LpnQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781491470; x=1782096270; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=cE+R5TJdYIGwpQGfgr/msLXqdL5GcxImZdmxdDpDzeQ=; b=ApOKVy3NT3yWuHk3KqNHVa1LAp86AzwZb8Vsn9tB3mQpG1ORpySfYLNqXNjhksT6kN 9W6KKnEsCE667w+sX2+zhrlQkE/IHK4biuxWvIalSU6s1mKMpZMyxCAcrucq80I184vM EQIsVtpe1hLRrSgCr3AtWaXVg53NDwKcYxqBja4Ey6EHFbpSrpBTwV6yB3GSnZsLMUuy GVBL6hZirqjuXV8JWt8wZnBWYKK5a4vTvk5Z0gJFQYaz0V9TB/L69pD/UZggjmJxpzLd v0MGT24GA7jJ20STURTWBQChOe4AcsQYjpdPvrsCfi3d0WZxFEA23YV2c5rO67eN8FbE GqYQ== X-Forwarded-Encrypted: i=1; AFNElJ/raBzBvYvISBSTuv40XOJo8du5k+eCHHJzdyoRpvukEyLM2YFvR1prWLfIQKtQG9nGObPDPhb0jpaRuBo=@vger.kernel.org X-Gm-Message-State: AOJu0YwL/B59jpoz+0nb5hbA7vnrPU0CUHDgs0mAJVnTha27x/aAsy4m 1YkuxHqma/jNtbkz1Ixeg++YSPudey5bfa2k+TveS8adREPlNra4cCng X-Gm-Gg: Acq92OFeZY3yOGZ0+obtjeVvYkbcilbZ0XJUq3IYH4gXiURquFUmZ+1W3NlF7+rGONi CmOWVKM5kIlEu8v2migcx/Y/1jiSDmaeQab3DwpgeyEZeyjphU5q/RrJK4ZGJAk/LhfFQdiZ/5F Yt8X1/ElH1ogMDNMoqM3Y+xIrG6AlyBJaHdLRXdOM14oBXMzKhx5OLdd1GDvMKiXmUEAO5jDZd7 nijUl1d4+veoFFmKO9a/3k8cIc7YxLfmTvG/IwRlWjywdGMW+cwp9TzNh7SvfTho8QAmGWnUMMR he9f58w/LSl3wSfu43faA5mSveuuT5xYb5rAUz6QqCnPEyxHHg8M5xQOnJ0SnoIXYUpumExXzrH k5inAqoqYzVAHnDRphWRBLPYQ/t4pw7GcViRnYyLzSWGLF3M4cBBbsuDeh2BJoG2RT551Tr38iC 2gFtZJB8byep2ShsSYr9ORwZEesOvoGbKaBGNlf1fvSNwvoife9kh5FVloN26lm7Y= X-Received: by 2002:a17:90b:4c4e:b0:35f:b714:e516 with SMTP id 98e67ed59e1d1-37a034f3da2mr11743295a91.16.1781491469508; Sun, 14 Jun 2026 19:44:29 -0700 (PDT) Received: from [127.0.1.1] (61-220-246-151.hinet-ip.hinet.net. [61.220.246.151]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c866325d1d3sm7138676a12.11.2026.06.14.19.44.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 14 Jun 2026 19:44:28 -0700 (PDT) From: Kyle Hsieh Date: Mon, 15 Jun 2026 10:46:03 +0800 Subject: [PATCH v8 2/2] ARM: dts: aspeed: ventura2: Add Meta ventura2 BMC Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260615-ventura2_initial_dts-v8-2-c89f92c80447@gmail.com> References: <20260615-ventura2_initial_dts-v8-0-c89f92c80447@gmail.com> In-Reply-To: <20260615-ventura2_initial_dts-v8-0-c89f92c80447@gmail.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Joel Stanley , Andrew Jeffery Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org, Kyle Hsieh X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=82215; i=kylehsieh1995@gmail.com; h=from:subject:message-id; bh=ctr1eSr7yksf2M44uGxKmfOcDVCSZFnTGonrbmnmSik=; b=owEBbQGS/pANAwAKAaWDQrcJVsSBAcsmYgBqL2ds4MYPpii2D5wAyFOU5AcBLSyoqg945dQMA Er2IFTdkXiJATMEAAEKAB0WIQTJHsaNZOdY+THGqJelg0K3CVbEgQUCai9nbAAKCRClg0K3CVbE gTLcB/42Ao2mT98c54lBJg2A88UAFz9MK6PjO0demnaX8fJ+tHwJ/6P1hOPeCRyKuT4r7xyZQFi pMR3lVX+vCdXQsGJMNBCg0cHfaE3eYyCG8yA38gw6cPUOZ8vAaHrUdvNC4EgPC/Q6HsmqPsg/te 4ro+lgJmccUk2+8KvcELqQ4gSfAiMboZJ5x+RQm2gN+exToAL7yZb84vvYqUejrfF+LiExqyNpY +QLsElzGuiqcEvv+bzr7ZOxNWj+xhHGzdIn+8NDYWLfxgsX/eottz7p2boSiTuLjlcPoNZCydOW Y6JK+5dtgI/v/fIE5z6rjUi53NpecNAw2WvVVoOXfFZg2NR5 X-Developer-Key: i=kylehsieh1995@gmail.com; a=openpgp; fpr=C91EC68D64E758F931C6A897A58342B70956C481 Ventura2 is a Rack Management Controller. It is a modular device designed to manage liquid cooling systems and monitor hardware states within an IT rack. The system uses an AST2600 BMC for management. RMCv2 serves several critical roles: - Detects liquid leakage at both tray and rack levels. - Communicates with and controls liquid cooling equipment. - Manages leakage events and executes system recovery protocols. Key hardware features include: - An extensive I2C and IO expander topology to support comprehensive sensor monitoring and backward compatibility with legacy trays. - MCTP over I2C support for asynchronous device communications. - A dual-flash design for BMC firmware redundancy. Signed-off-by: Kyle Hsieh --- arch/arm/boot/dts/aspeed/Makefile | 1 + .../dts/aspeed/aspeed-bmc-facebook-ventura2.dts | 2903 ++++++++++++++++= ++++ 2 files changed, 2904 insertions(+) diff --git a/arch/arm/boot/dts/aspeed/Makefile b/arch/arm/boot/dts/aspeed/M= akefile index 9adf9278dc94..6b96997629d4 100644 --- a/arch/arm/boot/dts/aspeed/Makefile +++ b/arch/arm/boot/dts/aspeed/Makefile @@ -32,6 +32,7 @@ dtb-$(CONFIG_ARCH_ASPEED) +=3D \ aspeed-bmc-facebook-minipack.dtb \ aspeed-bmc-facebook-santabarbara.dtb \ aspeed-bmc-facebook-tiogapass.dtb \ + aspeed-bmc-facebook-ventura2.dtb \ aspeed-bmc-facebook-wedge40.dtb \ aspeed-bmc-facebook-wedge100.dtb \ aspeed-bmc-facebook-wedge400-data64.dtb \ diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-ventura2.dts b/ar= ch/arm/boot/dts/aspeed/aspeed-bmc-facebook-ventura2.dts new file mode 100644 index 000000000000..c64726bb0450 --- /dev/null +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-ventura2.dts @@ -0,0 +1,2903 @@ +// SPDX-License-Identifier: GPL-2.0 +// Copyright (c) 2023 Facebook Inc. +/dts-v1/; + +#include "aspeed-g6.dtsi" +#include +#include + +/ { + model =3D "Facebook Ventura2 RMC"; + compatible =3D "facebook,ventura2-rmc", "aspeed,ast2600"; + aliases { + serial2 =3D &uart3; + serial4 =3D &uart5; + + /* + * Pre-allocate I2C bus aliases for userspace predictability. + * Several I2C channels are intentionally left empty in this DTS + * as they are strictly reserved for future hardware feature expansions + * and add-on boards that will interface with these busses. + */ + /* + * i2c switch 0-0077, pca9548, 8 child channels assigned + * with bus number 16-23. + */ + i2c16 =3D &i2c0mux0ch0; + i2c17 =3D &i2c0mux0ch1; + i2c18 =3D &i2c0mux0ch2; + i2c19 =3D &i2c0mux0ch3; + i2c20 =3D &i2c0mux0ch4; + i2c21 =3D &i2c0mux0ch5; + i2c22 =3D &i2c0mux0ch6; + i2c23 =3D &i2c0mux0ch7; + + /* + * i2c switch 1-0077, pca9548, 8 child channels assigned + * with bus number 24-31. + */ + i2c24 =3D &i2c1mux0ch0; + i2c25 =3D &i2c1mux0ch1; + i2c26 =3D &i2c1mux0ch2; + i2c27 =3D &i2c1mux0ch3; + i2c28 =3D &i2c1mux0ch4; + i2c29 =3D &i2c1mux0ch5; + i2c30 =3D &i2c1mux0ch6; + i2c31 =3D &i2c1mux0ch7; + + /* + * i2c switch 4-0077, pca9548, 8 child channels assigned + * with bus number 32-39. + */ + i2c32 =3D &i2c4mux0ch0; + i2c33 =3D &i2c4mux0ch1; + i2c34 =3D &i2c4mux0ch2; + i2c35 =3D &i2c4mux0ch3; + i2c36 =3D &i2c4mux0ch4; + i2c37 =3D &i2c4mux0ch5; + i2c38 =3D &i2c4mux0ch6; + i2c39 =3D &i2c4mux0ch7; + + /* + * i2c switch 5-0077, pca9548, 8 child channels assigned + * with bus number 40-47. + */ + i2c40 =3D &i2c5mux0ch0; + i2c41 =3D &i2c5mux0ch1; + i2c42 =3D &i2c5mux0ch2; + i2c43 =3D &i2c5mux0ch3; + i2c44 =3D &i2c5mux0ch4; + i2c45 =3D &i2c5mux0ch5; + i2c46 =3D &i2c5mux0ch6; + i2c47 =3D &i2c5mux0ch7; + + /* + * i2c switch 8-0077, pca9548, 8 child channels assigned + * with bus number 48-55. + */ + i2c48 =3D &i2c8mux0ch0; + i2c49 =3D &i2c8mux0ch1; + i2c50 =3D &i2c8mux0ch2; + i2c51 =3D &i2c8mux0ch3; + i2c52 =3D &i2c8mux0ch4; + i2c53 =3D &i2c8mux0ch5; + i2c54 =3D &i2c8mux0ch6; + i2c55 =3D &i2c8mux0ch7; + + /* + * i2c switch 11-0077, pca9548, 8 child channels assigned + * with bus number 56-63. + */ + i2c56 =3D &i2c11mux0ch0; + i2c57 =3D &i2c11mux0ch1; + i2c58 =3D &i2c11mux0ch2; + i2c59 =3D &i2c11mux0ch3; + i2c60 =3D &i2c11mux0ch4; + i2c61 =3D &i2c11mux0ch5; + i2c62 =3D &i2c11mux0ch6; + i2c63 =3D &i2c11mux0ch7; + + /* + * i2c switch 13-0077, pca9548, 8 child channels assigned + * with bus number 64-71. + */ + i2c64 =3D &i2c13mux0ch0; + i2c65 =3D &i2c13mux0ch1; + i2c66 =3D &i2c13mux0ch2; + i2c67 =3D &i2c13mux0ch3; + i2c68 =3D &i2c13mux0ch4; + i2c69 =3D &i2c13mux0ch5; + i2c70 =3D &i2c13mux0ch6; + i2c71 =3D &i2c13mux0ch7; + + /* + * i2c switch 15-0077, pca9548, 8 child channels assigned + * with bus number 72-79. + */ + i2c72 =3D &i2c15mux0ch0; + i2c73 =3D &i2c15mux0ch1; + i2c74 =3D &i2c15mux0ch2; + i2c75 =3D &i2c15mux0ch3; + i2c76 =3D &i2c15mux0ch4; + i2c77 =3D &i2c15mux0ch5; + i2c78 =3D &i2c15mux0ch6; + i2c79 =3D &i2c15mux0ch7; + }; + + chosen { + stdout-path =3D "serial4:57600n8"; + }; + + fan_leds { + compatible =3D "gpio-leds"; + + led-0 { + /* The 'ledd' intentionally matches the hardware schematic */ + label =3D "fcb0fan0_ledd1_blue"; + default-state =3D "off"; + gpios =3D <&fan_io_expander0 0 GPIO_ACTIVE_LOW>; + }; + + led-1 { + label =3D "fcb0fan1_ledd2_blue"; + default-state =3D "off"; + gpios =3D <&fan_io_expander0 1 GPIO_ACTIVE_LOW>; + }; + + led-2 { + label =3D "fcb0fan2_ledd3_blue"; + default-state =3D "off"; + gpios =3D <&fan_io_expander1 0 GPIO_ACTIVE_LOW>; + }; + + led-3 { + label =3D "fcb0fan3_ledd4_blue"; + default-state =3D "off"; + gpios =3D <&fan_io_expander1 1 GPIO_ACTIVE_LOW>; + }; + + led-4 { + label =3D "fcb0fan0_ledd1_amber"; + default-state =3D "off"; + gpios =3D <&fan_io_expander0 4 GPIO_ACTIVE_LOW>; + }; + + led-5 { + label =3D "fcb0fan1_ledd2_amber"; + default-state =3D "off"; + gpios =3D <&fan_io_expander0 5 GPIO_ACTIVE_LOW>; + }; + + led-6 { + label =3D "fcb0fan2_ledd3_amber"; + default-state =3D "off"; + gpios =3D <&fan_io_expander1 4 GPIO_ACTIVE_LOW>; + }; + + led-7 { + label =3D "fcb0fan3_ledd4_amber"; + default-state =3D "off"; + gpios =3D <&fan_io_expander1 5 GPIO_ACTIVE_LOW>; + }; + }; + + iio-hwmon { + compatible =3D "iio-hwmon"; + io-channels =3D <&adc0 0>, <&adc0 1>, <&adc0 2>, <&adc0 3>, + <&adc0 4>, <&adc0 5>, <&adc0 6>, <&adc0 7>, + <&adc1 2>; + }; + + leds { + compatible =3D "gpio-leds"; + + led-0 { + label =3D "bmc_heartbeat_amber"; + gpios =3D <&gpio0 ASPEED_GPIO(P, 7) GPIO_ACTIVE_LOW>; + linux,default-trigger =3D "heartbeat"; + }; + + led-1 { + label =3D "fp_id_amber"; + default-state =3D "off"; + gpios =3D <&gpio0 ASPEED_GPIO(B, 5) GPIO_ACTIVE_HIGH>; + }; + + led-2 { + label =3D "bmc_ready_noled"; + default-state =3D "on"; + gpios =3D <&gpio0 ASPEED_GPIO(B, 3) (GPIO_ACTIVE_HIGH|GPIO_TRANSITORY)>; + }; + + led-3 { + label =3D "power_blue"; + default-state =3D "off"; + gpios =3D <&gpio0 ASPEED_GPIO(P, 4) GPIO_ACTIVE_HIGH>; + }; + }; + + memory@80000000 { + device_type =3D "memory"; + reg =3D <0x80000000 0x80000000>; + }; + + p1v8_bmc_aux: regulator-p1v8-bmc-aux { + compatible =3D "regulator-fixed"; + regulator-name =3D "p1v8_bmc_aux"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-always-on; + }; + + p2v5_bmc_aux: regulator-p2v5-bmc-aux { + compatible =3D "regulator-fixed"; + regulator-name =3D "p2v5_bmc_aux"; + regulator-min-microvolt =3D <2500000>; + regulator-max-microvolt =3D <2500000>; + regulator-always-on; + }; + + p5v_dac_aux: regulator-p5v-bmc-aux { + compatible =3D "regulator-fixed"; + regulator-name =3D "p5v_dac_aux"; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + regulator-always-on; + }; + + spi1_gpio: spi { + compatible =3D "spi-gpio"; + #address-cells =3D <1>; + #size-cells =3D <0>; + + sck-gpios =3D <&gpio0 ASPEED_GPIO(Z, 3) GPIO_ACTIVE_HIGH>; + mosi-gpios =3D <&gpio0 ASPEED_GPIO(Z, 4) GPIO_ACTIVE_HIGH>; + miso-gpios =3D <&gpio0 ASPEED_GPIO(Z, 5) GPIO_ACTIVE_HIGH>; + cs-gpios =3D <&gpio0 ASPEED_GPIO(Z, 0) GPIO_ACTIVE_LOW>; + num-chipselects =3D <1>; + + tpm@0 { + compatible =3D "infineon,slb9670", "tcg,tpm_tis-spi"; + spi-max-frequency =3D <33000000>; + reg =3D <0>; + }; + }; +}; + +&adc0 { + vref-supply =3D <&p1v8_bmc_aux>; + status =3D "okay"; + + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_adc0_default &pinctrl_adc1_default + &pinctrl_adc2_default &pinctrl_adc3_default + &pinctrl_adc4_default &pinctrl_adc5_default + &pinctrl_adc6_default &pinctrl_adc7_default>; +}; + +&adc1 { + vref-supply =3D <&p2v5_bmc_aux>; + status =3D "okay"; + + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_adc8_default &pinctrl_adc10_default>; +}; + +&ehci0 { + status =3D "okay"; +}; + +&ehci1 { + status =3D "okay"; +}; + +&fmc { + status =3D "okay"; + + flash@0 { + status =3D "okay"; + m25p,fast-read; + label =3D "bmc"; + spi-max-frequency =3D <50000000>; + #include "openbmc-flash-layout-128.dtsi" + }; + + flash@1 { + status =3D "okay"; + m25p,fast-read; + label =3D "alt-bmc"; + spi-max-frequency =3D <50000000>; + }; +}; + +&gpio0 { + gpio-line-names =3D + /*A0-A7*/ "","","","","","","","", + /*B0-B7*/ "BATTERY_DETECT","","","BMC_READY_R", + "","FM_ID_LED","","", + /*C0-C7*/ "","","","","","","","", + /*D0-D7*/ "","","","","","","","", + /*E0-E7*/ "","","","","","","","", + /*F0-F7*/ "","","","","","","","", + /*G0-G7*/ "FM_MUX1_SEL_R","","","", + "","","","", + /*H0-H7*/ "","","","","","","","", + /*I0-I7*/ "","","","","","","","", + /*J0-J7*/ "","","","","","","","", + /*K0-K7*/ "","","","","","","","", + /*L0-L7*/ "","","","","","","","", + /*M0-M7*/ "","","","","STBY_POWER_PG_3V3","","","", + /*N0-N7*/ "LED_POSTCODE_0","LED_POSTCODE_1", + "LED_POSTCODE_2","LED_POSTCODE_3", + "LED_POSTCODE_4","LED_POSTCODE_5", + "LED_POSTCODE_6","LED_POSTCODE_7", + /*O0-O7*/ "","","","","","","","debug-card-mux", + /*P0-P7*/ "PWR_BTN_BMC_BUF_N","","ID_RST_BTN_BMC_N","", + "PWR_LED","","","BMC_HEARTBEAT_N", + /*Q0-Q7*/ "","","","","","","","", + /*R0-R7*/ "","","","","","","","", + /*S0-S7*/ "","","SYS_BMC_PWRBTN_R_N","","","","","", + /*T0-T7*/ "","","","","","","","", + /*U0-U7*/ "","","","","","","","", + /*V0-V7*/ "","","","","","","","", + /*W0-W7*/ "","","","","","","","", + /*X0-X7*/ "","","","","","","","", + /*Y0-Y7*/ "","","","","","","","", + /*Z0-Z7*/ "","","","","","","",""; +}; + +&gpio1 { + gpio-line-names =3D + /*18A0-18A7*/ "","","","","","","","", + /*18B0-18B7*/ "","","","", + "FM_BOARD_BMC_REV_ID0","FM_BOARD_BMC_REV_ID1", + "FM_BOARD_BMC_REV_ID2","", + /*18C0-18C7*/ "SPI_BMC_BIOS_ROM_IRQ0_R_N","","","","","","","", + /*18D0-18D7*/ "","","","","","","","", + /*18E0-18E3*/ "FM_BMC_PROT_LS_EN","AC_PWR_BMC_BTN_R_N","",""; +}; + +&i2c0 { + status =3D "okay"; + + i2c-mux@77 { + compatible =3D "nxp,pca9548"; + reg =3D <0x77>; + #address-cells =3D <1>; + #size-cells =3D <0>; + i2c-mux-idle-disconnect; + + i2c0mux0ch0: i2c@0 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <0>; + }; + + i2c0mux0ch1: i2c@1 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <1>; + }; + + i2c0mux0ch2: i2c@2 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <2>; + }; + + i2c0mux0ch3: i2c@3 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <3>; + status =3D "okay"; + }; + + i2c0mux0ch4: i2c@4 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <4>; + status =3D "okay"; + }; + + i2c0mux0ch5: i2c@5 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <5>; + status =3D "okay"; + + eeprom@56 { + compatible =3D "atmel,24c128"; + reg =3D <0x56>; + }; + }; + + i2c0mux0ch6: i2c@6 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <6>; + + eeprom@56 { + compatible =3D "atmel,24c128"; + reg =3D <0x56>; + }; + + fan_io_expander0: gpio@20 { + compatible =3D "nxp,pca9555"; + reg =3D <0x20>; + gpio-controller; + #gpio-cells =3D <2>; + }; + + fan_io_expander1: gpio@21 { + compatible =3D "nxp,pca9555"; + reg =3D <0x21>; + gpio-controller; + #gpio-cells =3D <2>; + }; + + adc@1d { + compatible =3D "ti,adc128d818"; + reg =3D <0x1d>; + ti,mode =3D /bits/ 8 <1>; + }; + + adc@35 { + compatible =3D "maxim,max11617"; + reg =3D <0x35>; + }; + }; + + i2c0mux0ch7: i2c@7 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <7>; + + fanctl0: fan-controller@20 { + compatible =3D "maxim,max31790"; + reg =3D <0x20>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + channel@2 { + reg =3D <2>; + sensor-type =3D "TACH"; + }; + + channel@5 { + reg =3D <5>; + sensor-type =3D "TACH"; + }; + }; + + fanctl1: fan-controller@23 { + compatible =3D "nuvoton,nct7363"; + reg =3D <0x23>; + #pwm-cells =3D <2>; + + fan-0 { + pwms =3D <&fanctl1 10 20000>; + tach-ch =3D /bits/ 8 <0x00>; + }; + + fan-1 { + pwms =3D <&fanctl1 6 20000>; + tach-ch =3D /bits/ 8 <0x01>; + }; + + fan-3 { + pwms =3D <&fanctl1 10 20000>; + tach-ch =3D /bits/ 8 <0x03>; + }; + + fan-9 { + pwms =3D <&fanctl1 0 20000>; + tach-ch =3D /bits/ 8 <0x09>; + }; + + fan-10 { + pwms =3D <&fanctl1 4 20000>; + tach-ch =3D /bits/ 8 <0x0A>; + }; + + fan-11 { + pwms =3D <&fanctl1 0 20000>; + tach-ch =3D /bits/ 8 <0x0B>; + }; + + fan-13 { + pwms =3D <&fanctl1 4 20000>; + tach-ch =3D /bits/ 8 <0x0D>; + }; + + fan-15 { + pwms =3D <&fanctl1 6 20000>; + tach-ch =3D /bits/ 8 <0x0F>; + }; + }; + }; + }; +}; + +&i2c1 { + status =3D "okay"; + + i2c-mux@77 { + compatible =3D "nxp,pca9548"; + reg =3D <0x77>; + #address-cells =3D <1>; + #size-cells =3D <0>; + i2c-mux-idle-disconnect; + + i2c1mux0ch0: i2c@0 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <0>; + status =3D "okay"; + }; + + i2c1mux0ch1: i2c@1 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <1>; + status =3D "okay"; + }; + + i2c1mux0ch2: i2c@2 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <2>; + status =3D "okay"; + }; + + i2c1mux0ch3: i2c@3 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <3>; + status =3D "okay"; + }; + + i2c1mux0ch4: i2c@4 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <4>; + status =3D "okay"; + }; + + i2c1mux0ch5: i2c@5 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <5>; + status =3D "okay"; + }; + + i2c1mux0ch6: i2c@6 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <6>; + status =3D "okay"; + }; + + i2c1mux0ch7: i2c@7 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <7>; + status =3D "okay"; + }; + }; +}; + +&i2c2 { + status =3D "okay"; + bus-frequency =3D <400000>; +}; + +&i2c3 { + status =3D "okay"; + bus-frequency =3D <400000>; + + dac@c { + reg =3D <0x0c>; + compatible =3D "adi,ad5612"; + vcc-supply =3D <&p5v_dac_aux>; + }; + + dac@e { + reg =3D <0x0e>; + compatible =3D "adi,ad5612"; + vcc-supply =3D <&p5v_dac_aux>; + }; + + dac@f { + reg =3D <0x0f>; + compatible =3D "adi,ad5612"; + vcc-supply =3D <&p5v_dac_aux>; + }; + + io_expander6: gpio@23 { + compatible =3D "nxp,pca9555"; + reg =3D <0x23>; + gpio-controller; + #gpio-cells =3D <2>; + interrupt-parent =3D <&io_expander7>; + interrupts =3D <6 IRQ_TYPE_LEVEL_LOW>; + }; + + prsnt_io_expander0: gpio@40 { + compatible =3D "nxp,pca9698"; + reg =3D <0x40>; + gpio-controller; + #gpio-cells =3D <2>; + interrupt-parent =3D <&sgpiom0>; + interrupts =3D <48 IRQ_TYPE_LEVEL_LOW>; + + gpio-line-names =3D + "CAN1_TRAY1_PRSNT", "CAN1_TRAY2_PRSNT", + "CAN1_TRAY3_PRSNT", "CAN1_TRAY4_PRSNT", + "CAN1_TRAY5_PRSNT", "CAN1_TRAY6_PRSNT", + "CAN1_TRAY7_PRSNT", "CAN1_TRAY8_PRSNT", + "CAN1_TRAY9_PRSNT", "CAN1_TRAY10_PRSNT", + "CAN1_TRAY11_PRSNT", "CAN1_TRAY12_PRSNT", + "CAN1_TRAY13_PRSNT", "CAN1_TRAY14_PRSNT", + "CAN1_TRAY15_PRSNT", "CAN1_TRAY16_PRSNT", + "CAN1_TRAY17_PRSNT", "CAN1_TRAY18_PRSNT", + "CAN1_TRAY19_PRSNT", "CAN1_TRAY20_PRSNT", + "CAN1_TRAY21_PRSNT", "CAN1_TRAY22_PRSNT", + "CAN1_TRAY23_PRSNT", "CAN1_TRAY24_PRSNT", + "CAN1_TRAY25_PRSNT", "CAN1_TRAY26_PRSNT", + "CAN1_TRAY27_PRSNT", "CAN1_TRAY28_PRSNT", + "CAN1_TRAY29_PRSNT", "CAN1_TRAY30_PRSNT", + "CAN1_TRAY31_PRSNT", "CAN1_TRAY32_PRSNT", + "", "", + "", "", + "", "", + "", ""; + }; + + prsnt_io_expander1: gpio@41 { + compatible =3D "nxp,pca9698"; + reg =3D <0x41>; + gpio-controller; + #gpio-cells =3D <2>; + interrupt-parent =3D <&sgpiom0>; + interrupts =3D <56 IRQ_TYPE_LEVEL_LOW>; + + gpio-line-names =3D + "CAN2_TRAY1_PRSNT", "CAN2_TRAY2_PRSNT", + "CAN2_TRAY3_PRSNT", "CAN2_TRAY4_PRSNT", + "CAN2_TRAY5_PRSNT", "CAN2_TRAY6_PRSNT", + "CAN2_TRAY7_PRSNT", "CAN2_TRAY8_PRSNT", + "CAN2_TRAY9_PRSNT", "CAN2_TRAY10_PRSNT", + "CAN2_TRAY11_PRSNT", "CAN2_TRAY12_PRSNT", + "CAN2_TRAY13_PRSNT", "CAN2_TRAY14_PRSNT", + "CAN2_TRAY15_PRSNT", "CAN2_TRAY16_PRSNT", + "CAN2_TRAY17_PRSNT", "CAN2_TRAY18_PRSNT", + "CAN2_TRAY19_PRSNT", "CAN2_TRAY20_PRSNT", + "CAN2_TRAY21_PRSNT", "CAN2_TRAY22_PRSNT", + "CAN2_TRAY23_PRSNT", "CAN2_TRAY24_PRSNT", + "CAN2_TRAY25_PRSNT", "CAN2_TRAY26_PRSNT", + "CAN2_TRAY27_PRSNT", "CAN2_TRAY28_PRSNT", + "CAN2_TRAY29_PRSNT", "CAN2_TRAY30_PRSNT", + "CAN2_TRAY31_PRSNT", "CAN2_TRAY32_PRSNT", + "", "", + "", "", + "", "", + "", ""; + }; + + prsnt_io_expander2: gpio@42 { + compatible =3D "nxp,pca9698"; + reg =3D <0x42>; + gpio-controller; + #gpio-cells =3D <2>; + interrupt-parent =3D <&sgpiom0>; + interrupts =3D <64 IRQ_TYPE_LEVEL_LOW>; + + gpio-line-names =3D + "CAN3_TRAY1_PRSNT", "CAN3_TRAY2_PRSNT", + "CAN3_TRAY3_PRSNT", "CAN3_TRAY4_PRSNT", + "CAN3_TRAY5_PRSNT", "CAN3_TRAY6_PRSNT", + "CAN3_TRAY7_PRSNT", "CAN3_TRAY8_PRSNT", + "CAN3_TRAY9_PRSNT", "CAN3_TRAY10_PRSNT", + "CAN3_TRAY11_PRSNT", "CAN3_TRAY12_PRSNT", + "CAN3_TRAY13_PRSNT", "CAN3_TRAY14_PRSNT", + "CAN3_TRAY15_PRSNT", "CAN3_TRAY16_PRSNT", + "CAN3_TRAY17_PRSNT", "CAN3_TRAY18_PRSNT", + "CAN3_TRAY19_PRSNT", "CAN3_TRAY20_PRSNT", + "CAN3_TRAY21_PRSNT", "CAN3_TRAY22_PRSNT", + "CAN3_TRAY23_PRSNT", "CAN3_TRAY24_PRSNT", + "CAN3_TRAY25_PRSNT", "CAN3_TRAY26_PRSNT", + "CAN3_TRAY27_PRSNT", "CAN3_TRAY28_PRSNT", + "CAN3_TRAY29_PRSNT", "CAN3_TRAY30_PRSNT", + "CAN3_TRAY31_PRSNT", "CAN3_TRAY32_PRSNT", + "", "", + "", "", + "", "", + "", ""; + }; + + prsnt_io_expander3: gpio@43 { + compatible =3D "nxp,pca9698"; + reg =3D <0x43>; + gpio-controller; + #gpio-cells =3D <2>; + interrupt-parent =3D <&sgpiom0>; + interrupts =3D <72 IRQ_TYPE_LEVEL_LOW>; + + gpio-line-names =3D + "CAN4_TRAY1_PRSNT", "CAN4_TRAY2_PRSNT", + "CAN4_TRAY3_PRSNT", "CAN4_TRAY4_PRSNT", + "CAN4_TRAY5_PRSNT", "CAN4_TRAY6_PRSNT", + "CAN4_TRAY7_PRSNT", "CAN4_TRAY8_PRSNT", + "CAN4_TRAY9_PRSNT", "CAN4_TRAY10_PRSNT", + "CAN4_TRAY11_PRSNT", "CAN4_TRAY12_PRSNT", + "CAN4_TRAY13_PRSNT", "CAN4_TRAY14_PRSNT", + "CAN4_TRAY15_PRSNT", "CAN4_TRAY16_PRSNT", + "CAN4_TRAY17_PRSNT", "CAN4_TRAY18_PRSNT", + "CAN4_TRAY19_PRSNT", "CAN4_TRAY20_PRSNT", + "CAN4_TRAY21_PRSNT", "CAN4_TRAY22_PRSNT", + "CAN4_TRAY23_PRSNT", "CAN4_TRAY24_PRSNT", + "CAN4_TRAY25_PRSNT", "CAN4_TRAY26_PRSNT", + "CAN4_TRAY27_PRSNT", "CAN4_TRAY28_PRSNT", + "CAN4_TRAY29_PRSNT", "CAN4_TRAY30_PRSNT", + "CAN4_TRAY31_PRSNT", "CAN4_TRAY32_PRSNT", + "", "", + "", "", + "", "", + "", ""; + }; + + prsnt_io_expander4: gpio@44 { + compatible =3D "nxp,pca9698"; + reg =3D <0x44>; + gpio-controller; + #gpio-cells =3D <2>; + interrupt-parent =3D <&sgpiom0>; + interrupts =3D <80 IRQ_TYPE_LEVEL_LOW>; + + gpio-line-names =3D + "CAN5_TRAY1_PRSNT", "CAN5_TRAY2_PRSNT", + "CAN5_TRAY3_PRSNT", "CAN5_TRAY4_PRSNT", + "CAN5_TRAY5_PRSNT", "CAN5_TRAY6_PRSNT", + "CAN5_TRAY7_PRSNT", "CAN5_TRAY8_PRSNT", + "CAN5_TRAY9_PRSNT", "CAN5_TRAY10_PRSNT", + "CAN5_TRAY11_PRSNT", "CAN5_TRAY12_PRSNT", + "CAN5_TRAY13_PRSNT", "CAN5_TRAY14_PRSNT", + "CAN5_TRAY15_PRSNT", "CAN5_TRAY16_PRSNT", + "CAN5_TRAY17_PRSNT", "CAN5_TRAY18_PRSNT", + "CAN5_TRAY19_PRSNT", "CAN5_TRAY20_PRSNT", + "CAN5_TRAY21_PRSNT", "CAN5_TRAY22_PRSNT", + "CAN5_TRAY23_PRSNT", "CAN5_TRAY24_PRSNT", + "CAN5_TRAY25_PRSNT", "CAN5_TRAY26_PRSNT", + "CAN5_TRAY27_PRSNT", "CAN5_TRAY28_PRSNT", + "CAN5_TRAY29_PRSNT", "CAN5_TRAY30_PRSNT", + "CAN5_TRAY31_PRSNT", "CAN5_TRAY32_PRSNT", + "", "", + "", "", + "", "", + "", ""; + }; + + prsnt_io_expander5: gpio@45 { + compatible =3D "nxp,pca9698"; + reg =3D <0x45>; + gpio-controller; + #gpio-cells =3D <2>; + interrupt-parent =3D <&sgpiom0>; + interrupts =3D <88 IRQ_TYPE_LEVEL_LOW>; + + gpio-line-names =3D + "CAN6_TRAY1_PRSNT", "CAN6_TRAY2_PRSNT", + "CAN6_TRAY3_PRSNT", "CAN6_TRAY4_PRSNT", + "CAN6_TRAY5_PRSNT", "CAN6_TRAY6_PRSNT", + "CAN6_TRAY7_PRSNT", "CAN6_TRAY8_PRSNT", + "CAN6_TRAY9_PRSNT", "CAN6_TRAY10_PRSNT", + "CAN6_TRAY11_PRSNT", "CAN6_TRAY12_PRSNT", + "CAN6_TRAY13_PRSNT", "CAN6_TRAY14_PRSNT", + "CAN6_TRAY15_PRSNT", "CAN6_TRAY16_PRSNT", + "CAN6_TRAY17_PRSNT", "CAN6_TRAY18_PRSNT", + "CAN6_TRAY19_PRSNT", "CAN6_TRAY20_PRSNT", + "CAN6_TRAY21_PRSNT", "CAN6_TRAY22_PRSNT", + "CAN6_TRAY23_PRSNT", "CAN6_TRAY24_PRSNT", + "CAN6_TRAY25_PRSNT", "CAN6_TRAY26_PRSNT", + "CAN6_TRAY27_PRSNT", "CAN6_TRAY28_PRSNT", + "CAN6_TRAY29_PRSNT", "CAN6_TRAY30_PRSNT", + "CAN6_TRAY31_PRSNT", "CAN6_TRAY32_PRSNT", + "", "", + "", "", + "", "", + "", ""; + }; + + prsnt_io_expander6: gpio@46 { + compatible =3D "nxp,pca9698"; + reg =3D <0x46>; + gpio-controller; + #gpio-cells =3D <2>; + interrupt-parent =3D <&sgpiom0>; + interrupts =3D <96 IRQ_TYPE_LEVEL_LOW>; + + gpio-line-names =3D + "CAN7_TRAY1_PRSNT", "CAN7_TRAY2_PRSNT", + "CAN7_TRAY3_PRSNT", "CAN7_TRAY4_PRSNT", + "CAN7_TRAY5_PRSNT", "CAN7_TRAY6_PRSNT", + "CAN7_TRAY7_PRSNT", "CAN7_TRAY8_PRSNT", + "CAN7_TRAY9_PRSNT", "CAN7_TRAY10_PRSNT", + "CAN7_TRAY11_PRSNT", "CAN7_TRAY12_PRSNT", + "CAN7_TRAY13_PRSNT", "CAN7_TRAY14_PRSNT", + "CAN7_TRAY15_PRSNT", "CAN7_TRAY16_PRSNT", + "CAN7_TRAY17_PRSNT", "CAN7_TRAY18_PRSNT", + "CAN7_TRAY19_PRSNT", "CAN7_TRAY20_PRSNT", + "CAN7_TRAY21_PRSNT", "CAN7_TRAY22_PRSNT", + "CAN7_TRAY23_PRSNT", "CAN7_TRAY24_PRSNT", + "CAN7_TRAY25_PRSNT", "CAN7_TRAY26_PRSNT", + "CAN7_TRAY27_PRSNT", "CAN7_TRAY28_PRSNT", + "CAN7_TRAY29_PRSNT", "CAN7_TRAY30_PRSNT", + "CAN7_TRAY31_PRSNT", "CAN7_TRAY32_PRSNT", + "", "", + "", "", + "", "", + "", ""; + }; + + prsnt_io_expander7: gpio@47 { + compatible =3D "nxp,pca9698"; + reg =3D <0x47>; + gpio-controller; + #gpio-cells =3D <2>; + interrupt-parent =3D <&sgpiom0>; + interrupts =3D <104 IRQ_TYPE_LEVEL_LOW>; + + gpio-line-names =3D + "CAN8_TRAY1_PRSNT", "CAN8_TRAY2_PRSNT", + "CAN8_TRAY3_PRSNT", "CAN8_TRAY4_PRSNT", + "CAN8_TRAY5_PRSNT", "CAN8_TRAY6_PRSNT", + "CAN8_TRAY7_PRSNT", "CAN8_TRAY8_PRSNT", + "CAN8_TRAY9_PRSNT", "CAN8_TRAY10_PRSNT", + "CAN8_TRAY11_PRSNT", "CAN8_TRAY12_PRSNT", + "CAN8_TRAY13_PRSNT", "CAN8_TRAY14_PRSNT", + "CAN8_TRAY15_PRSNT", "CAN8_TRAY16_PRSNT", + "CAN8_TRAY17_PRSNT", "CAN8_TRAY18_PRSNT", + "CAN8_TRAY19_PRSNT", "CAN8_TRAY20_PRSNT", + "CAN8_TRAY21_PRSNT", "CAN8_TRAY22_PRSNT", + "CAN8_TRAY23_PRSNT", "CAN8_TRAY24_PRSNT", + "CAN8_TRAY25_PRSNT", "CAN8_TRAY26_PRSNT", + "CAN8_TRAY27_PRSNT", "CAN8_TRAY28_PRSNT", + "CAN8_TRAY29_PRSNT", "CAN8_TRAY30_PRSNT", + "CAN8_TRAY31_PRSNT", "CAN8_TRAY32_PRSNT", + "", "", + "", "", + "", "", + "", ""; + }; + + pwrgd_io_expander0: gpio@48 { + compatible =3D "nxp,pca9698"; + reg =3D <0x48>; + gpio-controller; + #gpio-cells =3D <2>; + interrupt-parent =3D <&sgpiom0>; + interrupts =3D <50 IRQ_TYPE_LEVEL_LOW>; + + gpio-line-names =3D + "CAN1_TRAY1_PWRGD", "CAN1_TRAY2_PWRGD", + "CAN1_TRAY3_PWRGD", "CAN1_TRAY4_PWRGD", + "CAN1_TRAY5_PWRGD", "CAN1_TRAY6_PWRGD", + "CAN1_TRAY7_PWRGD", "CAN1_TRAY8_PWRGD", + "CAN1_TRAY9_PWRGD", "CAN1_TRAY10_PWRGD", + "CAN1_TRAY11_PWRGD", "CAN1_TRAY12_PWRGD", + "CAN1_TRAY13_PWRGD", "CAN1_TRAY14_PWRGD", + "CAN1_TRAY15_PWRGD", "CAN1_TRAY16_PWRGD", + "CAN1_TRAY17_PWRGD", "CAN1_TRAY18_PWRGD", + "CAN1_TRAY19_PWRGD", "CAN1_TRAY20_PWRGD", + "CAN1_TRAY21_PWRGD", "CAN1_TRAY22_PWRGD", + "CAN1_TRAY23_PWRGD", "CAN1_TRAY24_PWRGD", + "CAN1_TRAY25_PWRGD", "CAN1_TRAY26_PWRGD", + "CAN1_TRAY27_PWRGD", "CAN1_TRAY28_PWRGD", + "CAN1_TRAY29_PWRGD", "CAN1_TRAY30_PWRGD", + "CAN1_TRAY31_PWRGD", "CAN1_TRAY32_PWRGD", + "", "", + "", "", + "", "", + "", ""; + }; + + pwrgd_io_expander1: gpio@49 { + compatible =3D "nxp,pca9698"; + reg =3D <0x49>; + gpio-controller; + #gpio-cells =3D <2>; + interrupt-parent =3D <&sgpiom0>; + interrupts =3D <58 IRQ_TYPE_LEVEL_LOW>; + + gpio-line-names =3D + "CAN2_TRAY1_PWRGD", "CAN2_TRAY2_PWRGD", + "CAN2_TRAY3_PWRGD", "CAN2_TRAY4_PWRGD", + "CAN2_TRAY5_PWRGD", "CAN2_TRAY6_PWRGD", + "CAN2_TRAY7_PWRGD", "CAN2_TRAY8_PWRGD", + "CAN2_TRAY9_PWRGD", "CAN2_TRAY10_PWRGD", + "CAN2_TRAY11_PWRGD", "CAN2_TRAY12_PWRGD", + "CAN2_TRAY13_PWRGD", "CAN2_TRAY14_PWRGD", + "CAN2_TRAY15_PWRGD", "CAN2_TRAY16_PWRGD", + "CAN2_TRAY17_PWRGD", "CAN2_TRAY18_PWRGD", + "CAN2_TRAY19_PWRGD", "CAN2_TRAY20_PWRGD", + "CAN2_TRAY21_PWRGD", "CAN2_TRAY22_PWRGD", + "CAN2_TRAY23_PWRGD", "CAN2_TRAY24_PWRGD", + "CAN2_TRAY25_PWRGD", "CAN2_TRAY26_PWRGD", + "CAN2_TRAY27_PWRGD", "CAN2_TRAY28_PWRGD", + "CAN2_TRAY29_PWRGD", "CAN2_TRAY30_PWRGD", + "CAN2_TRAY31_PWRGD", "CAN2_TRAY32_PWRGD", + "", "", + "", "", + "", "", + "", ""; + }; + + pwrgd_io_expander2: gpio@4a { + compatible =3D "nxp,pca9698"; + reg =3D <0x4a>; + gpio-controller; + #gpio-cells =3D <2>; + interrupt-parent =3D <&sgpiom0>; + interrupts =3D <66 IRQ_TYPE_LEVEL_LOW>; + + gpio-line-names =3D + "CAN3_TRAY1_PWRGD", "CAN3_TRAY2_PWRGD", + "CAN3_TRAY3_PWRGD", "CAN3_TRAY4_PWRGD", + "CAN3_TRAY5_PWRGD", "CAN3_TRAY6_PWRGD", + "CAN3_TRAY7_PWRGD", "CAN3_TRAY8_PWRGD", + "CAN3_TRAY9_PWRGD", "CAN3_TRAY10_PWRGD", + "CAN3_TRAY11_PWRGD", "CAN3_TRAY12_PWRGD", + "CAN3_TRAY13_PWRGD", "CAN3_TRAY14_PWRGD", + "CAN3_TRAY15_PWRGD", "CAN3_TRAY16_PWRGD", + "CAN3_TRAY17_PWRGD", "CAN3_TRAY18_PWRGD", + "CAN3_TRAY19_PWRGD", "CAN3_TRAY20_PWRGD", + "CAN3_TRAY21_PWRGD", "CAN3_TRAY22_PWRGD", + "CAN3_TRAY23_PWRGD", "CAN3_TRAY24_PWRGD", + "CAN3_TRAY25_PWRGD", "CAN3_TRAY26_PWRGD", + "CAN3_TRAY27_PWRGD", "CAN3_TRAY28_PWRGD", + "CAN3_TRAY29_PWRGD", "CAN3_TRAY30_PWRGD", + "CAN3_TRAY31_PWRGD", "CAN3_TRAY32_PWRGD", + "", "", + "", "", + "", "", + "", ""; + }; + + pwrgd_io_expander3: gpio@4b { + compatible =3D "nxp,pca9698"; + reg =3D <0x4b>; + gpio-controller; + #gpio-cells =3D <2>; + interrupt-parent =3D <&sgpiom0>; + interrupts =3D <74 IRQ_TYPE_LEVEL_LOW>; + + gpio-line-names =3D + "CAN4_TRAY1_PWRGD", "CAN4_TRAY2_PWRGD", + "CAN4_TRAY3_PWRGD", "CAN4_TRAY4_PWRGD", + "CAN4_TRAY5_PWRGD", "CAN4_TRAY6_PWRGD", + "CAN4_TRAY7_PWRGD", "CAN4_TRAY8_PWRGD", + "CAN4_TRAY9_PWRGD", "CAN4_TRAY10_PWRGD", + "CAN4_TRAY11_PWRGD", "CAN4_TRAY12_PWRGD", + "CAN4_TRAY13_PWRGD", "CAN4_TRAY14_PWRGD", + "CAN4_TRAY15_PWRGD", "CAN4_TRAY16_PWRGD", + "CAN4_TRAY17_PWRGD", "CAN4_TRAY18_PWRGD", + "CAN4_TRAY19_PWRGD", "CAN4_TRAY20_PWRGD", + "CAN4_TRAY21_PWRGD", "CAN4_TRAY22_PWRGD", + "CAN4_TRAY23_PWRGD", "CAN4_TRAY24_PWRGD", + "CAN4_TRAY25_PWRGD", "CAN4_TRAY26_PWRGD", + "CAN4_TRAY27_PWRGD", "CAN4_TRAY28_PWRGD", + "CAN4_TRAY29_PWRGD", "CAN4_TRAY30_PWRGD", + "CAN4_TRAY31_PWRGD", "CAN4_TRAY32_PWRGD", + "", "", + "", "", + "", "", + "", ""; + }; + + pwrgd_io_expander4: gpio@4c { + compatible =3D "nxp,pca9698"; + reg =3D <0x4c>; + gpio-controller; + #gpio-cells =3D <2>; + interrupt-parent =3D <&sgpiom0>; + interrupts =3D <82 IRQ_TYPE_LEVEL_LOW>; + + gpio-line-names =3D + "CAN5_TRAY1_PWRGD", "CAN5_TRAY2_PWRGD", + "CAN5_TRAY3_PWRGD", "CAN5_TRAY4_PWRGD", + "CAN5_TRAY5_PWRGD", "CAN5_TRAY6_PWRGD", + "CAN5_TRAY7_PWRGD", "CAN5_TRAY8_PWRGD", + "CAN5_TRAY9_PWRGD", "CAN5_TRAY10_PWRGD", + "CAN5_TRAY11_PWRGD", "CAN5_TRAY12_PWRGD", + "CAN5_TRAY13_PWRGD", "CAN5_TRAY14_PWRGD", + "CAN5_TRAY15_PWRGD", "CAN5_TRAY16_PWRGD", + "CAN5_TRAY17_PWRGD", "CAN5_TRAY18_PWRGD", + "CAN5_TRAY19_PWRGD", "CAN5_TRAY20_PWRGD", + "CAN5_TRAY21_PWRGD", "CAN5_TRAY22_PWRGD", + "CAN5_TRAY23_PWRGD", "CAN5_TRAY24_PWRGD", + "CAN5_TRAY25_PWRGD", "CAN5_TRAY26_PWRGD", + "CAN5_TRAY27_PWRGD", "CAN5_TRAY28_PWRGD", + "CAN5_TRAY29_PWRGD", "CAN5_TRAY30_PWRGD", + "CAN5_TRAY31_PWRGD", "CAN5_TRAY32_PWRGD", + "", "", + "", "", + "", "", + "", ""; + }; + + pwrgd_io_expander5: gpio@4d { + compatible =3D "nxp,pca9698"; + reg =3D <0x4d>; + gpio-controller; + #gpio-cells =3D <2>; + interrupt-parent =3D <&sgpiom0>; + interrupts =3D <90 IRQ_TYPE_LEVEL_LOW>; + + gpio-line-names =3D + "CAN6_TRAY1_PWRGD", "CAN6_TRAY2_PWRGD", + "CAN6_TRAY3_PWRGD", "CAN6_TRAY4_PWRGD", + "CAN6_TRAY5_PWRGD", "CAN6_TRAY6_PWRGD", + "CAN6_TRAY7_PWRGD", "CAN6_TRAY8_PWRGD", + "CAN6_TRAY9_PWRGD", "CAN6_TRAY10_PWRGD", + "CAN6_TRAY11_PWRGD", "CAN6_TRAY12_PWRGD", + "CAN6_TRAY13_PWRGD", "CAN6_TRAY14_PWRGD", + "CAN6_TRAY15_PWRGD", "CAN6_TRAY16_PWRGD", + "CAN6_TRAY17_PWRGD", "CAN6_TRAY18_PWRGD", + "CAN6_TRAY19_PWRGD", "CAN6_TRAY20_PWRGD", + "CAN6_TRAY21_PWRGD", "CAN6_TRAY22_PWRGD", + "CAN6_TRAY23_PWRGD", "CAN6_TRAY24_PWRGD", + "CAN6_TRAY25_PWRGD", "CAN6_TRAY26_PWRGD", + "CAN6_TRAY27_PWRGD", "CAN6_TRAY28_PWRGD", + "CAN6_TRAY29_PWRGD", "CAN6_TRAY30_PWRGD", + "CAN6_TRAY31_PWRGD", "CAN6_TRAY32_PWRGD", + "", "", + "", "", + "", "", + "", ""; + }; + + pwrgd_io_expander6: gpio@4e { + compatible =3D "nxp,pca9698"; + reg =3D <0x4e>; + gpio-controller; + #gpio-cells =3D <2>; + interrupt-parent =3D <&sgpiom0>; + interrupts =3D <98 IRQ_TYPE_LEVEL_LOW>; + + gpio-line-names =3D + "CAN7_TRAY1_PWRGD", "CAN7_TRAY2_PWRGD", + "CAN7_TRAY3_PWRGD", "CAN7_TRAY4_PWRGD", + "CAN7_TRAY5_PWRGD", "CAN7_TRAY6_PWRGD", + "CAN7_TRAY7_PWRGD", "CAN7_TRAY8_PWRGD", + "CAN7_TRAY9_PWRGD", "CAN7_TRAY10_PWRGD", + "CAN7_TRAY11_PWRGD", "CAN7_TRAY12_PWRGD", + "CAN7_TRAY13_PWRGD", "CAN7_TRAY14_PWRGD", + "CAN7_TRAY15_PWRGD", "CAN7_TRAY16_PWRGD", + "CAN7_TRAY17_PWRGD", "CAN7_TRAY18_PWRGD", + "CAN7_TRAY19_PWRGD", "CAN7_TRAY20_PWRGD", + "CAN7_TRAY21_PWRGD", "CAN7_TRAY22_PWRGD", + "CAN7_TRAY23_PWRGD", "CAN7_TRAY24_PWRGD", + "CAN7_TRAY25_PWRGD", "CAN7_TRAY26_PWRGD", + "CAN7_TRAY27_PWRGD", "CAN7_TRAY28_PWRGD", + "CAN7_TRAY29_PWRGD", "CAN7_TRAY30_PWRGD", + "CAN7_TRAY31_PWRGD", "CAN7_TRAY32_PWRGD", + "", "", + "", "", + "", "", + "", ""; + }; + + pwrgd_io_expander7: gpio@4f { + compatible =3D "nxp,pca9698"; + reg =3D <0x4f>; + gpio-controller; + #gpio-cells =3D <2>; + interrupt-parent =3D <&sgpiom0>; + interrupts =3D <106 IRQ_TYPE_LEVEL_LOW>; + + gpio-line-names =3D + "CAN8_TRAY1_PWRGD", "CAN8_TRAY2_PWRGD", + "CAN8_TRAY3_PWRGD", "CAN8_TRAY4_PWRGD", + "CAN8_TRAY5_PWRGD", "CAN8_TRAY6_PWRGD", + "CAN8_TRAY7_PWRGD", "CAN8_TRAY8_PWRGD", + "CAN8_TRAY9_PWRGD", "CAN8_TRAY10_PWRGD", + "CAN8_TRAY11_PWRGD", "CAN8_TRAY12_PWRGD", + "CAN8_TRAY13_PWRGD", "CAN8_TRAY14_PWRGD", + "CAN8_TRAY15_PWRGD", "CAN8_TRAY16_PWRGD", + "CAN8_TRAY17_PWRGD", "CAN8_TRAY18_PWRGD", + "CAN8_TRAY19_PWRGD", "CAN8_TRAY20_PWRGD", + "CAN8_TRAY21_PWRGD", "CAN8_TRAY22_PWRGD", + "CAN8_TRAY23_PWRGD", "CAN8_TRAY24_PWRGD", + "CAN8_TRAY25_PWRGD", "CAN8_TRAY26_PWRGD", + "CAN8_TRAY27_PWRGD", "CAN8_TRAY28_PWRGD", + "CAN8_TRAY29_PWRGD", "CAN8_TRAY30_PWRGD", + "CAN8_TRAY31_PWRGD", "CAN8_TRAY32_PWRGD", + "", "", + "", "", + "", "", + "", ""; + }; + + large_leak_io_expander0: gpio@50 { + compatible =3D "nxp,pca9698"; + reg =3D <0x50>; + gpio-controller; + #gpio-cells =3D <2>; + interrupt-parent =3D <&sgpiom0>; + interrupts =3D <54 IRQ_TYPE_LEVEL_LOW>; + + gpio-line-names =3D + "CAN1_TRAY1_LARGE_LEAK", "CAN1_TRAY2_LARGE_LEAK", + "CAN1_TRAY3_LARGE_LEAK", "CAN1_TRAY4_LARGE_LEAK", + "CAN1_TRAY5_LARGE_LEAK", "CAN1_TRAY6_LARGE_LEAK", + "CAN1_TRAY7_LARGE_LEAK", "CAN1_TRAY8_LARGE_LEAK", + "CAN1_TRAY9_LARGE_LEAK", "CAN1_TRAY10_LARGE_LEAK", + "CAN1_TRAY11_LARGE_LEAK", "CAN1_TRAY12_LARGE_LEAK", + "CAN1_TRAY13_LARGE_LEAK", "CAN1_TRAY14_LARGE_LEAK", + "CAN1_TRAY15_LARGE_LEAK", "CAN1_TRAY16_LARGE_LEAK", + "CAN1_TRAY17_LARGE_LEAK", "CAN1_TRAY18_LARGE_LEAK", + "CAN1_TRAY19_LARGE_LEAK", "CAN1_TRAY20_LARGE_LEAK", + "CAN1_TRAY21_LARGE_LEAK", "CAN1_TRAY22_LARGE_LEAK", + "CAN1_TRAY23_LARGE_LEAK", "CAN1_TRAY24_LARGE_LEAK", + "CAN1_TRAY25_LARGE_LEAK", "CAN1_TRAY26_LARGE_LEAK", + "CAN1_TRAY27_LARGE_LEAK", "CAN1_TRAY28_LARGE_LEAK", + "CAN1_TRAY29_LARGE_LEAK", "CAN1_TRAY30_LARGE_LEAK", + "CAN1_TRAY31_LARGE_LEAK", "CAN1_TRAY32_LARGE_LEAK", + "", "", + "", "", + "", "", + "", ""; + }; + + large_leak_io_expander1: gpio@51 { + compatible =3D "nxp,pca9698"; + reg =3D <0x51>; + gpio-controller; + #gpio-cells =3D <2>; + interrupt-parent =3D <&sgpiom0>; + interrupts =3D <62 IRQ_TYPE_LEVEL_LOW>; + + gpio-line-names =3D + "CAN2_TRAY1_LARGE_LEAK", "CAN2_TRAY2_LARGE_LEAK", + "CAN2_TRAY3_LARGE_LEAK", "CAN2_TRAY4_LARGE_LEAK", + "CAN2_TRAY5_LARGE_LEAK", "CAN2_TRAY6_LARGE_LEAK", + "CAN2_TRAY7_LARGE_LEAK", "CAN2_TRAY8_LARGE_LEAK", + "CAN2_TRAY9_LARGE_LEAK", "CAN2_TRAY10_LARGE_LEAK", + "CAN2_TRAY11_LARGE_LEAK", "CAN2_TRAY12_LARGE_LEAK", + "CAN2_TRAY13_LARGE_LEAK", "CAN2_TRAY14_LARGE_LEAK", + "CAN2_TRAY15_LARGE_LEAK", "CAN2_TRAY16_LARGE_LEAK", + "CAN2_TRAY17_LARGE_LEAK", "CAN2_TRAY18_LARGE_LEAK", + "CAN2_TRAY19_LARGE_LEAK", "CAN2_TRAY20_LARGE_LEAK", + "CAN2_TRAY21_LARGE_LEAK", "CAN2_TRAY22_LARGE_LEAK", + "CAN2_TRAY23_LARGE_LEAK", "CAN2_TRAY24_LARGE_LEAK", + "CAN2_TRAY25_LARGE_LEAK", "CAN2_TRAY26_LARGE_LEAK", + "CAN2_TRAY27_LARGE_LEAK", "CAN2_TRAY28_LARGE_LEAK", + "CAN2_TRAY29_LARGE_LEAK", "CAN2_TRAY30_LARGE_LEAK", + "CAN2_TRAY31_LARGE_LEAK", "CAN2_TRAY32_LARGE_LEAK", + "", "", + "", "", + "", "", + "", ""; + }; + + large_leak_io_expander2: gpio@52 { + compatible =3D "nxp,pca9698"; + reg =3D <0x52>; + gpio-controller; + #gpio-cells =3D <2>; + interrupt-parent =3D <&sgpiom0>; + interrupts =3D <70 IRQ_TYPE_LEVEL_LOW>; + + gpio-line-names =3D + "CAN3_TRAY1_LARGE_LEAK", "CAN3_TRAY2_LARGE_LEAK", + "CAN3_TRAY3_LARGE_LEAK", "CAN3_TRAY4_LARGE_LEAK", + "CAN3_TRAY5_LARGE_LEAK", "CAN3_TRAY6_LARGE_LEAK", + "CAN3_TRAY7_LARGE_LEAK", "CAN3_TRAY8_LARGE_LEAK", + "CAN3_TRAY9_LARGE_LEAK", "CAN3_TRAY10_LARGE_LEAK", + "CAN3_TRAY11_LARGE_LEAK", "CAN3_TRAY12_LARGE_LEAK", + "CAN3_TRAY13_LARGE_LEAK", "CAN3_TRAY14_LARGE_LEAK", + "CAN3_TRAY15_LARGE_LEAK", "CAN3_TRAY16_LARGE_LEAK", + "CAN3_TRAY17_LARGE_LEAK", "CAN3_TRAY18_LARGE_LEAK", + "CAN3_TRAY19_LARGE_LEAK", "CAN3_TRAY20_LARGE_LEAK", + "CAN3_TRAY21_LARGE_LEAK", "CAN3_TRAY22_LARGE_LEAK", + "CAN3_TRAY23_LARGE_LEAK", "CAN3_TRAY24_LARGE_LEAK", + "CAN3_TRAY25_LARGE_LEAK", "CAN3_TRAY26_LARGE_LEAK", + "CAN3_TRAY27_LARGE_LEAK", "CAN3_TRAY28_LARGE_LEAK", + "CAN3_TRAY29_LARGE_LEAK", "CAN3_TRAY30_LARGE_LEAK", + "CAN3_TRAY31_LARGE_LEAK", "CAN3_TRAY32_LARGE_LEAK", + "", "", + "", "", + "", "", + "", ""; + }; + + large_leak_io_expander3: gpio@53 { + compatible =3D "nxp,pca9698"; + reg =3D <0x53>; + gpio-controller; + #gpio-cells =3D <2>; + interrupt-parent =3D <&sgpiom0>; + interrupts =3D <78 IRQ_TYPE_LEVEL_LOW>; + + gpio-line-names =3D + "CAN4_TRAY1_LARGE_LEAK", "CAN4_TRAY2_LARGE_LEAK", + "CAN4_TRAY3_LARGE_LEAK", "CAN4_TRAY4_LARGE_LEAK", + "CAN4_TRAY5_LARGE_LEAK", "CAN4_TRAY6_LARGE_LEAK", + "CAN4_TRAY7_LARGE_LEAK", "CAN4_TRAY8_LARGE_LEAK", + "CAN4_TRAY9_LARGE_LEAK", "CAN4_TRAY10_LARGE_LEAK", + "CAN4_TRAY11_LARGE_LEAK", "CAN4_TRAY12_LARGE_LEAK", + "CAN4_TRAY13_LARGE_LEAK", "CAN4_TRAY14_LARGE_LEAK", + "CAN4_TRAY15_LARGE_LEAK", "CAN4_TRAY16_LARGE_LEAK", + "CAN4_TRAY17_LARGE_LEAK", "CAN4_TRAY18_LARGE_LEAK", + "CAN4_TRAY19_LARGE_LEAK", "CAN4_TRAY20_LARGE_LEAK", + "CAN4_TRAY21_LARGE_LEAK", "CAN4_TRAY22_LARGE_LEAK", + "CAN4_TRAY23_LARGE_LEAK", "CAN4_TRAY24_LARGE_LEAK", + "CAN4_TRAY25_LARGE_LEAK", "CAN4_TRAY26_LARGE_LEAK", + "CAN4_TRAY27_LARGE_LEAK", "CAN4_TRAY28_LARGE_LEAK", + "CAN4_TRAY29_LARGE_LEAK", "CAN4_TRAY30_LARGE_LEAK", + "CAN4_TRAY31_LARGE_LEAK", "CAN4_TRAY32_LARGE_LEAK", + "", "", + "", "", + "", "", + "", ""; + }; + + large_leak_io_expander4: gpio@54 { + compatible =3D "nxp,pca9698"; + reg =3D <0x54>; + gpio-controller; + #gpio-cells =3D <2>; + interrupt-parent =3D <&sgpiom0>; + interrupts =3D <86 IRQ_TYPE_LEVEL_LOW>; + + gpio-line-names =3D + "CAN5_TRAY1_LARGE_LEAK", "CAN5_TRAY2_LARGE_LEAK", + "CAN5_TRAY3_LARGE_LEAK", "CAN5_TRAY4_LARGE_LEAK", + "CAN5_TRAY5_LARGE_LEAK", "CAN5_TRAY6_LARGE_LEAK", + "CAN5_TRAY7_LARGE_LEAK", "CAN5_TRAY8_LARGE_LEAK", + "CAN5_TRAY9_LARGE_LEAK", "CAN5_TRAY10_LARGE_LEAK", + "CAN5_TRAY11_LARGE_LEAK", "CAN5_TRAY12_LARGE_LEAK", + "CAN5_TRAY13_LARGE_LEAK", "CAN5_TRAY14_LARGE_LEAK", + "CAN5_TRAY15_LARGE_LEAK", "CAN5_TRAY16_LARGE_LEAK", + "CAN5_TRAY17_LARGE_LEAK", "CAN5_TRAY18_LARGE_LEAK", + "CAN5_TRAY19_LARGE_LEAK", "CAN5_TRAY20_LARGE_LEAK", + "CAN5_TRAY21_LARGE_LEAK", "CAN5_TRAY22_LARGE_LEAK", + "CAN5_TRAY23_LARGE_LEAK", "CAN5_TRAY24_LARGE_LEAK", + "CAN5_TRAY25_LARGE_LEAK", "CAN5_TRAY26_LARGE_LEAK", + "CAN5_TRAY27_LARGE_LEAK", "CAN5_TRAY28_LARGE_LEAK", + "CAN5_TRAY29_LARGE_LEAK", "CAN5_TRAY30_LARGE_LEAK", + "CAN5_TRAY31_LARGE_LEAK", "CAN5_TRAY32_LARGE_LEAK", + "", "", + "", "", + "", "", + "", ""; + }; + + large_leak_io_expander5: gpio@55 { + compatible =3D "nxp,pca9698"; + reg =3D <0x55>; + gpio-controller; + #gpio-cells =3D <2>; + interrupt-parent =3D <&sgpiom0>; + interrupts =3D <94 IRQ_TYPE_LEVEL_LOW>; + + gpio-line-names =3D + "CAN6_TRAY1_LARGE_LEAK", "CAN6_TRAY2_LARGE_LEAK", + "CAN6_TRAY3_LARGE_LEAK", "CAN6_TRAY4_LARGE_LEAK", + "CAN6_TRAY5_LARGE_LEAK", "CAN6_TRAY6_LARGE_LEAK", + "CAN6_TRAY7_LARGE_LEAK", "CAN6_TRAY8_LARGE_LEAK", + "CAN6_TRAY9_LARGE_LEAK", "CAN6_TRAY10_LARGE_LEAK", + "CAN6_TRAY11_LARGE_LEAK", "CAN6_TRAY12_LARGE_LEAK", + "CAN6_TRAY13_LARGE_LEAK", "CAN6_TRAY14_LARGE_LEAK", + "CAN6_TRAY15_LARGE_LEAK", "CAN6_TRAY16_LARGE_LEAK", + "CAN6_TRAY17_LARGE_LEAK", "CAN6_TRAY18_LARGE_LEAK", + "CAN6_TRAY19_LARGE_LEAK", "CAN6_TRAY20_LARGE_LEAK", + "CAN6_TRAY21_LARGE_LEAK", "CAN6_TRAY22_LARGE_LEAK", + "CAN6_TRAY23_LARGE_LEAK", "CAN6_TRAY24_LARGE_LEAK", + "CAN6_TRAY25_LARGE_LEAK", "CAN6_TRAY26_LARGE_LEAK", + "CAN6_TRAY27_LARGE_LEAK", "CAN6_TRAY28_LARGE_LEAK", + "CAN6_TRAY29_LARGE_LEAK", "CAN6_TRAY30_LARGE_LEAK", + "CAN6_TRAY31_LARGE_LEAK", "CAN6_TRAY32_LARGE_LEAK", + "", "", + "", "", + "", "", + "", ""; + }; + + large_leak_io_expander6: gpio@56 { + compatible =3D "nxp,pca9698"; + reg =3D <0x56>; + gpio-controller; + #gpio-cells =3D <2>; + interrupt-parent =3D <&sgpiom0>; + interrupts =3D <102 IRQ_TYPE_LEVEL_LOW>; + + gpio-line-names =3D + "CAN7_TRAY1_LARGE_LEAK", "CAN7_TRAY2_LARGE_LEAK", + "CAN7_TRAY3_LARGE_LEAK", "CAN7_TRAY4_LARGE_LEAK", + "CAN7_TRAY5_LARGE_LEAK", "CAN7_TRAY6_LARGE_LEAK", + "CAN7_TRAY7_LARGE_LEAK", "CAN7_TRAY8_LARGE_LEAK", + "CAN7_TRAY9_LARGE_LEAK", "CAN7_TRAY10_LARGE_LEAK", + "CAN7_TRAY11_LARGE_LEAK", "CAN7_TRAY12_LARGE_LEAK", + "CAN7_TRAY13_LARGE_LEAK", "CAN7_TRAY14_LARGE_LEAK", + "CAN7_TRAY15_LARGE_LEAK", "CAN7_TRAY16_LARGE_LEAK", + "CAN7_TRAY17_LARGE_LEAK", "CAN7_TRAY18_LARGE_LEAK", + "CAN7_TRAY19_LARGE_LEAK", "CAN7_TRAY20_LARGE_LEAK", + "CAN7_TRAY21_LARGE_LEAK", "CAN7_TRAY22_LARGE_LEAK", + "CAN7_TRAY23_LARGE_LEAK", "CAN7_TRAY24_LARGE_LEAK", + "CAN7_TRAY25_LARGE_LEAK", "CAN7_TRAY26_LARGE_LEAK", + "CAN7_TRAY27_LARGE_LEAK", "CAN7_TRAY28_LARGE_LEAK", + "CAN7_TRAY29_LARGE_LEAK", "CAN7_TRAY30_LARGE_LEAK", + "CAN7_TRAY31_LARGE_LEAK", "CAN7_TRAY32_LARGE_LEAK", + "", "", + "", "", + "", "", + "", ""; + }; + + large_leak_io_expander7: gpio@57 { + compatible =3D "nxp,pca9698"; + reg =3D <0x57>; + gpio-controller; + #gpio-cells =3D <2>; + interrupt-parent =3D <&sgpiom0>; + interrupts =3D <110 IRQ_TYPE_LEVEL_LOW>; + + gpio-line-names =3D + "CAN8_TRAY1_LARGE_LEAK", "CAN8_TRAY2_LARGE_LEAK", + "CAN8_TRAY3_LARGE_LEAK", "CAN8_TRAY4_LARGE_LEAK", + "CAN8_TRAY5_LARGE_LEAK", "CAN8_TRAY6_LARGE_LEAK", + "CAN8_TRAY7_LARGE_LEAK", "CAN8_TRAY8_LARGE_LEAK", + "CAN8_TRAY9_LARGE_LEAK", "CAN8_TRAY10_LARGE_LEAK", + "CAN8_TRAY11_LARGE_LEAK", "CAN8_TRAY12_LARGE_LEAK", + "CAN8_TRAY13_LARGE_LEAK", "CAN8_TRAY14_LARGE_LEAK", + "CAN8_TRAY15_LARGE_LEAK", "CAN8_TRAY16_LARGE_LEAK", + "CAN8_TRAY17_LARGE_LEAK", "CAN8_TRAY18_LARGE_LEAK", + "CAN8_TRAY19_LARGE_LEAK", "CAN8_TRAY20_LARGE_LEAK", + "CAN8_TRAY21_LARGE_LEAK", "CAN8_TRAY22_LARGE_LEAK", + "CAN8_TRAY23_LARGE_LEAK", "CAN8_TRAY24_LARGE_LEAK", + "CAN8_TRAY25_LARGE_LEAK", "CAN8_TRAY26_LARGE_LEAK", + "CAN8_TRAY27_LARGE_LEAK", "CAN8_TRAY28_LARGE_LEAK", + "CAN8_TRAY29_LARGE_LEAK", "CAN8_TRAY30_LARGE_LEAK", + "CAN8_TRAY31_LARGE_LEAK", "CAN8_TRAY32_LARGE_LEAK", + "", "", + "", "", + "", "", + "", ""; + }; + + small_leak_io_expander0: gpio@58 { + compatible =3D "nxp,pca9698"; + reg =3D <0x58>; + gpio-controller; + #gpio-cells =3D <2>; + interrupt-parent =3D <&sgpiom0>; + interrupts =3D <52 IRQ_TYPE_LEVEL_LOW>; + + gpio-line-names =3D + "CAN1_TRAY1_SMALL_LEAK", "CAN1_TRAY2_SMALL_LEAK", + "CAN1_TRAY3_SMALL_LEAK", "CAN1_TRAY4_SMALL_LEAK", + "CAN1_TRAY5_SMALL_LEAK", "CAN1_TRAY6_SMALL_LEAK", + "CAN1_TRAY7_SMALL_LEAK", "CAN1_TRAY8_SMALL_LEAK", + "CAN1_TRAY9_SMALL_LEAK", "CAN1_TRAY10_SMALL_LEAK", + "CAN1_TRAY11_SMALL_LEAK", "CAN1_TRAY12_SMALL_LEAK", + "CAN1_TRAY13_SMALL_LEAK", "CAN1_TRAY14_SMALL_LEAK", + "CAN1_TRAY15_SMALL_LEAK", "CAN1_TRAY16_SMALL_LEAK", + "CAN1_TRAY17_SMALL_LEAK", "CAN1_TRAY18_SMALL_LEAK", + "CAN1_TRAY19_SMALL_LEAK", "CAN1_TRAY20_SMALL_LEAK", + "CAN1_TRAY21_SMALL_LEAK", "CAN1_TRAY22_SMALL_LEAK", + "CAN1_TRAY23_SMALL_LEAK", "CAN1_TRAY24_SMALL_LEAK", + "CAN1_TRAY25_SMALL_LEAK", "CAN1_TRAY26_SMALL_LEAK", + "CAN1_TRAY27_SMALL_LEAK", "CAN1_TRAY28_SMALL_LEAK", + "CAN1_TRAY29_SMALL_LEAK", "CAN1_TRAY30_SMALL_LEAK", + "CAN1_TRAY31_SMALL_LEAK", "CAN1_TRAY32_SMALL_LEAK", + "", "", + "", "", + "", "", + "", ""; + }; + + small_leak_io_expander1: gpio@59 { + compatible =3D "nxp,pca9698"; + reg =3D <0x59>; + gpio-controller; + #gpio-cells =3D <2>; + interrupt-parent =3D <&sgpiom0>; + interrupts =3D <60 IRQ_TYPE_LEVEL_LOW>; + + gpio-line-names =3D + "CAN2_TRAY1_SMALL_LEAK", "CAN2_TRAY2_SMALL_LEAK", + "CAN2_TRAY3_SMALL_LEAK", "CAN2_TRAY4_SMALL_LEAK", + "CAN2_TRAY5_SMALL_LEAK", "CAN2_TRAY6_SMALL_LEAK", + "CAN2_TRAY7_SMALL_LEAK", "CAN2_TRAY8_SMALL_LEAK", + "CAN2_TRAY9_SMALL_LEAK", "CAN2_TRAY10_SMALL_LEAK", + "CAN2_TRAY11_SMALL_LEAK", "CAN2_TRAY12_SMALL_LEAK", + "CAN2_TRAY13_SMALL_LEAK", "CAN2_TRAY14_SMALL_LEAK", + "CAN2_TRAY15_SMALL_LEAK", "CAN2_TRAY16_SMALL_LEAK", + "CAN2_TRAY17_SMALL_LEAK", "CAN2_TRAY18_SMALL_LEAK", + "CAN2_TRAY19_SMALL_LEAK", "CAN2_TRAY20_SMALL_LEAK", + "CAN2_TRAY21_SMALL_LEAK", "CAN2_TRAY22_SMALL_LEAK", + "CAN2_TRAY23_SMALL_LEAK", "CAN2_TRAY24_SMALL_LEAK", + "CAN2_TRAY25_SMALL_LEAK", "CAN2_TRAY26_SMALL_LEAK", + "CAN2_TRAY27_SMALL_LEAK", "CAN2_TRAY28_SMALL_LEAK", + "CAN2_TRAY29_SMALL_LEAK", "CAN2_TRAY30_SMALL_LEAK", + "CAN2_TRAY31_SMALL_LEAK", "CAN2_TRAY32_SMALL_LEAK", + "", "", + "", "", + "", "", + "", ""; + }; + + small_leak_io_expander2: gpio@5a { + compatible =3D "nxp,pca9698"; + reg =3D <0x5a>; + gpio-controller; + #gpio-cells =3D <2>; + interrupt-parent =3D <&sgpiom0>; + interrupts =3D <68 IRQ_TYPE_LEVEL_LOW>; + + gpio-line-names =3D + "CAN3_TRAY1_SMALL_LEAK", "CAN3_TRAY2_SMALL_LEAK", + "CAN3_TRAY3_SMALL_LEAK", "CAN3_TRAY4_SMALL_LEAK", + "CAN3_TRAY5_SMALL_LEAK", "CAN3_TRAY6_SMALL_LEAK", + "CAN3_TRAY7_SMALL_LEAK", "CAN3_TRAY8_SMALL_LEAK", + "CAN3_TRAY9_SMALL_LEAK", "CAN3_TRAY10_SMALL_LEAK", + "CAN3_TRAY11_SMALL_LEAK", "CAN3_TRAY12_SMALL_LEAK", + "CAN3_TRAY13_SMALL_LEAK", "CAN3_TRAY14_SMALL_LEAK", + "CAN3_TRAY15_SMALL_LEAK", "CAN3_TRAY16_SMALL_LEAK", + "CAN3_TRAY17_SMALL_LEAK", "CAN3_TRAY18_SMALL_LEAK", + "CAN3_TRAY19_SMALL_LEAK", "CAN3_TRAY20_SMALL_LEAK", + "CAN3_TRAY21_SMALL_LEAK", "CAN3_TRAY22_SMALL_LEAK", + "CAN3_TRAY23_SMALL_LEAK", "CAN3_TRAY24_SMALL_LEAK", + "CAN3_TRAY25_SMALL_LEAK", "CAN3_TRAY26_SMALL_LEAK", + "CAN3_TRAY27_SMALL_LEAK", "CAN3_TRAY28_SMALL_LEAK", + "CAN3_TRAY29_SMALL_LEAK", "CAN3_TRAY30_SMALL_LEAK", + "CAN3_TRAY31_SMALL_LEAK", "CAN3_TRAY32_SMALL_LEAK", + "", "", + "", "", + "", "", + "", ""; + }; + + small_leak_io_expander3: gpio@5b { + compatible =3D "nxp,pca9698"; + reg =3D <0x5b>; + gpio-controller; + #gpio-cells =3D <2>; + interrupt-parent =3D <&sgpiom0>; + interrupts =3D <76 IRQ_TYPE_LEVEL_LOW>; + + gpio-line-names =3D + "CAN4_TRAY1_SMALL_LEAK", "CAN4_TRAY2_SMALL_LEAK", + "CAN4_TRAY3_SMALL_LEAK", "CAN4_TRAY4_SMALL_LEAK", + "CAN4_TRAY5_SMALL_LEAK", "CAN4_TRAY6_SMALL_LEAK", + "CAN4_TRAY7_SMALL_LEAK", "CAN4_TRAY8_SMALL_LEAK", + "CAN4_TRAY9_SMALL_LEAK", "CAN4_TRAY10_SMALL_LEAK", + "CAN4_TRAY11_SMALL_LEAK", "CAN4_TRAY12_SMALL_LEAK", + "CAN4_TRAY13_SMALL_LEAK", "CAN4_TRAY14_SMALL_LEAK", + "CAN4_TRAY15_SMALL_LEAK", "CAN4_TRAY16_SMALL_LEAK", + "CAN4_TRAY17_SMALL_LEAK", "CAN4_TRAY18_SMALL_LEAK", + "CAN4_TRAY19_SMALL_LEAK", "CAN4_TRAY20_SMALL_LEAK", + "CAN4_TRAY21_SMALL_LEAK", "CAN4_TRAY22_SMALL_LEAK", + "CAN4_TRAY23_SMALL_LEAK", "CAN4_TRAY24_SMALL_LEAK", + "CAN4_TRAY25_SMALL_LEAK", "CAN4_TRAY26_SMALL_LEAK", + "CAN4_TRAY27_SMALL_LEAK", "CAN4_TRAY28_SMALL_LEAK", + "CAN4_TRAY29_SMALL_LEAK", "CAN4_TRAY30_SMALL_LEAK", + "CAN4_TRAY31_SMALL_LEAK", "CAN4_TRAY32_SMALL_LEAK", + "", "", + "", "", + "", "", + "", ""; + }; + + small_leak_io_expander4: gpio@5c { + compatible =3D "nxp,pca9698"; + reg =3D <0x5c>; + gpio-controller; + #gpio-cells =3D <2>; + interrupt-parent =3D <&sgpiom0>; + interrupts =3D <84 IRQ_TYPE_LEVEL_LOW>; + + gpio-line-names =3D + "CAN5_TRAY1_SMALL_LEAK", "CAN5_TRAY2_SMALL_LEAK", + "CAN5_TRAY3_SMALL_LEAK", "CAN5_TRAY4_SMALL_LEAK", + "CAN5_TRAY5_SMALL_LEAK", "CAN5_TRAY6_SMALL_LEAK", + "CAN5_TRAY7_SMALL_LEAK", "CAN5_TRAY8_SMALL_LEAK", + "CAN5_TRAY9_SMALL_LEAK", "CAN5_TRAY10_SMALL_LEAK", + "CAN5_TRAY11_SMALL_LEAK", "CAN5_TRAY12_SMALL_LEAK", + "CAN5_TRAY13_SMALL_LEAK", "CAN5_TRAY14_SMALL_LEAK", + "CAN5_TRAY15_SMALL_LEAK", "CAN5_TRAY16_SMALL_LEAK", + "CAN5_TRAY17_SMALL_LEAK", "CAN5_TRAY18_SMALL_LEAK", + "CAN5_TRAY19_SMALL_LEAK", "CAN5_TRAY20_SMALL_LEAK", + "CAN5_TRAY21_SMALL_LEAK", "CAN5_TRAY22_SMALL_LEAK", + "CAN5_TRAY23_SMALL_LEAK", "CAN5_TRAY24_SMALL_LEAK", + "CAN5_TRAY25_SMALL_LEAK", "CAN5_TRAY26_SMALL_LEAK", + "CAN5_TRAY27_SMALL_LEAK", "CAN5_TRAY28_SMALL_LEAK", + "CAN5_TRAY29_SMALL_LEAK", "CAN5_TRAY30_SMALL_LEAK", + "CAN5_TRAY31_SMALL_LEAK", "CAN5_TRAY32_SMALL_LEAK", + "", "", + "", "", + "", "", + "", ""; + }; + + small_leak_io_expander5: gpio@5d { + compatible =3D "nxp,pca9698"; + reg =3D <0x5d>; + gpio-controller; + #gpio-cells =3D <2>; + interrupt-parent =3D <&sgpiom0>; + interrupts =3D <92 IRQ_TYPE_LEVEL_LOW>; + + gpio-line-names =3D + "CAN6_TRAY1_SMALL_LEAK", "CAN6_TRAY2_SMALL_LEAK", + "CAN6_TRAY3_SMALL_LEAK", "CAN6_TRAY4_SMALL_LEAK", + "CAN6_TRAY5_SMALL_LEAK", "CAN6_TRAY6_SMALL_LEAK", + "CAN6_TRAY7_SMALL_LEAK", "CAN6_TRAY8_SMALL_LEAK", + "CAN6_TRAY9_SMALL_LEAK", "CAN6_TRAY10_SMALL_LEAK", + "CAN6_TRAY11_SMALL_LEAK", "CAN6_TRAY12_SMALL_LEAK", + "CAN6_TRAY13_SMALL_LEAK", "CAN6_TRAY14_SMALL_LEAK", + "CAN6_TRAY15_SMALL_LEAK", "CAN6_TRAY16_SMALL_LEAK", + "CAN6_TRAY17_SMALL_LEAK", "CAN6_TRAY18_SMALL_LEAK", + "CAN6_TRAY19_SMALL_LEAK", "CAN6_TRAY20_SMALL_LEAK", + "CAN6_TRAY21_SMALL_LEAK", "CAN6_TRAY22_SMALL_LEAK", + "CAN6_TRAY23_SMALL_LEAK", "CAN6_TRAY24_SMALL_LEAK", + "CAN6_TRAY25_SMALL_LEAK", "CAN6_TRAY26_SMALL_LEAK", + "CAN6_TRAY27_SMALL_LEAK", "CAN6_TRAY28_SMALL_LEAK", + "CAN6_TRAY29_SMALL_LEAK", "CAN6_TRAY30_SMALL_LEAK", + "CAN6_TRAY31_SMALL_LEAK", "CAN6_TRAY32_SMALL_LEAK", + "", "", + "", "", + "", "", + "", ""; + }; + + small_leak_io_expander6: gpio@5e { + compatible =3D "nxp,pca9698"; + reg =3D <0x5e>; + gpio-controller; + #gpio-cells =3D <2>; + interrupt-parent =3D <&sgpiom0>; + interrupts =3D <100 IRQ_TYPE_LEVEL_LOW>; + + gpio-line-names =3D + "CAN7_TRAY1_SMALL_LEAK", "CAN7_TRAY2_SMALL_LEAK", + "CAN7_TRAY3_SMALL_LEAK", "CAN7_TRAY4_SMALL_LEAK", + "CAN7_TRAY5_SMALL_LEAK", "CAN7_TRAY6_SMALL_LEAK", + "CAN7_TRAY7_SMALL_LEAK", "CAN7_TRAY8_SMALL_LEAK", + "CAN7_TRAY9_SMALL_LEAK", "CAN7_TRAY10_SMALL_LEAK", + "CAN7_TRAY11_SMALL_LEAK", "CAN7_TRAY12_SMALL_LEAK", + "CAN7_TRAY13_SMALL_LEAK", "CAN7_TRAY14_SMALL_LEAK", + "CAN7_TRAY15_SMALL_LEAK", "CAN7_TRAY16_SMALL_LEAK", + "CAN7_TRAY17_SMALL_LEAK", "CAN7_TRAY18_SMALL_LEAK", + "CAN7_TRAY19_SMALL_LEAK", "CAN7_TRAY20_SMALL_LEAK", + "CAN7_TRAY21_SMALL_LEAK", "CAN7_TRAY22_SMALL_LEAK", + "CAN7_TRAY23_SMALL_LEAK", "CAN7_TRAY24_SMALL_LEAK", + "CAN7_TRAY25_SMALL_LEAK", "CAN7_TRAY26_SMALL_LEAK", + "CAN7_TRAY27_SMALL_LEAK", "CAN7_TRAY28_SMALL_LEAK", + "CAN7_TRAY29_SMALL_LEAK", "CAN7_TRAY30_SMALL_LEAK", + "CAN7_TRAY31_SMALL_LEAK", "CAN7_TRAY32_SMALL_LEAK", + "", "", + "", "", + "", "", + "", ""; + }; + + small_leak_io_expander7: gpio@5f { + compatible =3D "nxp,pca9698"; + reg =3D <0x5f>; + gpio-controller; + #gpio-cells =3D <2>; + interrupt-parent =3D <&sgpiom0>; + interrupts =3D <108 IRQ_TYPE_LEVEL_LOW>; + + gpio-line-names =3D + "CAN8_TRAY1_SMALL_LEAK", "CAN8_TRAY2_SMALL_LEAK", + "CAN8_TRAY3_SMALL_LEAK", "CAN8_TRAY4_SMALL_LEAK", + "CAN8_TRAY5_SMALL_LEAK", "CAN8_TRAY6_SMALL_LEAK", + "CAN8_TRAY7_SMALL_LEAK", "CAN8_TRAY8_SMALL_LEAK", + "CAN8_TRAY9_SMALL_LEAK", "CAN8_TRAY10_SMALL_LEAK", + "CAN8_TRAY11_SMALL_LEAK", "CAN8_TRAY12_SMALL_LEAK", + "CAN8_TRAY13_SMALL_LEAK", "CAN8_TRAY14_SMALL_LEAK", + "CAN8_TRAY15_SMALL_LEAK", "CAN8_TRAY16_SMALL_LEAK", + "CAN8_TRAY17_SMALL_LEAK", "CAN8_TRAY18_SMALL_LEAK", + "CAN8_TRAY19_SMALL_LEAK", "CAN8_TRAY20_SMALL_LEAK", + "CAN8_TRAY21_SMALL_LEAK", "CAN8_TRAY22_SMALL_LEAK", + "CAN8_TRAY23_SMALL_LEAK", "CAN8_TRAY24_SMALL_LEAK", + "CAN8_TRAY25_SMALL_LEAK", "CAN8_TRAY26_SMALL_LEAK", + "CAN8_TRAY27_SMALL_LEAK", "CAN8_TRAY28_SMALL_LEAK", + "CAN8_TRAY29_SMALL_LEAK", "CAN8_TRAY30_SMALL_LEAK", + "CAN8_TRAY31_SMALL_LEAK", "CAN8_TRAY32_SMALL_LEAK", + "", "", + "", "", + "", "", + "", ""; + }; +}; + +&i2c4 { + status =3D "okay"; + multi-master; + mctp-controller; + + mctp0: mctp@10 { + compatible =3D "mctp-i2c-controller"; + reg =3D <(0x10 | I2C_OWN_SLAVE_ADDRESS)>; + }; + + i2c-mux@77 { + compatible =3D "nxp,pca9548"; + reg =3D <0x77>; + #address-cells =3D <1>; + #size-cells =3D <0>; + idle-state =3D <6>; + + i2c4mux0ch0: i2c@0 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <0>; + + io_expander3: gpio@23 { + compatible =3D "nxp,pca9555"; + reg =3D <0x23>; + gpio-controller; + #gpio-cells =3D <2>; + interrupt-parent =3D <&io_expander7>; + interrupts =3D <3 IRQ_TYPE_LEVEL_LOW>; + + gpio-line-names =3D + "", "", + "", "RST_I2CRST_MUX1_N", + "RST_I2CRST_MUX2_N", "RST_I2CRST_MUX3_N", + "RST_I2CRST_MUX4_N", "RST_I2CRST_MUX5_N", + "RST_I2CRST_MUX6_N", "RST_I2CRST_MUX7_N", + "RST_I2CRST_MUX8_N", "", + "TRAY30_PWRGD_BUF_R", "TRAY31_PWRGD_BUF_R", + "TRAY32_PWRGD_BUF_R", "TRAY37_PWRGD_BUF_R"; + }; + }; + + i2c4mux0ch1: i2c@1 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <1>; + + temp-sensor@48 { + compatible =3D "ti,tmp75"; + reg =3D <0x48>; + }; + + temp-sensor@4a { + compatible =3D "ti,tmp75"; + reg =3D <0x4a>; + }; + + eeprom@56 { + compatible =3D "atmel,24c128"; + reg =3D <0x56>; + }; + }; + + i2c4mux0ch2: i2c@2 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <2>; + status =3D "okay"; + }; + + i2c4mux0ch3: i2c@3 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <3>; + status =3D "okay"; + }; + + i2c4mux0ch4: i2c@4 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <4>; + status =3D "okay"; + }; + + i2c4mux0ch5: i2c@5 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <5>; + status =3D "okay"; + }; + + i2c4mux0ch6: i2c@6 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <6>; + mctp-controller; + }; + + i2c4mux0ch7: i2c@7 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <7>; + status =3D "okay"; + }; + }; +}; + +&i2c5 { + status =3D "okay"; + + io_expander4: gpio@22 { + compatible =3D "nxp,pca9555"; + reg =3D <0x22>; + gpio-controller; + #gpio-cells =3D <2>; + interrupt-parent =3D <&io_expander7>; + interrupts =3D <4 IRQ_TYPE_LEVEL_LOW>; + + gpio-line-names =3D + "R_COME_THERMTRIP_L", "R_PWRGD_PCH_PWROK", + "", "", + "", "", + "", "", + "", "", + "", "", + "", "TRAY38_PWRGD_BUF_R", + "TRAY39_PWRGD_BUF_R", "TRAY40_PWRGD_BUF_R"; + }; + + io_expander5: gpio@23 { + compatible =3D "nxp,pca9555"; + reg =3D <0x23>; + gpio-controller; + #gpio-cells =3D <2>; + interrupt-parent =3D <&io_expander7>; + interrupts =3D <5 IRQ_TYPE_LEVEL_LOW>; + + gpio-line-names =3D + "PWRGD_P5V_AUX_R2", "", + "PWRGD_P1V5_AUX_R", "PWRGD_P1V05_AUX_R", + "PWRGD_P52V_HSC_PWROK_R", "PWRGD_P24V_AUX_2_R", + "PWRGD_P24V_AUX_R", "PWRGD_P12V_AUX_R2", + "PWRGD_P12V_SCM_R", "P24V_AUX_INA230_ALERT_N_R", + "", "PRSNT_CAN1_MCIO_N", + "PRSNT_CAN2_MCIO_N", "PRSNT_AALC_MCIO_N", + "PRSNT_RACKMON_MCIO_N", "PRSNT_RIO_RACKMON_N"; + }; + + temp-sensor@4f { + compatible =3D "ti,tmp75"; + reg =3D <0x4f>; + }; + + eeprom@54 { + compatible =3D "atmel,24c128"; + reg =3D <0x54>; + }; + + i2c-mux@77 { + compatible =3D "nxp,pca9548"; + reg =3D <0x77>; + #address-cells =3D <1>; + #size-cells =3D <0>; + i2c-mux-idle-disconnect; + + i2c5mux0ch0: i2c@0 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <0>; + }; + + i2c5mux0ch1: i2c@1 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <1>; + }; + + i2c5mux0ch2: i2c@2 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <2>; + + eeprom@56 { + compatible =3D "atmel,24c128"; + reg =3D <0x56>; + }; + }; + + i2c5mux0ch3: i2c@3 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <3>; + + eeprom@56 { + compatible =3D "atmel,24c128"; + reg =3D <0x56>; + }; + }; + + i2c5mux0ch4: i2c@4 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <4>; + + eeprom@56 { + compatible =3D "atmel,24c128"; + reg =3D <0x56>; + }; + }; + + i2c5mux0ch5: i2c@5 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <5>; + + eeprom@56 { + compatible =3D "atmel,24c128"; + reg =3D <0x56>; + }; + }; + + i2c5mux0ch6: i2c@6 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <6>; + + eeprom@56 { + compatible =3D "atmel,24c128"; + reg =3D <0x56>; + }; + }; + + i2c5mux0ch7: i2c@7 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <7>; + + eeprom@56 { + compatible =3D "atmel,24c128"; + reg =3D <0x56>; + }; + }; + }; +}; + +&i2c6 { + status =3D "okay"; + + dac@c { + reg =3D <0x0c>; + compatible =3D "adi,ad5612"; + vcc-supply =3D <&p5v_dac_aux>; + }; + + dac@e { + reg =3D <0x0e>; + compatible =3D "adi,ad5612"; + vcc-supply =3D <&p5v_dac_aux>; + }; + + dac@f { + reg =3D <0x0f>; + compatible =3D "adi,ad5612"; + vcc-supply =3D <&p5v_dac_aux>; + }; + + io_expander0: gpio@20 { + compatible =3D "nxp,pca9555"; + reg =3D <0x20>; + gpio-controller; + #gpio-cells =3D <2>; + interrupt-parent =3D <&io_expander7>; + /* + * Note: io_expander0 and io_expander8 physically share the + * same interrupt line (Wired-OR) to io_expander7 pin 0. + */ + interrupts =3D <0 IRQ_TYPE_LEVEL_LOW>; + + gpio-line-names =3D + "", "", + "", "", + "", "PRSNT_FANBP_0_PWR_N", + "PRSNT_FANBP_0_SIG_N", "PRSNT_POE_PWR_N", + "PRSNT_POE_SIG_N", "", + "PWRGD_P3V3_ISO_POE_BMC_R", "", + "", "", + "DEV_DIS_N", "PCI_DIS_N"; + }; + + io_expander1: gpio@21 { + compatible =3D "nxp,pca9555"; + reg =3D <0x21>; + gpio-controller; + #gpio-cells =3D <2>; + interrupt-parent =3D <&io_expander7>; + interrupts =3D <1 IRQ_TYPE_LEVEL_LOW>; + + gpio-line-names =3D + "PWRGD_CPU_LVC3_BMC", "R_FM_BIOS_POST_CMPLT_BMC", + "", "", + "", "", + "", "", + "", "", + "", "PCIE_SSD1_PRSNT_N", + "", "TRAY23_PWRGD_BUF_R", + "TRAY24_PWRGD_BUF_R", "TRAY29_PWRGD_BUF_R"; + }; + + io_expander2: gpio@22 { + compatible =3D "nxp,pca9555"; + reg =3D <0x22>; + gpio-controller; + #gpio-cells =3D <2>; + interrupt-parent =3D <&io_expander7>; + interrupts =3D <2 IRQ_TYPE_LEVEL_LOW>; + + gpio-line-names =3D + "BOARD_ID_0", "BOARD_ID_1", + "BOARD_ID_2", "BOARD_ID_3", + "SKU_ID_3", "SKU_ID_2", + "SKU_ID_1", "SKU_ID_0", + "", "", + "", "", + "", "", + "", ""; + }; + + io_expander7: gpio@23 { + compatible =3D "nxp,pca9555"; + reg =3D <0x23>; + gpio-controller; + #gpio-cells =3D <2>; + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&sgpiom0>; + interrupts =3D <32 IRQ_TYPE_LEVEL_LOW>; + + gpio-line-names =3D + "IOEXP1_INT_N", "IOEXP2_INT_N", + "IOEXP3_INT_N", "IOEXP4_INT_N", + "IOEXP5_INT_N", "IOEXP6_INT_N", + "IOEXP7_INT_N", "", + "", "", + "", "", + "", "", + "", ""; + }; + + io_expander8: gpio@24 { + compatible =3D "nxp,pca9555"; + reg =3D <0x24>; + gpio-controller; + #gpio-cells =3D <2>; + interrupt-parent =3D <&io_expander7>; + /* Shared interrupt line with io_expander0 */ + interrupts =3D <0 IRQ_TYPE_LEVEL_LOW>; + + gpio-line-names =3D + "PRSNT_MGMT_J54_N", "PRSNT_RACKMON_J47_N", + "PRSNT_MGMT_DEBUG_J53_N", "PRSNT_MINISAS_TOP_J49_N", + "PRSNT_MINISAS_TOP_J50_N", "PRSNT_MINISAS_BOT_J51_N", + "PRSNT_MINISAS_BOT_J52_N", "JTAG_PLD_JTAGEN", + "PU_PLD_CONFIG_N", "", + "", "", + "", "", + "", ""; + }; + + /* + * This EEPROM is physically isolated by a hardware I2C multiplexer. + * By default, it is connected directly to the Marvell switch for + * routine configuration loading. The BMC only routes the EEPROM to + * its own I2C bus for out-of-band firmware updates while the switch + * is held in reset by the CPLD, ensuring no concurrent access. + */ + eeprom@50 { + compatible =3D "atmel,24c64"; + reg =3D <0x50>; + }; + + rtc@51 { + compatible =3D "nxp,pcf8563"; + reg =3D <0x51>; + }; +}; + +&i2c7 { + status =3D "okay"; + bus-frequency =3D <100000>; + multi-master; + aspeed,hw-timeout-ms =3D <1000>; + + ipmb@10 { + compatible =3D "ipmb-dev"; + reg =3D <(0x10 | I2C_OWN_SLAVE_ADDRESS)>; + i2c-protocol; + }; +}; + +&i2c8 { + status =3D "okay"; + + i2c-mux@77 { + compatible =3D "nxp,pca9548"; + reg =3D <0x77>; + #address-cells =3D <1>; + #size-cells =3D <0>; + i2c-mux-idle-disconnect; + + i2c8mux0ch0: i2c@0 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <0>; + status =3D "okay"; + }; + + i2c8mux0ch1: i2c@1 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <1>; + status =3D "okay"; + }; + + i2c8mux0ch2: i2c@2 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <2>; + status =3D "okay"; + }; + + i2c8mux0ch3: i2c@3 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <3>; + status =3D "okay"; + }; + + i2c8mux0ch4: i2c@4 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <4>; + status =3D "okay"; + }; + + i2c8mux0ch5: i2c@5 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <5>; + status =3D "okay"; + }; + + i2c8mux0ch6: i2c@6 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <6>; + status =3D "okay"; + }; + + i2c8mux0ch7: i2c@7 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <7>; + status =3D "okay"; + }; + }; +}; + +&i2c9 { + status =3D "okay"; + + temperature-sensor@4b { + compatible =3D "ti,tmp75"; + reg =3D <0x4b>; + }; + + eeprom@50 { + compatible =3D "atmel,24c128"; + reg =3D <0x50>; + }; + + eeprom@51 { + compatible =3D "atmel,24c128"; + reg =3D <0x51>; + }; + + eeprom@56 { + compatible =3D "atmel,24c64"; + reg =3D <0x56>; + }; +}; + +&i2c10 { + status =3D "okay"; + /* + * This board physically routes two sets of presence signals to support + * both new and older tray designs concurrently. + * The 'legacy_' prefix is used to distinguish these backward-compatible + * PCA9555 expanders from the new CAN-based PCA9698 expanders (e.g., gpio= @40) + * and to prevent device tree label collisions. + */ + legacy_prsnt_io_expander0: gpio@11 { + compatible =3D "nxp,pca9555"; + reg =3D <0x11>; + gpio-controller; + #gpio-cells =3D <2>; + interrupt-parent =3D <&sgpiom0>; + interrupts =3D <40 IRQ_TYPE_LEVEL_LOW>; + + gpio-line-names =3D + "TRAY_PRSNT1_N_BUF_R", "TRAY_PRSNT2_N_BUF_R", + "TRAY_PRSNT3_N_BUF_R", "TRAY_PRSNT4_N_BUF_R", + "TRAY_PRSNT5_N_BUF_R", "TRAY_PRSNT6_N_BUF_R", + "TRAY_PRSNT7_N_BUF_R", "TRAY_PRSNT8_N_BUF_R", + "TRAY_PRSNT9_N_BUF_R", "TRAY_PRSNT10_N_BUF_R", + "TRAY_PRSNT11_N_BUF_R", "TRAY_PRSNT12_N_BUF_R", + "TRAY_PRSNT13_N_BUF_R", "TRAY_PRSNT14_N_BUF_R", + "TRAY_PRSNT15_N_BUF_R", "TRAY_PRSNT16_N_BUF_R"; + }; + + legacy_prsnt_io_expander1: gpio@12 { + compatible =3D "nxp,pca9555"; + reg =3D <0x12>; + gpio-controller; + #gpio-cells =3D <2>; + interrupt-parent =3D <&sgpiom0>; + interrupts =3D <40 IRQ_TYPE_LEVEL_LOW>; + + gpio-line-names =3D + "TRAY_PRSNT17_N_BUF_R", "TRAY_PRSNT18_N_BUF_R", + "TRAY_PRSNT19_N_BUF_R", "TRAY_PRSNT20_N_BUF_R", + "TRAY_PRSNT21_N_BUF_R", "TRAY_PRSNT22_N_BUF_R", + "TRAY_PRSNT23_N_BUF_R", "TRAY_PRSNT24_N_BUF_R", + "TRAY_PRSNT25_N_BUF_R", "TRAY_PRSNT26_N_BUF_R", + "TRAY_PRSNT27_N_BUF_R", "TRAY_PRSNT28_N_BUF_R", + "TRAY_PRSNT29_N_BUF_R", "TRAY_PRSNT30_N_BUF_R", + "TRAY_PRSNT31_N_BUF_R", "TRAY_PRSNT32_N_BUF_R"; + }; + + legacy_prsnt_io_expander2: gpio@13 { + compatible =3D "nxp,pca9555"; + reg =3D <0x13>; + gpio-controller; + #gpio-cells =3D <2>; + interrupt-parent =3D <&sgpiom0>; + interrupts =3D <40 IRQ_TYPE_LEVEL_LOW>; + + gpio-line-names =3D + "TRAY_PRSNT33_N_BUF_R", "TRAY_PRSNT34_N_BUF_R", + "TRAY_PRSNT35_N_BUF_R", "TRAY_PRSNT36_N_BUF_R", + "TRAY_PRSNT37_N_BUF_R", "TRAY_PRSNT38_N_BUF_R", + "TRAY_PRSNT39_N_BUF_R", "TRAY_PRSNT40_N_BUF_R", + "", "", + "", "", + "", "", + "", ""; + }; + + power-monitor@14 { + compatible =3D "infineon,xdp710"; + reg =3D <0x14>; + }; + + legacy_pwrgd_io_expander1: gpio@15 { + compatible =3D "nxp,pca9555"; + reg =3D <0x15>; + gpio-controller; + #gpio-cells =3D <2>; + interrupt-parent =3D <&sgpiom0>; + interrupts =3D <42 IRQ_TYPE_LEVEL_LOW>; + + gpio-line-names =3D + "TRAY_PWRGD17_N_BUF_R", "TRAY_PWRGD18_N_BUF_R", + "TRAY_PWRGD19_N_BUF_R", "TRAY_PWRGD20_N_BUF_R", + "TRAY_PWRGD21_N_BUF_R", "TRAY_PWRGD22_N_BUF_R", + "TRAY_PWRGD23_N_BUF_R", "TRAY_PWRGD24_N_BUF_R", + "TRAY_PWRGD25_N_BUF_R", "TRAY_PWRGD26_N_BUF_R", + "TRAY_PWRGD27_N_BUF_R", "TRAY_PWRGD28_N_BUF_R", + "TRAY_PWRGD29_N_BUF_R", "TRAY_PWRGD30_N_BUF_R", + "TRAY_PWRGD31_N_BUF_R", "TRAY_PWRGD32_N_BUF_R"; + }; + + legacy_pwrgd_io_expander2: gpio@16 { + compatible =3D "nxp,pca9555"; + reg =3D <0x16>; + gpio-controller; + #gpio-cells =3D <2>; + interrupt-parent =3D <&sgpiom0>; + interrupts =3D <42 IRQ_TYPE_LEVEL_LOW>; + + gpio-line-names =3D + "TRAY_PWRGD33_N_BUF_R", "TRAY_PWRGD34_N_BUF_R", + "TRAY_PWRGD35_N_BUF_R", "TRAY_PWRGD36_N_BUF_R", + "TRAY_PWRGD37_N_BUF_R", "TRAY_PWRGD38_N_BUF_R", + "TRAY_PWRGD39_N_BUF_R", "TRAY_PWRGD40_N_BUF_R", + "", "", + "", "", + "", "", + "", ""; + }; + + legacy_leak_io_expander0: gpio@17 { + compatible =3D "nxp,pca9555"; + reg =3D <0x17>; + gpio-controller; + #gpio-cells =3D <2>; + interrupt-parent =3D <&sgpiom0>; + interrupts =3D <46 IRQ_TYPE_LEVEL_LOW>; + + gpio-line-names =3D + "TRAY_LEAK_DETECT1_N_BUF_R", "TRAY_LEAK_DETECT2_N_BUF_R", + "TRAY_LEAK_DETECT3_N_BUF_R", "TRAY_LEAK_DETECT4_N_BUF_R", + "TRAY_LEAK_DETECT5_N_BUF_R", "TRAY_LEAK_DETECT6_N_BUF_R", + "TRAY_LEAK_DETECT7_N_BUF_R", "TRAY_LEAK_DETECT8_N_BUF_R", + "TRAY_LEAK_DETECT9_N_BUF_R", "TRAY_LEAK_DETECT10_N_BUF_R", + "TRAY_LEAK_DETECT11_N_BUF_R", "TRAY_LEAK_DETECT12_N_BUF_R", + "TRAY_LEAK_DETECT13_N_BUF_R", "TRAY_LEAK_DETECT14_N_BUF_R", + "TRAY_LEAK_DETECT15_N_BUF_R", "TRAY_LEAK_DETECT16_N_BUF_R"; + }; + + legacy_leak_io_expander1: gpio@18 { + compatible =3D "nxp,pca9555"; + reg =3D <0x18>; + gpio-controller; + #gpio-cells =3D <2>; + interrupt-parent =3D <&sgpiom0>; + interrupts =3D <46 IRQ_TYPE_LEVEL_LOW>; + + gpio-line-names =3D + "TRAY_LEAK_DETECT17_N_BUF_R", "TRAY_LEAK_DETECT18_N_BUF_R", + "TRAY_LEAK_DETECT19_N_BUF_R", "TRAY_LEAK_DETECT20_N_BUF_R", + "TRAY_LEAK_DETECT21_N_BUF_R", "TRAY_LEAK_DETECT22_N_BUF_R", + "TRAY_LEAK_DETECT23_N_BUF_R", "TRAY_LEAK_DETECT24_N_BUF_R", + "TRAY_LEAK_DETECT25_N_BUF_R", "TRAY_LEAK_DETECT26_N_BUF_R", + "TRAY_LEAK_DETECT27_N_BUF_R", "TRAY_LEAK_DETECT28_N_BUF_R", + "TRAY_LEAK_DETECT29_N_BUF_R", "TRAY_LEAK_DETECT30_N_BUF_R", + "TRAY_LEAK_DETECT31_N_BUF_R", "TRAY_LEAK_DETECT32_N_BUF_R"; + }; + + legacy_leak_io_expander2: gpio@19 { + compatible =3D "nxp,pca9555"; + reg =3D <0x19>; + gpio-controller; + #gpio-cells =3D <2>; + interrupt-parent =3D <&sgpiom0>; + interrupts =3D <46 IRQ_TYPE_LEVEL_LOW>; + + gpio-line-names =3D + "TRAY_LEAK_DETECT33_N_BUF_R", "TRAY_LEAK_DETECT34_N_BUF_R", + "TRAY_LEAK_DETECT35_N_BUF_R", "TRAY_LEAK_DETECT36_N_BUF_R", + "TRAY_LEAK_DETECT37_N_BUF_R", "TRAY_LEAK_DETECT38_N_BUF_R", + "TRAY_LEAK_DETECT39_N_BUF_R", "TRAY_LEAK_DETECT40_N_BUF_R", + "", "", + "", "", + "", "", + "", ""; + }; + + legacy_small_leak_io_expander0: gpio@1a { + compatible =3D "nxp,pca9555"; + reg =3D <0x1a>; + gpio-controller; + #gpio-cells =3D <2>; + interrupt-parent =3D <&sgpiom0>; + interrupts =3D <44 IRQ_TYPE_LEVEL_LOW>; + + gpio-line-names =3D + "TRAY_SMALL_LEAK1_N_BUF_R", "TRAY_SMALL_LEAK2_N_BUF_R", + "TRAY_SMALL_LEAK3_N_BUF_R", "TRAY_SMALL_LEAK4_N_BUF_R", + "TRAY_SMALL_LEAK5_N_BUF_R", "TRAY_SMALL_LEAK6_N_BUF_R", + "TRAY_SMALL_LEAK7_N_BUF_R", "TRAY_SMALL_LEAK8_N_BUF_R", + "TRAY_SMALL_LEAK9_N_BUF_R", "TRAY_SMALL_LEAK10_N_BUF_R", + "TRAY_SMALL_LEAK11_N_BUF_R", "TRAY_SMALL_LEAK12_N_BUF_R", + "TRAY_SMALL_LEAK13_N_BUF_R", "TRAY_SMALL_LEAK14_N_BUF_R", + "TRAY_SMALL_LEAK15_N_BUF_R", "TRAY_SMALL_LEAK16_N_BUF_R"; + }; + + legacy_small_leak_io_expander1: gpio@1b { + compatible =3D "nxp,pca9555"; + reg =3D <0x1b>; + gpio-controller; + #gpio-cells =3D <2>; + interrupt-parent =3D <&sgpiom0>; + interrupts =3D <44 IRQ_TYPE_LEVEL_LOW>; + + gpio-line-names =3D + "TRAY_SMALL_LEAK17_N_BUF_R", "TRAY_SMALL_LEAK18_N_BUF_R", + "TRAY_SMALL_LEAK19_N_BUF_R", "TRAY_SMALL_LEAK20_N_BUF_R", + "TRAY_SMALL_LEAK21_N_BUF_R", "TRAY_SMALL_LEAK22_N_BUF_R", + "TRAY_SMALL_LEAK23_N_BUF_R", "TRAY_SMALL_LEAK24_N_BUF_R", + "TRAY_SMALL_LEAK25_N_BUF_R", "TRAY_SMALL_LEAK26_N_BUF_R", + "TRAY_SMALL_LEAK27_N_BUF_R", "TRAY_SMALL_LEAK28_N_BUF_R", + "TRAY_SMALL_LEAK29_N_BUF_R", "TRAY_SMALL_LEAK30_N_BUF_R", + "TRAY_SMALL_LEAK31_N_BUF_R", "TRAY_SMALL_LEAK32_N_BUF_R"; + }; + + legacy_small_leak_io_expander2: gpio@1c { + compatible =3D "nxp,pca9555"; + reg =3D <0x1c>; + gpio-controller; + #gpio-cells =3D <2>; + interrupt-parent =3D <&sgpiom0>; + interrupts =3D <44 IRQ_TYPE_LEVEL_LOW>; + + gpio-line-names =3D + "TRAY_SMALL_LEAK33_N_BUF_R", "TRAY_SMALL_LEAK34_N_BUF_R", + "TRAY_SMALL_LEAK35_N_BUF_R", "TRAY_SMALL_LEAK36_N_BUF_R", + "TRAY_SMALL_LEAK37_N_BUF_R", "TRAY_SMALL_LEAK38_N_BUF_R", + "TRAY_SMALL_LEAK39_N_BUF_R", "TRAY_SMALL_LEAK40_N_BUF_R", + "", "", + "", "", + "", "", + "", ""; + }; + + legacy_pwrgd_io_expander0: gpio@28 { + compatible =3D "nxp,pca9555"; + reg =3D <0x28>; + gpio-controller; + #gpio-cells =3D <2>; + interrupt-parent =3D <&sgpiom0>; + interrupts =3D <42 IRQ_TYPE_LEVEL_LOW>; + + gpio-line-names =3D + "TRAY_PWRGD1_N_BUF_R", "TRAY_PWRGD2_N_BUF_R", + "TRAY_PWRGD3_N_BUF_R", "TRAY_PWRGD4_N_BUF_R", + "TRAY_PWRGD5_N_BUF_R", "TRAY_PWRGD6_N_BUF_R", + "TRAY_PWRGD7_N_BUF_R", "TRAY_PWRGD8_N_BUF_R", + "TRAY_PWRGD9_N_BUF_R", "TRAY_PWRGD10_N_BUF_R", + "TRAY_PWRGD11_N_BUF_R", "TRAY_PWRGD12_N_BUF_R", + "TRAY_PWRGD13_N_BUF_R", "TRAY_PWRGD14_N_BUF_R", + "TRAY_PWRGD15_N_BUF_R", "TRAY_PWRGD16_N_BUF_R"; + }; + + adc@35 { + compatible =3D "maxim,max11617"; + reg =3D <0x35>; + }; + + power-monitor@44 { + compatible =3D "lltc,ltc4287"; + reg =3D <0x44>; + shunt-resistor-micro-ohms =3D <500>; + }; + + adc@48 { + compatible =3D "ti,ads1015"; + reg =3D <0x48>; + }; + + temp-sensor@4c { + compatible =3D "ti,tmp75"; + reg =3D <0x4c>; + }; + + temp-sensor@4d { + compatible =3D "ti,tmp75"; + reg =3D <0x4d>; + }; + + temp-sensor@4e { + compatible =3D "ti,tmp75"; + reg =3D <0x4e>; + }; + + power-monitor@4f { + compatible =3D "ti,ina230"; + reg =3D <0x4f>; + shunt-resistor =3D <1000>; + }; + + power-monitor@69 { + compatible =3D "pmbus"; + reg =3D <0x69>; + }; + + fpga_io_expander64: gpio@64 { + compatible =3D "nxp,pca9555"; + reg =3D <0x64>; + gpio-controller; + #gpio-cells =3D <2>; + + gpio-line-names =3D + "", "", + "", "", + "", "", + "LEAK_CONFIG0", "LEAK_CONFIG1", + "FPGA_PWRGD_P24V_AUX_R", "FPGA_PWRGD_P24V_AUX_2_R", + "FPGA_PWRGD_P12V_SCM_R", "FPGA_PWRGD_P12V_AUX_R2", + "FPGA_PRSNT_FANBP_0_SIG_R_PLD_N", "FPGA_PRSNT_FANBP_0_PWR_R_PLD_N", + "FPGA_P24V_AUX_INA230_ALERT_N_R", "FPGA_SMB_TMC75_TEMP_ALERT_N_R"; + }; + + fpga_io_expander65: gpio@65 { + compatible =3D "nxp,pca9555"; + reg =3D <0x65>; + gpio-controller; + #gpio-cells =3D <2>; + + gpio-line-names =3D + "FPGA_PCI_DIS_N", "FPGA_DEV_DIS_N", + "FPGA_PWRGD_P3V3_AUX_R", "FPGA_PWRGD_P5V_AUX_R2", + "FPGA_PWRGD_P1V05_AUX_R", "FPGA_P48V_HSC_ALERT_N", + "FPGA_PWRGD_P1V5_AUX_R", "FPGA_PWRGD_P52V_HSC_PWROK_R", + "FPGA_R_COME_THERMTRIP_L", "FPGA_PRSNT_POE_SIG_PLD_N", + "FPGA_PRSNT_POE_PWR_PLD_N", "FPGA_PRSNT_RIO_RACKMON_N", + "FPGA_PRSNT_CAN2_MCIO_N", "FPGA_PRSNT_CAN1_MCIO_N", + "FPGA_PRSNT_RACKMON_MCIO_N", "FPGA_PRSNT_AALC_MCIO_N"; + }; + + fpga_io_expander66: gpio@66 { + compatible =3D "nxp,pca9555"; + reg =3D <0x66>; + gpio-controller; + #gpio-cells =3D <2>; + + gpio-line-names =3D + "FPGA_R_FM_CPU_ERR0_LVT3_L", "FPGA_FPGA_R_FM_PCHHOT_L", + "FPGA_R_FM_BIOS_POST_CMPLT_L", "FPGA_R_FM_SOC_BMC_RST_L", + "FPGA_R_CPU_MSMI_CATERR_N", "FPGA_R_H_MEMHOT_OUT_FET_L", + "FPGA_R_PWRGD_P3V3_STBY", "FPGA_R_PWRGD_PCH_PWROK", + "FPGA_TRAY23_PWRGD_BUF_R", "FPGA_TRAY24_PWRGD_BUF_R", + "FPGA_P24V_AUX_2_INA230_ALERT_N_R", "FPGA_R_IRQ_BMC_PCH_SMI_N", + "FPGA_R_FM_CPU_DIMM_EVENT_COD_BUF", "FPGA_R_BIOS_MSG_DIS_L", + "FPGA_R_ISO_FM_USB_OC0_L", "FPGA_SPI_LVC_EN"; + }; + + fpga_io_expander67: gpio@67 { + compatible =3D "nxp,pca9555"; + reg =3D <0x67>; + gpio-controller; + #gpio-cells =3D <2>; + + gpio-line-names =3D + "FPGA_TRAY29_PWRGD_BUF_R", "FPGA_TRAY30_PWRGD_BUF_R", + "FPGA_TRAY31_PWRGD_BUF_R", "FPGA_TRAY32_PWRGD_BUF_R", + "FPGA_TRAY37_PWRGD_BUF_R", "FPGA_TRAY38_PWRGD_BUF_R", + "FPGA_TRAY39_PWRGD_BUF_R", "FPGA_TRAY40_PWRGD_BUF_R", + "FPGA_ISO_CARRIER_BOARD_PWR_OK", "FPGA_UART_MUX_SEL", + "", "", + "", "", + "", ""; + }; +}; + +&i2c11 { + status =3D "okay"; + + i2c-mux@77 { + compatible =3D "nxp,pca9548"; + reg =3D <0x77>; + #address-cells =3D <1>; + #size-cells =3D <0>; + i2c-mux-idle-disconnect; + + i2c11mux0ch0: i2c@0 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <0>; + status =3D "okay"; + }; + + i2c11mux0ch1: i2c@1 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <1>; + status =3D "okay"; + }; + + i2c11mux0ch2: i2c@2 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <2>; + status =3D "okay"; + }; + + i2c11mux0ch3: i2c@3 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <3>; + status =3D "okay"; + }; + + i2c11mux0ch4: i2c@4 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <4>; + status =3D "okay"; + }; + + i2c11mux0ch5: i2c@5 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <5>; + status =3D "okay"; + }; + + i2c11mux0ch6: i2c@6 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <6>; + status =3D "okay"; + }; + + i2c11mux0ch7: i2c@7 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <7>; + status =3D "okay"; + }; + }; +}; + +&i2c12 { + status =3D "okay"; + bus-frequency =3D <400000>; +}; + +&i2c13 { + status =3D "okay"; + + i2c-mux@77 { + compatible =3D "nxp,pca9548"; + reg =3D <0x77>; + #address-cells =3D <1>; + #size-cells =3D <0>; + i2c-mux-idle-disconnect; + + i2c13mux0ch0: i2c@0 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <0>; + status =3D "okay"; + }; + + i2c13mux0ch1: i2c@1 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <1>; + status =3D "okay"; + }; + + i2c13mux0ch2: i2c@2 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <2>; + status =3D "okay"; + }; + + i2c13mux0ch3: i2c@3 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <3>; + status =3D "okay"; + }; + + i2c13mux0ch4: i2c@4 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <4>; + status =3D "okay"; + }; + + i2c13mux0ch5: i2c@5 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <5>; + status =3D "okay"; + }; + + i2c13mux0ch6: i2c@6 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <6>; + status =3D "okay"; + }; + + i2c13mux0ch7: i2c@7 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <7>; + status =3D "okay"; + }; + }; +}; + +&i2c14 { + status =3D "okay"; +}; + +&i2c15 { + status =3D "okay"; + + i2c-mux@77 { + compatible =3D "nxp,pca9548"; + reg =3D <0x77>; + #address-cells =3D <1>; + #size-cells =3D <0>; + i2c-mux-idle-disconnect; + + i2c15mux0ch0: i2c@0 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <0>; + status =3D "okay"; + }; + + i2c15mux0ch1: i2c@1 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <1>; + status =3D "okay"; + }; + + i2c15mux0ch2: i2c@2 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <2>; + status =3D "okay"; + }; + + i2c15mux0ch3: i2c@3 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <3>; + status =3D "okay"; + }; + + i2c15mux0ch4: i2c@4 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <4>; + status =3D "okay"; + }; + + i2c15mux0ch5: i2c@5 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <5>; + status =3D "okay"; + }; + + i2c15mux0ch6: i2c@6 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <6>; + status =3D "okay"; + }; + + i2c15mux0ch7: i2c@7 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <7>; + status =3D "okay"; + }; + }; +}; + +&kcs3 { + aspeed,lpc-io-reg =3D <0xca2>; + status =3D "okay"; +}; + +&lpc_ctrl { + status =3D "okay"; +}; + +&mac2 { + status =3D "okay"; + phy-mode =3D "rmii"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_rmii3_default>; + + /* + * The Marvell 88E6393X is initialized at boot via EEPROM + * configuration and hardware straps. + * The BMC connects via an RMII fixed-link; link parameters are fixed + * by board design. + */ + fixed-link { + speed =3D <100>; + full-duplex; + }; +}; + +&mac3 { + status =3D "okay"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_rmii4_default>; + use-ncsi; +}; + +&peci0 { + status =3D "okay"; +}; + +&sgpiom0 { + status =3D "okay"; + ngpios =3D <128>; + bus-frequency =3D <100000>; + gpio-line-names =3D + /*"input pin","output pin"*/ + /*A0 - A7*/ + "power-chassis-good","FM_PLD_HEARTBEAT_LVC3_R", + "host0-ready","R_BMC_PTH_RST_BTN_L", + "CONTROL_VT2_SUPPLY1_CLOSE","FM_MDIO_SW_SEL_PLD", + "CONTROL_VT2_SUPPLY2_CLOSE","FM_88E6393X_BIN_UPDATE_EN_N", + "CONTROL_VT2_SUPPLY3_CLOSE","Sequence_TransFR_Alert", + "RETURN_CNTL1_FB","WATER_VALVE1_OPEN", + "RETURN_CNTL2_FB","WATER_VALVE2_OPEN", + "RETURN_CNTL3_FB","WATER_VALVE3_OPEN", + /*B0 - B7*/ + "IT_STOP_PUMP_R_CPLD","WATER_VALVE1_CLOSE", + "IT_STOP_PUMP_SPARE_R_CPLD","WATER_VALVE2_CLOSE", + "IT_STOP_PUMP_2_R_CPLD","WATER_VALVE3_CLOSE", + "IT_STOP_PUMP_SPARE_2_R_CPLD","REPORT_VT2_SUPPLY1_CLOSE", + "RPU_2_READY_SPARE_PLD_R","REPORT_VT2_SUPPLY2_CLOSE", + "RPU_2_READY_PLD_R","REPORT_VT2_SUPPLY3_CLOSE", + "RPU_READY_SPARE_PLD_R","PCIE_SSD1_PRSNT_N", + "RPU_READY_PLD_R","", + /*C0 - C7*/ + "IOEXP8_INT_N","", + "SUPPLY_CNTL1_FB","", + "SUPPLY_CNTL2_FB","", + "SUPPLY_CNTL3_FB","", + "PRSNT_TRAY1_TO_40_R_BUF_N","", + "PWRGD_TRAY1_TO_40_R_BUF","", + "SMALL_LEAK_TRAY1_TO_40_R_BUF_N","", + "LEAK_DETECT_TRAY1_TO_40_R_BUF_N","", + /*D0 - D7*/ + "PRSNT_CANBUSP1_TRAY1_TO_32_N","", + "PWRGD_CANBUSP1_TRAY1_TO_32_PWROK","", + "SMALL_LEAK_CANBUSP1_TRAY1_TO_32_N","", + "LEAK_DETECT_CANBUSP1_TRAY1_TO_32_N","", + "PRSNT_CANBUSP2_TRAY1_TO_32_N","", + "PWRGD_CANBUSP2_TRAY1_TO_32_PWROK","", + "SMALL_LEAK_CANBUSP2_TRAY1_TO_32_N","", + "LEAK_DETECT_CANBUSP2_TRAY1_TO_32_N","", + /*E0 - E7*/ + "PRSNT_CANBUSP3_TRAY1_TO_32_N","", + "PWRGD_CANBUSP3_TRAY1_TO_32_PWROK","", + "SMALL_LEAK_CANBUSP3_TRAY1_TO_32_N","", + "LEAK_DETECT_CANBUSP3_TRAY1_TO_32_N","", + "PRSNT_CANBUSP4_TRAY1_TO_32_N","", + "PWRGD_CANBUSP4_TRAY1_TO_32_PWROK","", + "SMALL_LEAK_CANBUSP4_TRAY1_TO_32_N","", + "LEAK_DETECT_CANBUSP4_TRAY1_TO_32_N","", + /*F0 - F7*/ + "PRSNT_CANBUSP5_TRAY1_TO_32_N","", + "PWRGD_CANBUSP5_TRAY1_TO_32_PWROK","", + "SMALL_LEAK_CANBUSP5_TRAY1_TO_32_N","", + "LEAK_DETECT_CANBUSP5_TRAY1_TO_32_N","", + "PRSNT_CANBUSP6_TRAY1_TO_32_N","", + "PWRGD_CANBUSP6_TRAY1_TO_32_PWROK","", + "SMALL_LEAK_CANBUSP6_TRAY1_TO_32_N","", + "LEAK_DETECT_CANBUSP6_TRAY1_TO_32_N","", + /*G0 - G7*/ + "PRSNT_CANBUSP7_TRAY1_TO_32_N","", + "PWRGD_CANBUSP7_TRAY1_TO_32_PWROK","", + "SMALL_LEAK_CANBUSP7_TRAY1_TO_32_N","", + "LEAK_DETECT_CANBUSP7_TRAY1_TO_32_N","", + "PRSNT_CANBUSP8_TRAY1_TO_32_N","", + "PWRGD_CANBUSP8_TRAY1_TO_32_PWROK","", + "SMALL_LEAK_CANBUSP8_TRAY1_TO_32_N","", + "LEAK_DETECT_CANBUSP8_TRAY1_TO_32_N","", + /*H0 - H7*/ + "CHASSIS0_LEAK_Q_N_R","", + "CHASSIS1_LEAK_Q_N_R","", + "CHASSIS2_LEAK_Q_N_R","", + "CHASSIS3_LEAK_Q_N_R","", + "CHASSIS4_LEAK_Q_N_R","", + "CHASSIS5_LEAK_Q_N_R","", + "CHASSIS6_LEAK_Q_N_R","", + "CHASSIS7_LEAK_Q_N_R","", + /*I0 - I7*/ + "CHASSIS8_LEAK_Q_N_R","", + "CHASSIS9_LEAK_Q_N_R","", + "CHASSIS10_LEAK_Q_N_R","", + "CHASSIS11_LEAK_Q_N_R","", + "AALC_RPU_READY","", + "","", + "","", + "","", + /*J0 - J7*/ + "","", + "","", + "","", + "","", + "","", + "","", + "","", + "","", + /*K0 - K7*/ + "","", + "","", + "","", + "","", + "","", + "","", + "","", + "","", + /*L0 - L7*/ + "IT_GEAR_RPU_2_LINK_PRSNT_SPARE_N_R","", + "IT_GEAR_RPU_2_LINK_PRSNT_N_R","", + "IT_GEAR_RPU_LINK_PRSNT_SPARE_N_R","", + "IT_GEAR_RPU_LINK_PRSNT_N_R","", + "","", + "","", + "","", + "","", + /*M0 - M7*/ + "","", + "","", + "PRSNT_SENSOR_N","", + "PRSNT3_VT2_PLD_N","", + "PRSNT2_VT2_PLD_N","", + "PRSNT1_VT2_PLD_N","", + "PRSNT3_RETURN_PLD_N","", + "PRSNT2_RETURN_PLD_N","", + /*N0 - N7*/ + "PRSNT1_RETURN_PLD_N","", + "PRSNT3_SUPPLY_PLD_N","", + "PRSNT2_SUPPLY_PLD_N","", + "PRSNT1_SUPPLY_PLD_N","", + "PRSNT_LEAK11_SENSOR_R_PLD_N","", + "PRSNT_LEAK10_SENSOR_R_PLD_N","", + "PRSNT_LEAK9_SENSOR_R_PLD_N","", + "PRSNT_LEAK8_SENSOR_R_PLD_N","", + /*O0 - O7*/ + "PRSNT_LEAK7_SENSOR_R_PLD_N","", + "PRSNT_LEAK6_SENSOR_R_PLD_N","", + "PRSNT_LEAK5_SENSOR_R_PLD_N","", + "PRSNT_LEAK4_SENSOR_R_PLD_N","", + "PRSNT_LEAK3_SENSOR_R_PLD_N","", + "PRSNT_LEAK2_SENSOR_R_PLD_N","", + "PRSNT_LEAK1_SENSOR_R_PLD_N","", + "PRSNT_LEAK0_SENSOR_R_PLD_N","", + /*P0 - P7*/ + "","", + "","", + "","", + "","", + "","SGPIO_REG_VALID_0", + "","SGPIO_REG_VALID_1", + "","SGPIO_REG_VALID_2", + "","SGPIO_REG_VALID_3"; +}; + +&spi2 { + status =3D "okay"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_spi2_default &pinctrl_spi2cs1_default>; + + flash@0 { + status =3D "okay"; + m25p,fast-read; + label =3D "pnor"; + spi-max-frequency =3D <12000000>; + spi-tx-bus-width =3D <2>; + spi-rx-bus-width =3D <2>; + }; + + flash@1 { + status =3D "okay"; + m25p,fast-read; + label =3D "e810"; + spi-max-frequency =3D <12000000>; + spi-tx-bus-width =3D <2>; + spi-rx-bus-width =3D <2>; + }; +}; + +&uart3 { + status =3D "okay"; +}; + +&wdt1 { + status =3D "okay"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_wdtrst1_default>; + aspeed,reset-type =3D "soc"; + aspeed,external-signal; + aspeed,ext-push-pull; + aspeed,ext-active-high; + aspeed,ext-pulse-duration =3D <256>; +}; + --=20 2.34.1