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Sat, 13 Jun 2026 02:39:50 -0700 (PDT) From: Charan Pedumuru Date: Sat, 13 Jun 2026 09:39:39 +0000 Subject: [PATCH v4 1/2] arm: dts: st: align node patterns with established convention Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260613-st-mmc-v4-1-b3c385617c16@gmail.com> References: <20260613-st-mmc-v4-0-b3c385617c16@gmail.com> In-Reply-To: <20260613-st-mmc-v4-0-b3c385617c16@gmail.com> To: Ulf Hansson , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Peter Griffin , Patrice Chotard Cc: linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Charan Pedumuru X-Mailer: b4 0.15.2 Update ST MMC DTS node patterns to match established convention. Signed-off-by: Charan Pedumuru --- arch/arm/boot/dts/st/stih407-family.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/st/stih407-family.dtsi b/arch/arm/boot/dts/s= t/stih407-family.dtsi index 3e6a0542e3ae..08acba209c56 100644 --- a/arch/arm/boot/dts/st/stih407-family.dtsi +++ b/arch/arm/boot/dts/st/stih407-family.dtsi @@ -596,7 +596,7 @@ spi@9542000 { status =3D "disabled"; }; =20 - mmc0: sdhci@9060000 { + mmc0: mmc@9060000 { compatible =3D "st,sdhci-stih407", "st,sdhci"; status =3D "disabled"; reg =3D <0x09060000 0x7ff>, <0x9061008 0x20>; @@ -611,7 +611,7 @@ mmc0: sdhci@9060000 { bus-width =3D <8>; }; =20 - mmc1: sdhci@9080000 { + mmc1: mmc@9080000 { compatible =3D "st,sdhci-stih407", "st,sdhci"; status =3D "disabled"; reg =3D <0x09080000 0x7ff>; --=20 2.54.0 From nobody Sun Jun 14 04:09:40 2026 Received: from mail-pl1-f179.google.com (mail-pl1-f179.google.com [209.85.214.179]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id ECA701D5160 for ; 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Sat, 13 Jun 2026 02:39:55 -0700 (PDT) Received: from Black-Pearl.localdomain ([49.207.61.84]) by smtp.googlemail.com with ESMTPSA id 41be03b00d2f7-c8661a67603sm4155826a12.0.2026.06.13.02.39.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 13 Jun 2026 02:39:54 -0700 (PDT) From: Charan Pedumuru Date: Sat, 13 Jun 2026 09:39:40 +0000 Subject: [PATCH v4 2/2] dt-bindings: mmc: st,sdhci: Convert to DT schema Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260613-st-mmc-v4-2-b3c385617c16@gmail.com> References: <20260613-st-mmc-v4-0-b3c385617c16@gmail.com> In-Reply-To: <20260613-st-mmc-v4-0-b3c385617c16@gmail.com> To: Ulf Hansson , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Peter Griffin , Patrice Chotard Cc: linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Charan Pedumuru X-Mailer: b4 0.15.2 Convert STMicroelectronics sdhci-st MMC/SD controller binding to DT schema. The 'icn' clock and 'top-mmc-delay' register region are optional in the text binding and remain so in the YAML schema. minItems: 1 is set on clock-names and reg-names to match the flexibility of their paired clocks and reg properties, preserving compatibility with existing in-tree DTS nodes that provide only a single clock or register entry. Signed-off-by: Charan Pedumuru --- Documentation/devicetree/bindings/mmc/sdhci-st.txt | 110 -----------------= ---- .../devicetree/bindings/mmc/st,sdhci.yaml | 92 +++++++++++++++++ 2 files changed, 92 insertions(+), 110 deletions(-) diff --git a/Documentation/devicetree/bindings/mmc/sdhci-st.txt b/Documenta= tion/devicetree/bindings/mmc/sdhci-st.txt deleted file mode 100644 index ccf82b4ee838..000000000000 --- a/Documentation/devicetree/bindings/mmc/sdhci-st.txt +++ /dev/null @@ -1,110 +0,0 @@ -* STMicroelectronics sdhci-st MMC/SD controller - -This file documents the differences between the core properties in -Documentation/devicetree/bindings/mmc/mmc.txt and the properties -used by the sdhci-st driver. - -Required properties: -- compatible: Must be "st,sdhci" and it can be compatible to "st,sdhci-st= ih407" - to set the internal glue logic used for configuring the MMC - subsystem (mmcss) inside the FlashSS (available in STiH407 SoC - family). - -- clock-names: Should be "mmc" and "icn". (NB: The latter is not compuls= ory) - See: Documentation/devicetree/bindings/resource-names.txt -- clocks: Phandle to the clock. - See: Documentation/devicetree/bindings/clock/clock-bindings.txt - -- interrupts: One mmc interrupt should be described here. -- interrupt-names: Should be "mmcirq". - -- pinctrl-names: A pinctrl state names "default" must be defined. -- pinctrl-0: Phandle referencing pin configuration of the sd/emmc control= ler. - See: Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt - -- reg: This must provide the host controller base address and it can also - contain the FlashSS Top register for TX/RX delay used by the driver - to configure DLL inside the flashSS, if so reg-names must also be - specified. - -Optional properties: -- reg-names: Should be "mmc" and "top-mmc-delay". "top-mmc-delay" is opti= onal - for eMMC on stih407 family silicon to configure DLL inside FlashSS. - -- non-removable: Non-removable slot. Also used for configuring mmcss in ST= iH407 SoC - family. - See: Documentation/devicetree/bindings/mmc/mmc.txt. - -- bus-width: Number of data lines. - See: Documentation/devicetree/bindings/mmc/mmc.txt. - -- max-frequency: Can be 200MHz, 100MHz or 50MHz (default) and used for - configuring the CCONFIG3 in the mmcss. - See: Documentation/devicetree/bindings/mmc/mmc.txt. - -- resets: Phandle and reset specifier pair to softreset line of HC IP. - See: Documentation/devicetree/bindings/reset/reset.txt - -- vqmmc-supply: Phandle to the regulator dt node, mentioned as the vcc/vdd - supply in eMMC/SD specs. - -- sd-uhs-sdr50: To enable the SDR50 in the mmcss. - See: Documentation/devicetree/bindings/mmc/mmc.txt. - -- sd-uhs-sdr104: To enable the SDR104 in the mmcss. - See: Documentation/devicetree/bindings/mmc/mmc.txt. - -- sd-uhs-ddr50: To enable the DDR50 in the mmcss. - See: Documentation/devicetree/bindings/mmc/mmc.txt. - -Example: - -/* Example stih416e eMMC configuration */ - -mmc0: sdhci@fe81e000 { - compatible =3D "st,sdhci"; - reg =3D <0xfe81e000 0x1000>; - interrupts =3D ; - interrupt-names =3D "mmcirq"; - pinctrl-names =3D "default"; - pinctrl-0 =3D <&pinctrl_mmc0>; - clock-names =3D "mmc"; - clocks =3D <&clk_s_a1_ls 1>; - bus-width =3D <8> - -/* Example SD stih407 family configuration */ - -mmc1: sdhci@9080000 { - compatible =3D "st,sdhci-stih407", "st,sdhci"; - reg =3D <0x09080000 0x7ff>; - reg-names =3D "mmc"; - interrupts =3D ; - interrupt-names =3D "mmcirq"; - pinctrl-names =3D "default"; - pinctrl-0 =3D <&pinctrl_sd1>; - clock-names =3D "mmc"; - clocks =3D <&clk_s_c0_flexgen CLK_MMC_1>; - resets =3D <&softreset STIH407_MMC1_SOFTRESET>; - bus-width =3D <4>; -}; - -/* Example eMMC stih407 family configuration */ - -mmc0: sdhci@9060000 { - compatible =3D "st,sdhci-stih407", "st,sdhci"; - reg =3D <0x09060000 0x7ff>, <0x9061008 0x20>; - reg-names =3D "mmc", "top-mmc-delay"; - interrupts =3D ; - interrupt-names =3D "mmcirq"; - pinctrl-names =3D "default"; - pinctrl-0 =3D <&pinctrl_mmc0>; - clock-names =3D "mmc"; - clocks =3D <&clk_s_c0_flexgen CLK_MMC_0>; - vqmmc-supply =3D <&vmmc_reg>; - max-frequency =3D <200000000>; - bus-width =3D <8>; - non-removable; - sd-uhs-sdr50; - sd-uhs-sdr104; - sd-uhs-ddr50; -}; diff --git a/Documentation/devicetree/bindings/mmc/st,sdhci.yaml b/Document= ation/devicetree/bindings/mmc/st,sdhci.yaml new file mode 100644 index 000000000000..0bf4fc3ca699 --- /dev/null +++ b/Documentation/devicetree/bindings/mmc/st,sdhci.yaml @@ -0,0 +1,92 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mmc/st,sdhci.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: STMicroelectronics SDHCI-ST MMC/SD Controller + +maintainers: + - Peter Griffin + +description: + The STMicroelectronics SDHCI-ST MMC/SD host controller is compliant with + the SD Host Controller Interface (SDHCI) specification and is used to + interface with MMC, SD and SDIO cards. The ST SDHCI controller extends t= he + standard SDHCI capabilities with platform-specific configurations such as + additional register regions, clock inputs, and delay control mechanisms + required for signal timing adjustments to support high-speed modes across + different ST SoCs. + +allOf: + - $ref: mmc-controller.yaml# + +properties: + compatible: + oneOf: + - const: st,sdhci + - items: + - const: st,sdhci-stih407 + - const: st,sdhci + + reg: + minItems: 1 + items: + - description: MMC controller base registers + - description: FlashSS Top registers for TX/RX DLL delay configurati= on + + reg-names: + minItems: 1 + items: + - const: mmc + - const: top-mmc-delay + + clocks: + minItems: 1 + items: + - description: Clock for the MMC controller + - description: Interconnect (ICN) clock + + clock-names: + minItems: 1 + items: + - const: mmc + - const: icn + + interrupts: + maxItems: 1 + + interrupt-names: + const: mmcirq + + resets: + maxItems: 1 + +required: + - compatible + - reg + - clocks + - clock-names + - interrupts + - interrupt-names + +unevaluatedProperties: false + +examples: + - | + #include + #include + mmc@9060000 { + compatible =3D "st,sdhci-stih407", "st,sdhci"; + reg =3D <0x09060000 0x7ff>, <0x9061008 0x20>; + reg-names =3D "mmc", "top-mmc-delay"; + interrupts =3D ; + interrupt-names =3D "mmcirq"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_mmc0>; + clock-names =3D "mmc", "icn"; + clocks =3D <&clk_s_c0_flexgen CLK_MMC_0>, + <&clk_s_c0_flexgen CLK_RX_ICN_HVA>; + bus-width =3D <8>; + }; +... --=20 2.54.0