From nobody Sun Jun 14 08:21:01 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4DCCB38F24C; Fri, 12 Jun 2026 16:05:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781280308; cv=none; b=fXnGQtsgsb7V6FC/DMg8jM26neOS2ZwULBuDTVMtYakWOfARrItLYzoYPHRm6LodSvWradVQCSrbEgK/vJU0KtNoTJmBayV5nbFu2mosonQ6aUxPOx9mb13nz+aBvhnv7+t+WweE4iX4FUKJrUyBQtuKDiyXP+M2nyYkVIqsB3o= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781280308; c=relaxed/simple; bh=lWXzycPINz0RonL6meOffzGV1+VeD/30TlNu7FlSvlA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Ij8NP0CEtAawUrqXRN3hFrpelKiCeydUOnS8tO038fjrlA5JzHR/e5sERCI1FCcEaxQDXWh1ZnFkH6EDnhO8eZKz9NyEoWP55sQSm2kwU19o6i4K7IItZqL6aWbaht8C97+XGXVV/LmyVCRnwNd5KIbLU6AGN5TuXFNWdBjjW2c= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=LH1Nna6O; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="LH1Nna6O" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 59A3E1F00A3A; Fri, 12 Jun 2026 16:05:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1781280306; bh=DIDYPU6qwnHsyHrpK0bYFeIPHZct1iYHVzrb+y87TkU=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=LH1Nna6O8+pNueDLog1TAMD3dkIPaigLFGh38czFVGhpWJwcjXCBZDEmL77e8OGRt oJ/HpUpHrUwiBkwPR034MsTpn7JAeT8lmPsRGhXsRx84YEpbOwyve4HowkJ8n85Bvy uIAJopOXNZt7jfHt5+GduOCEMro+g1M+KgpjR0joJDkh079Iw/MsK6dWBCO53t4Rsp IR5x2tcwO5f/J08V3yYJ1Mhz0+WTBxg127iV+Bhf2R3ISXrzA2vgoctX5fy92zcL4W JxzbtmoUPF8qaRrnZgl6qKSzAcshSDfsFEj8NbwUNCs2i/9GY6V4nLHzrm1WAO9LH0 H4tvMLwry0e8Q== From: Claudiu Beznea To: wsa+renesas@sang-engineering.com, tommaso.merciai.xr@bp.renesas.com, alexandre.belloni@bootlin.com, Frank.Li@nxp.com, p.zabel@pengutronix.de Cc: claudiu.beznea@kernel.org, linux-i3c@lists.infradead.org, linux-kernel@vger.kernel.org, claudiu.beznea@tuxon.dev, Claudiu Beznea , stable@vger.kernel.org Subject: [PATCH v4 01/16] i3c: renesas: Check that the transfer is valid before accessing it Date: Fri, 12 Jun 2026 19:04:43 +0300 Message-ID: <20260612160458.3102106-2-claudiu.beznea@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260612160458.3102106-1-claudiu.beznea@kernel.org> References: <20260612160458.3102106-1-claudiu.beznea@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Claudiu Beznea The Renesas I3C driver uses an asynchronous model to transfer data. It prepares a struct renesas_i3c_xfer, enqueues it, and waits for completion. The interrupt handler dequeues the transfer, updates/uses it, and signals the waiting thread. If the completion times out, the waiting thread dequeues the transfer and free it. If an interrupt fires after that, the handler may access freed memory, leading to crashes. Check that the transfer is still valid before accessing it in the interrupt handler. Along with it, clear any status flag to avoid triggering the same interrupts again. Fixes: d028219a9f14 ("i3c: master: Add basic driver for the Renesas I3C con= troller") Cc: stable@vger.kernel.org Signed-off-by: Claudiu Beznea --- Changes in v4: - disable also the interrupts - dropped the Rb tag Changes in v3: - none Changes in v2: - clean the IRQ status bits before returning IRQ_HANDLED and adjusted the patch description to reflect this change - collected Frank's tag. Frank, please let me know if you consider I should drop your tag. Thanks! drivers/i3c/master/renesas-i3c.c | 50 ++++++++++++++++++++++++++++---- 1 file changed, 45 insertions(+), 5 deletions(-) diff --git a/drivers/i3c/master/renesas-i3c.c b/drivers/i3c/master/renesas-= i3c.c index f39c449922ca..bc1a0ae1d12d 100644 --- a/drivers/i3c/master/renesas-i3c.c +++ b/drivers/i3c/master/renesas-i3c.c @@ -1014,6 +1014,12 @@ static irqreturn_t renesas_i3c_tx_isr(int irq, void = *data) =20 scoped_guard(spinlock, &i3c->xferqueue.lock) { xfer =3D i3c->xferqueue.cur; + if (!xfer) { + /* Disable interrupts. */ + renesas_clear_bit(i3c->regs, NTIE, NTIE_TDBEIE0); + return IRQ_HANDLED; + } + cmd =3D xfer->cmds; =20 if (xfer->is_i2c_xfer) { @@ -1053,11 +1059,20 @@ static irqreturn_t renesas_i3c_resp_isr(int irq, vo= id *data) int ret =3D 0; =20 scoped_guard(spinlock, &i3c->xferqueue.lock) { + /* Clear the Respone Queue Full status flag */ + renesas_clear_bit(i3c->regs, NTST, NTST_RSPQFF); + xfer =3D i3c->xferqueue.cur; - cmd =3D xfer->cmds; + if (!xfer) { + /* Disable interrupts. */ + renesas_clear_bit(i3c->regs, NTIE, NTIE_TDBEIE0 | NTIE_RDBFIE0); + /* Clear any error flags. */ + renesas_clear_bit(i3c->regs, BCTL, BCTL_ABT); + renesas_clear_bit(i3c->regs, NTST, NTST_TEF | NTST_TABTF); + return IRQ_HANDLED; + } =20 - /* Clear the Respone Queue Full status flag*/ - renesas_clear_bit(i3c->regs, NTST, NTST_RSPQFF); + cmd =3D xfer->cmds; =20 data_len =3D NRSPQP_DATA_LEN(resp_descriptor); =20 @@ -1138,6 +1153,15 @@ static irqreturn_t renesas_i3c_tend_isr(int irq, voi= d *data) =20 scoped_guard(spinlock, &i3c->xferqueue.lock) { xfer =3D i3c->xferqueue.cur; + if (!xfer) { + /* Disable interrupts. */ + renesas_clear_bit(i3c->regs, BIE, BIE_TENDIE | BIE_TENDIE); + renesas_clear_bit(i3c->regs, NTSTE, NTSTE_TDBEE0); + /* Clear any status flag. */ + renesas_clear_bit(i3c->regs, BST, BST_NACKDF | BST_TENDF); + return IRQ_HANDLED; + } + cmd =3D xfer->cmds; =20 if (xfer->is_i2c_xfer) { @@ -1184,6 +1208,14 @@ static irqreturn_t renesas_i3c_rx_isr(int irq, void = *data) =20 scoped_guard(spinlock, &i3c->xferqueue.lock) { xfer =3D i3c->xferqueue.cur; + if (!xfer) { + /* Clear any status registers. */ + renesas_clear_bit(i3c->regs, BST, BST_SPCNDDF); + /* Clear the Read Buffer Full status flag. */ + renesas_clear_bit(i3c->regs, NTST, NTST_RDBFF0); + return IRQ_HANDLED; + } + cmd =3D xfer->cmds; =20 if (xfer->is_i2c_xfer) { @@ -1234,8 +1266,6 @@ static irqreturn_t renesas_i3c_stop_isr(int irq, void= *data) struct renesas_i3c_xfer *xfer; =20 scoped_guard(spinlock, &i3c->xferqueue.lock) { - xfer =3D i3c->xferqueue.cur; - /* read back registers to confirm writes have fully propagated */ renesas_writel(i3c->regs, BST, 0); renesas_readl(i3c->regs, BST); @@ -1243,6 +1273,10 @@ static irqreturn_t renesas_i3c_stop_isr(int irq, voi= d *data) renesas_clear_bit(i3c->regs, NTST, NTST_TDBEF0 | NTST_RDBFF0); renesas_clear_bit(i3c->regs, SCSTRCTL, SCSTRCTL_RWE); =20 + xfer =3D i3c->xferqueue.cur; + if (!xfer) + return IRQ_HANDLED; + xfer->ret =3D 0; complete(&xfer->comp); } @@ -1259,6 +1293,12 @@ static irqreturn_t renesas_i3c_start_isr(int irq, vo= id *data) =20 scoped_guard(spinlock, &i3c->xferqueue.lock) { xfer =3D i3c->xferqueue.cur; + if (!xfer) { + /* Clear any status registers. */ + renesas_clear_bit(i3c->regs, BST, BST_STCNDDF); + return IRQ_HANDLED; + } + cmd =3D xfer->cmds; =20 if (xfer->is_i2c_xfer) { --=20 2.43.0 From nobody Sun Jun 14 08:21:01 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 091253911AB; Fri, 12 Jun 2026 16:05:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781280311; cv=none; b=NkGJbb0ETh1pFjSp1cvDpHlOQ+UAHm8KbZzmoDBWdd9QeN2eXiFhXbpTMxz7b97pgnZqWWd/ApplBamhENvEXX9aJLmJS79RZzSVfocxqL3CXoAlAo0wzGUOcRrIdd9V/D3EIVQTwwDBeBDxH6n8BgYuAIlbVd+4HGSAOsetlTU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781280311; c=relaxed/simple; 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charset="utf-8" From: Claudiu Beznea The Renesas RZ/G3S supports a power saving state where power to the most SoC componentes (including I3C) is lost. The STDBR and EXTBR are configured in initialization phase though the struct i3c_master_controller_ops::bus_init. Set them on resume function as well to keep the same state of the controller after a suspend with power loss and a similar initialization sequence as in bus_init. Fixes: e7218986319b ("i3c: renesas: Add suspend/resume support") Cc: stable@vger.kernel.org Reviewed-by: Frank Li Signed-off-by: Claudiu Beznea --- Changes in v4: - none Changes in v3: - none Changes in v2: - collected tags drivers/i3c/master/renesas-i3c.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/i3c/master/renesas-i3c.c b/drivers/i3c/master/renesas-= i3c.c index bc1a0ae1d12d..e70db3a17bc7 100644 --- a/drivers/i3c/master/renesas-i3c.c +++ b/drivers/i3c/master/renesas-i3c.c @@ -260,6 +260,7 @@ struct renesas_i3c { u32 dyn_addr; u32 i2c_STDBR; u32 i3c_STDBR; + u32 extbr; unsigned long rate; u8 addrs[RENESAS_I3C_MAX_DEVS]; struct renesas_i3c_xferqueue xferqueue; @@ -607,10 +608,9 @@ static int renesas_i3c_bus_init(struct i3c_master_cont= roller *m) renesas_writel(i3c->regs, STDBR, i3c->i3c_STDBR); =20 /* Extended Bit Rate setting */ - renesas_writel(i3c->regs, EXTBR, EXTBR_EBRLO(od_low_ticks) | - EXTBR_EBRHO(od_high_ticks) | - EXTBR_EBRLP(pp_low_ticks) | - EXTBR_EBRHP(pp_high_ticks)); + i3c->extbr =3D EXTBR_EBRLO(od_low_ticks) | EXTBR_EBRHO(od_high_ticks) | + EXTBR_EBRLP(pp_low_ticks) | EXTBR_EBRHP(pp_high_ticks); + renesas_writel(i3c->regs, EXTBR, i3c->extbr); =20 renesas_writel(i3c->regs, REFCKCTL, REFCKCTL_IREFCKS(cks)); i3c->refclk_div =3D cks; @@ -1470,6 +1470,8 @@ static int renesas_i3c_resume_noirq(struct device *de= v) goto err_tresetn; =20 /* Re-store I3C registers value. */ + renesas_writel(i3c->regs, STDBR, i3c->i3c_STDBR); + renesas_writel(i3c->regs, EXTBR, i3c->extbr); renesas_writel(i3c->regs, REFCKCTL, REFCKCTL_IREFCKS(i3c->refclk_div)); renesas_writel(i3c->regs, MSDVAD, MSDVAD_MDYADV | --=20 2.43.0 From nobody Sun Jun 14 08:21:01 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0379838F23D; Fri, 12 Jun 2026 16:05:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781280314; cv=none; b=thV2VlJQJQmDuZpDaOmwznCF2feg2yNXvsLgCy4cz/0syprzfE+mEvqpR0VJHg/5nPyLDjrpugsPdi6NgunCGfcSD/30VcyK1wodmaU4aAQpPcQrovxQTKDikkYuyo5Qo03zWRfFOKn6/xfFi6TLemjSLcl37hR82XKLcxR+Log= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781280314; c=relaxed/simple; bh=ScWkQ+p/A2KDP2LS8aQJW1VwNQnxHu1eNdty8AIooLw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=fel9crA/nCsanw3XqCndACs7XGGzSyM7qP6ccdJa8NwwAyRllhivIlH49w/AcIjbddub2+HGQzuAF2Yov434m5Wf8sEyFcyZxMckM4f2Tah7gWS5mMcFccj2ht9qF02mtwUe4d0VoIfBpnAG5bes4XQEyGJTHTUYqWc8IwrgfR4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=LwdfzhRL; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="LwdfzhRL" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 63FE71F00A3A; Fri, 12 Jun 2026 16:05:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1781280312; bh=XRz/FFtSHJIJsXIK2VQ8xgiI0tAaDdPLADJ0hTGOc0Q=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=LwdfzhRLnprQdstyFT/VGiBdIGNt8e2NQQpsrOHSPJYjFxb2WuA6ERCi6iR0MjZs3 bBBE8UT1yLlsKI0bINxEP/IOI2znwHfIuqLFAjYOMyi5kvZRTTHM8an0AhqHw8Gjx5 D9+AEIFSMAPWaT7CdyAlg90KCNt7t8QlGWI1/Ub/YBx2z4r+a/Rv3TEH7YgfF4M8Z5 Bu93w4Vdzjxw/aabLRaIdwl97EDanfVHB1LCIqcW6IRNKjYVa25gKyvdVIdkW5/B87 b/SI9zqN1AIgVKr5DPh18GNA2CaLNUGOPbqeixcjMpThyua0mR66ifaaNB35AdlMzt m51HjABKZa8nQ== From: Claudiu Beznea To: wsa+renesas@sang-engineering.com, tommaso.merciai.xr@bp.renesas.com, alexandre.belloni@bootlin.com, Frank.Li@nxp.com, p.zabel@pengutronix.de Cc: claudiu.beznea@kernel.org, linux-i3c@lists.infradead.org, linux-kernel@vger.kernel.org, claudiu.beznea@tuxon.dev, Claudiu Beznea , stable@vger.kernel.org Subject: [PATCH v4 03/16] i3c: renesas: Follow the reset deassert order used in probe Date: Fri, 12 Jun 2026 19:04:45 +0300 Message-ID: <20260612160458.3102106-4-claudiu.beznea@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260612160458.3102106-1-claudiu.beznea@kernel.org> References: <20260612160458.3102106-1-claudiu.beznea@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Claudiu Beznea Use the same reset deassert order in the resume and probe paths to avoid potential failures due to ordering differences. Fixes: e7218986319b ("i3c: renesas: Add suspend/resume support") Cc: stable@vger.kernel.org Reviewed-by: Frank Li Signed-off-by: Claudiu Beznea --- Changes in v4: - none Changes in v3: - none Changes in v2: - collected tags drivers/i3c/master/renesas-i3c.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/i3c/master/renesas-i3c.c b/drivers/i3c/master/renesas-= i3c.c index e70db3a17bc7..7d448936b74c 100644 --- a/drivers/i3c/master/renesas-i3c.c +++ b/drivers/i3c/master/renesas-i3c.c @@ -1457,17 +1457,17 @@ static int renesas_i3c_resume_noirq(struct device *= dev) struct renesas_i3c *i3c =3D dev_get_drvdata(dev); int i, ret; =20 - ret =3D reset_control_deassert(i3c->presetn); + ret =3D reset_control_deassert(i3c->tresetn); if (ret) return ret; =20 - ret =3D reset_control_deassert(i3c->tresetn); + ret =3D reset_control_deassert(i3c->presetn); if (ret) - goto err_presetn; + goto err_tresetn; =20 ret =3D clk_bulk_enable(i3c->num_clks, i3c->clks); if (ret) - goto err_tresetn; + goto err_presetn; =20 /* Re-store I3C registers value. */ renesas_writel(i3c->regs, STDBR, i3c->i3c_STDBR); @@ -1488,10 +1488,10 @@ static int renesas_i3c_resume_noirq(struct device *= dev) =20 return 0; =20 -err_tresetn: - reset_control_assert(i3c->tresetn); err_presetn: reset_control_assert(i3c->presetn); +err_tresetn: + reset_control_assert(i3c->tresetn); return ret; } =20 --=20 2.43.0 From nobody Sun Jun 14 08:21:01 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 00A8C3AA4F6; Fri, 12 Jun 2026 16:05:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781280317; cv=none; b=chNB9gAfsfRFg/V5cRIIsU5r/xeXJ+0ZciOzWxo/BMCzCUvKBIR2MAzU4vPqnt4ILL1hs8TwQYHaSDDPM7HBlJRijx5y5DJZDaZBWXNfW/1tCx14uXMc5NKd6CeSb6/6+VdoCWGx3NmzG2A5DeS4TQzADog7yArPaPZlSYmGWWE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781280317; c=relaxed/simple; bh=rs+QyhclyPy5woNWbAt9HxEJEQQLvHcRyYJA0oi2GM4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=RBtQZLFnouJg3Eh4VC8vF19v6arPM3EYti6cN9KkpnY1n1gJFlmbEN9l+HQOycL0iE0ZM7Wn3K14t+bnGXF/hROl4YbLejaj+N4UJSAbjLNLoQAhaLo5b24Cr5uO2vXPY7C71IIuncS9TiGkAb/XGHytF5pp5dnTjl6CN/LTxI8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=NV7ARvWS; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="NV7ARvWS" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 5E1FA1F000E9; Fri, 12 Jun 2026 16:05:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1781280315; bh=3PBZb7cGt6xcR9wbrJite7LTqkhXtfQAMt+/2SqMx8Q=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=NV7ARvWS/AAlXNnz6sUFeV8x2ljwnz5rdGC2QTrH2SM2fo4aRMgCKFB0nEqgi5BpR KbhJM47Plph9jzKTsOfBzODQZ00Z+XvEL5kB4jkZfEKD27xXwMfXVxazXxKuArCg7c tdxjAziEieb3w4mwhbTi8Hz+bGoSQhvHopIoZp2yF0WwBw05PK3q15siJZ0MvnQMQE 85zfuAzRV4ylgy/kmMuW5AO86jnGI6j91G4bb0p4jHi8oKLg2ICxZ/RmQpuZvY9LXR GhZAXUYyySlXAy/o24cRum3689eaPadSmGxf7AjPB2XpDHUCzEZP/89THoBPfxUHd5 FlRIYajCIBwSQ== From: Claudiu Beznea To: wsa+renesas@sang-engineering.com, tommaso.merciai.xr@bp.renesas.com, alexandre.belloni@bootlin.com, Frank.Li@nxp.com, p.zabel@pengutronix.de Cc: claudiu.beznea@kernel.org, linux-i3c@lists.infradead.org, linux-kernel@vger.kernel.org, claudiu.beznea@tuxon.dev, Claudiu Beznea , stable@vger.kernel.org Subject: [PATCH v4 04/16] i3c: renesas: Reconfigure the DATBAS register on re-attach Date: Fri, 12 Jun 2026 19:04:46 +0300 Message-ID: <20260612160458.3102106-5-claudiu.beznea@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260612160458.3102106-1-claudiu.beznea@kernel.org> References: <20260612160458.3102106-1-claudiu.beznea@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Claudiu Beznea During re-attach, the device may change its position in the i3c->addrs[] array. As a result, it may use a different Device Address Table Basic Register (DATBAS), which needs to be reconfigured. Reconfigure the DATBAS register on re-attach. Along with it update software caches. Fixes: d028219a9f14 ("i3c: master: Add basic driver for the Renesas I3C con= troller") Cc: stable@vger.kernel.org Reviewed-by: Frank Li Signed-off-by: Claudiu Beznea --- Changes in v4: - use "data->index > pos" condition Changes in v3: - collected tags Changes in v2: - dropped the "if (pos < 0)" check in renesas_i3c_reattach_i3c_dev() to all= ow re-attaching in case of a full bus; along with it the condition to update the DATBAS register and software caches was updated to if (data->index !=3D pos && pos >=3D 0) - adjusted the patch title drivers/i3c/master/renesas-i3c.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/drivers/i3c/master/renesas-i3c.c b/drivers/i3c/master/renesas-= i3c.c index 7d448936b74c..4b81c32b1fde 100644 --- a/drivers/i3c/master/renesas-i3c.c +++ b/drivers/i3c/master/renesas-i3c.c @@ -892,10 +892,26 @@ static int renesas_i3c_reattach_i3c_dev(struct i3c_de= v_desc *dev, struct i3c_master_controller *m =3D i3c_dev_get_master(dev); struct renesas_i3c *i3c =3D to_renesas_i3c(m); struct renesas_i3c_i2c_dev_data *data =3D i3c_dev_get_master_data(dev); + int pos; + + pos =3D renesas_i3c_get_free_pos(i3c); + + if (data->index > pos && pos >=3D 0) { + renesas_writel(i3c->regs, DATBAS(data->index), 0); + i3c->addrs[data->index] =3D 0; + i3c->free_pos |=3D BIT(data->index); + + data->index =3D pos; + i3c->free_pos &=3D ~BIT(data->index); + } =20 i3c->addrs[data->index] =3D dev->info.dyn_addr ? dev->info.dyn_addr : dev->info.static_addr; =20 + renesas_writel(i3c->regs, DATBAS(data->index), + DATBAS_DVSTAD(dev->info.static_addr) | + datbas_dvdyad_with_parity(i3c->addrs[data->index])); + return 0; } =20 --=20 2.43.0 From nobody Sun Jun 14 08:21:01 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2FDCE3806DA; Fri, 12 Jun 2026 16:05:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781280320; cv=none; b=OadO9SglA+dj265No7VJUl31sopcgyJAjEXP0QY4MjTU3vXFmG55WXZUHcdbMB1TiHnv/zauRu1Gz539cw2BeAwJJRCQAFUC0kWjKvu0BpNMU9plIapvDBoyoP+F3b6EiB73Q4c0EF0nsqwjEO2Rh+Lr2yhjoNTPiTOP4zfBiK4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781280320; c=relaxed/simple; bh=VwA2753pg2k/ynXpbCLfyE4qpjk1TQUzkrVnanRi56c=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Zj1HCEwjxLbN/5mEWld45CIzCE+xQuvZZ0Q08gbU5Xg1AqzGrCcUpnXpBerj4Jm9s/Po6SIS8FSAYm9H5dszAgz0Lvbh8Rjh+9IGd96qrqG36aBozww1hGCXniLhnr6GKgYhe7u8G1PTs0pyXGpIqRJVrrDvaIA6ItOt8dsWVbg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=QWVk/2r1; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="QWVk/2r1" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 632FF1F00A3A; Fri, 12 Jun 2026 16:05:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1781280318; bh=TKn9uhAJWlT6BrId2omUn9JuAlf/aJfC5YydL8TPGko=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=QWVk/2r1crt+eXao2CkRRqy4pwZgUIyndoN9dxOtUZuPiNAuG+ei2gPIV7OINrrAC 0AWiQA2qD8QLxcMi2Ai5SqTK6XYDvkOj+40CzmURwPiQLzXFtOef7sMVAdUMy/jgP0 jK/DnY4QVowCf1ufwCjt4btBZoC5JCNSviPQpHEP0vt04oHKrRj40L4q9zA3YjDJoE o40ApMVtIDz0oTDDQij9NBiYk6JbqKSmiab3fDW7KeGa5SQfE/3Rtww3j9gvRzrViW 7FeK6xOnCA12DeEU4CJwyc0gbXg882Fm+v9afn5wLms2mMAWpz5rhd2FCY9oZDfrlA s5hdQVc9JfghA== From: Claudiu Beznea To: wsa+renesas@sang-engineering.com, tommaso.merciai.xr@bp.renesas.com, alexandre.belloni@bootlin.com, Frank.Li@nxp.com, p.zabel@pengutronix.de Cc: claudiu.beznea@kernel.org, linux-i3c@lists.infradead.org, linux-kernel@vger.kernel.org, claudiu.beznea@tuxon.dev, Claudiu Beznea , stable@vger.kernel.org Subject: [PATCH v4 05/16] i3c: renesas: Reset the controller on resume Date: Fri, 12 Jun 2026 19:04:47 +0300 Message-ID: <20260612160458.3102106-6-claudiu.beznea@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260612160458.3102106-1-claudiu.beznea@kernel.org> References: <20260612160458.3102106-1-claudiu.beznea@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Claudiu Beznea Reset the controller on resume after enabling the clocks to follow the same sequence as in probe and avoid potential ordering related failures. With it, renesas_i3c_reset() was updated to use read_poll_timeout_atomic(), as the driver's resume callback is executed during the noirq phase of resume, where interrupts are disabled. Fixes: e7218986319b ("i3c: renesas: Add suspend/resume support") Cc: stable@vger.kernel.org Reviewed-by: Frank Li Signed-off-by: Claudiu Beznea --- Changes in v4: - none Changes in v3: - collected tags Changes in v2: - replaced the read_poll_timeout() in renesas_i3c_reset() with read_poll_timeout_atomic() as the renesas_i3c_reset() is called in noirq phase of the suspend/resume; updated the patch description to reflect that - collected Frank's tag. Frank, please let me know if this should be dropped. Thanks! drivers/i3c/master/renesas-i3c.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/i3c/master/renesas-i3c.c b/drivers/i3c/master/renesas-= i3c.c index 4b81c32b1fde..67b9a31300d0 100644 --- a/drivers/i3c/master/renesas-i3c.c +++ b/drivers/i3c/master/renesas-i3c.c @@ -480,8 +480,8 @@ static int renesas_i3c_reset(struct renesas_i3c *i3c) renesas_writel(i3c->regs, BCTL, 0); renesas_set_bit(i3c->regs, RSTCTL, RSTCTL_RI3CRST); =20 - return read_poll_timeout(renesas_readl, val, !(val & RSTCTL_RI3CRST), - 0, 1000, false, i3c->regs, RSTCTL); + return read_poll_timeout_atomic(renesas_readl, val, !(val & RSTCTL_RI3CRS= T), + 0, 1000, false, i3c->regs, RSTCTL); } =20 static void renesas_i3c_hw_init(struct renesas_i3c *i3c) @@ -1485,6 +1485,10 @@ static int renesas_i3c_resume_noirq(struct device *d= ev) if (ret) goto err_presetn; =20 + ret =3D renesas_i3c_reset(i3c); + if (ret) + goto err_clks_disable; + /* Re-store I3C registers value. */ renesas_writel(i3c->regs, STDBR, i3c->i3c_STDBR); renesas_writel(i3c->regs, EXTBR, i3c->extbr); @@ -1504,6 +1508,8 @@ static int renesas_i3c_resume_noirq(struct device *de= v) =20 return 0; =20 +err_clks_disable: + clk_bulk_disable(i3c->num_clks, i3c->clks); err_presetn: reset_control_assert(i3c->presetn); err_tresetn: --=20 2.43.0 From nobody Sun Jun 14 08:21:01 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 29689392C57; Fri, 12 Jun 2026 16:05:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781280323; cv=none; b=boRvjqWaip+igpP9QVX6bY7IGtrKR6gPxJa32k9zWFnfRpaRldrlLK1Bio6HDIF14VKWCogplhpufPc4TDK+DTlISkiBHL3CpHmjUMMIOlc/iZQN3DRStSP7sIs5T+zN+2iok4jb+iqfTpo+Rk4H6unZpnMszuAr6kHfIAOG+1o= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781280323; c=relaxed/simple; bh=fc4HuCLemg//m0zG3aME6+Ih3XLd7KPnQF6mHbSoH4Q=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=i74AD9UKSUdLJFXM+n4I1eBIQHh3Voo1ZQ8W1BJgInRjrAr2syNNLn0W842DryvFQY5XN/VwBMCCTmuv2ZobLpWVovxV1CvSMy4lL0Vx0JRVltlB0WC75wPx5d2IUeFVvPVRpPH41Cbbxw68ZWhIE/aYkhJ+3KWuMhnc9XlGQqI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=YH7YxeVb; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="YH7YxeVb" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 4DD421F000E9; Fri, 12 Jun 2026 16:05:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1781280321; bh=Wj4q4DlvK1gaEV6/4E7oscTPvF/XjM9zlod7+14FRa8=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=YH7YxeVbxigZYfu6X6zGd0CstnDQnUKLQjNuzM//moL9kEaCLp23z993pCHCfC1ME 9KR/kO3n+gS2SIGCb9xZvgfD+PBKcn0R1ynhQ7s8oWlErhCx5ixxqAv9RXV2/rt0J7 qRw1zDyvc9+QfMFXL9JZgxCCAtFOMuwNVAfUrigLBks4tJuAhNY1GA2ArVODsijnUm UQ6JrhftaVnB/agDncHTAo697jnrp2nzh2e3Q7soF5JRyL6n6xcqUAUYY/ofeepBLU oNWx5B9IQPxQ3TOArM05iF2s26W5MZ6DQupNUnLFV9qsJWVkNbwL9t7C1LpzPuSO3y e7Y/Ye4E199Rw== From: Claudiu Beznea To: wsa+renesas@sang-engineering.com, tommaso.merciai.xr@bp.renesas.com, alexandre.belloni@bootlin.com, Frank.Li@nxp.com, p.zabel@pengutronix.de Cc: claudiu.beznea@kernel.org, linux-i3c@lists.infradead.org, linux-kernel@vger.kernel.org, claudiu.beznea@tuxon.dev, Claudiu Beznea , stable@vger.kernel.org Subject: [PATCH v4 06/16] i3c: renesas: Perform Dynamic Address Assignment on resume Date: Fri, 12 Jun 2026 19:04:48 +0300 Message-ID: <20260612160458.3102106-7-claudiu.beznea@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260612160458.3102106-1-claudiu.beznea@kernel.org> References: <20260612160458.3102106-1-claudiu.beznea@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Claudiu Beznea The Renesas RZ/G3S SoC supports a power saving mode where power to most SoC components, including I3C, is turned off. On systems where the I3C devices also loses power during suspend (e.g. NXP P3T1085UK-ARD connected to the PMOD1_6A connector of the RZ SMARC Carrier 2 + Renesas RZ/G3S SMARC SOM), the devices becomes unreachable after resume. Running DAA in the controller resume path restores communication. However, DAA relies on interrupts for TX/RX, which are not available in the noirq suspend/resume phase (unless they are wakeup interrupts). For this, the suspend/resume callbacks were moved out of the noirq phase. Currently, there is no identified use case on either the Renesas RZ/G3S or Renesas RZ/G3E SoCs that requires the controller suspend/resume hooks to be part of the noirq suspend/resume phase. Since renesas_i3c_reset() is not called anymore in atomic context update it to use read_poll_timeout(). To cover the case where the controller had already attached all the i3c->maxdevs devices before a suspend/resume cycle and i3c->free_pos is zero, struct renesas_i3c::resuming flag was introduced. The flag is set in renesas_i3c_resume() before calling i3c_master_do_daa_ext() and checked in renesas_i3c_daa(). When resuming from suspend, renesas_i3c_daa() re-runs DAA for all slots except those used by I2C devices. Since I2C devices may be attached both during probe (at bus initialization time) and at runtime, the device slots maintained by the driver may become interleaved with both I2C and I3C devices. However, the controller performs dynamic address assignment for I3C devices starting from a specified DATBAS register index and for a specified number of I3C devices. This becomes a problem when the bus is fully occupied by I2C and I3C devices before suspend. To address this, I2C and I3C devices are grouped, if resuming, in the i3c->addrs[] array such that I2C devices occupy the first slots and I3C devices occupy the remaining ones. In this scenario, I3C devices are re-attached using i3c_master_reattach_i3c_dev_locked(), since the bus is fully occupied and renesas_i3c_get_free_pos() would otherwise return a negative error code. Fixes: e7218986319b ("i3c: renesas: Add suspend/resume support") Cc: stable@vger.kernel.org Signed-off-by: Claudiu Beznea --- Changes in v4: - used directly i3c_dev instead of i3c_dev->dev->desc - fixed the swap in renesas_i3c_group_devs_in_slots() for i3c->addr[] Changes in v3: - added renesas_i3c_group_devs_in_slots(); along with it, the struct renesas_i3c_addr was updated with i3c_dev and i3c_dev and the attach/detach/re-attach APIs were adjusted accordingly - dropped DATBASn member of struct renesas_i3c - used i3c_master_reattach_i3c_dev_locked() to re-attach devices on a fully occupied bus - in resume, moved i2c_mark_adapter_resumed() after i3c_master_do_daa_ext() since it can update the internal driver data structure i2c specific Changes in v2: - adjusted the code to still work in case the full bus was occupied before a suspend/resume cycle; for that: -- introduced struct renesas_i3c_addr -- preserved i3c->DATBASn[] which is saved in suspend and used in resume, in renesas_i3c_daa() - updated the patch description to reflect the new updates drivers/i3c/master/renesas-i3c.c | 209 ++++++++++++++++++++++++------- 1 file changed, 166 insertions(+), 43 deletions(-) diff --git a/drivers/i3c/master/renesas-i3c.c b/drivers/i3c/master/renesas-= i3c.c index 67b9a31300d0..a63edddbc9fe 100644 --- a/drivers/i3c/master/renesas-i3c.c +++ b/drivers/i3c/master/renesas-i3c.c @@ -252,6 +252,15 @@ struct renesas_i3c_xferqueue { spinlock_t lock; }; =20 +struct renesas_i3c_addr { + union { + struct i2c_dev_desc *i2c_dev; + struct i3c_dev_desc *i3c_dev; + }; + bool is_i2c; + u8 addr; +}; + struct renesas_i3c { struct i3c_master_controller base; enum i3c_internal_state internal_state; @@ -262,13 +271,13 @@ struct renesas_i3c { u32 i3c_STDBR; u32 extbr; unsigned long rate; - u8 addrs[RENESAS_I3C_MAX_DEVS]; + struct renesas_i3c_addr addrs[RENESAS_I3C_MAX_DEVS]; struct renesas_i3c_xferqueue xferqueue; void __iomem *regs; - u32 *DATBASn; struct clk_bulk_data *clks; struct reset_control *presetn; struct reset_control *tresetn; + bool resuming; u8 num_clks; u8 refclk_div; }; @@ -335,7 +344,7 @@ static int renesas_i3c_get_addr_pos(struct renesas_i3c = *i3c, u8 addr) int pos; =20 for (pos =3D 0; pos < i3c->maxdevs; pos++) { - if (addr =3D=3D i3c->addrs[pos]) + if (addr =3D=3D i3c->addrs[pos].addr) return pos; } =20 @@ -480,8 +489,8 @@ static int renesas_i3c_reset(struct renesas_i3c *i3c) renesas_writel(i3c->regs, BCTL, 0); renesas_set_bit(i3c->regs, RSTCTL, RSTCTL_RI3CRST); =20 - return read_poll_timeout_atomic(renesas_readl, val, !(val & RSTCTL_RI3CRS= T), - 0, 1000, false, i3c->regs, RSTCTL); + return read_poll_timeout(renesas_readl, val, !(val & RSTCTL_RI3CRST), + 0, 1000, false, i3c->regs, RSTCTL); } =20 static void renesas_i3c_hw_init(struct renesas_i3c *i3c) @@ -637,12 +646,80 @@ static void renesas_i3c_bus_cleanup(struct i3c_master= _controller *m) renesas_i3c_reset(i3c); } =20 +static u8 renesas_i3c_group_devs_in_slots(struct renesas_i3c *i3c) +{ + struct renesas_i3c_i2c_dev_data *new_i2c_data, *new_i3c_data; + struct renesas_i3c_addr i2c_addr, i3c_addr; + struct i3c_dev_desc *i3c_dev; + struct i2c_dev_desc *i2c_dev; + u8 i2c_pos =3D 0; + + /* + * The controller cannot handle interleaved I2C and I3C devices in the + * slots. It expects to be configured with a starting DATBAS register + * index and the number of I3C devices for which to run dynamic address + * assignment. + * + * Since I2C devices may be added after bus initialization, group the + * devices in slots so that the I2C devices occupy the first slots + * and I3C devices the remaining ones. + * + * This allows the controller to run ENTDAA by specifying the starting + * DATBAS register index and the number of I3C devices. As a result, + * ENTDAA can be re-run for all I3C devices and they can be re-attached + * after a suspend/resume cycle in which power to both the controller + * and the I3C devices was lost. + */ + for (u8 pos =3D 0; pos < i3c->maxdevs; pos++) { + if (i3c->free_pos & BIT(pos)) + continue; + + if (!i3c->addrs[pos].is_i2c) + continue; + + if (pos =3D=3D i2c_pos) { + i2c_pos++; + continue; + } + + /* + * Swap the I3C device on i2c_pos slot with the I2C dev + * on pos slot. + */ + i3c_addr =3D i3c->addrs[i2c_pos]; + i3c_dev =3D i3c_addr.i3c_dev; + + i2c_addr =3D i3c->addrs[pos]; + i2c_dev =3D i2c_addr.i2c_dev; + + new_i2c_data =3D i3c_dev_get_master_data(i3c_dev); + new_i3c_data =3D i2c_dev_get_master_data(i2c_dev); + + i3c->addrs[i2c_pos] =3D i2c_addr; + i3c->addrs[i2c_pos].is_i2c =3D true; + i3c->addrs[i2c_pos].i2c_dev =3D i2c_dev; + + i3c->addrs[pos] =3D i3c_addr; + i3c->addrs[pos].is_i2c =3D false; + i3c->addrs[pos].i3c_dev =3D i3c_dev; + + new_i2c_data->index =3D i2c_pos++; + new_i3c_data->index =3D pos; + + i2c_dev_set_master_data(i2c_dev, new_i2c_data); + i3c_dev_set_master_data(i3c_dev, new_i3c_data); + } + + return i2c_pos; +} + static int renesas_i3c_daa(struct i3c_master_controller *m) { struct renesas_i3c *i3c =3D to_renesas_i3c(m); struct renesas_i3c_cmd *cmd; u32 olddevs, newdevs; u8 last_addr =3D 0, pos; + u8 first_i3c_pos =3D 0; int ret; =20 struct renesas_i3c_xfer *xfer __free(kfree) =3D renesas_i3c_alloc_xfer(i3= c, 1); @@ -655,16 +732,25 @@ static int renesas_i3c_daa(struct i3c_master_controll= er *m) olddevs =3D ~(i3c->free_pos); i3c->internal_state =3D I3C_INTERNAL_STATE_CONTROLLER_ENTDAA; =20 + if (i3c->resuming) + first_i3c_pos =3D renesas_i3c_group_devs_in_slots(i3c); + /* Setting DATBASn registers for target devices. */ for (pos =3D 0; pos < i3c->maxdevs; pos++) { - if (olddevs & BIT(pos)) - continue; + if (olddevs & BIT(pos)) { + if (i3c->resuming) { + if (pos < first_i3c_pos) + continue; + } else { + continue; + } + } =20 ret =3D i3c_master_get_free_addr(m, last_addr + 1); if (ret < 0) return -ENOSPC; =20 - i3c->addrs[pos] =3D ret; + i3c->addrs[pos].addr =3D ret; last_addr =3D ret; =20 renesas_writel(i3c->regs, DATBAS(pos), datbas_dvdyad_with_parity(ret)); @@ -674,9 +760,14 @@ static int renesas_i3c_daa(struct i3c_master_controlle= r *m) cmd =3D xfer->cmds; cmd->rx_count =3D 0; =20 - ret =3D renesas_i3c_get_free_pos(i3c); - if (ret < 0) - return ret; + if (i3c->resuming) { + /* Run ENTDAA for all the I3C devices on the bus, if resuming. */ + ret =3D first_i3c_pos; + } else { + ret =3D renesas_i3c_get_free_pos(i3c); + if (ret < 0) + return ret; + } =20 /* * Setup the command descriptor to start the ENTDAA command @@ -689,12 +780,38 @@ static int renesas_i3c_daa(struct i3c_master_controll= er *m) =20 renesas_i3c_wait_xfer(i3c, xfer); =20 - newdevs =3D GENMASK(i3c->maxdevs - cmd->rx_count - 1, 0); - newdevs &=3D ~olddevs; + newdevs =3D GENMASK(i3c->maxdevs - cmd->rx_count - 1, first_i3c_pos); + /* Re-attach all the I3C devices on resume. */ + if (!i3c->resuming) + newdevs &=3D ~olddevs; =20 for (pos =3D 0; pos < i3c->maxdevs; pos++) { - if (newdevs & BIT(pos)) - i3c_master_add_i3c_dev_locked(m, i3c->addrs[pos]); + if (!(newdevs & BIT(pos))) + continue; + + /* + * If the bus was fully occupied before suspend, re-attach the + * devices and update the addresses tracked by the subsystem. + * Without this, i3c_master_add_i3c_dev_locked() returns errors + * due to a lack of free slots (as reported by + * renesas_i3c_get_free_pos()), causing the attachment to fail. + * + * Otherwise, follow the normal + * i3c_master_add_i3c_dev_locked() path, which will re-attach the + * devices, keep the subsystem state and driver addresses in sync, + * and perform all the required internal bookkeeping. + */ + if (!i3c->free_pos && i3c->resuming) { + struct i3c_dev_desc *dev =3D i3c->addrs[pos].i3c_dev; + u8 old_dyn_addr; + + old_dyn_addr =3D dev->info.dyn_addr; + dev->info.dyn_addr =3D i3c->addrs[pos].addr; + + i3c_master_reattach_i3c_dev_locked(dev, old_dyn_addr); + } else { + i3c_master_add_i3c_dev_locked(m, i3c->addrs[pos].addr); + } } =20 return 0; @@ -876,11 +993,12 @@ static int renesas_i3c_attach_i3c_dev(struct i3c_dev_= desc *dev) return -ENOMEM; =20 data->index =3D pos; - i3c->addrs[pos] =3D dev->info.dyn_addr ? : dev->info.static_addr; + i3c->addrs[pos].addr =3D dev->info.dyn_addr ? : dev->info.static_addr; + i3c->addrs[pos].i3c_dev =3D dev; i3c->free_pos &=3D ~BIT(pos); =20 renesas_writel(i3c->regs, DATBAS(pos), DATBAS_DVSTAD(dev->info.static_add= r) | - datbas_dvdyad_with_parity(i3c->addrs[pos])); + datbas_dvdyad_with_parity(i3c->addrs[pos].addr)); i3c_dev_set_master_data(dev, data); =20 return 0; @@ -892,25 +1010,28 @@ static int renesas_i3c_reattach_i3c_dev(struct i3c_d= ev_desc *dev, struct i3c_master_controller *m =3D i3c_dev_get_master(dev); struct renesas_i3c *i3c =3D to_renesas_i3c(m); struct renesas_i3c_i2c_dev_data *data =3D i3c_dev_get_master_data(dev); + struct i3c_dev_desc *tmp_dev =3D i3c->addrs[data->index].i3c_dev; int pos; =20 pos =3D renesas_i3c_get_free_pos(i3c); =20 if (data->index > pos && pos >=3D 0) { renesas_writel(i3c->regs, DATBAS(data->index), 0); - i3c->addrs[data->index] =3D 0; + i3c->addrs[data->index].addr =3D 0; + i3c->addrs[data->index].i3c_dev =3D NULL; i3c->free_pos |=3D BIT(data->index); =20 data->index =3D pos; i3c->free_pos &=3D ~BIT(data->index); } =20 - i3c->addrs[data->index] =3D dev->info.dyn_addr ? dev->info.dyn_addr : + i3c->addrs[data->index].addr =3D dev->info.dyn_addr ? dev->info.dyn_addr : dev->info.static_addr; + i3c->addrs[data->index].i3c_dev =3D tmp_dev; =20 renesas_writel(i3c->regs, DATBAS(data->index), DATBAS_DVSTAD(dev->info.static_addr) | - datbas_dvdyad_with_parity(i3c->addrs[data->index])); + datbas_dvdyad_with_parity(i3c->addrs[data->index].addr)); =20 return 0; } @@ -922,7 +1043,8 @@ static void renesas_i3c_detach_i3c_dev(struct i3c_dev_= desc *dev) struct renesas_i3c *i3c =3D to_renesas_i3c(m); =20 i3c_dev_set_master_data(dev, NULL); - i3c->addrs[data->index] =3D 0; + i3c->addrs[data->index].addr =3D 0; + i3c->addrs[data->index].i3c_dev =3D NULL; i3c->free_pos |=3D BIT(data->index); kfree(data); } @@ -1002,7 +1124,9 @@ static int renesas_i3c_attach_i2c_dev(struct i2c_dev_= desc *dev) return -ENOMEM; =20 data->index =3D pos; - i3c->addrs[pos] =3D dev->addr; + i3c->addrs[pos].addr =3D dev->addr; + i3c->addrs[pos].is_i2c =3D true; + i3c->addrs[pos].i2c_dev =3D dev; i3c->free_pos &=3D ~BIT(pos); i2c_dev_set_master_data(dev, data); =20 @@ -1016,7 +1140,9 @@ static void renesas_i3c_detach_i2c_dev(struct i2c_dev= _desc *dev) struct renesas_i3c *i3c =3D to_renesas_i3c(m); =20 i2c_dev_set_master_data(dev, NULL); - i3c->addrs[data->index] =3D 0; + i3c->addrs[data->index].addr =3D 0; + i3c->addrs[data->index].is_i2c =3D false; + i3c->addrs[data->index].i2c_dev =3D NULL; i3c->free_pos |=3D BIT(data->index); kfree(data); } @@ -1421,12 +1547,6 @@ static int renesas_i3c_probe(struct platform_device = *pdev) i3c->maxdevs =3D RENESAS_I3C_MAX_DEVS; i3c->free_pos =3D GENMASK(i3c->maxdevs - 1, 0); =20 - /* Allocate dynamic Device Address Table backup. */ - i3c->DATBASn =3D devm_kzalloc(&pdev->dev, sizeof(u32) * i3c->maxdevs, - GFP_KERNEL); - if (!i3c->DATBASn) - return -ENOMEM; - return i3c_master_register(&i3c->base, &pdev->dev, &renesas_i3c_ops, fals= e); } =20 @@ -1437,17 +1557,13 @@ static void renesas_i3c_remove(struct platform_devi= ce *pdev) i3c_master_unregister(&i3c->base); } =20 -static int renesas_i3c_suspend_noirq(struct device *dev) +static int renesas_i3c_suspend(struct device *dev) { struct renesas_i3c *i3c =3D dev_get_drvdata(dev); - int i, ret; + int ret; =20 i2c_mark_adapter_suspended(&i3c->base.i2c); =20 - /* Store Device Address Table values. */ - for (i =3D 0; i < i3c->maxdevs; i++) - i3c->DATBASn[i] =3D renesas_readl(i3c->regs, DATBAS(i)); - ret =3D reset_control_assert(i3c->presetn); if (ret) goto err_mark_resumed; @@ -1468,10 +1584,10 @@ static int renesas_i3c_suspend_noirq(struct device = *dev) return ret; } =20 -static int renesas_i3c_resume_noirq(struct device *dev) +static int renesas_i3c_resume(struct device *dev) { struct renesas_i3c *i3c =3D dev_get_drvdata(dev); - int i, ret; + int ret; =20 ret =3D reset_control_deassert(i3c->tresetn); if (ret) @@ -1497,15 +1613,23 @@ static int renesas_i3c_resume_noirq(struct device *= dev) renesas_writel(i3c->regs, MSDVAD, MSDVAD_MDYADV | MSDVAD_MDYAD(i3c->dyn_addr)); =20 - /* Restore Device Address Table values. */ - for (i =3D 0; i < i3c->maxdevs; i++) - renesas_writel(i3c->regs, DATBAS(i), i3c->DATBASn[i]); - /* I3C hw init. */ renesas_i3c_hw_init(i3c); =20 + i3c->resuming =3D true; + + ret =3D i3c_master_do_daa_ext(&i3c->base, true); + if (ret) + dev_err(dev, "DAA failed on resume, ret=3D%d", ret); + + i3c->resuming =3D false; + i2c_mark_adapter_resumed(&i3c->base.i2c); =20 + /* + * I3C devices may have retained their dynamic address anyway. Do not + * fail the resume because of DAA error. + */ return 0; =20 err_clks_disable: @@ -1518,8 +1642,7 @@ static int renesas_i3c_resume_noirq(struct device *de= v) } =20 static const struct dev_pm_ops renesas_i3c_pm_ops =3D { - NOIRQ_SYSTEM_SLEEP_PM_OPS(renesas_i3c_suspend_noirq, - renesas_i3c_resume_noirq) + SYSTEM_SLEEP_PM_OPS(renesas_i3c_suspend, renesas_i3c_resume) }; =20 static const struct of_device_id renesas_i3c_of_ids[] =3D { --=20 2.43.0 From nobody Sun Jun 14 08:21:01 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 43C7F395240; Fri, 12 Jun 2026 16:05:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781280326; cv=none; b=Ni4DYuIUXGbMcT9hWE1HRet7E+jQj/f1XieGG+CPQatbgnn43ys9YeLrpZMba9yOd4gbEch62YErmVwU5dTFuBGklYCqAqs8RoNJtQQFGJvfGEZy4m1EIuVHZEUmqqI6rfIkSvdJr6bRlsE4sExjlPuMytIv+y4YpBBV/zAHjdQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781280326; c=relaxed/simple; bh=C+JIHyPCN/QWKeNrRigaB8LKGffzfX4SpIHtMo4jSMg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=uv6eHaghj1uRyqzfwzGWBUDrXSFYEdjiKxuXAUgkLvYpxLXmbWaGf4ZH6+I6a1AOKmll7PG0++WnABXUTB/Bv2L1RPrfdlFB1usDZwNoqQ9qDyuIbWVscz2VK0VONyr9jx/NFFm148pIPgPST/n+a5Lllgc8LV+0E6tXZ69L8Ws= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=VRTcxi9Y; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="VRTcxi9Y" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 50CD41F00A3A; Fri, 12 Jun 2026 16:05:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1781280324; bh=6CzvHKRqj39+/AvnEcb6S6lx4Dcw1R8+JnnIfeHoRPY=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=VRTcxi9YUZQ4nHQIVe7kleJ0vzjRh6QhYFwLE0izBmP9MlRORiyzj6AZ+ly3kQ2No iA5VS/+SFwmLN9PMRy714Pr4y/R2+z0X3ubo0SutnhEYL44LmWMEghvbP+SqSiBqbk B547hPYBLL7EAgwg5Axwz92EFmitYmWSf91WNEbBYQE+HqwMxOOgbkvDtCMnN7ZnP8 yrb9twmdF9ANmf6Z9eIEoEoWMRfJU/4FK6+142XD9aZJ53pXaGpltU6NzuMOkwbTob zX+CnBajJ2Z60IzGFRlgGAS9878KlnWUO/3DxVe7ay3IofehcxxS8pZEFUXFNIvKhw Mfn7tuNErwzzg== From: Claudiu Beznea To: wsa+renesas@sang-engineering.com, tommaso.merciai.xr@bp.renesas.com, alexandre.belloni@bootlin.com, Frank.Li@nxp.com, p.zabel@pengutronix.de Cc: claudiu.beznea@kernel.org, linux-i3c@lists.infradead.org, linux-kernel@vger.kernel.org, claudiu.beznea@tuxon.dev, Claudiu Beznea , stable@vger.kernel.org Subject: [PATCH v4 07/16] i3c: renesas: Clean DATBAS register on detach Date: Fri, 12 Jun 2026 19:04:49 +0300 Message-ID: <20260612160458.3102106-8-claudiu.beznea@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260612160458.3102106-1-claudiu.beznea@kernel.org> References: <20260612160458.3102106-1-claudiu.beznea@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Claudiu Beznea The controller uses DATBAS registers on TX/RX logic. Clean the DATBAS register for the detached I3C device to avoid issues. Fixes: d028219a9f14 ("i3c: master: Add basic driver for the Renesas I3C con= troller") Cc: stable@vger.kernel.org Reviewed-by: Frank Li Signed-off-by: Claudiu Beznea --- Changes in v4: - none Changes in v3: - none Changes in v2: - collected tags drivers/i3c/master/renesas-i3c.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/i3c/master/renesas-i3c.c b/drivers/i3c/master/renesas-= i3c.c index a63edddbc9fe..abe24e563d21 100644 --- a/drivers/i3c/master/renesas-i3c.c +++ b/drivers/i3c/master/renesas-i3c.c @@ -1042,6 +1042,8 @@ static void renesas_i3c_detach_i3c_dev(struct i3c_dev= _desc *dev) struct i3c_master_controller *m =3D i3c_dev_get_master(dev); struct renesas_i3c *i3c =3D to_renesas_i3c(m); =20 + renesas_writel(i3c->regs, DATBAS(data->index), 0); + i3c_dev_set_master_data(dev, NULL); i3c->addrs[data->index].addr =3D 0; i3c->addrs[data->index].i3c_dev =3D NULL; --=20 2.43.0 From nobody Sun Jun 14 08:21:01 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E03733DDDAB for ; Fri, 12 Jun 2026 16:05:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781280328; cv=none; b=WhwFpjfkfRCm0N2DVDQdYtXP7YqCf0z3AlBbuX1OOkujb9IVagR+xDssCINqOT10hOsG05pririYDrejkO2LWyFAGtpZrz2mA7Bd6FGZPQLaOTDp61ZeQ69Uf0Vpsua4C+xwIGPHfDp5BjlI0TLnb0KhXJrLJ7eSt8t3MNnUb4s= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781280328; c=relaxed/simple; bh=q+OFSHU8P5t+a4TVb2K7X9PhLg9wADXzinMxgZbegts=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=G8R0EaRHaOj5e0RhefupB2QmSTxSGCZEbAL1qSfcsCL1PCsXpPzAAUY0ZjLzfPnvhoKPUrICVeAv8OCZnZfKOYmkLnkadPytFuHAFcnx2OVUAuID9mZ3HpnGgHLKb4k6JNkUPufVhA021ZUptNXsv4fBEeNSdq8tZkvF2XySfDU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=eqOjY5WT; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="eqOjY5WT" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 6CAF31F000E9; Fri, 12 Jun 2026 16:05:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1781280327; bh=XJQpP2DqNfu1UIc+wcBq6q91NixsA7/1tV1WaL5quSs=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=eqOjY5WTyF5M1MxjPvFCyBkzn7FqMaxX9d8Fe2gYJG7V2iJiYx5fMmt0IzCGEDVUY OwDuWPzpwEsZQHcN0IQ8JpXp28L794PnXrNQIuZ8VqsW+UJkZOzO56YsttX5fpQ84A sUVLlm0RqCLwGLfmkGWBf0a0VXsG2NlL+1U7ssHFBAn3yxGqrC1s/FoFqgi5dsE0Jh ZBe4fH27zQ1QbtsW3b7lR9MzWPIXdUF3HyLd/Ll3fIb5EdbgWTssUrPWwUTIt8vhrX /TN6B+oToWJrd2dHISXBGCWHjzagEZYCvCvdUn215sT5+6RF8FTsRIOo42rjWoLh6d fQZWtcp5g+01Q== From: Claudiu Beznea To: wsa+renesas@sang-engineering.com, tommaso.merciai.xr@bp.renesas.com, alexandre.belloni@bootlin.com, Frank.Li@nxp.com, p.zabel@pengutronix.de Cc: claudiu.beznea@kernel.org, linux-i3c@lists.infradead.org, linux-kernel@vger.kernel.org, claudiu.beznea@tuxon.dev, Claudiu Beznea Subject: [PATCH v4 08/16] i3c: renesas: Use reset_control_bulk_{assert, deassert}() Date: Fri, 12 Jun 2026 19:04:50 +0300 Message-ID: <20260612160458.3102106-9-claudiu.beznea@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260612160458.3102106-1-claudiu.beznea@kernel.org> References: <20260612160458.3102106-1-claudiu.beznea@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Claudiu Beznea Use reset_control_bulk_assert() and reset_control_bulk_deassert() in the suspend and resume paths to simplify the code. Signed-off-by: Claudiu Beznea --- Changes in v4: - none Changes in v3: - none Changes in v2: - none drivers/i3c/master/renesas-i3c.c | 30 +++++++++++++----------------- 1 file changed, 13 insertions(+), 17 deletions(-) diff --git a/drivers/i3c/master/renesas-i3c.c b/drivers/i3c/master/renesas-= i3c.c index abe24e563d21..9edd2dc96107 100644 --- a/drivers/i3c/master/renesas-i3c.c +++ b/drivers/i3c/master/renesas-i3c.c @@ -1562,24 +1562,22 @@ static void renesas_i3c_remove(struct platform_devi= ce *pdev) static int renesas_i3c_suspend(struct device *dev) { struct renesas_i3c *i3c =3D dev_get_drvdata(dev); + struct reset_control_bulk_data resets[] =3D { + { .rstc =3D i3c->presetn }, + { .rstc =3D i3c->tresetn }, + }; int ret; =20 i2c_mark_adapter_suspended(&i3c->base.i2c); =20 - ret =3D reset_control_assert(i3c->presetn); + ret =3D reset_control_bulk_assert(ARRAY_SIZE(resets), resets); if (ret) goto err_mark_resumed; =20 - ret =3D reset_control_assert(i3c->tresetn); - if (ret) - goto err_presetn; - clk_bulk_disable(i3c->num_clks, i3c->clks); =20 return 0; =20 -err_presetn: - reset_control_deassert(i3c->presetn); err_mark_resumed: i2c_mark_adapter_resumed(&i3c->base.i2c); =20 @@ -1589,19 +1587,19 @@ static int renesas_i3c_suspend(struct device *dev) static int renesas_i3c_resume(struct device *dev) { struct renesas_i3c *i3c =3D dev_get_drvdata(dev); + struct reset_control_bulk_data resets[] =3D { + { .rstc =3D i3c->presetn }, + { .rstc =3D i3c->tresetn }, + }; int ret; =20 - ret =3D reset_control_deassert(i3c->tresetn); + ret =3D reset_control_bulk_deassert(ARRAY_SIZE(resets), resets); if (ret) return ret; =20 - ret =3D reset_control_deassert(i3c->presetn); - if (ret) - goto err_tresetn; - ret =3D clk_bulk_enable(i3c->num_clks, i3c->clks); if (ret) - goto err_presetn; + goto err_resets_asserted; =20 ret =3D renesas_i3c_reset(i3c); if (ret) @@ -1636,10 +1634,8 @@ static int renesas_i3c_resume(struct device *dev) =20 err_clks_disable: clk_bulk_disable(i3c->num_clks, i3c->clks); -err_presetn: - reset_control_assert(i3c->presetn); -err_tresetn: - reset_control_assert(i3c->tresetn); +err_resets_asserted: + reset_control_bulk_assert(ARRAY_SIZE(resets), resets); return ret; } =20 --=20 2.43.0 From nobody Sun Jun 14 08:21:01 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DF51B3E172E for ; Fri, 12 Jun 2026 16:05:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781280331; cv=none; b=pG6Iv5LZzb2E03DsuiDurh4ww2KgIiaTlxLpfmMzoJvUiClthCXD8T3gR/9CIMibRect/y1gD5Z2LSC0/szeKz4FqjXzlr1eSWhR/VAsYnzUG35c0W5ogrhzq89LRZ51doun8tqV8ciAlLBGJCbRdRzZHTK0kQWPHlzKNyUIo4A= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781280331; c=relaxed/simple; bh=SgkOby8iUoiUh+Qm1RDuPfHKCF/Z1/cog7WkpdcD4Bw=; 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charset="utf-8" From: Claudiu Beznea There is no need to allocate a transfer structure when i2c_nxfers is zero. Return immediately instead of unnecessarily allocating memory. Signed-off-by: Claudiu Beznea --- Changes in v4: - none Changes in v3: - none Changes in v2: - updated patch title drivers/i3c/master/renesas-i3c.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/i3c/master/renesas-i3c.c b/drivers/i3c/master/renesas-= i3c.c index 9edd2dc96107..fa9c15381ed6 100644 --- a/drivers/i3c/master/renesas-i3c.c +++ b/drivers/i3c/master/renesas-i3c.c @@ -1061,13 +1061,13 @@ static int renesas_i3c_i2c_xfers(struct i2c_dev_des= c *dev, u8 start_bit =3D CNDCTL_STCND; int i; =20 + if (!i2c_nxfers) + return 0; + struct renesas_i3c_xfer *xfer __free(kfree) =3D renesas_i3c_alloc_xfer(i3= c, 1); if (!xfer) return -ENOMEM; =20 - if (!i2c_nxfers) - return 0; - renesas_i3c_bus_enable(m, false); =20 init_completion(&xfer->comp); --=20 2.43.0 From nobody Sun Jun 14 08:21:01 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E60863E2ABB for ; Fri, 12 Jun 2026 16:05:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781280335; cv=none; b=WGHhhW0IZpw55S56Y/gIo3ZFl8j48aRIN8t9O7qR4FyD0pWgoVZWHGI/jzu1xqrpKFxL6wOWazxhcrd76+1kcwtjlu/vZFBNu0lQV9FrPDn0thWaDuQHtTyhC1g+6L3z+ziveN/eWhGjVGCdtPLe0IEtVlyfP84gpWdtlk+MLgw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781280335; c=relaxed/simple; bh=pBFXsSe6wQhMLdJZEe8lS+00FhDPkmvAT81v5cu5XxI=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=BL5cCKZCwirnkrQcvOTVuI7y9uxlDa0zZVQWD8CrkviOELDrLkA6JEm5yiBd66m5rBleYPkWXgCPp+cGvObaOORPqKEYKWvhfQid8Moj7tqRVHbkTG2DEh+dWpvuJhLvs0YPbNSQzuM1UWOZe/pN8lkEzE2CsjkLc3Y9yNoukPE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=EOid9+6s; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="EOid9+6s" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 12D0C1F000E9; Fri, 12 Jun 2026 16:05:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1781280333; bh=buvxaPg5Chrf+X+SBXlePmF21Q+EzJMfFIpo9bJOuuo=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=EOid9+6sK55jo/nfh8wflYP360qWhqJ6AQZ1wCJF9eYaPTp+Clpuj1GD/Mtpyh/E8 Ux+yUExhmFTt5begorGCemOvXjAQ8z2xIYTQmQqyP0vE6eLegavXs49mOimQ8G7xzG 0n7fpQYn5eRTvDm/VED5PhBO1vQVndiWnKoWNoFZJVvIuD1FJ0jJgh3Vj6phbLAS1y teKW1rJHDR2P8Q4zP0ykNGpykm97yz/SqCBMOySdFYfKxA7ZvgPns0E3cYnVhMUOL+ W1p2xGwBcRwdb/djCCRlTo6X6uM/uVrtWBtphSnb3XMhhFz+Nj/cVJZz02XpWCSW8t PTFi+sfG5wnlA== From: Claudiu Beznea To: wsa+renesas@sang-engineering.com, tommaso.merciai.xr@bp.renesas.com, alexandre.belloni@bootlin.com, Frank.Li@nxp.com, p.zabel@pengutronix.de Cc: claudiu.beznea@kernel.org, linux-i3c@lists.infradead.org, linux-kernel@vger.kernel.org, claudiu.beznea@tuxon.dev, Claudiu Beznea Subject: [PATCH v4 10/16] i3c: renesas: Follow a unified pattern for transfer and command initialization Date: Fri, 12 Jun 2026 19:04:52 +0300 Message-ID: <20260612160458.3102106-11-claudiu.beznea@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260612160458.3102106-1-claudiu.beznea@kernel.org> References: <20260612160458.3102106-1-claudiu.beznea@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Claudiu Beznea Follow a unified pattern for transfer and command initialization across the driver. This keeps the code cleaner and easier to follow. Also, in some cases the I3C device was enabled before the transfer data structure was even allocated. Reviewed-by: Frank Li Signed-off-by: Claudiu Beznea --- Changes in v4: - none Changes in v3: - none Changes in v2: - collected tags drivers/i3c/master/renesas-i3c.c | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/drivers/i3c/master/renesas-i3c.c b/drivers/i3c/master/renesas-= i3c.c index fa9c15381ed6..883be4326e43 100644 --- a/drivers/i3c/master/renesas-i3c.c +++ b/drivers/i3c/master/renesas-i3c.c @@ -726,6 +726,10 @@ static int renesas_i3c_daa(struct i3c_master_controlle= r *m) if (!xfer) return -ENOMEM; =20 + init_completion(&xfer->comp); + cmd =3D xfer->cmds; + cmd->rx_count =3D 0; + /* Enable I3C bus. */ renesas_i3c_bus_enable(m, true); =20 @@ -756,10 +760,6 @@ static int renesas_i3c_daa(struct i3c_master_controlle= r *m) renesas_writel(i3c->regs, DATBAS(pos), datbas_dvdyad_with_parity(ret)); } =20 - init_completion(&xfer->comp); - cmd =3D xfer->cmds; - cmd->rx_count =3D 0; - if (i3c->resuming) { /* Run ENTDAA for all the I3C devices on the bus, if resuming. */ ret =3D first_i3c_pos; @@ -878,13 +878,13 @@ static int renesas_i3c_send_ccc_cmd(struct i3c_master= _controller *m, if (!xfer) return -ENOMEM; =20 - renesas_i3c_bus_enable(m, true); - init_completion(&xfer->comp); cmd =3D xfer->cmds; cmd->rnw =3D ccc->rnw; cmd->cmd0 =3D 0; =20 + renesas_i3c_bus_enable(m, true); + /* Calculate the command descriptor. */ switch (ccc->id) { case I3C_CCC_SETDASA: @@ -934,15 +934,15 @@ static int renesas_i3c_i3c_xfers(struct i3c_dev_desc = *dev, struct i3c_xfer *i3c_ struct renesas_i3c_i2c_dev_data *data =3D i3c_dev_get_master_data(dev); int i; =20 - /* Enable I3C bus. */ - renesas_i3c_bus_enable(m, true); - struct renesas_i3c_xfer *xfer __free(kfree) =3D renesas_i3c_alloc_xfer(i3= c, 1); if (!xfer) return -ENOMEM; =20 init_completion(&xfer->comp); =20 + /* Enable I3C bus. */ + renesas_i3c_bus_enable(m, true); + for (i =3D 0; i < i3c_nxfers; i++) { struct renesas_i3c_cmd *cmd =3D xfer->cmds; =20 @@ -1068,12 +1068,12 @@ static int renesas_i3c_i2c_xfers(struct i2c_dev_des= c *dev, if (!xfer) return -ENOMEM; =20 - renesas_i3c_bus_enable(m, false); - init_completion(&xfer->comp); xfer->is_i2c_xfer =3D true; cmd =3D xfer->cmds; =20 + renesas_i3c_bus_enable(m, false); + if (!(renesas_readl(i3c->regs, BCST) & BCST_BFREF)) { cmd->err =3D -EBUSY; return cmd->err; --=20 2.43.0 From nobody Sun Jun 14 08:21:02 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6460D3E4516 for ; Fri, 12 Jun 2026 16:05:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781280337; cv=none; b=oTF/iJFhH1gvvBZqP6V5dyNM/rYaL+BAZKCIqSjkmHpOQpdJ0Nd6N9lGkcwFzl8XT1ZSDPXL5bzc8uK7jLcpQNXqkSea/gFEXujFFeS1Zj7tHL9AricSvLFEfiHX40PbqejPWxAyeRT7YBr0voG0N7jHH+5KQLzP5Rmxdh+/Ia8= ARC-Message-Signature: i=1; a=rsa-sha256; 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charset="utf-8" From: Claudiu Beznea Drop the explicit memset() call on struct i3c_device_info object, as it is already initialized at declaration through compiler initialization. Reviewed-by: Frank Li Signed-off-by: Claudiu Beznea --- Changes in v4: - none Changes in v3: - none Changes in v2: - collected tags drivers/i3c/master/renesas-i3c.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/i3c/master/renesas-i3c.c b/drivers/i3c/master/renesas-= i3c.c index 883be4326e43..d5247e841a83 100644 --- a/drivers/i3c/master/renesas-i3c.c +++ b/drivers/i3c/master/renesas-i3c.c @@ -634,7 +634,6 @@ static int renesas_i3c_bus_init(struct i3c_master_contr= oller *m) i3c->dyn_addr =3D ret; renesas_writel(i3c->regs, MSDVAD, MSDVAD_MDYAD(ret) | MSDVAD_MDYADV); =20 - memset(&info, 0, sizeof(info)); info.dyn_addr =3D ret; return i3c_master_set_info(&i3c->base, &info); } --=20 2.43.0 From nobody Sun Jun 14 08:21:02 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2F16D3B5307 for ; Fri, 12 Jun 2026 16:05:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781280340; cv=none; b=qvmooBD97NXELEV08QvUjRtnOzrv/Y4uo1YOgi+14XdfPFRmGvZoG/kevN2wsrAczHtVE7Aly8HSom5NpFer95EEeZgxhuiOfNvziigXXfVx3HQXi47z43M5FgRfoiveoF2C+S0OkmZor+Kv6Xtp+dw1YShs2Q8sSku9E0FMnc8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781280340; c=relaxed/simple; bh=TK0PGmasHyJ32/3ieDgZWV5QGMlnegde2D8vp6zSXy8=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=k4XOsKxiHz3p8Im8Ka1Py7WUwO/jxeNY/96a/lTEHigOdwJZ/DbPn/PzdYgBtBAVgzKS8vUe5odpygUnyXn70/Jz+6EKJa6vifraG1T/TBtaJZiN1BkthvEP74LupZrmehoJ8EGQ96wS+9F6+uqZCVABE7FTgQPdANUjjYQ8pBk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=eiQZOLmY; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="eiQZOLmY" Received: by smtp.kernel.org (Postfix) with ESMTPSA id BFDA21F000E9; Fri, 12 Jun 2026 16:05:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1781280339; bh=YP+kSiUsGoR6jpW1tZMHdPwHHVI5I8KcyWDllQljcpE=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=eiQZOLmYqqA5ROZv4OGcZLCq7ljHkw/QkYeKayzGpwhABy6EHGFklnD+8sUWZrep8 0mMSZK75Rj9uBPtEbCzPEx/1VD9bBQV46br0uOkEiz8DwMcTUoKXvG06YFuSe85dJU u9pKg8wXclyOboHGCuPcCRzFT05gIAzzxwLD996kPrSBDDHvWJVZujqAhVJ3a2ZWzs Rb6fQ3t7fhT0OkemO35t5/+/qvM9btJuqxITP3Xvs9eFXUEzoOoNAKBMzHjjCYsbEs c/xTcOZzf3uVSjTsTiobqthK8pK1whLGQ1vvH7buwz1T4IAXBOhi9dBLULTCTjgrEx 4Yc4qVA6X6utw== From: Claudiu Beznea To: wsa+renesas@sang-engineering.com, tommaso.merciai.xr@bp.renesas.com, alexandre.belloni@bootlin.com, Frank.Li@nxp.com, p.zabel@pengutronix.de Cc: claudiu.beznea@kernel.org, linux-i3c@lists.infradead.org, linux-kernel@vger.kernel.org, claudiu.beznea@tuxon.dev, Claudiu Beznea Subject: [PATCH v4 12/16] i3c: renesas: Update HW registers after SW computations are done Date: Fri, 12 Jun 2026 19:04:54 +0300 Message-ID: <20260612160458.3102106-13-claudiu.beznea@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260612160458.3102106-1-claudiu.beznea@kernel.org> References: <20260612160458.3102106-1-claudiu.beznea@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Claudiu Beznea renesas_i3c_bus_init() performs a number of computations and software cache updates, interleaving them with hardware register writes. While this works today, it makes it harder to minimize the time the controller must remain powered when runtime PM is introduced. Perform all software computations and cache updates first, then update the hardware registers. This prepares for future runtime PM support. Reviewed-by: Frank Li Signed-off-by: Claudiu Beznea --- Changes in v4: - none Changes in v3: - none Changes in v2: - collected tags drivers/i3c/master/renesas-i3c.c | 28 ++++++++++++++-------------- 1 file changed, 14 insertions(+), 14 deletions(-) diff --git a/drivers/i3c/master/renesas-i3c.c b/drivers/i3c/master/renesas-= i3c.c index d5247e841a83..96d4fed32bf9 100644 --- a/drivers/i3c/master/renesas-i3c.c +++ b/drivers/i3c/master/renesas-i3c.c @@ -560,10 +560,6 @@ static int renesas_i3c_bus_init(struct i3c_master_cont= roller *m) if (!i3c->rate) return -EINVAL; =20 - ret =3D renesas_i3c_reset(i3c); - if (ret) - return ret; - i2c_total_ticks =3D DIV_ROUND_UP(i3c->rate, bus->scl_rate.i2c); i3c_total_ticks =3D DIV_ROUND_UP(i3c->rate, bus->scl_rate.i3c); =20 @@ -614,27 +610,31 @@ static int renesas_i3c_bus_init(struct i3c_master_con= troller *m) STDBR_SBRHO(double_SBR, od_high_ticks) | STDBR_SBRLP(pp_low_ticks) | STDBR_SBRHP(pp_high_ticks); - renesas_writel(i3c->regs, STDBR, i3c->i3c_STDBR); =20 /* Extended Bit Rate setting */ i3c->extbr =3D EXTBR_EBRLO(od_low_ticks) | EXTBR_EBRHO(od_high_ticks) | EXTBR_EBRLP(pp_low_ticks) | EXTBR_EBRHP(pp_high_ticks); - renesas_writel(i3c->regs, EXTBR, i3c->extbr); - - renesas_writel(i3c->regs, REFCKCTL, REFCKCTL_IREFCKS(cks)); - i3c->refclk_div =3D cks; - - /* I3C hw init*/ - renesas_i3c_hw_init(i3c); =20 ret =3D i3c_master_get_free_addr(m, 0); if (ret < 0) return ret; =20 + info.dyn_addr =3D ret; i3c->dyn_addr =3D ret; - renesas_writel(i3c->regs, MSDVAD, MSDVAD_MDYAD(ret) | MSDVAD_MDYADV); + i3c->refclk_div =3D cks; + + ret =3D renesas_i3c_reset(i3c); + if (ret) + return ret; + + renesas_writel(i3c->regs, STDBR, i3c->i3c_STDBR); + renesas_writel(i3c->regs, EXTBR, i3c->extbr); + renesas_writel(i3c->regs, REFCKCTL, REFCKCTL_IREFCKS(cks)); + renesas_writel(i3c->regs, MSDVAD, MSDVAD_MDYAD(i3c->dyn_addr) | MSDVAD_MD= YADV); + + /* I3C hw init*/ + renesas_i3c_hw_init(i3c); =20 - info.dyn_addr =3D ret; return i3c_master_set_info(&i3c->base, &info); } =20 --=20 2.43.0 From nobody Sun Jun 14 08:21:02 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E62633E5A24 for ; Fri, 12 Jun 2026 16:05:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781280342; cv=none; b=PJeNaR2GDNLf2cZL84JFsIdDRh8RwvaEO98u21P4ZPgF0O0NVHX0cs9/cyr6BZZ4lRiNpq6UMi6VQ3gETtnOdg0mGwzxbRaY/QXIAQkxkNoTetMVPcNpKWb3ToZyNLeZeD80mRXt3pzU90VwsdioPYyilt/DhT++u/DkAPS0b8E= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781280342; c=relaxed/simple; bh=jgEhXBCLmaBJG7DRKWDVEFPcacRdDUKUAxAr6gwdnk0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=ZwRWn7eWgVlb/zaL52B3fz3BLhnjj0ATx/Hek6dhKWGrcxDHCsf1byjiB1v9wEWtVox9ziuQKFXNu2u+DNmcxHjW+Bq1coyhfFnItBM5pQQuQxxbBNtcWLNWRx0drO6lYKa/stzluZKb9p/Awcl54zpewoDxUjYJ1uV08L5DrHM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=eVdCmdB7; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="eVdCmdB7" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 895C71F00A3A; Fri, 12 Jun 2026 16:05:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1781280341; bh=BNa1Yy4/n4O8yP/n3E9RJCNAEBckIesIRrdI7M/f4KY=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=eVdCmdB7vJi8arbvUAmc7GpYBuOnClmShkGc7doM6AA9gYizunk8DDqUeFsv0yn6j jQaPmMj22aZMIst6zJa3sXdWni1Gy2sSnLvrKdrb9FZJUmdgFjFeYQGKEQ7GH1cwiJ n1cSmvMK1gV1LRWZdP1VloLryPDtyOmu6bXNrjszZHjklUH0UIb6oq8NU5bpDzWC4J l9GNyeQRPhlMzGtv2grX2du/qJoj2J8iQUoakeVo40gdX/9i08xJI6DK9FoUZj5i8H d5BVFXE1irdp4okaJU6L0pDVi3m4W5bHRwmDwxjNjbP6Jg2+uHx1hgS/nhPJ+FVMxc FAWYjy/FHOlbw== From: Claudiu Beznea To: wsa+renesas@sang-engineering.com, tommaso.merciai.xr@bp.renesas.com, alexandre.belloni@bootlin.com, Frank.Li@nxp.com, p.zabel@pengutronix.de Cc: claudiu.beznea@kernel.org, linux-i3c@lists.infradead.org, linux-kernel@vger.kernel.org, claudiu.beznea@tuxon.dev, Claudiu Beznea Subject: [PATCH v4 13/16] i3c: renesas: Organize structures to avoid unnecessary padding Date: Fri, 12 Jun 2026 19:04:55 +0300 Message-ID: <20260612160458.3102106-14-claudiu.beznea@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260612160458.3102106-1-claudiu.beznea@kernel.org> References: <20260612160458.3102106-1-claudiu.beznea@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Claudiu Beznea Reorder structure members to reduce padding and improve memory layout. Reviewed-by: Frank Li Signed-off-by: Claudiu Beznea --- Changes in v4: - none Changes in v3: - none Changes in v2: - collected tags drivers/i3c/master/renesas-i3c.c | 32 ++++++++++++++++---------------- 1 file changed, 16 insertions(+), 16 deletions(-) diff --git a/drivers/i3c/master/renesas-i3c.c b/drivers/i3c/master/renesas-= i3c.c index 96d4fed32bf9..ab73fee1813b 100644 --- a/drivers/i3c/master/renesas-i3c.c +++ b/drivers/i3c/master/renesas-i3c.c @@ -221,19 +221,19 @@ enum renesas_i3c_event { }; =20 struct renesas_i3c_cmd { + const void *tx_buf; + void *rx_buf; + /* i2c xfer */ + u8 *i2c_buf; + const struct i2c_msg *msg; + int i2c_bytes_left; + int i2c_is_last; u32 cmd0; u32 len; - const void *tx_buf; u32 tx_count; - void *rx_buf; u32 rx_count; u32 err; u8 rnw; - /* i2c xfer */ - int i2c_bytes_left; - int i2c_is_last; - u8 *i2c_buf; - const struct i2c_msg *msg; }; =20 struct renesas_i3c_xfer { @@ -262,22 +262,22 @@ struct renesas_i3c_addr { }; =20 struct renesas_i3c { + void __iomem *regs; + struct clk_bulk_data *clks; + struct reset_control *presetn; + struct reset_control *tresetn; + struct renesas_i3c_xferqueue xferqueue; struct i3c_master_controller base; + struct renesas_i3c_addr addrs[RENESAS_I3C_MAX_DEVS]; + unsigned long rate; enum i3c_internal_state internal_state; - u16 maxdevs; + bool resuming; u32 free_pos; u32 dyn_addr; u32 i2c_STDBR; u32 i3c_STDBR; u32 extbr; - unsigned long rate; - struct renesas_i3c_addr addrs[RENESAS_I3C_MAX_DEVS]; - struct renesas_i3c_xferqueue xferqueue; - void __iomem *regs; - struct clk_bulk_data *clks; - struct reset_control *presetn; - struct reset_control *tresetn; - bool resuming; + u16 maxdevs; u8 num_clks; u8 refclk_div; }; --=20 2.43.0 From nobody Sun Jun 14 08:21:02 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D79283E6383 for ; Fri, 12 Jun 2026 16:05:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781280345; cv=none; b=Yv7Wch/cHo3DsiHGDaamznV3eWgZ2UFgevf3YZPBn8uRWnxhZRr93SqHiaa+pZjOSQK5E3gmH6FgEwfMHuZNqhmFdZ4GuWMz5HvYxZOof3bJ/yJOlXqzmO0KnDxdWh8Ht8IJP9r3eFX5qpnxkHWCfTrsp68UacRPwognDjdHfOI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781280345; c=relaxed/simple; bh=gqXxImJSaTAWPpjAQQHUGYKJS7ehjq5JvSpQu8SHgnM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Vkw/wkjq5pJQkWtCcXn4frSepRZiRIDDS87y4EEr1ZYXNks0FdxR4HgO+2tcPZ8ECXx+BpzbAtWkHd5UY2rBeDy/T6SAkfM3sZpbNdJd6IWxuF8FhS7orr4DM3Ypp2GxNzYCZ3iYIOgmhnYAc95lsDxKekL5hCNFTOYh6dth+NQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=XC/UxRAY; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="XC/UxRAY" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 4C3FF1F000E9; Fri, 12 Jun 2026 16:05:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1781280344; bh=ivV3cM9KsM+Lq38ibJkMQvMi0uFW/qVYbD5EnX8CDew=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=XC/UxRAYA3umksAqwwkhrlc5i1fJYD0b5ZSWSHBK0l5fIWogMo2iA52omA3fQHD0y UZAJJ+R+OEiOF7pA6ZRoF/Z3Z4gPXTgr8phm8vldtFYwXZ8U0AvKO0rvzTgfznUuSK upn+otTNs0dXeSPIoZejgRNQo7UcgvyDZxpp/Sv6SPx3jHnnhhXQragECuCRly/ylz PzVPZ71cnBiilhWtzc95xDBYzBo/4RQcGoczb7V0yJSv6+yEcx5QVoTOBMc6a4mQ6c /6wDetB+7cqs9A5RG0zu0uVoePTku+4Mcg/4SDF2Nrw1dqLY5Bk4uJQ5Eroi3JiNa6 RgbZyAt9a5BsQ== From: Claudiu Beznea To: wsa+renesas@sang-engineering.com, tommaso.merciai.xr@bp.renesas.com, alexandre.belloni@bootlin.com, Frank.Li@nxp.com, p.zabel@pengutronix.de Cc: claudiu.beznea@kernel.org, linux-i3c@lists.infradead.org, linux-kernel@vger.kernel.org, claudiu.beznea@tuxon.dev, Claudiu Beznea Subject: [PATCH v4 14/16] i3c: renesas: Use the "dev_name:irq_name" format for the interrupt name Date: Fri, 12 Jun 2026 19:04:56 +0300 Message-ID: <20260612160458.3102106-15-claudiu.beznea@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260612160458.3102106-1-claudiu.beznea@kernel.org> References: <20260612160458.3102106-1-claudiu.beznea@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Claudiu Beznea Use the "dev_name:irq_name" format for the interrupt names. This makes it easier to identify interrupts in systems where multiple devices may request interrupts with the same name. Reviewed-by: Frank Li Signed-off-by: Claudiu Beznea --- Changes in v4: - none Changes in v3: - none Changes in v2: - collected tags drivers/i3c/master/renesas-i3c.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/i3c/master/renesas-i3c.c b/drivers/i3c/master/renesas-= i3c.c index ab73fee1813b..a5384c0f71e3 100644 --- a/drivers/i3c/master/renesas-i3c.c +++ b/drivers/i3c/master/renesas-i3c.c @@ -1533,12 +1533,19 @@ static int renesas_i3c_probe(struct platform_device= *pdev) return ret; =20 for (i =3D 0; i < ARRAY_SIZE(renesas_i3c_irqs); i++) { + const char *irqname; + ret =3D platform_get_irq_byname(pdev, renesas_i3c_irqs[i].name); if (ret < 0) return ret; =20 + irqname =3D devm_kasprintf(&pdev->dev, GFP_KERNEL, "%s:%s", dev_name(&pd= ev->dev), + renesas_i3c_irqs[i].desc); + if (!irqname) + return -ENOMEM; + ret =3D devm_request_irq(&pdev->dev, ret, renesas_i3c_irqs[i].isr, - 0, renesas_i3c_irqs[i].desc, i3c); + 0, irqname, i3c); if (ret) return ret; } --=20 2.43.0 From nobody Sun Jun 14 08:21:02 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6B7BD3E63B1 for ; Fri, 12 Jun 2026 16:05:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781280348; cv=none; b=dco9aGYPyQvCYTJ7jhHZYAtUcbZmomtaJr73u0/UEipkvB/32QVUvSwBoKHnbeCxKBzK+9Fs/EkrZaJeakWKMIpAW8IYhhAw3/caflVSwEpEMy/5R17UI7FXkags1xJKTpyTgQOoGVm4utkRpoLpqOuU7UfG9VwKKI7/GALEu+Y= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781280348; c=relaxed/simple; bh=Zeqo1+7KUAM3+BU9bpmdjV9nPC9AvwvUMEoQOBAvxUA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=cZsGMUCNGF6GwHqUJewrI7nZGS9pp4tii/Jh08dJm2vyiHCDjm4ZBumB0HcsPuwtrZfwyjOK6Hk+XLhIJCcDowzpxjBHyQV5Kjx/+q8AnWzRHctzGgDIgE2a0JvCqKxwIiOU1h6onJvyFYeyer8F3x5L2AUmn41nmts9/VDMTa0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=J0FAIoDi; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="J0FAIoDi" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 074771F00A3A; Fri, 12 Jun 2026 16:05:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1781280347; bh=yQuLQ0wKgVv11O8PtVq89P419k6GO1eJURY019VGMjY=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=J0FAIoDiQ/TGWErEyKw4EweVtNP+0QILaakKtrHKDFbIP+pE/YViE9YyiMogN+SRV +m6EbzewDEP7bJ+ua9lDivTDQ+01UY3OMLl5E+mN25x5k+MmZ8iBBzOJ43Gqs4Bg7e S1v3Lnh6JtB+11LC2IT3sTHMXwHZFeCK0sODAAVZU0nI82UsKC0NHCa1wOs4O6GRf9 AbZdwgOGnXaPk9x3hX+kf+ZTEjshuqE11Ir2JKv/7qTTxaEf/XvW/ycu9sqlVg/w1o nSC8/TxHQv1ZCIHYx7wCsIcabd2a71Tt9oJzxdbZ9MHSxTUL82UiM1UKhVq/C5D+as DA/wlyDfXRB9g== From: Claudiu Beznea To: wsa+renesas@sang-engineering.com, tommaso.merciai.xr@bp.renesas.com, alexandre.belloni@bootlin.com, Frank.Li@nxp.com, p.zabel@pengutronix.de Cc: claudiu.beznea@kernel.org, linux-i3c@lists.infradead.org, linux-kernel@vger.kernel.org, claudiu.beznea@tuxon.dev, Claudiu Beznea Subject: [PATCH v4 15/16] i3c: renesas: Drop unnecessary tab Date: Fri, 12 Jun 2026 19:04:57 +0300 Message-ID: <20260612160458.3102106-16-claudiu.beznea@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260612160458.3102106-1-claudiu.beznea@kernel.org> References: <20260612160458.3102106-1-claudiu.beznea@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Claudiu Beznea Remove an unnecessary tab to make the code cleaner. Reviewed-by: Frank Li Signed-off-by: Claudiu Beznea --- Changes in v4: - none Changes in v3: - none Changes in v2: - collected tags drivers/i3c/master/renesas-i3c.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/i3c/master/renesas-i3c.c b/drivers/i3c/master/renesas-= i3c.c index a5384c0f71e3..1bed2304b5ee 100644 --- a/drivers/i3c/master/renesas-i3c.c +++ b/drivers/i3c/master/renesas-i3c.c @@ -109,7 +109,7 @@ #define NCMDQP_DATA_LENGTH(x) FIELD_PREP(GENMASK(31, 16), x) =20 #define NRSPQP 0x154 /* Normal Respone Queue */ -#define NRSPQP_NO_ERROR 0 +#define NRSPQP_NO_ERROR 0 #define NRSPQP_ERROR_CRC 1 #define NRSPQP_ERROR_PARITY 2 #define NRSPQP_ERROR_FRAME 3 --=20 2.43.0 From nobody Sun Jun 14 08:21:02 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 27C583E834F for ; Fri, 12 Jun 2026 16:05:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781280351; cv=none; b=KdvdfLgYvlScH5XEsIa21tmcAfUkcKKgi/jeyMAThzgpKcYlEBhb3zBOqXwz03hAkVhhLso5vzfTgAzhDKbbB8PohhgOHER/uVROvjgcuXXTpxqbwrzJWtaEGF714XE3CwY2wFyEvNABJ9wbzsPXl8a9bvcLixInx65dn6qrOdE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781280351; c=relaxed/simple; bh=HB9V664sIY+hFXBr/OuAu8t5rTABoaWSGrHSoQDHY6I=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Z0mUfcKEVuTLFwfX9I/3f8c0nCOZodl6Bvln/EZCnsqJprjpNDhKBxkuKL6wvmPr6Zb951EHhMPSQ1AcxVPbTM2/H2HfzyMfnxR0eMXnM98sZDITN1bSEKufb35bQPjRsr9U6/Fq2NXFRr6Tz6Q3IJt5PxbcF2JgD4C7qB52v28= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=G/saKkqf; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="G/saKkqf" Received: by smtp.kernel.org (Postfix) with ESMTPSA id C691D1F000E9; Fri, 12 Jun 2026 16:05:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1781280350; bh=W9i98gFE3kVi84YsLYvh5WlC51i5gG/5UO16JNAc3Bk=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=G/saKkqf24K2zO9R0mDU89BGbOrnReDhvE7oFS5r3+QYF+OSPgUFRYWdbtUSXD/1H lfunn+GUe7Hi5AfP9790um5ElOSSTgDB6rwaPT/xx5eXN1IdZ7ti4cG9zjD/mexKtM N6zO19n6rSppOHbP/3eeKKjOkAKkPWh5e2kBDM68PzXvN49fMxZ942M7aPkAtMZkLT iNj9VLJo+OGI97EzQrX9fLtiUA9XJ2a7NVqYHPUYxP4vWPo3tW4VhqB/ePx9tu/fvG rWS971Pfv4xbZW8cCGVnw4dQ0z1l4MDStbyuGFQ044F7nMLqi/p8LAwamO1h9Vg0qo CK+1kP0C8VqRw== From: Claudiu Beznea To: wsa+renesas@sang-engineering.com, tommaso.merciai.xr@bp.renesas.com, alexandre.belloni@bootlin.com, Frank.Li@nxp.com, p.zabel@pengutronix.de Cc: claudiu.beznea@kernel.org, linux-i3c@lists.infradead.org, linux-kernel@vger.kernel.org, claudiu.beznea@tuxon.dev, Claudiu Beznea Subject: [PATCH v4 16/16] i3c: renesas: Add runtime PM support Date: Fri, 12 Jun 2026 19:04:58 +0300 Message-ID: <20260612160458.3102106-17-claudiu.beznea@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260612160458.3102106-1-claudiu.beznea@kernel.org> References: <20260612160458.3102106-1-claudiu.beznea@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Claudiu Beznea On the SoCs where the Renesas I3C driver is enabled (RZ/G3S and RZ/G3E), the clocks of the IP are managed through a clock PM domain. To keep the I3C code simpler, the explicit clock handling was dropped along with the addition of runtime PM support, in favor of the runtime PM APIs. Only the code for getting tclk was preserved, as it is necessary to compute the I3C clock rate. All the APIs provided to the I3C subsystem through struct i3c_master_controller_ops are guarded with runtime PM APIs to enable/disable the controller at runtime. As the Renesas I3C driver implements an asynchronous transmit model by preparing a transfer and waiting for its completion through the ISR, renesas_i3c_abort_xfer() was added to disable interrupts and clear any pending IRQ status bits when there is no completion in the defined timeout. Along with this, renesas_i3c_wait_xfer() return type was changed to unsigned long. Add runtime PM support for the Renesas I3C driver. Signed-off-by: Claudiu Beznea --- Changes in v4: - renamed renesas_i3c_abort_xfer() from v3 to renesas_i3c_irqs_mask_and_clear(); along with it renamed local varibles abort_xfer to xfer_failed Changes in v3: - dropped the RPM resume/suspend in renesas_i3c_suspend() to read the DATBASn registers as the DATBASn register are not used on suspend/resume path anymore in this version Changes in v2: - dropped the runtime suspend/resume functions as for now, there will be no pinctrl sleep state described in DT - do not synchronize the IRQs in renesas_i3c_abort_xfer() as some handlers may re-enable interrupts; instead just disable the interrupts and clean any status bits that the IRQ handlers are touching; with this the struct renesas_i3c::{irqs, num_irqs} and the associated code was removed - dropped the renesas_i3c_dont_use_autosuspend() along with the devm_add_action_or_reset() call to set it since the same operation is done by the devres cleanup helper of devm_pm_runtime_enable() - adjusted the renesas_i3c_suspend() with RPM calls to save the DATBAS registers - use pm_runtime_resume_and_get() in renesas_i3c_resume() to avoid mixing gotos with cleanup helpers - adjusted the patch description to reflect these changes drivers/i3c/master/renesas-i3c.c | 150 +++++++++++++++++++++++++------ 1 file changed, 122 insertions(+), 28 deletions(-) diff --git a/drivers/i3c/master/renesas-i3c.c b/drivers/i3c/master/renesas-= i3c.c index 1bed2304b5ee..e0e75144440e 100644 --- a/drivers/i3c/master/renesas-i3c.c +++ b/drivers/i3c/master/renesas-i3c.c @@ -22,6 +22,7 @@ #include #include #include +#include #include #include #include "../internals.h" @@ -199,8 +200,6 @@ #define RENESAS_I3C_MAX_DEVS 8 #define I2C_INIT_MSG -1 =20 -#define RENESAS_I3C_TCLK_IDX 1 - enum i3c_internal_state { I3C_INTERNAL_STATE_DISABLED, I3C_INTERNAL_STATE_CONTROLLER_IDLE, @@ -263,9 +262,10 @@ struct renesas_i3c_addr { =20 struct renesas_i3c { void __iomem *regs; - struct clk_bulk_data *clks; + struct clk *tclk; struct reset_control *presetn; struct reset_control *tresetn; + struct device *dev; struct renesas_i3c_xferqueue xferqueue; struct i3c_master_controller base; struct renesas_i3c_addr addrs[RENESAS_I3C_MAX_DEVS]; @@ -278,7 +278,6 @@ struct renesas_i3c { u32 i3c_STDBR; u32 extbr; u16 maxdevs; - u8 num_clks; u8 refclk_div; }; =20 @@ -443,7 +442,24 @@ static void renesas_i3c_enqueue_xfer(struct renesas_i3= c *i3c, struct renesas_i3c } } =20 -static void renesas_i3c_wait_xfer(struct renesas_i3c *i3c, struct renesas_= i3c_xfer *xfer) +static void renesas_i3c_irqs_mask_and_clear(struct renesas_i3c *i3c) +{ + guard(spinlock_irqsave)(&i3c->xferqueue.lock); + + /* Disable all the interrupts */ + renesas_writel(i3c->regs, BIE, 0); + renesas_writel(i3c->regs, NTIE, 0); + + /* Clear normal transfer status flags. */ + renesas_clear_bit(i3c->regs, NTST, NTST_TDBEF0 | NTST_RDBFF0 | NTST_RSPQF= F | + NTST_TEF | NTST_TABTF); + /* Clear bus status flags. */ + renesas_clear_bit(i3c->regs, BST, BST_NACKDF | BST_TENDF | BST_SPCNDDF); + /* Clear error flags. */ + renesas_clear_bit(i3c->regs, BCTL, BCTL_ABT); +} + +static unsigned long renesas_i3c_wait_xfer(struct renesas_i3c *i3c, struct= renesas_i3c_xfer *xfer) { unsigned long time_left; =20 @@ -452,6 +468,8 @@ static void renesas_i3c_wait_xfer(struct renesas_i3c *i= 3c, struct renesas_i3c_xf time_left =3D wait_for_completion_timeout(&xfer->comp, msecs_to_jiffies(1= 000)); if (!time_left) renesas_i3c_dequeue_xfer(i3c, xfer); + + return time_left; } =20 static void renesas_i3c_set_prts(struct renesas_i3c *i3c, u32 val) @@ -485,6 +503,12 @@ static void renesas_i3c_bus_enable(struct i3c_master_c= ontroller *m, bool i3c_mod static int renesas_i3c_reset(struct renesas_i3c *i3c) { u32 val; + int ret; + + PM_RUNTIME_ACQUIRE_IF_ENABLED_AUTOSUSPEND(i3c->dev, pm); + ret =3D PM_RUNTIME_ACQUIRE_ERR(&pm); + if (ret) + return ret; =20 renesas_writel(i3c->regs, BCTL, 0); renesas_set_bit(i3c->regs, RSTCTL, RSTCTL_RI3CRST); @@ -556,7 +580,7 @@ static int renesas_i3c_bus_init(struct i3c_master_contr= oller *m) int od_high_ticks, od_low_ticks, i2c_total_ticks; int ret; =20 - i3c->rate =3D clk_get_rate(i3c->clks[RENESAS_I3C_TCLK_IDX].clk); + i3c->rate =3D clk_get_rate(i3c->tclk); if (!i3c->rate) return -EINVAL; =20 @@ -627,6 +651,11 @@ static int renesas_i3c_bus_init(struct i3c_master_cont= roller *m) if (ret) return ret; =20 + PM_RUNTIME_ACQUIRE_IF_ENABLED_AUTOSUSPEND(i3c->dev, pm); + ret =3D PM_RUNTIME_ACQUIRE_ERR(&pm); + if (ret) + return ret; + renesas_writel(i3c->regs, STDBR, i3c->i3c_STDBR); renesas_writel(i3c->regs, EXTBR, i3c->extbr); renesas_writel(i3c->regs, REFCKCTL, REFCKCTL_IREFCKS(cks)); @@ -716,6 +745,7 @@ static int renesas_i3c_daa(struct i3c_master_controller= *m) { struct renesas_i3c *i3c =3D to_renesas_i3c(m); struct renesas_i3c_cmd *cmd; + unsigned long time_left; u32 olddevs, newdevs; u8 last_addr =3D 0, pos; u8 first_i3c_pos =3D 0; @@ -729,6 +759,11 @@ static int renesas_i3c_daa(struct i3c_master_controlle= r *m) cmd =3D xfer->cmds; cmd->rx_count =3D 0; =20 + PM_RUNTIME_ACQUIRE_IF_ENABLED_AUTOSUSPEND(i3c->dev, pm); + ret =3D PM_RUNTIME_ACQUIRE_ERR(&pm); + if (ret) + return ret; + /* Enable I3C bus. */ renesas_i3c_bus_enable(m, true); =20 @@ -777,7 +812,9 @@ static int renesas_i3c_daa(struct i3c_master_controller= *m) NCMDQP_CMD(I3C_CCC_ENTDAA) | NCMDQP_DEV_INDEX(ret) | NCMDQP_DEV_COUNT(i3c->maxdevs - ret) | NCMDQP_TOC; =20 - renesas_i3c_wait_xfer(i3c, xfer); + time_left =3D renesas_i3c_wait_xfer(i3c, xfer); + if (!time_left) + renesas_i3c_irqs_mask_and_clear(i3c); =20 newdevs =3D GENMASK(i3c->maxdevs - cmd->rx_count - 1, first_i3c_pos); /* Re-attach all the I3C devices on resume. */ @@ -865,6 +902,7 @@ static int renesas_i3c_send_ccc_cmd(struct i3c_master_c= ontroller *m, { struct renesas_i3c *i3c =3D to_renesas_i3c(m); struct renesas_i3c_cmd *cmd; + unsigned long time_left; int ret, pos =3D 0; =20 if (ccc->id & I3C_CCC_DIRECT) { @@ -882,6 +920,11 @@ static int renesas_i3c_send_ccc_cmd(struct i3c_master_= controller *m, cmd->rnw =3D ccc->rnw; cmd->cmd0 =3D 0; =20 + PM_RUNTIME_ACQUIRE_IF_ENABLED_AUTOSUSPEND(i3c->dev, pm); + ret =3D PM_RUNTIME_ACQUIRE_ERR(&pm); + if (ret) + return ret; + renesas_i3c_bus_enable(m, true); =20 /* Calculate the command descriptor. */ @@ -916,7 +959,9 @@ static int renesas_i3c_send_ccc_cmd(struct i3c_master_c= ontroller *m, } } =20 - renesas_i3c_wait_xfer(i3c, xfer); + time_left =3D renesas_i3c_wait_xfer(i3c, xfer); + if (!time_left) + renesas_i3c_irqs_mask_and_clear(i3c); =20 ret =3D xfer->ret; if (ret) @@ -931,7 +976,9 @@ static int renesas_i3c_i3c_xfers(struct i3c_dev_desc *d= ev, struct i3c_xfer *i3c_ struct i3c_master_controller *m =3D i3c_dev_get_master(dev); struct renesas_i3c *i3c =3D to_renesas_i3c(m); struct renesas_i3c_i2c_dev_data *data =3D i3c_dev_get_master_data(dev); - int i; + unsigned long time_left; + bool xfer_failed =3D false; + int i, ret; =20 struct renesas_i3c_xfer *xfer __free(kfree) =3D renesas_i3c_alloc_xfer(i3= c, 1); if (!xfer) @@ -939,6 +986,11 @@ static int renesas_i3c_i3c_xfers(struct i3c_dev_desc *= dev, struct i3c_xfer *i3c_ =20 init_completion(&xfer->comp); =20 + PM_RUNTIME_ACQUIRE_IF_ENABLED_AUTOSUSPEND(i3c->dev, pm); + ret =3D PM_RUNTIME_ACQUIRE_ERR(&pm); + if (ret) + return ret; + /* Enable I3C bus. */ renesas_i3c_bus_enable(m, true); =20 @@ -970,9 +1022,14 @@ static int renesas_i3c_i3c_xfers(struct i3c_dev_desc = *dev, struct i3c_xfer *i3c_ renesas_set_bit(i3c->regs, NTIE, NTIE_TDBEIE0); } =20 - renesas_i3c_wait_xfer(i3c, xfer); + time_left =3D renesas_i3c_wait_xfer(i3c, xfer); + if (!time_left) + xfer_failed =3D true; } =20 + if (xfer_failed) + renesas_i3c_irqs_mask_and_clear(i3c); + return 0; } =20 @@ -981,12 +1038,17 @@ static int renesas_i3c_attach_i3c_dev(struct i3c_dev= _desc *dev) struct i3c_master_controller *m =3D i3c_dev_get_master(dev); struct renesas_i3c *i3c =3D to_renesas_i3c(m); struct renesas_i3c_i2c_dev_data *data; - int pos; + int pos, ret; =20 pos =3D renesas_i3c_get_free_pos(i3c); if (pos < 0) return pos; =20 + PM_RUNTIME_ACQUIRE_IF_ENABLED_AUTOSUSPEND(i3c->dev, pm); + ret =3D PM_RUNTIME_ACQUIRE_ERR(&pm); + if (ret) + return ret; + data =3D kzalloc_obj(*data); if (!data) return -ENOMEM; @@ -1010,7 +1072,12 @@ static int renesas_i3c_reattach_i3c_dev(struct i3c_d= ev_desc *dev, struct renesas_i3c *i3c =3D to_renesas_i3c(m); struct renesas_i3c_i2c_dev_data *data =3D i3c_dev_get_master_data(dev); struct i3c_dev_desc *tmp_dev =3D i3c->addrs[data->index].i3c_dev; - int pos; + int pos, ret; + + PM_RUNTIME_ACQUIRE_IF_ENABLED_AUTOSUSPEND(i3c->dev, pm); + ret =3D PM_RUNTIME_ACQUIRE_ERR(&pm); + if (ret) + return ret; =20 pos =3D renesas_i3c_get_free_pos(i3c); =20 @@ -1040,8 +1107,12 @@ static void renesas_i3c_detach_i3c_dev(struct i3c_de= v_desc *dev) struct renesas_i3c_i2c_dev_data *data =3D i3c_dev_get_master_data(dev); struct i3c_master_controller *m =3D i3c_dev_get_master(dev); struct renesas_i3c *i3c =3D to_renesas_i3c(m); + int ret; =20 - renesas_writel(i3c->regs, DATBAS(data->index), 0); + PM_RUNTIME_ACQUIRE_IF_ENABLED_AUTOSUSPEND(i3c->dev, pm); + ret =3D PM_RUNTIME_ACQUIRE_ERR(&pm); + if (!ret) + renesas_writel(i3c->regs, DATBAS(data->index), 0); =20 i3c_dev_set_master_data(dev, NULL); i3c->addrs[data->index].addr =3D 0; @@ -1058,7 +1129,9 @@ static int renesas_i3c_i2c_xfers(struct i2c_dev_desc = *dev, struct renesas_i3c *i3c =3D to_renesas_i3c(m); struct renesas_i3c_cmd *cmd; u8 start_bit =3D CNDCTL_STCND; - int i; + unsigned long time_left; + bool xfer_failed =3D false; + int i, ret; =20 if (!i2c_nxfers) return 0; @@ -1071,6 +1144,11 @@ static int renesas_i3c_i2c_xfers(struct i2c_dev_desc= *dev, xfer->is_i2c_xfer =3D true; cmd =3D xfer->cmds; =20 + PM_RUNTIME_ACQUIRE_IF_ENABLED_AUTOSUSPEND(i3c->dev, pm); + ret =3D PM_RUNTIME_ACQUIRE_ERR(&pm); + if (ret) + return ret; + renesas_i3c_bus_enable(m, false); =20 if (!(renesas_readl(i3c->regs, BCST) & BCST_BFREF)) { @@ -1097,7 +1175,9 @@ static int renesas_i3c_i2c_xfers(struct i2c_dev_desc = *dev, =20 renesas_set_bit(i3c->regs, NTSTE, NTSTE_TDBEE0); =20 - wait_for_completion_timeout(&xfer->comp, m->i2c.timeout); + time_left =3D wait_for_completion_timeout(&xfer->comp, m->i2c.timeout); + if (!time_left) + xfer_failed =3D true; =20 if (cmd->err) break; @@ -1106,6 +1186,10 @@ static int renesas_i3c_i2c_xfers(struct i2c_dev_desc= *dev, } =20 renesas_i3c_dequeue_xfer(i3c, xfer); + + if (xfer_failed) + renesas_i3c_irqs_mask_and_clear(i3c); + return cmd->err; } =20 @@ -1508,12 +1592,16 @@ static int renesas_i3c_probe(struct platform_device= *pdev) if (IS_ERR(i3c->regs)) return PTR_ERR(i3c->regs); =20 - ret =3D devm_clk_bulk_get_all_enabled(&pdev->dev, &i3c->clks); - if (ret <=3D RENESAS_I3C_TCLK_IDX) - return dev_err_probe(&pdev->dev, ret < 0 ? ret : -EINVAL, - "Failed to get clocks (need > %d, got %d)\n", - RENESAS_I3C_TCLK_IDX, ret); - i3c->num_clks =3D ret; + i3c->tclk =3D devm_clk_get(&pdev->dev, "tclk"); + if (IS_ERR(i3c->tclk)) + return dev_err_probe(&pdev->dev, PTR_ERR(i3c->tclk), "Failed to get tclk= "); + + i3c->dev =3D &pdev->dev; + pm_runtime_set_autosuspend_delay(&pdev->dev, 300); + pm_runtime_use_autosuspend(&pdev->dev); + ret =3D devm_pm_runtime_enable(&pdev->dev); + if (ret) + return ret; =20 i3c->tresetn =3D devm_reset_control_get_optional_exclusive_deasserted(&pd= ev->dev, "tresetn"); if (IS_ERR(i3c->tresetn)) @@ -1580,8 +1668,6 @@ static int renesas_i3c_suspend(struct device *dev) if (ret) goto err_mark_resumed; =20 - clk_bulk_disable(i3c->num_clks, i3c->clks); - return 0; =20 err_mark_resumed: @@ -1603,13 +1689,13 @@ static int renesas_i3c_resume(struct device *dev) if (ret) return ret; =20 - ret =3D clk_bulk_enable(i3c->num_clks, i3c->clks); + ret =3D renesas_i3c_reset(i3c); if (ret) goto err_resets_asserted; =20 - ret =3D renesas_i3c_reset(i3c); + ret =3D pm_runtime_resume_and_get(dev); if (ret) - goto err_clks_disable; + goto err_resets_asserted; =20 /* Re-store I3C registers value. */ renesas_writel(i3c->regs, STDBR, i3c->i3c_STDBR); @@ -1632,15 +1718,23 @@ static int renesas_i3c_resume(struct device *dev) =20 i2c_mark_adapter_resumed(&i3c->base.i2c); =20 + pm_runtime_put_autosuspend(dev); + /* * I3C devices may have retained their dynamic address anyway. Do not * fail the resume because of DAA error. */ return 0; =20 -err_clks_disable: - clk_bulk_disable(i3c->num_clks, i3c->clks); err_resets_asserted: + /* + * If this happens, there is no way to recover from this state without + * reloading the driver. We want to avoid keeping the reset line + * deasserted unnecessarily. The runtime paths will still work correctly + * even if the IP registers are accessed while reset is asserted (e.g. + * if a runtime path is triggered after a failed resume). Checked on + * RZ/G3S. + */ reset_control_bulk_assert(ARRAY_SIZE(resets), resets); return ret; } --=20 2.43.0