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Wed, 10 Jun 2026 05:03:35 +0000 (GMT) From: Sanghoon Bae To: robh@kernel.org, krzk@kernel.org, conor+dt@kernel.org, vkoul@kernel.org, alim.akhtar@samsung.com, kishon@kernel.org Cc: krzk+dt@kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-samsung-soc@vger.kernel.org, sowon.na@samsung.com, Sanghoon Bae Subject: [PATCH v3 1/2] dt-bindings: soc: samsung: exynos-sysreg: Add hsi0 for ExynosAutov920 Date: Wed, 10 Jun 2026 14:03:25 +0900 Message-ID: <20260610050326.2903402-2-sh86.bae@samsung.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20260610050326.2903402-1-sh86.bae@samsung.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CMS-MailID: 20260610050335epcas2p3ec1c019e86b75e9a4edd965a8b27ebd3 X-Msg-Generator: CA Content-Type: text/plain; charset="utf-8" X-Sendblock-Type: AUTO_CONFIDENTIAL CMS-TYPE: 102P cpgsPolicy: CPGSC10-234,Y X-CFilter-Loop: Reflected X-CMS-RootMailID: 20260610050335epcas2p3ec1c019e86b75e9a4edd965a8b27ebd3 References: <20260610050326.2903402-1-sh86.bae@samsung.com> Add hsi0 compatible on samsung,exynos-sysreg To support ExynosAutov920 PCIe settings: - PCIe PHY power control - PLL settings for PCIe - PCIe device direction (RC/EP) Signed-off-by: Sanghoon Bae Acked-by: Krzysztof Kozlowski Reviewed-by: Peter Griffin --- .../devicetree/bindings/soc/samsung/samsung,exynos-sysreg.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/soc/samsung/samsung,exynos-s= ysreg.yaml b/Documentation/devicetree/bindings/soc/samsung/samsung,exynos-s= ysreg.yaml index 9c63dbcd4d77..fcdb9ffd2644 100644 --- a/Documentation/devicetree/bindings/soc/samsung/samsung,exynos-sysreg.y= aml +++ b/Documentation/devicetree/bindings/soc/samsung/samsung,exynos-sysreg.y= aml @@ -37,6 +37,7 @@ properties: - samsung,exynos8895-peric1-sysreg - samsung,exynos990-peric0-sysreg - samsung,exynos990-peric1-sysreg + - samsung,exynosautov920-hsi0-sysreg - samsung,exynosautov920-hsi2-sysreg - samsung,exynosautov920-peric0-sysreg - samsung,exynosautov920-peric1-sysreg --=20 2.45.2 From nobody Fri Jun 12 10:15:15 2026 Received: from mailout2.samsung.com (mailout2.samsung.com [203.254.224.25]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4799E320CD9 for ; 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Wed, 10 Jun 2026 05:03:38 +0000 (GMT) Received: from epcas2p3.samsung.com (unknown [182.195.38.212]) by epsnrtp03.localdomain (Postfix) with ESMTP id 4gZtw95Xqmz3hhTJ; Wed, 10 Jun 2026 05:03:37 +0000 (GMT) Received: from epsmtip2.samsung.com (unknown [182.195.34.31]) by epcas2p1.samsung.com (KnoxPortal) with ESMTPA id 20260610050337epcas2p1f6d27933f30ac063454fd25acbde327f~3n75FdVWB1919519195epcas2p1r; Wed, 10 Jun 2026 05:03:37 +0000 (GMT) Received: from asswp146.dsn.sec.samsung.com (unknown [12.81.221.119]) by epsmtip2.samsung.com (KnoxPortal) with ESMTPA id 20260610050337epsmtip20946b4cb4fa967ce2bcf483b8228ec99~3n74_1iwQ1096610966epsmtip2Q; Wed, 10 Jun 2026 05:03:37 +0000 (GMT) From: Sanghoon Bae To: robh@kernel.org, krzk@kernel.org, conor+dt@kernel.org, vkoul@kernel.org, alim.akhtar@samsung.com, kishon@kernel.org Cc: krzk+dt@kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-samsung-soc@vger.kernel.org, sowon.na@samsung.com, Sanghoon Bae Subject: [PATCH v3 2/2] arm64: dts: exynosautov920: Add hsi0 syscon node for PCIe PHY Date: Wed, 10 Jun 2026 14:03:26 +0900 Message-ID: <20260610050326.2903402-3-sh86.bae@samsung.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20260610050326.2903402-1-sh86.bae@samsung.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CMS-MailID: 20260610050337epcas2p1f6d27933f30ac063454fd25acbde327f X-Msg-Generator: CA Content-Type: text/plain; charset="utf-8" X-Sendblock-Type: AUTO_CONFIDENTIAL CMS-TYPE: 102P cpgsPolicy: CPGSC10-234,Y X-CFilter-Loop: Reflected X-CMS-RootMailID: 20260610050337epcas2p1f6d27933f30ac063454fd25acbde327f References: <20260610050326.2903402-1-sh86.bae@samsung.com> Add the syscon-hsi0 node to control PCIe PHY power, PLL settings, and device direction (RC/EP mode) on ExynosAutov920. Signed-off-by: Sanghoon Bae Reviewed-by: Peter Griffin --- arch/arm64/boot/dts/exynos/exynosautov920.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/exynos/exynosautov920.dtsi b/arch/arm64/bo= ot/dts/exynos/exynosautov920.dtsi index 0bf7c4cb9846..cc3ed5c52ffe 100644 --- a/arch/arm64/boot/dts/exynos/exynosautov920.dtsi +++ b/arch/arm64/boot/dts/exynos/exynosautov920.dtsi @@ -1382,6 +1382,12 @@ cmu_hsi0: clock-controller@16000000 { "noc"; }; =20 + syscon_hsi0: syscon@16030000 { + compatible =3D "samsung,exynosautov920-hsi0-sysreg", + "syscon"; + reg =3D <0x16030000 0x1000>; + }; + pinctrl_hsi0: pinctrl@16040000 { compatible =3D "samsung,exynosautov920-pinctrl"; reg =3D <0x16040000 0x10000>; --=20 2.45.2