From nobody Sat Jun 13 12:15:33 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C6F1D394793; Mon, 8 Jun 2026 20:15:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780949756; cv=none; b=YChrBhMnC5mplsKWlKXHp8n4i1MB2+L2Vs+h4nXSFD2+qgXtA/Iy9yXqwlPz0lVPwcuIdNISy4zSk31XKn+6noKHQAGvnq2K9/KLrRkOCBYzyVwA2oJSnuE4tuyDxZLb0vTLWfj9SntwBt6Hh2DlmTP5omoweJP2vpyJGMfvOv8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780949756; c=relaxed/simple; bh=WjAKYLD19unZv2Uwe3pryVoGBDtIkXKoc7UaOgsBdSI=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=sJDDu25lznDIu0QvcvdhikOx39W+5yvppdeHnaLPV6ar4YG36sIrWG33qaf7mIivVsMG/fPbpDU+4xiby0jheePd0s2rWzTshvuv74joYxQTDvzFsFUIiccge56wubv3Ztb1boCNFcRzCsjgC8APcL6b3XZPwy6uNjPY2YZ6bQ0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=ThjEOtZx; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="ThjEOtZx" Received: by smtp.kernel.org (Postfix) with ESMTPSA id C97391F00898; Mon, 8 Jun 2026 20:15:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1780949755; bh=jbpCIZZMa6WvgXcR1iGqmxLZxC/rvMaJ2IzN6io74mQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=ThjEOtZxaTklOCwM4A2QvgXo1t//GF1p51Vz8W26Z9D8FmEn+ieQhlWjfVLMmdjTA yQdRMOsnbpU2pDXYVLnqg0GsyE5z40qBsb18WY+hfd/ot3l8+b4sPCto1wZl5LKbKf kCpLNhGhHbfKCLKW+IrYjTxFxoRCJuYEjeVyk1OnZcXyax052SqEIwZ7lAiVa1S7No N6F69q8WMOK1kIX7TOe/YNf9vKS4olzTmccHUca0vPvmCtX6GNeUbZAa6JE4gS28Ib XbVN2+0xPtYKXQHx/ssCriOwwU6kQBnQjGIlbvIPDGM7uhGWtf6hjFpaRJE/rLnKB+ NU/CH4HD/mX+Q== From: Claudiu Beznea To: wsa+renesas@sang-engineering.com, tommaso.merciai.xr@bp.renesas.com, alexandre.belloni@bootlin.com, Frank.Li@nxp.com, p.zabel@pengutronix.de Cc: claudiu.beznea@kernel.org, claudiu.beznea@tuxon.dev, linux-i3c@lists.infradead.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Claudiu Beznea , stable@vger.kernel.org Subject: [PATCH v3 01/17] i3c: renesas: Check that the transfer is valid before accessing it Date: Mon, 8 Jun 2026 23:15:27 +0300 Message-ID: <20260608201543.804902-2-claudiu.beznea@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260608201543.804902-1-claudiu.beznea@kernel.org> References: <20260608201543.804902-1-claudiu.beznea@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Claudiu Beznea The Renesas I3C driver uses an asynchronous model to transfer data. It prepares a struct renesas_i3c_xfer, enqueues it, and waits for completion. The interrupt handler dequeues the transfer, updates/uses it, and signals the waiting thread. If the completion times out, the waiting thread dequeues the transfer and free it. If an interrupt fires after that, the handler may access freed memory, leading to crashes. Check that the transfer is still valid before accessing it in the interrupt handler. Along with it, clear any status flag to avoid triggering the same interrupts again. Fixes: d028219a9f14 ("i3c: master: Add basic driver for the Renesas I3C con= troller") Cc: stable@vger.kernel.org Reviewed-by: Frank Li Signed-off-by: Claudiu Beznea --- Changes in v3: - none Changes in v2: - clean the IRQ status bits before returning IRQ_HANDLED and adjusted the patch description to reflect this change - collected Frank's tag. Frank, please let me know if you consider I should drop your tag. Thanks! drivers/i3c/master/renesas-i3c.c | 44 +++++++++++++++++++++++++++++--- 1 file changed, 41 insertions(+), 3 deletions(-) diff --git a/drivers/i3c/master/renesas-i3c.c b/drivers/i3c/master/renesas-= i3c.c index f39c449922ca..6e7ece2e0b4e 100644 --- a/drivers/i3c/master/renesas-i3c.c +++ b/drivers/i3c/master/renesas-i3c.c @@ -1014,6 +1014,12 @@ static irqreturn_t renesas_i3c_tx_isr(int irq, void = *data) =20 scoped_guard(spinlock, &i3c->xferqueue.lock) { xfer =3D i3c->xferqueue.cur; + if (!xfer) { + /* Clear the Transmit Buffer Empty status flag. */ + renesas_clear_bit(i3c->regs, NTST, NTST_TDBEF0); + return IRQ_HANDLED; + } + cmd =3D xfer->cmds; =20 if (xfer->is_i2c_xfer) { @@ -1053,11 +1059,18 @@ static irqreturn_t renesas_i3c_resp_isr(int irq, vo= id *data) int ret =3D 0; =20 scoped_guard(spinlock, &i3c->xferqueue.lock) { + /* Clear the Respone Queue Full status flag */ + renesas_clear_bit(i3c->regs, NTST, NTST_RSPQFF); + xfer =3D i3c->xferqueue.cur; - cmd =3D xfer->cmds; + if (!xfer) { + /* Clear any error flags. */ + renesas_clear_bit(i3c->regs, BCTL, BCTL_ABT); + renesas_clear_bit(i3c->regs, NTST, NTST_TEF | NTST_TABTF); + return IRQ_HANDLED; + } =20 - /* Clear the Respone Queue Full status flag*/ - renesas_clear_bit(i3c->regs, NTST, NTST_RSPQFF); + cmd =3D xfer->cmds; =20 data_len =3D NRSPQP_DATA_LEN(resp_descriptor); =20 @@ -1138,6 +1151,12 @@ static irqreturn_t renesas_i3c_tend_isr(int irq, voi= d *data) =20 scoped_guard(spinlock, &i3c->xferqueue.lock) { xfer =3D i3c->xferqueue.cur; + if (!xfer) { + /* Clear any status flag. */ + renesas_clear_bit(i3c->regs, BST, BST_NACKDF | BST_TENDF); + return IRQ_HANDLED; + } + cmd =3D xfer->cmds; =20 if (xfer->is_i2c_xfer) { @@ -1184,6 +1203,14 @@ static irqreturn_t renesas_i3c_rx_isr(int irq, void = *data) =20 scoped_guard(spinlock, &i3c->xferqueue.lock) { xfer =3D i3c->xferqueue.cur; + if (!xfer) { + /* Clear any status registers. */ + renesas_clear_bit(i3c->regs, BST, BST_SPCNDDF); + /* Clear the Read Buffer Full status flag. */ + renesas_clear_bit(i3c->regs, NTST, NTST_RDBFF0); + return IRQ_HANDLED; + } + cmd =3D xfer->cmds; =20 if (xfer->is_i2c_xfer) { @@ -1235,6 +1262,11 @@ static irqreturn_t renesas_i3c_stop_isr(int irq, voi= d *data) =20 scoped_guard(spinlock, &i3c->xferqueue.lock) { xfer =3D i3c->xferqueue.cur; + if (!xfer) { + /* Clear the RX/TX Data Buffer Full status flag. */ + renesas_clear_bit(i3c->regs, NTST, NTST_TDBEF0 | NTST_RDBFF0); + return IRQ_HANDLED; + } =20 /* read back registers to confirm writes have fully propagated */ renesas_writel(i3c->regs, BST, 0); @@ -1259,6 +1291,12 @@ static irqreturn_t renesas_i3c_start_isr(int irq, vo= id *data) =20 scoped_guard(spinlock, &i3c->xferqueue.lock) { xfer =3D i3c->xferqueue.cur; + if (!xfer) { + /* Clear any status registers. */ + renesas_clear_bit(i3c->regs, BST, BST_STCNDDF); + return IRQ_HANDLED; + } + cmd =3D xfer->cmds; =20 if (xfer->is_i2c_xfer) { --=20 2.43.0 From nobody Sat Jun 13 12:15:33 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A0B6738B14F; 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dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="gXIYcO5D" Received: by smtp.kernel.org (Postfix) with ESMTPSA id E0CB61F00893; Mon, 8 Jun 2026 20:15:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1780949758; bh=mh56t27ra29Va8lAVpeTTbD/G1/Tzq5CpT5YVX3cqTw=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=gXIYcO5DFSANpmU98Tq2eI0pXH6HN02F3ijYTgkcYgpzFYE3apDUDGHlbHKNECEwz HWhraPrVI4AGFm3tUITZKa8V5C51u5OoCZUPYC6Z6izhZfqfmAQyyMIHD3ZiRxlkRj 6DYQpNvQlK8UegnS2tgOEaEeWiTRa8UFt1dOSzsdSsT1ISUOjHIydKp+sEXo4OyVHo IUh8rfdmFFwY34xC1GJ4y26KnegQ9QfUBsEzJpt+hX7mlmq4Rh6DIAvTH26nKdkjfr zCq5oKEcVLRQrNRskBDB1vXZcK1+3EybYcoInuaQE8fdUjTR35MwIAwiQYTeMdzSx4 niL6tOiKpcMug== From: Claudiu Beznea To: wsa+renesas@sang-engineering.com, tommaso.merciai.xr@bp.renesas.com, alexandre.belloni@bootlin.com, Frank.Li@nxp.com, p.zabel@pengutronix.de Cc: claudiu.beznea@kernel.org, claudiu.beznea@tuxon.dev, linux-i3c@lists.infradead.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Claudiu Beznea , stable@vger.kernel.org Subject: [PATCH v3 02/17] i3c: renesas: Restore STDBR and EXTBR registers on resume Date: Mon, 8 Jun 2026 23:15:28 +0300 Message-ID: <20260608201543.804902-3-claudiu.beznea@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260608201543.804902-1-claudiu.beznea@kernel.org> References: <20260608201543.804902-1-claudiu.beznea@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Claudiu Beznea The Renesas RZ/G3S supports a power saving state where power to the most SoC componentes (including I3C) is lost. The STDBR and EXTBR are configured in initialization phase though the struct i3c_master_controller_ops::bus_init. Set them on resume function as well to keep the same state of the controller after a suspend with power loss and a similar initialization sequence as in bus_init. Fixes: e7218986319b ("i3c: renesas: Add suspend/resume support") Cc: stable@vger.kernel.org Reviewed-by: Frank Li Signed-off-by: Claudiu Beznea --- Changes in v3: - none Changes in v2: - collected tags drivers/i3c/master/renesas-i3c.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/i3c/master/renesas-i3c.c b/drivers/i3c/master/renesas-= i3c.c index 6e7ece2e0b4e..88a16efe096d 100644 --- a/drivers/i3c/master/renesas-i3c.c +++ b/drivers/i3c/master/renesas-i3c.c @@ -260,6 +260,7 @@ struct renesas_i3c { u32 dyn_addr; u32 i2c_STDBR; u32 i3c_STDBR; + u32 extbr; unsigned long rate; u8 addrs[RENESAS_I3C_MAX_DEVS]; struct renesas_i3c_xferqueue xferqueue; @@ -607,10 +608,9 @@ static int renesas_i3c_bus_init(struct i3c_master_cont= roller *m) renesas_writel(i3c->regs, STDBR, i3c->i3c_STDBR); =20 /* Extended Bit Rate setting */ - renesas_writel(i3c->regs, EXTBR, EXTBR_EBRLO(od_low_ticks) | - EXTBR_EBRHO(od_high_ticks) | - EXTBR_EBRLP(pp_low_ticks) | - EXTBR_EBRHP(pp_high_ticks)); + i3c->extbr =3D EXTBR_EBRLO(od_low_ticks) | EXTBR_EBRHO(od_high_ticks) | + EXTBR_EBRLP(pp_low_ticks) | EXTBR_EBRHP(pp_high_ticks); + renesas_writel(i3c->regs, EXTBR, i3c->extbr); =20 renesas_writel(i3c->regs, REFCKCTL, REFCKCTL_IREFCKS(cks)); i3c->refclk_div =3D cks; @@ -1468,6 +1468,8 @@ static int renesas_i3c_resume_noirq(struct device *de= v) goto err_tresetn; =20 /* Re-store I3C registers value. */ + renesas_writel(i3c->regs, STDBR, i3c->i3c_STDBR); + renesas_writel(i3c->regs, EXTBR, i3c->extbr); renesas_writel(i3c->regs, REFCKCTL, REFCKCTL_IREFCKS(i3c->refclk_div)); renesas_writel(i3c->regs, MSDVAD, MSDVAD_MDYADV | --=20 2.43.0 From nobody Sat Jun 13 12:15:33 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EC87B394E8A; Mon, 8 Jun 2026 20:16:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780949763; cv=none; b=ZmHS0yZWhSqEFdbjyEmRaG1v0RADvbPzcC0GJOqAOEgqB1iDqyngvF5QZpCu7jTgmYWV7kSh0xRtOs22nM6i/LiYQ4ppHdZW+cplhf4ejhu4Ferp9Un+cuN6GBDZJIxE8uc0wBKi87gqQTms/XMfB8fzDFRKWsYhEvw3b6TddJo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780949763; c=relaxed/simple; bh=ctmc5Cnt5dYWekzTmByNoGrzWo7KMVKFFilklkPaABA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=seXMeezbG7B8vcrnmiV5PFFGVmlGapgvp9PjPxGOpLjeFPpFehzqiRWLBGcLDmqak0BdnKaX1JCDl+RjF7w4EKixfGo55uDeKsmf/HF2CzIp2Cwy7bBUqOPL6TWiQLYWTOjNjqR/sZVqQwfvcSwSJCOK8wNBTwt87iLKo3taEGA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=LIvJ9q7S; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="LIvJ9q7S" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 0767F1F00898; Mon, 8 Jun 2026 20:15:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1780949761; bh=DHwFqL4VSTCkylyGRo5OPZaQBQuLH7xv9iUuuKDMbZI=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=LIvJ9q7SbouUDhYrbdF7zGRR54pI6K2JbyUfMgZZUVGUciCR4gzDtCPJ0rILsEey9 eaLwN4Io+tyUU7UHXT/8XjB3lw/2kJIQ6Jr+sDqC7Yb8nmbX8QUYJvl6NU7VJ+cEQ1 f+DbiNA8EBIq+N/67uuBNTuQuK0MC0Fuy955RU050XgvpAXSDH1pNUhJtcuJS62vUC hECSQYjY0uyyCZ9lTCslJIIReQp9VNKmJNNPw6XcYovvIpwR3tgRGrgsO5su6BvVlr immTb/Kn7Ei+Fovf5cvWrOzTU2fqCrAkVorD3AR8KDpz6laV1cKGdYdxJRb6SjVhGn r6w72Qvyak4+g== From: Claudiu Beznea To: wsa+renesas@sang-engineering.com, tommaso.merciai.xr@bp.renesas.com, alexandre.belloni@bootlin.com, Frank.Li@nxp.com, p.zabel@pengutronix.de Cc: claudiu.beznea@kernel.org, claudiu.beznea@tuxon.dev, linux-i3c@lists.infradead.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Claudiu Beznea , stable@vger.kernel.org Subject: [PATCH v3 03/17] i3c: renesas: Follow the reset deassert order used in probe Date: Mon, 8 Jun 2026 23:15:29 +0300 Message-ID: <20260608201543.804902-4-claudiu.beznea@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260608201543.804902-1-claudiu.beznea@kernel.org> References: <20260608201543.804902-1-claudiu.beznea@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Claudiu Beznea Use the same reset deassert order in the resume and probe paths to avoid potential failures due to ordering differences. Fixes: e7218986319b ("i3c: renesas: Add suspend/resume support") Cc: stable@vger.kernel.org Reviewed-by: Frank Li Signed-off-by: Claudiu Beznea --- Changes in v3: - none Changes in v2: - collected tags drivers/i3c/master/renesas-i3c.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/i3c/master/renesas-i3c.c b/drivers/i3c/master/renesas-= i3c.c index 88a16efe096d..4c86e7257804 100644 --- a/drivers/i3c/master/renesas-i3c.c +++ b/drivers/i3c/master/renesas-i3c.c @@ -1455,17 +1455,17 @@ static int renesas_i3c_resume_noirq(struct device *= dev) struct renesas_i3c *i3c =3D dev_get_drvdata(dev); int i, ret; =20 - ret =3D reset_control_deassert(i3c->presetn); + ret =3D reset_control_deassert(i3c->tresetn); if (ret) return ret; =20 - ret =3D reset_control_deassert(i3c->tresetn); + ret =3D reset_control_deassert(i3c->presetn); if (ret) - goto err_presetn; + goto err_tresetn; =20 ret =3D clk_bulk_enable(i3c->num_clks, i3c->clks); if (ret) - goto err_tresetn; + goto err_presetn; =20 /* Re-store I3C registers value. */ renesas_writel(i3c->regs, STDBR, i3c->i3c_STDBR); @@ -1486,10 +1486,10 @@ static int renesas_i3c_resume_noirq(struct device *= dev) =20 return 0; =20 -err_tresetn: - reset_control_assert(i3c->tresetn); err_presetn: reset_control_assert(i3c->presetn); +err_tresetn: + reset_control_assert(i3c->tresetn); return ret; } =20 --=20 2.43.0 From nobody Sat Jun 13 12:15:33 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D3EEE38C2D8; Mon, 8 Jun 2026 20:16:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780949765; cv=none; b=XNee53P8bVUi2sc0MRBOD0YlrJZnXVGBbM+XYW2bUFKhEMBWiKtxAmm1YOiGLDz3uybqBgTXbbZzI6YI1xFNf9gZS5Hv4rkrPYB/ZhGzjDd0uLTHqL/Yet9viOGWDz6dyIz1OBTDj642se1sH3urO209AC7BLNLaOkd7LSIc5JE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780949765; c=relaxed/simple; bh=ybBS33TQULf2cl/ktMtHZwTNoVPfCubN7wkXEHzc9gs=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=tjvMnPKhf80sDWOlhWuPgbYev1WQbFzGwh8LT//DrmW09hG0j7MxqWPaZYxo7wFWOnhUwA9VaVGz6eZFwraUC32RmKqQL3NWSkBCLM45yYT+V7aZqQ/s8m3+Z/RyeAI9MivYvZuHVdseJe2nqPDY1DzLlrPbFfMj5Yrin7G8CO4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=epm3BqGF; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="epm3BqGF" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 1E5311F00893; Mon, 8 Jun 2026 20:16:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1780949764; bh=683UmwIi1SQx+C8dZmNkBU6Aoy5p/F3p/7Oc7ikp9Cs=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=epm3BqGFdiBcoVTRqOJFJHfdiCDIcuFsY35DwMZkb1mHfkzoEhPPvlu4J6iKNxK5f MPzhf8HKU2xxL3kr/Rwp1DuuKSuwwIkuU8r7rAw+ut8UJcqwAYRgbPQ0CrI5YcdaYu OVWRp9WNUbf0NHPiiK28PEPHmPQ8gCnTvJrAqS/js0y2Xo+LXXNgNB9HLfzoHUOxbj FAi9xOrNmlPzZd++SuBuzQw30liJwo07IBaE8Kic0DisWmsKgc/24tj4USia03Wapj Vu7mUIINEQut+bOyRTggX6tb909kK7B+GwucXKNL8UZFN2ph7/Lj9duxI56oD/XVF3 ncC4NMzVWYJxg== From: Claudiu Beznea To: wsa+renesas@sang-engineering.com, tommaso.merciai.xr@bp.renesas.com, alexandre.belloni@bootlin.com, Frank.Li@nxp.com, p.zabel@pengutronix.de Cc: claudiu.beznea@kernel.org, claudiu.beznea@tuxon.dev, linux-i3c@lists.infradead.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Claudiu Beznea , stable@vger.kernel.org Subject: [PATCH v3 04/17] i3c: renesas: Reconfigure the DATBAS register on re-attach Date: Mon, 8 Jun 2026 23:15:30 +0300 Message-ID: <20260608201543.804902-5-claudiu.beznea@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260608201543.804902-1-claudiu.beznea@kernel.org> References: <20260608201543.804902-1-claudiu.beznea@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Claudiu Beznea During re-attach, the device may change its position in the i3c->addrs[] array. As a result, it may use a different Device Address Table Basic Register (DATBAS), which needs to be reconfigured. Reconfigure the DATBAS register on re-attach. Along with it update software caches. Fixes: d028219a9f14 ("i3c: master: Add basic driver for the Renesas I3C con= troller") Cc: stable@vger.kernel.org Reviewed-by: Frank Li Signed-off-by: Claudiu Beznea --- Changes in v3: - collected tags Changes in v2: - dropped the "if (pos < 0)" check in renesas_i3c_reattach_i3c_dev() to all= ow re-attaching in case of a full bus; along with it the condition to update the DATBAS register and software caches was updated to if (data->index !=3D pos && pos >=3D 0) - adjusted the patch title drivers/i3c/master/renesas-i3c.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/drivers/i3c/master/renesas-i3c.c b/drivers/i3c/master/renesas-= i3c.c index 4c86e7257804..76a4831098c9 100644 --- a/drivers/i3c/master/renesas-i3c.c +++ b/drivers/i3c/master/renesas-i3c.c @@ -892,10 +892,26 @@ static int renesas_i3c_reattach_i3c_dev(struct i3c_de= v_desc *dev, struct i3c_master_controller *m =3D i3c_dev_get_master(dev); struct renesas_i3c *i3c =3D to_renesas_i3c(m); struct renesas_i3c_i2c_dev_data *data =3D i3c_dev_get_master_data(dev); + int pos; + + pos =3D renesas_i3c_get_free_pos(i3c); + + if (data->index !=3D pos && pos >=3D 0) { + renesas_writel(i3c->regs, DATBAS(data->index), 0); + i3c->addrs[data->index] =3D 0; + i3c->free_pos |=3D BIT(data->index); + + data->index =3D pos; + i3c->free_pos &=3D ~BIT(data->index); + } =20 i3c->addrs[data->index] =3D dev->info.dyn_addr ? dev->info.dyn_addr : dev->info.static_addr; =20 + renesas_writel(i3c->regs, DATBAS(data->index), + DATBAS_DVSTAD(dev->info.static_addr) | + datbas_dvdyad_with_parity(i3c->addrs[data->index])); + return 0; } =20 --=20 2.43.0 From nobody Sat Jun 13 12:15:33 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4B58938A73C; Mon, 8 Jun 2026 20:16:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780949769; cv=none; b=Q7o8UKKQ+LgtjRKGtQYL6mDjkCVkNhcx3/eedZhcENpC9Hn2oGOeKKS2JZQGWK/XuBy7nMP12lEqRCEHXGSAcSIKh3mLHGtthAmnUKPFNMwMgBwuBSMKzSsK+VHK0YUpoUM95a8Hqb1EVKoL8lo6yWz/A8HCInZcBB/nbPWpVU8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780949769; c=relaxed/simple; bh=SW5GTXpHDcjN7ZqY9y4i2mW7ZbSnOTnHpbbrQGSo1Fc=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=fUcS/+kjwEQguuIIs34WXUxXbuJdh/9CMQrSWQJLsOTUrdsJc5lPNzx72bmHI3LOXeU8xy2bJskEt2qDHM4QeoonM8gmRnlS3ES6Ne5K+uxVGzG4teboN+EZy7rqvRkkjqY8Umxxyuc3KvR8TpiMLAVvGjOJ1u4oi49XSM+fmxI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=A6yIUCRi; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="A6yIUCRi" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 3C75C1F00898; Mon, 8 Jun 2026 20:16:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1780949767; bh=XkZcK2CJUgIVgyR/EGaoOYASXw4bwoLswDyjXXi++9Y=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=A6yIUCRidXhs3a54OFMFZjtJ0NPkG/Zol8hDjqls5tGf9bSJB+Xd1H2HZNwUbTV+o dtKBvvpHIiUU9969Tzgog5OHvm5y0gdPtkSLRkvHypGQ4Bxej3mIow9DNOfU7omeVq 07EkJhBoShkVnfLh8TML0oSq/ZJX7YJKQsLZLhoa/3LGN0hV/WVwl9mbgNZNri21pa 2XmsvpGPKaQxVVZFnweIfN8ZNFebquWVZNu6KP552h75dpNzrMmIOzHdh87xw0G/CU SrDcwI9PLghtpqQCS3T46jIE7mPDov9JG5PiQzzxYjlFg7a1iCAHDV+9skJhjeaajO I0IJRAxxcFTzQ== From: Claudiu Beznea To: wsa+renesas@sang-engineering.com, tommaso.merciai.xr@bp.renesas.com, alexandre.belloni@bootlin.com, Frank.Li@nxp.com, p.zabel@pengutronix.de Cc: claudiu.beznea@kernel.org, claudiu.beznea@tuxon.dev, linux-i3c@lists.infradead.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Claudiu Beznea , stable@vger.kernel.org Subject: [PATCH v3 05/17] i3c: renesas: Reset the controller on resume Date: Mon, 8 Jun 2026 23:15:31 +0300 Message-ID: <20260608201543.804902-6-claudiu.beznea@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260608201543.804902-1-claudiu.beznea@kernel.org> References: <20260608201543.804902-1-claudiu.beznea@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Claudiu Beznea Reset the controller on resume after enabling the clocks to follow the same sequence as in probe and avoid potential ordering related failures. With it, renesas_i3c_reset() was updated to use read_poll_timeout_atomic(), as the driver's resume callback is executed during the noirq phase of resume, where interrupts are disabled. Fixes: e7218986319b ("i3c: renesas: Add suspend/resume support") Cc: stable@vger.kernel.org Reviewed-by: Frank Li Signed-off-by: Claudiu Beznea --- Changes in v3: - collected tags Changes in v2: - replaced the read_poll_timeout() in renesas_i3c_reset() with read_poll_timeout_atomic() as the renesas_i3c_reset() is called in noirq phase of the suspend/resume; updated the patch description to reflect that - collected Frank's tag. Frank, please let me know if this should be dropped. Thanks! drivers/i3c/master/renesas-i3c.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/i3c/master/renesas-i3c.c b/drivers/i3c/master/renesas-= i3c.c index 76a4831098c9..7ef317b2ba39 100644 --- a/drivers/i3c/master/renesas-i3c.c +++ b/drivers/i3c/master/renesas-i3c.c @@ -480,8 +480,8 @@ static int renesas_i3c_reset(struct renesas_i3c *i3c) renesas_writel(i3c->regs, BCTL, 0); renesas_set_bit(i3c->regs, RSTCTL, RSTCTL_RI3CRST); =20 - return read_poll_timeout(renesas_readl, val, !(val & RSTCTL_RI3CRST), - 0, 1000, false, i3c->regs, RSTCTL); + return read_poll_timeout_atomic(renesas_readl, val, !(val & RSTCTL_RI3CRS= T), + 0, 1000, false, i3c->regs, RSTCTL); } =20 static void renesas_i3c_hw_init(struct renesas_i3c *i3c) @@ -1483,6 +1483,10 @@ static int renesas_i3c_resume_noirq(struct device *d= ev) if (ret) goto err_presetn; =20 + ret =3D renesas_i3c_reset(i3c); + if (ret) + goto err_clks_disable; + /* Re-store I3C registers value. */ renesas_writel(i3c->regs, STDBR, i3c->i3c_STDBR); renesas_writel(i3c->regs, EXTBR, i3c->extbr); @@ -1502,6 +1506,8 @@ static int renesas_i3c_resume_noirq(struct device *de= v) =20 return 0; =20 +err_clks_disable: + clk_bulk_disable(i3c->num_clks, i3c->clks); err_presetn: reset_control_assert(i3c->presetn); err_tresetn: --=20 2.43.0 From nobody Sat Jun 13 12:15:33 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 24D2738F250; Mon, 8 Jun 2026 20:16:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780949772; cv=none; b=Tuk7osY1TPGuRnWcYbZGG+Hz9IB76x4R8mCUTrlGNmnwG1quEbVbXh2tljrFcgrTLV1u2U3G1GTnecT6eSaUHWIvA9FLj1rC7H2Ez1RpZvjfjYGI3juhkftlKKkkAszI1derBrECVrfeB7mxu+xKAIdgqzDMN9HvL8XO8j+/1Uk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780949772; c=relaxed/simple; bh=KcpZt89G3Js/RJXwoOx/epm8WxT4E5lCkyHQ9JOYyNE=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=YJyS/31ER7HEBtXkurIYSh3WPzVR5kBbxfpWO9hWJ43TGd2IVcDTDvr/mwfuvg5lGbuzv9y5ewQKGAXEUR1ZSmL38h5B1LP4pif2JOTZJZlnZlHeShehRDsbkOo0y+xLFRBbsIGA6hBGAV7uLjnrsLQXCP2DgEr86zaak0ZpDvI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=B1XEdL3a; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="B1XEdL3a" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 6257A1F00893; Mon, 8 Jun 2026 20:16:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1780949771; bh=hDXDeMq3KCQuQD6o7rm0NkrHfXHqQRvAJcOo6dEcok8=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=B1XEdL3ac8jrJp9c921/iqOCFjheMiVfhjbfS0dNwD6kOyx65YAPQvdtb2SIpAFXU yImAqhdfgNeEW6SMXBVnIteinz7UmnL3JArTBzFSslW3jrEHPwPUxGyT5cDEonKfLF AJl049pvU6uIHlaGkb/VfseJf78Ndez0hIvrs+Ql8MBgegJO1P24Ebb45orzMeD2wM TS6X/TZ/S28qAg07iq4OGbGgvkHpAXOJF+wO9RgrHs59OduVNVAQ9udottJ9dfRvy4 jT7PSUKl0wVleSMWRcMrAEkX8+jtYcjd02ZQR8KPQ0nsHwBi5tNWMlNRZvguHyXQMM lxoOfsAGPPyrA== From: Claudiu Beznea To: wsa+renesas@sang-engineering.com, tommaso.merciai.xr@bp.renesas.com, alexandre.belloni@bootlin.com, Frank.Li@nxp.com, p.zabel@pengutronix.de Cc: claudiu.beznea@kernel.org, claudiu.beznea@tuxon.dev, linux-i3c@lists.infradead.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Claudiu Beznea , stable@vger.kernel.org Subject: [PATCH v3 06/17] i3c: renesas: Perform Dynamic Address Assignment on resume Date: Mon, 8 Jun 2026 23:15:32 +0300 Message-ID: <20260608201543.804902-7-claudiu.beznea@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260608201543.804902-1-claudiu.beznea@kernel.org> References: <20260608201543.804902-1-claudiu.beznea@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Claudiu Beznea The Renesas RZ/G3S SoC supports a power saving mode where power to most SoC components, including I3C, is turned off. On systems where the I3C devices also loses power during suspend (e.g. NXP P3T1085UK-ARD connected to the PMOD1_6A connector of the RZ SMARC Carrier 2 + Renesas RZ/G3S SMARC SOM), the devices becomes unreachable after resume. Running DAA in the controller resume path restores communication. However, DAA relies on interrupts for TX/RX, which are not available in the noirq suspend/resume phase (unless they are wakeup interrupts). For this, the suspend/resume callbacks were moved out of the noirq phase. Currently, there is no identified use case on either the Renesas RZ/G3S or Renesas RZ/G3E SoCs that requires the controller suspend/resume hooks to be part of the noirq suspend/resume phase. Since renesas_i3c_reset() is not called anymore in atomic context update it to use read_poll_timeout(). To cover the case where the controller had already attached all the i3c->maxdevs devices before a suspend/resume cycle and i3c->free_pos is zero, struct renesas_i3c::resuming flag was introduced. The flag is set in renesas_i3c_resume() before calling i3c_master_do_daa_ext() and checked in renesas_i3c_daa(). When resuming from suspend, renesas_i3c_daa() re-runs DAA for all slots except those used by I2C devices. Since I2C devices may be attached both during probe (at bus initialization time) and at runtime, the device slots maintained by the driver may become interleaved with both I2C and I3C devices. However, the controller performs dynamic address assignment for I3C devices starting from a specified DATBAS register index and for a specified number of I3C devices. This becomes a problem when the bus is fully occupied by I2C and I3C devices before suspend. To address this, I2C and I3C devices are grouped, if resuming, in the i3c->addrs[] array such that I2C devices occupy the first slots and I3C devices occupy the remaining ones. In this scenario, I3C devices are re-attached using i3c_master_reattach_i3c_dev_locked(), since the bus is fully occupied and renesas_i3c_get_free_pos() would otherwise return a negative error code. Fixes: e7218986319b ("i3c: renesas: Add suspend/resume support") Cc: stable@vger.kernel.org Signed-off-by: Claudiu Beznea --- Changes in v3: - added renesas_i3c_group_devs_in_slots(); along with it, the struct renesas_i3c_addr was updated with i3c_dev and i3c_dev and the attach/detach/re-attach APIs were adjusted accordingly - dropped DATBASn member of struct renesas_i3c - used i3c_master_reattach_i3c_dev_locked() to re-attach devices on a fully occupied bus - in resume, moved i2c_mark_adapter_resumed() after i3c_master_do_daa_ext() since it can update the internal driver data structure i2c specific Changes in v2: - adjusted the code to still work in case the full bus was occupied before a suspend/resume cycle; for that: -- introduced struct renesas_i3c_addr -- preserved i3c->DATBASn[] which is saved in suspend and used in resume, in renesas_i3c_daa() - updated the patch description to reflect the new updates drivers/i3c/master/renesas-i3c.c | 209 ++++++++++++++++++++++++------- 1 file changed, 166 insertions(+), 43 deletions(-) diff --git a/drivers/i3c/master/renesas-i3c.c b/drivers/i3c/master/renesas-= i3c.c index 7ef317b2ba39..c475d30a84c7 100644 --- a/drivers/i3c/master/renesas-i3c.c +++ b/drivers/i3c/master/renesas-i3c.c @@ -252,6 +252,15 @@ struct renesas_i3c_xferqueue { spinlock_t lock; }; =20 +struct renesas_i3c_addr { + union { + struct i2c_dev_desc *i2c_dev; + struct i3c_dev_desc *i3c_dev; + }; + bool is_i2c; + u8 addr; +}; + struct renesas_i3c { struct i3c_master_controller base; enum i3c_internal_state internal_state; @@ -262,13 +271,13 @@ struct renesas_i3c { u32 i3c_STDBR; u32 extbr; unsigned long rate; - u8 addrs[RENESAS_I3C_MAX_DEVS]; + struct renesas_i3c_addr addrs[RENESAS_I3C_MAX_DEVS]; struct renesas_i3c_xferqueue xferqueue; void __iomem *regs; - u32 *DATBASn; struct clk_bulk_data *clks; struct reset_control *presetn; struct reset_control *tresetn; + bool resuming; u8 num_clks; u8 refclk_div; }; @@ -335,7 +344,7 @@ static int renesas_i3c_get_addr_pos(struct renesas_i3c = *i3c, u8 addr) int pos; =20 for (pos =3D 0; pos < i3c->maxdevs; pos++) { - if (addr =3D=3D i3c->addrs[pos]) + if (addr =3D=3D i3c->addrs[pos].addr) return pos; } =20 @@ -480,8 +489,8 @@ static int renesas_i3c_reset(struct renesas_i3c *i3c) renesas_writel(i3c->regs, BCTL, 0); renesas_set_bit(i3c->regs, RSTCTL, RSTCTL_RI3CRST); =20 - return read_poll_timeout_atomic(renesas_readl, val, !(val & RSTCTL_RI3CRS= T), - 0, 1000, false, i3c->regs, RSTCTL); + return read_poll_timeout(renesas_readl, val, !(val & RSTCTL_RI3CRST), + 0, 1000, false, i3c->regs, RSTCTL); } =20 static void renesas_i3c_hw_init(struct renesas_i3c *i3c) @@ -637,12 +646,80 @@ static void renesas_i3c_bus_cleanup(struct i3c_master= _controller *m) renesas_i3c_reset(i3c); } =20 +static u8 renesas_i3c_group_devs_in_slots(struct renesas_i3c *i3c) +{ + struct renesas_i3c_i2c_dev_data *new_i2c_data, *new_i3c_data; + struct renesas_i3c_addr i2c_addr, i3c_addr; + struct i3c_dev_desc *i3c_dev; + struct i2c_dev_desc *i2c_dev; + u8 i2c_pos =3D 0; + + /* + * The controller cannot handle interleaved I2C and I3C devices in the + * slots. It expects to be configured with a starting DATBAS register + * index and the number of I3C devices for which to run dynamic address + * assignment. + * + * Since I2C devices may be added after bus initialization, group the + * devices in slots so that the I2C devices occupy the first slots + * and I3C devices the remaining ones. + * + * This allows the controller to run ENTDAA by specifying the starting + * DATBAS register index and the number of I3C devices. As a result, + * ENTDAA can be re-run for all I3C devices and they can be re-attached + * after a suspend/resume cycle in which power to both the controller + * and the I3C devices was lost. + */ + for (u8 pos =3D 0; pos < i3c->maxdevs; pos++) { + if (i3c->free_pos & BIT(pos)) + continue; + + if (!i3c->addrs[pos].is_i2c) + continue; + + if (pos =3D=3D i2c_pos) { + i2c_pos++; + continue; + } + + /* + * Swap the I3C device on i2c_pos slot with the I2C dev + * on pos slot. + */ + i3c_addr =3D i3c->addrs[i2c_pos]; + i3c_dev =3D i3c_addr.i3c_dev; + + i2c_addr =3D i3c->addrs[pos]; + i2c_dev =3D i2c_addr.i2c_dev; + + new_i2c_data =3D i3c_dev_get_master_data(i3c_dev->dev->desc); + new_i3c_data =3D i2c_dev_get_master_data(i2c_dev); + + i3c->addrs[i2c_pos] =3D i3c->addrs[pos]; + i3c->addrs[i2c_pos].is_i2c =3D true; + i3c->addrs[i2c_pos].i2c_dev =3D i2c_dev; + + i3c->addrs[pos] =3D i2c_addr; + i3c->addrs[pos].is_i2c =3D false; + i3c->addrs[pos].i3c_dev =3D i3c_dev; + + new_i2c_data->index =3D i2c_pos++; + new_i3c_data->index =3D pos; + + i2c_dev_set_master_data(i2c_dev, new_i2c_data); + i3c_dev_set_master_data(i3c_dev, new_i3c_data); + } + + return i2c_pos; +} + static int renesas_i3c_daa(struct i3c_master_controller *m) { struct renesas_i3c *i3c =3D to_renesas_i3c(m); struct renesas_i3c_cmd *cmd; u32 olddevs, newdevs; u8 last_addr =3D 0, pos; + u8 first_i3c_pos =3D 0; int ret; =20 struct renesas_i3c_xfer *xfer __free(kfree) =3D renesas_i3c_alloc_xfer(i3= c, 1); @@ -655,16 +732,25 @@ static int renesas_i3c_daa(struct i3c_master_controll= er *m) olddevs =3D ~(i3c->free_pos); i3c->internal_state =3D I3C_INTERNAL_STATE_CONTROLLER_ENTDAA; =20 + if (i3c->resuming) + first_i3c_pos =3D renesas_i3c_group_devs_in_slots(i3c); + /* Setting DATBASn registers for target devices. */ for (pos =3D 0; pos < i3c->maxdevs; pos++) { - if (olddevs & BIT(pos)) - continue; + if (olddevs & BIT(pos)) { + if (i3c->resuming) { + if (pos < first_i3c_pos) + continue; + } else { + continue; + } + } =20 ret =3D i3c_master_get_free_addr(m, last_addr + 1); if (ret < 0) return -ENOSPC; =20 - i3c->addrs[pos] =3D ret; + i3c->addrs[pos].addr =3D ret; last_addr =3D ret; =20 renesas_writel(i3c->regs, DATBAS(pos), datbas_dvdyad_with_parity(ret)); @@ -674,9 +760,14 @@ static int renesas_i3c_daa(struct i3c_master_controlle= r *m) cmd =3D xfer->cmds; cmd->rx_count =3D 0; =20 - ret =3D renesas_i3c_get_free_pos(i3c); - if (ret < 0) - return ret; + if (i3c->resuming) { + /* Run ENTDAA for all the I3C devices on the bus, if resuming. */ + ret =3D first_i3c_pos; + } else { + ret =3D renesas_i3c_get_free_pos(i3c); + if (ret < 0) + return ret; + } =20 /* * Setup the command descriptor to start the ENTDAA command @@ -689,12 +780,38 @@ static int renesas_i3c_daa(struct i3c_master_controll= er *m) =20 renesas_i3c_wait_xfer(i3c, xfer); =20 - newdevs =3D GENMASK(i3c->maxdevs - cmd->rx_count - 1, 0); - newdevs &=3D ~olddevs; + newdevs =3D GENMASK(i3c->maxdevs - cmd->rx_count - 1, first_i3c_pos); + /* Re-attach all the I3C devices on resume. */ + if (!i3c->resuming) + newdevs &=3D ~olddevs; =20 for (pos =3D 0; pos < i3c->maxdevs; pos++) { - if (newdevs & BIT(pos)) - i3c_master_add_i3c_dev_locked(m, i3c->addrs[pos]); + if (!(newdevs & BIT(pos))) + continue; + + /* + * If the bus was fully occupied before suspend, re-attach the + * devices and update the addresses tracked by the subsystem. + * Without this, i3c_master_add_i3c_dev_locked() returns errors + * due to a lack of free slots (as reported by + * renesas_i3c_get_free_pos()), causing the attachment to fail. + * + * Otherwise, follow the normal + * i3c_master_add_i3c_dev_locked() path, which will re-attach the + * devices, keep the subsystem state and driver addresses in sync, + * and perform all the required internal bookkeeping. + */ + if (!i3c->free_pos && i3c->resuming) { + struct i3c_dev_desc *dev =3D i3c->addrs[pos].i3c_dev->dev->desc; + u8 old_dyn_addr; + + old_dyn_addr =3D dev->info.dyn_addr; + dev->info.dyn_addr =3D i3c->addrs[pos].addr; + + i3c_master_reattach_i3c_dev_locked(dev, old_dyn_addr); + } else { + i3c_master_add_i3c_dev_locked(m, i3c->addrs[pos].addr); + } } =20 return 0; @@ -876,11 +993,12 @@ static int renesas_i3c_attach_i3c_dev(struct i3c_dev_= desc *dev) return -ENOMEM; =20 data->index =3D pos; - i3c->addrs[pos] =3D dev->info.dyn_addr ? : dev->info.static_addr; + i3c->addrs[pos].addr =3D dev->info.dyn_addr ? : dev->info.static_addr; + i3c->addrs[pos].i3c_dev =3D dev; i3c->free_pos &=3D ~BIT(pos); =20 renesas_writel(i3c->regs, DATBAS(pos), DATBAS_DVSTAD(dev->info.static_add= r) | - datbas_dvdyad_with_parity(i3c->addrs[pos])); + datbas_dvdyad_with_parity(i3c->addrs[pos].addr)); i3c_dev_set_master_data(dev, data); =20 return 0; @@ -892,25 +1010,28 @@ static int renesas_i3c_reattach_i3c_dev(struct i3c_d= ev_desc *dev, struct i3c_master_controller *m =3D i3c_dev_get_master(dev); struct renesas_i3c *i3c =3D to_renesas_i3c(m); struct renesas_i3c_i2c_dev_data *data =3D i3c_dev_get_master_data(dev); + struct i3c_dev_desc *tmp_dev =3D i3c->addrs[data->index].i3c_dev; int pos; =20 pos =3D renesas_i3c_get_free_pos(i3c); =20 if (data->index !=3D pos && pos >=3D 0) { renesas_writel(i3c->regs, DATBAS(data->index), 0); - i3c->addrs[data->index] =3D 0; + i3c->addrs[data->index].addr =3D 0; + i3c->addrs[data->index].i3c_dev =3D NULL; i3c->free_pos |=3D BIT(data->index); =20 data->index =3D pos; i3c->free_pos &=3D ~BIT(data->index); } =20 - i3c->addrs[data->index] =3D dev->info.dyn_addr ? dev->info.dyn_addr : + i3c->addrs[data->index].addr =3D dev->info.dyn_addr ? dev->info.dyn_addr : dev->info.static_addr; + i3c->addrs[data->index].i3c_dev =3D tmp_dev; =20 renesas_writel(i3c->regs, DATBAS(data->index), DATBAS_DVSTAD(dev->info.static_addr) | - datbas_dvdyad_with_parity(i3c->addrs[data->index])); + datbas_dvdyad_with_parity(i3c->addrs[data->index].addr)); =20 return 0; } @@ -922,7 +1043,8 @@ static void renesas_i3c_detach_i3c_dev(struct i3c_dev_= desc *dev) struct renesas_i3c *i3c =3D to_renesas_i3c(m); =20 i3c_dev_set_master_data(dev, NULL); - i3c->addrs[data->index] =3D 0; + i3c->addrs[data->index].addr =3D 0; + i3c->addrs[data->index].i3c_dev =3D NULL; i3c->free_pos |=3D BIT(data->index); kfree(data); } @@ -1002,7 +1124,9 @@ static int renesas_i3c_attach_i2c_dev(struct i2c_dev_= desc *dev) return -ENOMEM; =20 data->index =3D pos; - i3c->addrs[pos] =3D dev->addr; + i3c->addrs[pos].addr =3D dev->addr; + i3c->addrs[pos].is_i2c =3D true; + i3c->addrs[pos].i2c_dev =3D dev; i3c->free_pos &=3D ~BIT(pos); i2c_dev_set_master_data(dev, data); =20 @@ -1016,7 +1140,9 @@ static void renesas_i3c_detach_i2c_dev(struct i2c_dev= _desc *dev) struct renesas_i3c *i3c =3D to_renesas_i3c(m); =20 i2c_dev_set_master_data(dev, NULL); - i3c->addrs[data->index] =3D 0; + i3c->addrs[data->index].addr =3D 0; + i3c->addrs[data->index].is_i2c =3D false; + i3c->addrs[data->index].i2c_dev =3D NULL; i3c->free_pos |=3D BIT(data->index); kfree(data); } @@ -1419,12 +1545,6 @@ static int renesas_i3c_probe(struct platform_device = *pdev) i3c->maxdevs =3D RENESAS_I3C_MAX_DEVS; i3c->free_pos =3D GENMASK(i3c->maxdevs - 1, 0); =20 - /* Allocate dynamic Device Address Table backup. */ - i3c->DATBASn =3D devm_kzalloc(&pdev->dev, sizeof(u32) * i3c->maxdevs, - GFP_KERNEL); - if (!i3c->DATBASn) - return -ENOMEM; - return i3c_master_register(&i3c->base, &pdev->dev, &renesas_i3c_ops, fals= e); } =20 @@ -1435,17 +1555,13 @@ static void renesas_i3c_remove(struct platform_devi= ce *pdev) i3c_master_unregister(&i3c->base); } =20 -static int renesas_i3c_suspend_noirq(struct device *dev) +static int renesas_i3c_suspend(struct device *dev) { struct renesas_i3c *i3c =3D dev_get_drvdata(dev); - int i, ret; + int ret; =20 i2c_mark_adapter_suspended(&i3c->base.i2c); =20 - /* Store Device Address Table values. */ - for (i =3D 0; i < i3c->maxdevs; i++) - i3c->DATBASn[i] =3D renesas_readl(i3c->regs, DATBAS(i)); - ret =3D reset_control_assert(i3c->presetn); if (ret) goto err_mark_resumed; @@ -1466,10 +1582,10 @@ static int renesas_i3c_suspend_noirq(struct device = *dev) return ret; } =20 -static int renesas_i3c_resume_noirq(struct device *dev) +static int renesas_i3c_resume(struct device *dev) { struct renesas_i3c *i3c =3D dev_get_drvdata(dev); - int i, ret; + int ret; =20 ret =3D reset_control_deassert(i3c->tresetn); if (ret) @@ -1495,15 +1611,23 @@ static int renesas_i3c_resume_noirq(struct device *= dev) renesas_writel(i3c->regs, MSDVAD, MSDVAD_MDYADV | MSDVAD_MDYAD(i3c->dyn_addr)); =20 - /* Restore Device Address Table values. */ - for (i =3D 0; i < i3c->maxdevs; i++) - renesas_writel(i3c->regs, DATBAS(i), i3c->DATBASn[i]); - /* I3C hw init. */ renesas_i3c_hw_init(i3c); =20 + i3c->resuming =3D true; + + ret =3D i3c_master_do_daa_ext(&i3c->base, true); + if (ret) + dev_err(dev, "DAA failed on resume, ret=3D%d", ret); + + i3c->resuming =3D false; + i2c_mark_adapter_resumed(&i3c->base.i2c); =20 + /* + * I3C devices may have retained their dynamic address anyway. Do not + * fail the resume because of DAA error. + */ return 0; =20 err_clks_disable: @@ -1516,8 +1640,7 @@ static int renesas_i3c_resume_noirq(struct device *de= v) } =20 static const struct dev_pm_ops renesas_i3c_pm_ops =3D { - NOIRQ_SYSTEM_SLEEP_PM_OPS(renesas_i3c_suspend_noirq, - renesas_i3c_resume_noirq) + SYSTEM_SLEEP_PM_OPS(renesas_i3c_suspend, renesas_i3c_resume) }; =20 static const struct of_device_id renesas_i3c_of_ids[] =3D { --=20 2.43.0 From nobody Sat Jun 13 12:15:33 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 841AC38B14F; Mon, 8 Jun 2026 20:16:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780949775; cv=none; b=DxTj0tNhqDjp/25XHV01okhaWfxYpP5iDPmjFmHVpSZwbs05MY15VZCEuQ+IGileZiw7IFOIn06maR0V4Ow4X71uyzCxbDa7dBeT0TwQjgVdQfQ/EBMiHKkwyNtKvnmwQDHVHorxmuGi/MYT8RRFdyvqPHT5UI5n7di+shlAGis= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780949775; c=relaxed/simple; bh=F7+VLOuaMWo8EvvGw83SJRc1YwDFoUylLAalUeJ204k=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=m2a62Jvbd3tNFpmgKOA3agXWe2YEAeG+aketfslRpnAaHM5HXiv/7LmpxkZSpGSTxggst0BnauL4wvGm+DOZV3BY+HhRESfjMjCT7zgdx7qCs6fuTjz6sDHvKJEHJDqWPVC5sDxAvHLJbtZhwvUt0S8R0wg6nMgVAtP2kHq06a8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=bWQ2Vg+G; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="bWQ2Vg+G" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 7ED711F00898; Mon, 8 Jun 2026 20:16:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1780949774; bh=8DwEabUQb8wfXA2VVFyZQt03TK3VL48HZ/2mhSICwYs=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=bWQ2Vg+GQo6IGi4Ux9QGzdDfiG9aeON13wDRgcpLM+Tzo9y3eRD/mh/zroZSUz4gB xit8vFr6PU+ig0GFZKebCNJhcFfNiJmm+T0k+C0OZqq+VsyuxT0hCqt5PxBwKIMYo/ klWM/mzsBVL6Ap3xb/rREUJcB9jFeqm3q9YrNPckdvXxRDmk2xKRcKH1ORojaOQDXT u4+D11UrJL1ynY84AHkg5orqrzvwCFoLRWFm4t/1hsFsucc/girvfknoZTddZYXRk9 r5sTmXMuq2kHvN+rm4CGDM/r5PNOOv19rofan1dneQ1+EUqPW8PR6OmEyMevuvLq/e w+zPWvuobuOKw== From: Claudiu Beznea To: wsa+renesas@sang-engineering.com, tommaso.merciai.xr@bp.renesas.com, alexandre.belloni@bootlin.com, Frank.Li@nxp.com, p.zabel@pengutronix.de Cc: claudiu.beznea@kernel.org, claudiu.beznea@tuxon.dev, linux-i3c@lists.infradead.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Claudiu Beznea , stable@vger.kernel.org Subject: [PATCH v3 07/17] i3c: renesas: Do not attach devices if xfer failed Date: Mon, 8 Jun 2026 23:15:33 +0300 Message-ID: <20260608201543.804902-8-claudiu.beznea@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260608201543.804902-1-claudiu.beznea@kernel.org> References: <20260608201543.804902-1-claudiu.beznea@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Claudiu Beznea The controller may return an NRSPQP_ERROR_* error code while still providing a valid cmd->rx_count. It has been observed that when the transfer fails with NRSPQP_ERROR_ADDRESS_NACK, calling i3c_master_add_i3c_dev_locked() may lead to crashes. Set newdevs to zero if the transfer failed. Fixes: e7218986319b ("i3c: renesas: Add suspend/resume support") Cc: stable@vger.kernel.org Signed-off-by: Claudiu Beznea --- Changes in v3: - none Changes in v2: - none, this patch is new drivers/i3c/master/renesas-i3c.c | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/drivers/i3c/master/renesas-i3c.c b/drivers/i3c/master/renesas-= i3c.c index c475d30a84c7..f96848022c45 100644 --- a/drivers/i3c/master/renesas-i3c.c +++ b/drivers/i3c/master/renesas-i3c.c @@ -780,10 +780,15 @@ static int renesas_i3c_daa(struct i3c_master_controll= er *m) =20 renesas_i3c_wait_xfer(i3c, xfer); =20 - newdevs =3D GENMASK(i3c->maxdevs - cmd->rx_count - 1, first_i3c_pos); - /* Re-attach all the I3C devices on resume. */ - if (!i3c->resuming) - newdevs &=3D ~olddevs; + /* Skip attaching if there are failures on the xfer. */ + if (xfer->ret) { + newdevs =3D 0; + } else { + newdevs =3D GENMASK(i3c->maxdevs - cmd->rx_count - 1, first_i3c_pos); + /* Re-attach all the I3C devices on resume. */ + if (!i3c->resuming) + newdevs &=3D ~olddevs; + } =20 for (pos =3D 0; pos < i3c->maxdevs; pos++) { if (!(newdevs & BIT(pos))) --=20 2.43.0 From nobody Sat Jun 13 12:15:33 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 82FB939934C; Mon, 8 Jun 2026 20:16:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780949778; cv=none; b=q1l+Sgobjv20TtsJ3aFNLl2SNZchdQ8ix3jkhTmK7AWkPptzF4JS7xBkOvgQjqtCl+t3ebA+uCezii2uFyU582ZyA7NzilwiwAcLZEUyigYbGH5eOyWHzqT4SdtVutP2utZv87i962dlL5hLQa+VMs+lGLycCa8GL8zUnEQkmU4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780949778; c=relaxed/simple; bh=e6XnqR16Qqn0dxTRe/bupHetkng9jndoJ75CANg4n4I=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=YU7T8AdSRhwaQFSm/Xy7hVctkXcvWl5RcZe/UQoIEnwUbeRIDnuiqUO1I0zBLQF8xyzBfuwN+Mbn8VDKkaYkN4e9ggLi0gL+Hv7xYj05q+48ySXdyg0xUxMKufoyac9eagrKBwg8gOLRKh5eLjgQmNZfM5K7syMmfEY6/t4CLmI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=jFwB+MQP; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="jFwB+MQP" Received: by smtp.kernel.org (Postfix) with ESMTPSA id AB3CB1F00893; Mon, 8 Jun 2026 20:16:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1780949777; bh=A9Hqv4TlpLN9iAGI/RzzflDctnOwz1ujQS2MKeOsnD8=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=jFwB+MQP5obdlxGybkTw8dCmvG6+eE/4+9e8wtKjbxBC2mpNg6cBgDUol2fDDjLZk 96UNVuWhBcVYoO33C51jQ/GSZ2HSLiW2YAwOuAJH7fzVGIKDFaLTbNPiKo4OObkWHj SoTVfBzgY4qdvIquoapOUCZ5gFMW1jfVHv0LQOLrCEU7yj65NI4QnzLsMYrFdLYRwX fWSAyfMidcLNN3e+kb3iuUVwJhoQPpDWcylTYOjZuwwgse3d9pfn6EHfahKg8NSI8u 1kpnz9FFzCuOBc8qce+ctcU0o68aK0O3wzlHfYgv6IcvYoGkxBXuk1dBjE8wKQeh44 Fn0hvOeMDsDQA== From: Claudiu Beznea To: wsa+renesas@sang-engineering.com, tommaso.merciai.xr@bp.renesas.com, alexandre.belloni@bootlin.com, Frank.Li@nxp.com, p.zabel@pengutronix.de Cc: claudiu.beznea@kernel.org, claudiu.beznea@tuxon.dev, linux-i3c@lists.infradead.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Claudiu Beznea , stable@vger.kernel.org Subject: [PATCH v3 08/17] i3c: renesas: Clean DATBAS register on detach Date: Mon, 8 Jun 2026 23:15:34 +0300 Message-ID: <20260608201543.804902-9-claudiu.beznea@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260608201543.804902-1-claudiu.beznea@kernel.org> References: <20260608201543.804902-1-claudiu.beznea@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Claudiu Beznea The controller uses DATBAS registers on TX/RX logic. Clean the DATBAS register for the detached I3C device to avoid issues. Fixes: d028219a9f14 ("i3c: master: Add basic driver for the Renesas I3C con= troller") Cc: stable@vger.kernel.org Reviewed-by: Frank Li Signed-off-by: Claudiu Beznea --- Changes in v3: - none Changes in v2: - collected tags drivers/i3c/master/renesas-i3c.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/i3c/master/renesas-i3c.c b/drivers/i3c/master/renesas-= i3c.c index f96848022c45..195c40956148 100644 --- a/drivers/i3c/master/renesas-i3c.c +++ b/drivers/i3c/master/renesas-i3c.c @@ -1047,6 +1047,8 @@ static void renesas_i3c_detach_i3c_dev(struct i3c_dev= _desc *dev) struct i3c_master_controller *m =3D i3c_dev_get_master(dev); struct renesas_i3c *i3c =3D to_renesas_i3c(m); =20 + renesas_writel(i3c->regs, DATBAS(data->index), 0); + i3c_dev_set_master_data(dev, NULL); i3c->addrs[data->index].addr =3D 0; i3c->addrs[data->index].i3c_dev =3D NULL; --=20 2.43.0 From nobody Sat Jun 13 12:15:33 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7BB9B38A73C; Mon, 8 Jun 2026 20:16:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780949781; cv=none; b=mnqxnrfF6TrhYGahdI8uBzEVshiptO/N4Z0F7NVaGf7vDeOYwBZLqpJ1oMNBUFmHBj0+X8Frd6mxTiVRQoS6ixSbHFWW+mJB595AAhHFk9cnwkoWm/4Yk2UTPsQVQMEPpfSk6WnKNxGzn9SgeHeI+9fnc+wX9FMFvGz0fYcMMLc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780949781; c=relaxed/simple; bh=ttva1gnbv3q4YeGCDlBaNWcun44L9AgUn8TKrtaCOAA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=O036yiktX3fZWGC/CWf++EhtTkV/vKbb2asorfXfrQBWc8jrFW2oMCfgAWj58k3bZAokyD0rJ8BkkfCTK206bS1oNCu1Z/CNUrhAB/WJ4QqohgiosTtADxkkg+8pc5hceUUk7i0NlkG+ObXwLrHnadqyibxZS1Ks93EmysI4icc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=f/drdDhK; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="f/drdDhK" Received: by smtp.kernel.org (Postfix) with ESMTPSA id D16751F00898; Mon, 8 Jun 2026 20:16:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1780949780; bh=SzPZOTybytX0pqhXhEEdEjH/9xZCkYgPnJNx+q6d7+Q=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=f/drdDhKVnzqt7Im2ahzEZ1l2Cysu5SKwUqZ1bigz3Cd0rT1Mwc7k0gL9eQix0Tim ckwhxQoQzi40xWHRTdDBYEtcrB5ZZVo7KAzoJK0FQbdf1ubrJGNvIc8Pfu6KXcSUFT J1vZ9rzLNzPqVbFtkv57l4cVvNnwKbEprfDQ397neWONCKeVsVmO3FOf117ekaJRjI Vk4F0keW9gPBwBgmWqdRymfpiUFaa0RuU/aZSn2OM62XLy8oAObvGS/HsrclSApjRz EF7yBRgQ36EFtwC4MgOJUUn4sQO/eMMNxwMG7eToHbOk0PNjoWZf/0w2aMYNvKo89z EZ0PkqavrM0kA== From: Claudiu Beznea To: wsa+renesas@sang-engineering.com, tommaso.merciai.xr@bp.renesas.com, alexandre.belloni@bootlin.com, Frank.Li@nxp.com, p.zabel@pengutronix.de Cc: claudiu.beznea@kernel.org, claudiu.beznea@tuxon.dev, linux-i3c@lists.infradead.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Claudiu Beznea Subject: [PATCH v3 09/17] i3c: renesas: Use reset_control_bulk_{assert, deassert}() Date: Mon, 8 Jun 2026 23:15:35 +0300 Message-ID: <20260608201543.804902-10-claudiu.beznea@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260608201543.804902-1-claudiu.beznea@kernel.org> References: <20260608201543.804902-1-claudiu.beznea@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Claudiu Beznea Use reset_control_bulk_assert() and reset_control_bulk_deassert() in the suspend and resume paths to simplify the code. Signed-off-by: Claudiu Beznea --- Changes in v3: - none Changes in v2: - none drivers/i3c/master/renesas-i3c.c | 30 +++++++++++++----------------- 1 file changed, 13 insertions(+), 17 deletions(-) diff --git a/drivers/i3c/master/renesas-i3c.c b/drivers/i3c/master/renesas-= i3c.c index 195c40956148..4a055c9f4ffe 100644 --- a/drivers/i3c/master/renesas-i3c.c +++ b/drivers/i3c/master/renesas-i3c.c @@ -1565,24 +1565,22 @@ static void renesas_i3c_remove(struct platform_devi= ce *pdev) static int renesas_i3c_suspend(struct device *dev) { struct renesas_i3c *i3c =3D dev_get_drvdata(dev); + struct reset_control_bulk_data resets[] =3D { + { .rstc =3D i3c->presetn }, + { .rstc =3D i3c->tresetn }, + }; int ret; =20 i2c_mark_adapter_suspended(&i3c->base.i2c); =20 - ret =3D reset_control_assert(i3c->presetn); + ret =3D reset_control_bulk_assert(ARRAY_SIZE(resets), resets); if (ret) goto err_mark_resumed; =20 - ret =3D reset_control_assert(i3c->tresetn); - if (ret) - goto err_presetn; - clk_bulk_disable(i3c->num_clks, i3c->clks); =20 return 0; =20 -err_presetn: - reset_control_deassert(i3c->presetn); err_mark_resumed: i2c_mark_adapter_resumed(&i3c->base.i2c); =20 @@ -1592,19 +1590,19 @@ static int renesas_i3c_suspend(struct device *dev) static int renesas_i3c_resume(struct device *dev) { struct renesas_i3c *i3c =3D dev_get_drvdata(dev); + struct reset_control_bulk_data resets[] =3D { + { .rstc =3D i3c->presetn }, + { .rstc =3D i3c->tresetn }, + }; int ret; =20 - ret =3D reset_control_deassert(i3c->tresetn); + ret =3D reset_control_bulk_deassert(ARRAY_SIZE(resets), resets); if (ret) return ret; =20 - ret =3D reset_control_deassert(i3c->presetn); - if (ret) - goto err_tresetn; - ret =3D clk_bulk_enable(i3c->num_clks, i3c->clks); if (ret) - goto err_presetn; + goto err_resets_asserted; =20 ret =3D renesas_i3c_reset(i3c); if (ret) @@ -1639,10 +1637,8 @@ static int renesas_i3c_resume(struct device *dev) =20 err_clks_disable: clk_bulk_disable(i3c->num_clks, i3c->clks); -err_presetn: - reset_control_assert(i3c->presetn); -err_tresetn: - reset_control_assert(i3c->tresetn); +err_resets_asserted: + reset_control_bulk_assert(ARRAY_SIZE(resets), resets); return ret; } =20 --=20 2.43.0 From nobody Sat Jun 13 12:15:33 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6DD6938758E; Mon, 8 Jun 2026 20:16:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780949784; cv=none; b=TeeVG7brRFOtdXLy8eZy3ffeL9cJ61SlPtuEwvyzGJ5nLSX7ymZlUR0dMh+TjJZkyjXMpK3uzu8xeEIjD8SfPSLHcjK8ErsMzzA7O2I57TMWc+MqtyqQFIeLiPZDpezfmt0kOmw7fHX28mgGy7yKRocYz812d6+D1wvJsTqWP3U= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780949784; c=relaxed/simple; bh=N1xqqku7uR8j4MmudmoE1QyakUwjPnmHOb7F+Ga9uy4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=r+e5k+VOlIFRPaE/wuAt/s2hpk8lElhTqdmdm/9kk1AkDUB2uF6SYJgiJ4fG5qdobI43CJcegCuAnziaRyQfpYEalX305lNUWMiJKme/TKsvhMxA+grcyYMxaR8YtoowjYfVPLjPgUWyNHKm6oGFDszSeMjqpA4qjTFgeLF6v7I= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=Q+LAPTwQ; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="Q+LAPTwQ" Received: by smtp.kernel.org (Postfix) with ESMTPSA id D67971F00893; Mon, 8 Jun 2026 20:16:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1780949783; bh=wqM6/GnLxJaUFO8vrbASPnnDqBonjG78AYUFZyrjnZM=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=Q+LAPTwQ+77UoECCCrrriYVtn04/cGnUMk1PzaSWWR3pZVYwJYkmUaWhLEjUPfSUA UVJL2T928DIGqSsefqKeMrAXMAELpLlruqyVb0E95pU9CnXDxUwZcj6pQuTWrAS0UY ulgWtpLcl3/0u8JvpDP167H4yTsmJmawrcOCZLIsUzwX4Dkg+57xtoxZ37IWU3JOIY gpqx07pwhL0n10kn/9/mFmOG5raCEGM0hjNWReogXQhDR5ZpAn87UWefF2LvQNbqjX 1rBuSmQigah0x2EeCf9vVG9lBE5OLez3sxk+zJnDjG9LLWMeZh4yuadrqAu5ejm0Ug ogV8z2A6+zW7w== From: Claudiu Beznea To: wsa+renesas@sang-engineering.com, tommaso.merciai.xr@bp.renesas.com, alexandre.belloni@bootlin.com, Frank.Li@nxp.com, p.zabel@pengutronix.de Cc: claudiu.beznea@kernel.org, claudiu.beznea@tuxon.dev, linux-i3c@lists.infradead.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Claudiu Beznea Subject: [PATCH v3 10/17] i3c: renesas: Return immediately if there is no transfer Date: Mon, 8 Jun 2026 23:15:36 +0300 Message-ID: <20260608201543.804902-11-claudiu.beznea@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260608201543.804902-1-claudiu.beznea@kernel.org> References: <20260608201543.804902-1-claudiu.beznea@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Claudiu Beznea There is no need to allocate a transfer structure when i2c_nxfers is zero. Return immediately instead of unnecessarily allocating memory. Signed-off-by: Claudiu Beznea --- Changes in v3: - none Changes in v2: - updated patch title drivers/i3c/master/renesas-i3c.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/i3c/master/renesas-i3c.c b/drivers/i3c/master/renesas-= i3c.c index 4a055c9f4ffe..1fd39dd57847 100644 --- a/drivers/i3c/master/renesas-i3c.c +++ b/drivers/i3c/master/renesas-i3c.c @@ -1066,13 +1066,13 @@ static int renesas_i3c_i2c_xfers(struct i2c_dev_des= c *dev, u8 start_bit =3D CNDCTL_STCND; int i; =20 + if (!i2c_nxfers) + return 0; + struct renesas_i3c_xfer *xfer __free(kfree) =3D renesas_i3c_alloc_xfer(i3= c, 1); if (!xfer) return -ENOMEM; =20 - if (!i2c_nxfers) - return 0; - renesas_i3c_bus_enable(m, false); =20 init_completion(&xfer->comp); --=20 2.43.0 From nobody Sat Jun 13 12:15:33 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E194D3E7BCF; Mon, 8 Jun 2026 20:16:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780949789; cv=none; b=O6ehzb6i8cplsuaw5GQPdcB2UKkDbgbQTs8COBPTni+bgZQApSXo1SKIV/p4D393j+MBKI2jpvGqcJjSfcNDHhrL2hM1pCnFoCQ6oBy0+ChumGQoJ0EkC1D1hDLP6rnSGAvufOpzT89i9CSGSmwSvlodclWRQZnjDFaECIP3k4I= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780949789; c=relaxed/simple; bh=TEr7jiW1tdVK0sSquMRLdZ0+T94cmxOWGNuw2a7SL3w=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=hMXw/CEKgzoyN2WOliSG+gI+yDItqCYJkMgapVRwq5+Kf9mCeari/ZMcW4lNTfK6IGg5iJlkpy8Owq+CWjJdqkoeKM+5SZkP8IcfJsIRyPO9jLbOeq84Ky4eLRgUpde8cai3sYn1KJbVA8GH6vvk0M2DeZDXZVGIS/P+aNyq8tc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=STQCalbn; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="STQCalbn" Received: by smtp.kernel.org (Postfix) with ESMTPSA id C802D1F00898; Mon, 8 Jun 2026 20:16:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1780949786; bh=4sswhCww2SM+DB6DdlgyOdcgr7VXPLt6ZjUt7zMH8B4=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=STQCalbnwy7GlJiV4ucOC7dItPB3uFcfObTp0txXXDvcnV4h2GRTVltLX80FGOqDk CXCMYg8MtUxNR0+37vlRHJgibYHauTrlxSSHFbN2BXFuBre4mwZTAHue0/cRZ49ZmR HcgCz0N2d5c5WMG2ob7l1wgG6G2eAN9Ib5L6LurqcGFDk5szKvMyz+pY11eN+9vk+K c0sCV2O6GdsMqg9XesEXBLW/N2vjOKrEl4GEJ4kXmB4FuuB4ZYxvH8DZslRGGONT1w XAZ4tQtgHNJC4IzfI90Nmg20fhm6PpqdaLfAfXL0PkuWV18tO1kllGkDRvkCF6xlXp jnPlDRnXKxttg== From: Claudiu Beznea To: wsa+renesas@sang-engineering.com, tommaso.merciai.xr@bp.renesas.com, alexandre.belloni@bootlin.com, Frank.Li@nxp.com, p.zabel@pengutronix.de Cc: claudiu.beznea@kernel.org, claudiu.beznea@tuxon.dev, linux-i3c@lists.infradead.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Claudiu Beznea Subject: [PATCH v3 11/17] i3c: renesas: Follow a unified pattern for transfer and command initialization Date: Mon, 8 Jun 2026 23:15:37 +0300 Message-ID: <20260608201543.804902-12-claudiu.beznea@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260608201543.804902-1-claudiu.beznea@kernel.org> References: <20260608201543.804902-1-claudiu.beznea@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Claudiu Beznea Follow a unified pattern for transfer and command initialization across the driver. This keeps the code cleaner and easier to follow. Also, in some cases the I3C device was enabled before the transfer data structure was even allocated. Reviewed-by: Frank Li Signed-off-by: Claudiu Beznea --- Changes in v3: - none Changes in v2: - collected tags drivers/i3c/master/renesas-i3c.c | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/drivers/i3c/master/renesas-i3c.c b/drivers/i3c/master/renesas-= i3c.c index 1fd39dd57847..4504c6e6db31 100644 --- a/drivers/i3c/master/renesas-i3c.c +++ b/drivers/i3c/master/renesas-i3c.c @@ -726,6 +726,10 @@ static int renesas_i3c_daa(struct i3c_master_controlle= r *m) if (!xfer) return -ENOMEM; =20 + init_completion(&xfer->comp); + cmd =3D xfer->cmds; + cmd->rx_count =3D 0; + /* Enable I3C bus. */ renesas_i3c_bus_enable(m, true); =20 @@ -756,10 +760,6 @@ static int renesas_i3c_daa(struct i3c_master_controlle= r *m) renesas_writel(i3c->regs, DATBAS(pos), datbas_dvdyad_with_parity(ret)); } =20 - init_completion(&xfer->comp); - cmd =3D xfer->cmds; - cmd->rx_count =3D 0; - if (i3c->resuming) { /* Run ENTDAA for all the I3C devices on the bus, if resuming. */ ret =3D first_i3c_pos; @@ -883,13 +883,13 @@ static int renesas_i3c_send_ccc_cmd(struct i3c_master= _controller *m, if (!xfer) return -ENOMEM; =20 - renesas_i3c_bus_enable(m, true); - init_completion(&xfer->comp); cmd =3D xfer->cmds; cmd->rnw =3D ccc->rnw; cmd->cmd0 =3D 0; =20 + renesas_i3c_bus_enable(m, true); + /* Calculate the command descriptor. */ switch (ccc->id) { case I3C_CCC_SETDASA: @@ -939,15 +939,15 @@ static int renesas_i3c_i3c_xfers(struct i3c_dev_desc = *dev, struct i3c_xfer *i3c_ struct renesas_i3c_i2c_dev_data *data =3D i3c_dev_get_master_data(dev); int i; =20 - /* Enable I3C bus. */ - renesas_i3c_bus_enable(m, true); - struct renesas_i3c_xfer *xfer __free(kfree) =3D renesas_i3c_alloc_xfer(i3= c, 1); if (!xfer) return -ENOMEM; =20 init_completion(&xfer->comp); =20 + /* Enable I3C bus. */ + renesas_i3c_bus_enable(m, true); + for (i =3D 0; i < i3c_nxfers; i++) { struct renesas_i3c_cmd *cmd =3D xfer->cmds; =20 @@ -1073,12 +1073,12 @@ static int renesas_i3c_i2c_xfers(struct i2c_dev_des= c *dev, if (!xfer) return -ENOMEM; =20 - renesas_i3c_bus_enable(m, false); - init_completion(&xfer->comp); xfer->is_i2c_xfer =3D true; cmd =3D xfer->cmds; =20 + renesas_i3c_bus_enable(m, false); + if (!(renesas_readl(i3c->regs, BCST) & BCST_BFREF)) { cmd->err =3D -EBUSY; return cmd->err; --=20 2.43.0 From nobody Sat Jun 13 12:15:33 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7C2943E1D1B; Mon, 8 Jun 2026 20:16:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780949790; cv=none; b=hDJYQWl0NBMcTXD+KnHLx2JECTBgAOx5GykEMQ15zzB3k0VRux7QM81DHWwJKaETar1jkXIA1fZyLcyjgdiXnyMQL/fTMYvifsEFo6RcEOOPheFY2z8rwJoodmLZ4JDxxOqz+ohHW7LpcTtOU6ULlh4ryEooABYghTrkrN/0bEU= ARC-Message-Signature: i=1; a=rsa-sha256; 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charset="utf-8" From: Claudiu Beznea Drop the explicit memset() call on struct i3c_device_info object, as it is already initialized at declaration through compiler initialization. Reviewed-by: Frank Li Signed-off-by: Claudiu Beznea --- Changes in v3: - none Changes in v2: - collected tags drivers/i3c/master/renesas-i3c.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/i3c/master/renesas-i3c.c b/drivers/i3c/master/renesas-= i3c.c index 4504c6e6db31..dab643cd8859 100644 --- a/drivers/i3c/master/renesas-i3c.c +++ b/drivers/i3c/master/renesas-i3c.c @@ -634,7 +634,6 @@ static int renesas_i3c_bus_init(struct i3c_master_contr= oller *m) i3c->dyn_addr =3D ret; renesas_writel(i3c->regs, MSDVAD, MSDVAD_MDYAD(ret) | MSDVAD_MDYADV); =20 - memset(&info, 0, sizeof(info)); info.dyn_addr =3D ret; return i3c_master_set_info(&i3c->base, &info); } --=20 2.43.0 From nobody Sat Jun 13 12:15:33 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 786263EA955; Mon, 8 Jun 2026 20:16:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780949793; cv=none; b=Ip/9ILr7UV5+juCa7JTsEa/EFp77QAkMen1KcKIyYPXZdB3tGAeaxWN78xw3qGDNv5NbNs2BVtTfSYa9pnI313YEXq6TWPKbvo6UI0CYTRXmreQn4CYH3eQrnJjWNHW2qpSMvb1jeRMbPYSsGSCuwBsdmInGhybEJRsQNUV1bAM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780949793; c=relaxed/simple; bh=k/LOgJpS6zGmUD8bm7JaDGRNRkUaEDaoefMmoByt6Kw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=rTyYpGPmZtuGpyUS0sNFYsV5Qqo3biEM0ZQYLvKTCbz/VgK0HzrlVlJ3A6iP2zlMRu1+YG9BPtw/Fv3YCy7L7HT3KuMqEXDDn0HcWXxwkscuzLjIf5C7yLAb+CFXiLspIXMU6CGJyzD7wdyN97OH6ZqWC8PbvAjwKZ0IcgBkL3o= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=R/6Z4+5v; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="R/6Z4+5v" Received: by smtp.kernel.org (Postfix) with ESMTPSA id A15F61F00899; Mon, 8 Jun 2026 20:16:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1780949792; bh=BerDwGmj7hZ7/ETxG2OHHzRBs4pWGWN+/2PjeQmlsxE=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=R/6Z4+5vmWgXNwVZ3ZqTZ6RoOyc/ANvLZiRUTLehf70H7+DBJtrGLzmxMx2wm2RZW FHbpJ4x2agXHhiYU6AJeh7xsPzt26EYUtGiZkuVJyH7rRURgl0/s1NbZXky1VOdmxd +0LhmzRtOrmMJCojUhto0rNb1WSplcRgQn24CJuUBxyIScH25t0hT/9lYWL3LwL7BY 8rdOONrWTP4ADtGXVFpoTJv7oN+uBxMcQVQaOyOleNsjODUapU99albiGvinkSzHiU piWIv2hawzQSJkGvmcCxIz4a0CFirwmLYrEKTna1QRsRzgor+8IkO6jq8y3hElyJ0q PnKts/pFirdBg== From: Claudiu Beznea To: wsa+renesas@sang-engineering.com, tommaso.merciai.xr@bp.renesas.com, alexandre.belloni@bootlin.com, Frank.Li@nxp.com, p.zabel@pengutronix.de Cc: claudiu.beznea@kernel.org, claudiu.beznea@tuxon.dev, linux-i3c@lists.infradead.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Claudiu Beznea Subject: [PATCH v3 13/17] i3c: renesas: Update HW registers after SW computations are done Date: Mon, 8 Jun 2026 23:15:39 +0300 Message-ID: <20260608201543.804902-14-claudiu.beznea@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260608201543.804902-1-claudiu.beznea@kernel.org> References: <20260608201543.804902-1-claudiu.beznea@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Claudiu Beznea renesas_i3c_bus_init() performs a number of computations and software cache updates, interleaving them with hardware register writes. While this works today, it makes it harder to minimize the time the controller must remain powered when runtime PM is introduced. Perform all software computations and cache updates first, then update the hardware registers. This prepares for future runtime PM support. Reviewed-by: Frank Li Signed-off-by: Claudiu Beznea --- Changes in v3: - none Changes in v2: - collected tags drivers/i3c/master/renesas-i3c.c | 28 ++++++++++++++-------------- 1 file changed, 14 insertions(+), 14 deletions(-) diff --git a/drivers/i3c/master/renesas-i3c.c b/drivers/i3c/master/renesas-= i3c.c index dab643cd8859..38ce722881da 100644 --- a/drivers/i3c/master/renesas-i3c.c +++ b/drivers/i3c/master/renesas-i3c.c @@ -560,10 +560,6 @@ static int renesas_i3c_bus_init(struct i3c_master_cont= roller *m) if (!i3c->rate) return -EINVAL; =20 - ret =3D renesas_i3c_reset(i3c); - if (ret) - return ret; - i2c_total_ticks =3D DIV_ROUND_UP(i3c->rate, bus->scl_rate.i2c); i3c_total_ticks =3D DIV_ROUND_UP(i3c->rate, bus->scl_rate.i3c); =20 @@ -614,27 +610,31 @@ static int renesas_i3c_bus_init(struct i3c_master_con= troller *m) STDBR_SBRHO(double_SBR, od_high_ticks) | STDBR_SBRLP(pp_low_ticks) | STDBR_SBRHP(pp_high_ticks); - renesas_writel(i3c->regs, STDBR, i3c->i3c_STDBR); =20 /* Extended Bit Rate setting */ i3c->extbr =3D EXTBR_EBRLO(od_low_ticks) | EXTBR_EBRHO(od_high_ticks) | EXTBR_EBRLP(pp_low_ticks) | EXTBR_EBRHP(pp_high_ticks); - renesas_writel(i3c->regs, EXTBR, i3c->extbr); - - renesas_writel(i3c->regs, REFCKCTL, REFCKCTL_IREFCKS(cks)); - i3c->refclk_div =3D cks; - - /* I3C hw init*/ - renesas_i3c_hw_init(i3c); =20 ret =3D i3c_master_get_free_addr(m, 0); if (ret < 0) return ret; =20 + info.dyn_addr =3D ret; i3c->dyn_addr =3D ret; - renesas_writel(i3c->regs, MSDVAD, MSDVAD_MDYAD(ret) | MSDVAD_MDYADV); + i3c->refclk_div =3D cks; + + ret =3D renesas_i3c_reset(i3c); + if (ret) + return ret; + + renesas_writel(i3c->regs, STDBR, i3c->i3c_STDBR); + renesas_writel(i3c->regs, EXTBR, i3c->extbr); + renesas_writel(i3c->regs, REFCKCTL, REFCKCTL_IREFCKS(cks)); + renesas_writel(i3c->regs, MSDVAD, MSDVAD_MDYAD(i3c->dyn_addr) | MSDVAD_MD= YADV); + + /* I3C hw init*/ + renesas_i3c_hw_init(i3c); =20 - info.dyn_addr =3D ret; return i3c_master_set_info(&i3c->base, &info); } =20 --=20 2.43.0 From nobody Sat Jun 13 12:15:33 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 609013EAC72; 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dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="FrrcQOi3" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 99A7D1F00893; Mon, 8 Jun 2026 20:16:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1780949795; bh=+eKo+QBFA7yJaVxAS/CPkbCjR6/ASKa96gDMPM3c0i8=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=FrrcQOi32WqR74lAnM0FPk5/SBPESSqdvx43Txa5icoGj/t8IngEgVxRTO8RWRf4n HjjDixLO6olAc67k8Vs1wC6gKZKH8g+KEE+WfETZGTK0b3fijxofbpeT4NfZ+NlBJu D4cBkPJ47rjeaYxg+DG0aj9qfLekEqRpSGaIE9eDrrMMPDW7xAwHcs4T/PC404N1BT C2dhLNcBdp1g1tWoZEP8VKiNUAV2phU2SFDdttmbkhiauL9BcGRjc/tlDIFUAWenZJ IVTjOjtyhHyr1EOHXJSblQUrEYTwDRwwSdUqs0m3DU6+AiF9Fo9W0g1Batlb4usE0l 1D7R9KV+kXT3w== From: Claudiu Beznea To: wsa+renesas@sang-engineering.com, tommaso.merciai.xr@bp.renesas.com, alexandre.belloni@bootlin.com, Frank.Li@nxp.com, p.zabel@pengutronix.de Cc: claudiu.beznea@kernel.org, claudiu.beznea@tuxon.dev, linux-i3c@lists.infradead.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Claudiu Beznea Subject: [PATCH v3 14/17] i3c: renesas: Organize structures to avoid unnecessary padding Date: Mon, 8 Jun 2026 23:15:40 +0300 Message-ID: <20260608201543.804902-15-claudiu.beznea@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260608201543.804902-1-claudiu.beznea@kernel.org> References: <20260608201543.804902-1-claudiu.beznea@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Claudiu Beznea Reorder structure members to reduce padding and improve memory layout. Reviewed-by: Frank Li Signed-off-by: Claudiu Beznea --- Changes in v3: - none Changes in v2: - collected tags drivers/i3c/master/renesas-i3c.c | 32 ++++++++++++++++---------------- 1 file changed, 16 insertions(+), 16 deletions(-) diff --git a/drivers/i3c/master/renesas-i3c.c b/drivers/i3c/master/renesas-= i3c.c index 38ce722881da..103c938d1455 100644 --- a/drivers/i3c/master/renesas-i3c.c +++ b/drivers/i3c/master/renesas-i3c.c @@ -221,19 +221,19 @@ enum renesas_i3c_event { }; =20 struct renesas_i3c_cmd { + const void *tx_buf; + void *rx_buf; + /* i2c xfer */ + u8 *i2c_buf; + const struct i2c_msg *msg; + int i2c_bytes_left; + int i2c_is_last; u32 cmd0; u32 len; - const void *tx_buf; u32 tx_count; - void *rx_buf; u32 rx_count; u32 err; u8 rnw; - /* i2c xfer */ - int i2c_bytes_left; - int i2c_is_last; - u8 *i2c_buf; - const struct i2c_msg *msg; }; =20 struct renesas_i3c_xfer { @@ -262,22 +262,22 @@ struct renesas_i3c_addr { }; =20 struct renesas_i3c { + void __iomem *regs; + struct clk_bulk_data *clks; + struct reset_control *presetn; + struct reset_control *tresetn; + struct renesas_i3c_xferqueue xferqueue; struct i3c_master_controller base; + struct renesas_i3c_addr addrs[RENESAS_I3C_MAX_DEVS]; + unsigned long rate; enum i3c_internal_state internal_state; - u16 maxdevs; + bool resuming; u32 free_pos; u32 dyn_addr; u32 i2c_STDBR; u32 i3c_STDBR; u32 extbr; - unsigned long rate; - struct renesas_i3c_addr addrs[RENESAS_I3C_MAX_DEVS]; - struct renesas_i3c_xferqueue xferqueue; - void __iomem *regs; - struct clk_bulk_data *clks; - struct reset_control *presetn; - struct reset_control *tresetn; - bool resuming; + u16 maxdevs; u8 num_clks; u8 refclk_div; }; --=20 2.43.0 From nobody Sat Jun 13 12:15:33 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 31DD73E7BD1; Mon, 8 Jun 2026 20:16:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780949799; cv=none; b=FcH3UGZjmqFvA17TAgBn1YXFC/6yRhEmkd2xZHNbmz9bvT0d3/ckAy4vdepQaHk83ym216wbwoNEZw8Cbc8Z7SNtXlA9vxDVTieZlgqJV1FoD8y4d85ZSElM88Jf9tSq5dqkHbwjva5Ux5dgAw6YEhJSfiWa8uIa/qTFWaxM5oc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780949799; c=relaxed/simple; bh=VbbimtnH/8X8ltGJ+EThZkpML2IwRGZYOuS+gI0vNxg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=EGa4/85xjkafxsLiYI/WyJnyUN6Gsx289E1lLdVmdLsQUXO64kLIMAqFN5ZNjJhek00eKn+yRnI8IIbS4lZK5xmiEuy4L3R0cQxQ4XZJr5tRxrHq0gotJIrfeaPdAyKK+jmufLeDHyBd4x2h6hV3ebpHXCXutHmD9xSn4KzHbT8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=P9SQcnW+; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="P9SQcnW+" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 906151F00898; Mon, 8 Jun 2026 20:16:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1780949798; bh=AKSEwxHG4l89bFYF0FcArUN3IFekiGEu40fvQrNy8+g=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=P9SQcnW+6voirvsAk8gwovXqxrs6cDu/SdOCfVrtWdIs7fm7UmkMvDrpcUq/oFIx/ +aQgKHogxh0jow6piEyvhOkQMcKWz14VZcCkWeMiQIGU9ES8kfx6YTpbXcUeCukDMV D8ucfCgJAAEWDvrbxcXOAr+XcAsgcGyhOOLw/oYNyUrFAayIAxUygzHZXo9TII4dWl zGyHKgd8rScxUff2fW61h0awT7/cyAa/Ax86Hszm/8bw+PSyrrcDyXd9Bdwk8tSyuV +swWxsxi/VjeYXzpzPr4YMNmoirYniV5huvyOyysmgzpiGiBOAsH8ENRf31QwQ2ekX FDrGQg+TsPN9Q== From: Claudiu Beznea To: wsa+renesas@sang-engineering.com, tommaso.merciai.xr@bp.renesas.com, alexandre.belloni@bootlin.com, Frank.Li@nxp.com, p.zabel@pengutronix.de Cc: claudiu.beznea@kernel.org, claudiu.beznea@tuxon.dev, linux-i3c@lists.infradead.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Claudiu Beznea Subject: [PATCH v3 15/17] i3c: renesas: Use the "dev_name:irq_name" format for the interrupt name Date: Mon, 8 Jun 2026 23:15:41 +0300 Message-ID: <20260608201543.804902-16-claudiu.beznea@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260608201543.804902-1-claudiu.beznea@kernel.org> References: <20260608201543.804902-1-claudiu.beznea@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Claudiu Beznea Use the "dev_name:irq_name" format for the interrupt names. This makes it easier to identify interrupts in systems where multiple devices may request interrupts with the same name. Reviewed-by: Frank Li Signed-off-by: Claudiu Beznea --- Changes in v3: - none Changes in v2: - collected tags drivers/i3c/master/renesas-i3c.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/i3c/master/renesas-i3c.c b/drivers/i3c/master/renesas-= i3c.c index 103c938d1455..6572934a1837 100644 --- a/drivers/i3c/master/renesas-i3c.c +++ b/drivers/i3c/master/renesas-i3c.c @@ -1536,12 +1536,19 @@ static int renesas_i3c_probe(struct platform_device= *pdev) return ret; =20 for (i =3D 0; i < ARRAY_SIZE(renesas_i3c_irqs); i++) { + const char *irqname; + ret =3D platform_get_irq_byname(pdev, renesas_i3c_irqs[i].name); if (ret < 0) return ret; =20 + irqname =3D devm_kasprintf(&pdev->dev, GFP_KERNEL, "%s:%s", dev_name(&pd= ev->dev), + renesas_i3c_irqs[i].desc); + if (!irqname) + return -ENOMEM; + ret =3D devm_request_irq(&pdev->dev, ret, renesas_i3c_irqs[i].isr, - 0, renesas_i3c_irqs[i].desc, i3c); + 0, irqname, i3c); if (ret) return ret; } --=20 2.43.0 From nobody Sat Jun 13 12:15:33 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A0C803ED124; Mon, 8 Jun 2026 20:16:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780949804; cv=none; b=HY9/USIGgEEmWwvVKMwd3mBsBsCbSmHEA2GKCf7I1Kdo3H2R+z/apQGEMI8Et/cYvVqJJJYuioXR4yX6poO3Qnhn5mYjz1Ul+ZI7iy+ugqN7H/HMoqnk4Fr73kQXtUOo5M4/zL8Xo0UMJJ2diJ5iVrLHFVFvkKYNwjTd+iyxKG8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780949804; c=relaxed/simple; bh=B0eN8qck19HYNg4ngTDGX8MKsNaymMnqZpcjL8CDQW4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=kLvPEsm+HxilIvwmOFfGmboszprUAXdAZDTjQDPyKE5pJOPeut5CIUf0jBsU+lOlm2vpPUAJ1JsbWsoBgpoi9aFcdOJZksqedLYBjthROnC4GP3VxxunZQSGWbulYpX1nvLIsrAhm3/5c6Zun3dE/LkV5Il3hLzhdfYUgTHf+pA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=CYlgAbpe; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="CYlgAbpe" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 8B80C1F00893; Mon, 8 Jun 2026 20:16:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1780949801; bh=V8FpqfK6BrNGzXwyagk5netU9fKT6/4/WWtxZJz6REo=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=CYlgAbpewYwlBMRSlX7tg2SrLooa/aacJJE/A67/cjnmG5ZZZaW1Tri6up6oMtYLs V/qOjlIffVMoeVbfJG8R9Jp4Hx72clhGZXGL1y4Xp6yhAcFFCOBR76IYrcX5rnL3DU CuK8CgJ07dqX7lO5qEuUz8uJY874Z3+phDY1EMfqW4neRWxeXCNXLGHzzCHsWjbYoI ZwO3n5s78gx9qfm5zq8wvPERAIfEiIwpSeKkcv+3Pz58IdcUMmeHlz4rgk76mJxc35 WBiCSU+d+hjemN5l2aAZeo7CaciFZt57J5+D1pcCSM8vU5PlsbJvkHM6zexZEcetr5 8/trAzQRZhaeA== From: Claudiu Beznea To: wsa+renesas@sang-engineering.com, tommaso.merciai.xr@bp.renesas.com, alexandre.belloni@bootlin.com, Frank.Li@nxp.com, p.zabel@pengutronix.de Cc: claudiu.beznea@kernel.org, claudiu.beznea@tuxon.dev, linux-i3c@lists.infradead.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Claudiu Beznea Subject: [PATCH v3 16/17] i3c: renesas: Drop unnecessary tab Date: Mon, 8 Jun 2026 23:15:42 +0300 Message-ID: <20260608201543.804902-17-claudiu.beznea@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260608201543.804902-1-claudiu.beznea@kernel.org> References: <20260608201543.804902-1-claudiu.beznea@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Claudiu Beznea Remove an unnecessary tab to make the code cleaner. Reviewed-by: Frank Li Signed-off-by: Claudiu Beznea --- Changes in v3: - none Changes in v2: - collected tags drivers/i3c/master/renesas-i3c.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/i3c/master/renesas-i3c.c b/drivers/i3c/master/renesas-= i3c.c index 6572934a1837..b6c282c53a54 100644 --- a/drivers/i3c/master/renesas-i3c.c +++ b/drivers/i3c/master/renesas-i3c.c @@ -109,7 +109,7 @@ #define NCMDQP_DATA_LENGTH(x) FIELD_PREP(GENMASK(31, 16), x) =20 #define NRSPQP 0x154 /* Normal Respone Queue */ -#define NRSPQP_NO_ERROR 0 +#define NRSPQP_NO_ERROR 0 #define NRSPQP_ERROR_CRC 1 #define NRSPQP_ERROR_PARITY 2 #define NRSPQP_ERROR_FRAME 3 --=20 2.43.0 From nobody Sat Jun 13 12:15:33 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 56DAB3B14C6; Mon, 8 Jun 2026 20:16:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780949806; cv=none; b=B0hB5woLq+WZ9Wr3CdZSai8gdsKHooMWYvr5KVrmFJmrPTtDoFUCOEyUFINkL0haLDvQB+vxAL7qkv8WvuvDou7JRfUTeMuX1BGPIPpvV7y9Z/Yd1G4m2SbSm3elAD7s2qF4krBrwPTjprs/WxbIzmITPTvRsm6KyIofjJj1A5c= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780949806; c=relaxed/simple; bh=NMiF3Yhwlu6+sd9U6+CIvmhY6LQUZh6QVX+1yZEO5BM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Vyw7CQ4KwJDSlWdoV18gXEsYkQZWVlu9Zq3OYwsOvuHCK0eHAF4f4rMik3DYsDWlD6qm6j2nFnnskQ37W+5vlOqa60x7mdJd9mL2j7dj2B2BaqS1QENy2gvX5ThbBKG2py5pFWejin/rAw19dGXAf+pLNRk3Y0ObMcf1XiZTt6Y= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=RklmNhgk; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="RklmNhgk" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 7C93B1F00898; Mon, 8 Jun 2026 20:16:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1780949804; bh=RHP6HS6b5+U/6cKljmDnmU3I12hOu6mdtrdpdlC9EDo=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=RklmNhgk0hda7262QggA9aE1BvmBXXEYSDqgiHg0kp2bzBqJ/qVGcg1lcrQrcZlY5 fYib/eILYhNwrN8P/zm47+9X/Qew+pZujoyWAsRO/bjvnmUXh8cSccZv0ZWlkZL0ZN Ked/jVLIDv9VRjEhebWtSa8EaGo8Ho1L/DXdJFttJrzQ4506ElKO3wm5hwF3TyVezs cD+f7Spe36trvz6vbVgcHwsiIMiquAeCvWrpYB0Ldicr8t5whvGrd0deyZN9hcuHjb NlcqI4kxNubLLIBqu0w5u3wKpCuuHCJ6/QoYi0Zwfrenqe3oZXaSdjiH4BWTjk7Zp1 kltOyI4tcccyg== From: Claudiu Beznea To: wsa+renesas@sang-engineering.com, tommaso.merciai.xr@bp.renesas.com, alexandre.belloni@bootlin.com, Frank.Li@nxp.com, p.zabel@pengutronix.de Cc: claudiu.beznea@kernel.org, claudiu.beznea@tuxon.dev, linux-i3c@lists.infradead.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Claudiu Beznea Subject: [PATCH v3 17/17] i3c: renesas: Add runtime PM support Date: Mon, 8 Jun 2026 23:15:43 +0300 Message-ID: <20260608201543.804902-18-claudiu.beznea@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260608201543.804902-1-claudiu.beznea@kernel.org> References: <20260608201543.804902-1-claudiu.beznea@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Claudiu Beznea On the SoCs where the Renesas I3C driver is enabled (RZ/G3S and RZ/G3E), the clocks of the IP are managed through a clock PM domain. To keep the I3C code simpler, the explicit clock handling was dropped along with the addition of runtime PM support, in favor of the runtime PM APIs. Only the code for getting tclk was preserved, as it is necessary to compute the I3C clock rate. All the APIs provided to the I3C subsystem through struct i3c_master_controller_ops are guarded with runtime PM APIs to enable/disable the controller at runtime. As the Renesas I3C driver implements an asynchronous transmit model by preparing a transfer and waiting for its completion through the ISR, renesas_i3c_abort_xfer() was added to disable interrupts and clear any pending IRQ status bits when there is no completion in the defined timeout. Along with this, renesas_i3c_wait_xfer() return type was changed to unsigned long. Add runtime PM support for the Renesas I3C driver. Signed-off-by: Claudiu Beznea --- Changes in v3: - dropped the RPM resume/suspend in renesas_i3c_suspend() to read the DATBASn registers as the DATBASn register are not used on suspend/resume path anymore in this version Changes in v2: - dropped the runtime suspend/resume functions as for now, there will be no pinctrl sleep state described in DT - do not synchronize the IRQs in renesas_i3c_abort_xfer() as some handlers may re-enable interrupts; instead just disable the interrupts and clean any status bits that the IRQ handlers are touching; with this the struct renesas_i3c::{irqs, num_irqs} and the associated code was removed - dropped the renesas_i3c_dont_use_autosuspend() along with the devm_add_action_or_reset() call to set it since the same operation is done by the devres cleanup helper of devm_pm_runtime_enable() - adjusted the renesas_i3c_suspend() with RPM calls to save the DATBAS registers - use pm_runtime_resume_and_get() in renesas_i3c_resume() to avoid mixing gotos with cleanup helpers - adjusted the patch description to reflect these changes drivers/i3c/master/renesas-i3c.c | 150 +++++++++++++++++++++++++------ 1 file changed, 122 insertions(+), 28 deletions(-) diff --git a/drivers/i3c/master/renesas-i3c.c b/drivers/i3c/master/renesas-= i3c.c index b6c282c53a54..d6121ca86990 100644 --- a/drivers/i3c/master/renesas-i3c.c +++ b/drivers/i3c/master/renesas-i3c.c @@ -22,6 +22,7 @@ #include #include #include +#include #include #include #include "../internals.h" @@ -199,8 +200,6 @@ #define RENESAS_I3C_MAX_DEVS 8 #define I2C_INIT_MSG -1 =20 -#define RENESAS_I3C_TCLK_IDX 1 - enum i3c_internal_state { I3C_INTERNAL_STATE_DISABLED, I3C_INTERNAL_STATE_CONTROLLER_IDLE, @@ -263,9 +262,10 @@ struct renesas_i3c_addr { =20 struct renesas_i3c { void __iomem *regs; - struct clk_bulk_data *clks; + struct clk *tclk; struct reset_control *presetn; struct reset_control *tresetn; + struct device *dev; struct renesas_i3c_xferqueue xferqueue; struct i3c_master_controller base; struct renesas_i3c_addr addrs[RENESAS_I3C_MAX_DEVS]; @@ -278,7 +278,6 @@ struct renesas_i3c { u32 i3c_STDBR; u32 extbr; u16 maxdevs; - u8 num_clks; u8 refclk_div; }; =20 @@ -443,7 +442,24 @@ static void renesas_i3c_enqueue_xfer(struct renesas_i3= c *i3c, struct renesas_i3c } } =20 -static void renesas_i3c_wait_xfer(struct renesas_i3c *i3c, struct renesas_= i3c_xfer *xfer) +static void renesas_i3c_abort_xfer(struct renesas_i3c *i3c) +{ + guard(spinlock_irqsave)(&i3c->xferqueue.lock); + + /* Disable all the interrupts */ + renesas_writel(i3c->regs, BIE, 0); + renesas_writel(i3c->regs, NTIE, 0); + + /* Clear normal transfer status flags. */ + renesas_clear_bit(i3c->regs, NTST, NTST_TDBEF0 | NTST_RDBFF0 | NTST_RSPQF= F | + NTST_TEF | NTST_TABTF); + /* Clear bus status flags. */ + renesas_clear_bit(i3c->regs, BST, BST_NACKDF | BST_TENDF | BST_SPCNDDF); + /* Clear error flags. */ + renesas_clear_bit(i3c->regs, BCTL, BCTL_ABT); +} + +static unsigned long renesas_i3c_wait_xfer(struct renesas_i3c *i3c, struct= renesas_i3c_xfer *xfer) { unsigned long time_left; =20 @@ -452,6 +468,8 @@ static void renesas_i3c_wait_xfer(struct renesas_i3c *i= 3c, struct renesas_i3c_xf time_left =3D wait_for_completion_timeout(&xfer->comp, msecs_to_jiffies(1= 000)); if (!time_left) renesas_i3c_dequeue_xfer(i3c, xfer); + + return time_left; } =20 static void renesas_i3c_set_prts(struct renesas_i3c *i3c, u32 val) @@ -485,6 +503,12 @@ static void renesas_i3c_bus_enable(struct i3c_master_c= ontroller *m, bool i3c_mod static int renesas_i3c_reset(struct renesas_i3c *i3c) { u32 val; + int ret; + + PM_RUNTIME_ACQUIRE_IF_ENABLED_AUTOSUSPEND(i3c->dev, pm); + ret =3D PM_RUNTIME_ACQUIRE_ERR(&pm); + if (ret) + return ret; =20 renesas_writel(i3c->regs, BCTL, 0); renesas_set_bit(i3c->regs, RSTCTL, RSTCTL_RI3CRST); @@ -556,7 +580,7 @@ static int renesas_i3c_bus_init(struct i3c_master_contr= oller *m) int od_high_ticks, od_low_ticks, i2c_total_ticks; int ret; =20 - i3c->rate =3D clk_get_rate(i3c->clks[RENESAS_I3C_TCLK_IDX].clk); + i3c->rate =3D clk_get_rate(i3c->tclk); if (!i3c->rate) return -EINVAL; =20 @@ -627,6 +651,11 @@ static int renesas_i3c_bus_init(struct i3c_master_cont= roller *m) if (ret) return ret; =20 + PM_RUNTIME_ACQUIRE_IF_ENABLED_AUTOSUSPEND(i3c->dev, pm); + ret =3D PM_RUNTIME_ACQUIRE_ERR(&pm); + if (ret) + return ret; + renesas_writel(i3c->regs, STDBR, i3c->i3c_STDBR); renesas_writel(i3c->regs, EXTBR, i3c->extbr); renesas_writel(i3c->regs, REFCKCTL, REFCKCTL_IREFCKS(cks)); @@ -716,6 +745,7 @@ static int renesas_i3c_daa(struct i3c_master_controller= *m) { struct renesas_i3c *i3c =3D to_renesas_i3c(m); struct renesas_i3c_cmd *cmd; + unsigned long time_left; u32 olddevs, newdevs; u8 last_addr =3D 0, pos; u8 first_i3c_pos =3D 0; @@ -729,6 +759,11 @@ static int renesas_i3c_daa(struct i3c_master_controlle= r *m) cmd =3D xfer->cmds; cmd->rx_count =3D 0; =20 + PM_RUNTIME_ACQUIRE_IF_ENABLED_AUTOSUSPEND(i3c->dev, pm); + ret =3D PM_RUNTIME_ACQUIRE_ERR(&pm); + if (ret) + return ret; + /* Enable I3C bus. */ renesas_i3c_bus_enable(m, true); =20 @@ -777,7 +812,9 @@ static int renesas_i3c_daa(struct i3c_master_controller= *m) NCMDQP_CMD(I3C_CCC_ENTDAA) | NCMDQP_DEV_INDEX(ret) | NCMDQP_DEV_COUNT(i3c->maxdevs - ret) | NCMDQP_TOC; =20 - renesas_i3c_wait_xfer(i3c, xfer); + time_left =3D renesas_i3c_wait_xfer(i3c, xfer); + if (!time_left) + renesas_i3c_abort_xfer(i3c); =20 /* Skip attaching if there are failures on the xfer. */ if (xfer->ret) { @@ -870,6 +907,7 @@ static int renesas_i3c_send_ccc_cmd(struct i3c_master_c= ontroller *m, { struct renesas_i3c *i3c =3D to_renesas_i3c(m); struct renesas_i3c_cmd *cmd; + unsigned long time_left; int ret, pos =3D 0; =20 if (ccc->id & I3C_CCC_DIRECT) { @@ -887,6 +925,11 @@ static int renesas_i3c_send_ccc_cmd(struct i3c_master_= controller *m, cmd->rnw =3D ccc->rnw; cmd->cmd0 =3D 0; =20 + PM_RUNTIME_ACQUIRE_IF_ENABLED_AUTOSUSPEND(i3c->dev, pm); + ret =3D PM_RUNTIME_ACQUIRE_ERR(&pm); + if (ret) + return ret; + renesas_i3c_bus_enable(m, true); =20 /* Calculate the command descriptor. */ @@ -921,7 +964,9 @@ static int renesas_i3c_send_ccc_cmd(struct i3c_master_c= ontroller *m, } } =20 - renesas_i3c_wait_xfer(i3c, xfer); + time_left =3D renesas_i3c_wait_xfer(i3c, xfer); + if (!time_left) + renesas_i3c_abort_xfer(i3c); =20 ret =3D xfer->ret; if (ret) @@ -936,7 +981,9 @@ static int renesas_i3c_i3c_xfers(struct i3c_dev_desc *d= ev, struct i3c_xfer *i3c_ struct i3c_master_controller *m =3D i3c_dev_get_master(dev); struct renesas_i3c *i3c =3D to_renesas_i3c(m); struct renesas_i3c_i2c_dev_data *data =3D i3c_dev_get_master_data(dev); - int i; + unsigned long time_left; + bool abort_xfer =3D false; + int i, ret; =20 struct renesas_i3c_xfer *xfer __free(kfree) =3D renesas_i3c_alloc_xfer(i3= c, 1); if (!xfer) @@ -944,6 +991,11 @@ static int renesas_i3c_i3c_xfers(struct i3c_dev_desc *= dev, struct i3c_xfer *i3c_ =20 init_completion(&xfer->comp); =20 + PM_RUNTIME_ACQUIRE_IF_ENABLED_AUTOSUSPEND(i3c->dev, pm); + ret =3D PM_RUNTIME_ACQUIRE_ERR(&pm); + if (ret) + return ret; + /* Enable I3C bus. */ renesas_i3c_bus_enable(m, true); =20 @@ -975,9 +1027,14 @@ static int renesas_i3c_i3c_xfers(struct i3c_dev_desc = *dev, struct i3c_xfer *i3c_ renesas_set_bit(i3c->regs, NTIE, NTIE_TDBEIE0); } =20 - renesas_i3c_wait_xfer(i3c, xfer); + time_left =3D renesas_i3c_wait_xfer(i3c, xfer); + if (!time_left) + abort_xfer =3D true; } =20 + if (abort_xfer) + renesas_i3c_abort_xfer(i3c); + return 0; } =20 @@ -986,12 +1043,17 @@ static int renesas_i3c_attach_i3c_dev(struct i3c_dev= _desc *dev) struct i3c_master_controller *m =3D i3c_dev_get_master(dev); struct renesas_i3c *i3c =3D to_renesas_i3c(m); struct renesas_i3c_i2c_dev_data *data; - int pos; + int pos, ret; =20 pos =3D renesas_i3c_get_free_pos(i3c); if (pos < 0) return pos; =20 + PM_RUNTIME_ACQUIRE_IF_ENABLED_AUTOSUSPEND(i3c->dev, pm); + ret =3D PM_RUNTIME_ACQUIRE_ERR(&pm); + if (ret) + return ret; + data =3D kzalloc_obj(*data); if (!data) return -ENOMEM; @@ -1015,7 +1077,12 @@ static int renesas_i3c_reattach_i3c_dev(struct i3c_d= ev_desc *dev, struct renesas_i3c *i3c =3D to_renesas_i3c(m); struct renesas_i3c_i2c_dev_data *data =3D i3c_dev_get_master_data(dev); struct i3c_dev_desc *tmp_dev =3D i3c->addrs[data->index].i3c_dev; - int pos; + int pos, ret; + + PM_RUNTIME_ACQUIRE_IF_ENABLED_AUTOSUSPEND(i3c->dev, pm); + ret =3D PM_RUNTIME_ACQUIRE_ERR(&pm); + if (ret) + return ret; =20 pos =3D renesas_i3c_get_free_pos(i3c); =20 @@ -1045,8 +1112,12 @@ static void renesas_i3c_detach_i3c_dev(struct i3c_de= v_desc *dev) struct renesas_i3c_i2c_dev_data *data =3D i3c_dev_get_master_data(dev); struct i3c_master_controller *m =3D i3c_dev_get_master(dev); struct renesas_i3c *i3c =3D to_renesas_i3c(m); + int ret; =20 - renesas_writel(i3c->regs, DATBAS(data->index), 0); + PM_RUNTIME_ACQUIRE_IF_ENABLED_AUTOSUSPEND(i3c->dev, pm); + ret =3D PM_RUNTIME_ACQUIRE_ERR(&pm); + if (!ret) + renesas_writel(i3c->regs, DATBAS(data->index), 0); =20 i3c_dev_set_master_data(dev, NULL); i3c->addrs[data->index].addr =3D 0; @@ -1063,7 +1134,9 @@ static int renesas_i3c_i2c_xfers(struct i2c_dev_desc = *dev, struct renesas_i3c *i3c =3D to_renesas_i3c(m); struct renesas_i3c_cmd *cmd; u8 start_bit =3D CNDCTL_STCND; - int i; + unsigned long time_left; + bool abort_xfer =3D false; + int i, ret; =20 if (!i2c_nxfers) return 0; @@ -1076,6 +1149,11 @@ static int renesas_i3c_i2c_xfers(struct i2c_dev_desc= *dev, xfer->is_i2c_xfer =3D true; cmd =3D xfer->cmds; =20 + PM_RUNTIME_ACQUIRE_IF_ENABLED_AUTOSUSPEND(i3c->dev, pm); + ret =3D PM_RUNTIME_ACQUIRE_ERR(&pm); + if (ret) + return ret; + renesas_i3c_bus_enable(m, false); =20 if (!(renesas_readl(i3c->regs, BCST) & BCST_BFREF)) { @@ -1102,7 +1180,9 @@ static int renesas_i3c_i2c_xfers(struct i2c_dev_desc = *dev, =20 renesas_set_bit(i3c->regs, NTSTE, NTSTE_TDBEE0); =20 - wait_for_completion_timeout(&xfer->comp, m->i2c.timeout); + time_left =3D wait_for_completion_timeout(&xfer->comp, m->i2c.timeout); + if (!time_left) + abort_xfer =3D true; =20 if (cmd->err) break; @@ -1111,6 +1191,10 @@ static int renesas_i3c_i2c_xfers(struct i2c_dev_desc= *dev, } =20 renesas_i3c_dequeue_xfer(i3c, xfer); + + if (abort_xfer) + renesas_i3c_abort_xfer(i3c); + return cmd->err; } =20 @@ -1511,12 +1595,16 @@ static int renesas_i3c_probe(struct platform_device= *pdev) if (IS_ERR(i3c->regs)) return PTR_ERR(i3c->regs); =20 - ret =3D devm_clk_bulk_get_all_enabled(&pdev->dev, &i3c->clks); - if (ret <=3D RENESAS_I3C_TCLK_IDX) - return dev_err_probe(&pdev->dev, ret < 0 ? ret : -EINVAL, - "Failed to get clocks (need > %d, got %d)\n", - RENESAS_I3C_TCLK_IDX, ret); - i3c->num_clks =3D ret; + i3c->tclk =3D devm_clk_get(&pdev->dev, "tclk"); + if (IS_ERR(i3c->tclk)) + return dev_err_probe(&pdev->dev, PTR_ERR(i3c->tclk), "Failed to get tclk= "); + + i3c->dev =3D &pdev->dev; + pm_runtime_set_autosuspend_delay(&pdev->dev, 300); + pm_runtime_use_autosuspend(&pdev->dev); + ret =3D devm_pm_runtime_enable(&pdev->dev); + if (ret) + return ret; =20 i3c->tresetn =3D devm_reset_control_get_optional_exclusive_deasserted(&pd= ev->dev, "tresetn"); if (IS_ERR(i3c->tresetn)) @@ -1583,8 +1671,6 @@ static int renesas_i3c_suspend(struct device *dev) if (ret) goto err_mark_resumed; =20 - clk_bulk_disable(i3c->num_clks, i3c->clks); - return 0; =20 err_mark_resumed: @@ -1606,13 +1692,13 @@ static int renesas_i3c_resume(struct device *dev) if (ret) return ret; =20 - ret =3D clk_bulk_enable(i3c->num_clks, i3c->clks); + ret =3D renesas_i3c_reset(i3c); if (ret) goto err_resets_asserted; =20 - ret =3D renesas_i3c_reset(i3c); + ret =3D pm_runtime_resume_and_get(dev); if (ret) - goto err_clks_disable; + goto err_resets_asserted; =20 /* Re-store I3C registers value. */ renesas_writel(i3c->regs, STDBR, i3c->i3c_STDBR); @@ -1635,15 +1721,23 @@ static int renesas_i3c_resume(struct device *dev) =20 i2c_mark_adapter_resumed(&i3c->base.i2c); =20 + pm_runtime_put_autosuspend(dev); + /* * I3C devices may have retained their dynamic address anyway. Do not * fail the resume because of DAA error. */ return 0; =20 -err_clks_disable: - clk_bulk_disable(i3c->num_clks, i3c->clks); err_resets_asserted: + /* + * If this happens, there is no way to recover from this state without + * reloading the driver. We want to avoid keeping the reset line + * deasserted unnecessarily. The runtime paths will still work correctly + * even if the IP registers are accessed while reset is asserted (e.g. + * if a runtime path is triggered after a failed resume). Checked on + * RZ/G3S. + */ reset_control_bulk_assert(ARRAY_SIZE(resets), resets); return ret; } --=20 2.43.0