From nobody Mon Jun 8 20:41:23 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 112D73C061C; Mon, 8 Jun 2026 10:04:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780913099; cv=none; b=Grdg1LqmtI1waYW01dH0r/ZmlNkf+SnshjACJc8gMpVhlTGnorwoASGVda6+ISPcW1RyQ0T88QPyNEJQEIz+GHfGAIMFQoxlrC/yJbuqmofJ7u3Fkk4CzwuYwZRAqIsk/kODK1YCWouuQsT91TBanEsx/T0bmfCEPphQQZ9UtdE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780913099; c=relaxed/simple; bh=9ns8VLbe6TQKPJoz6QFdSHv+pjT2/iJw8Ty9xd/RvLg=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=uGCxxu72IrKscfLw7tRQ2+QuxneYZHINNR3B9FXroYUz5N0GgDj7Be/hUlT51DvQrs/ksGM9peEAa2gHJeDYy/gdy6TFXJ2O2QP62r798s4tv7NKhmUzaD6K5xz4iwPkmmqMbPQ9z8g5ojcwZnHNfGoxhYoEJ04i2+/qKdkudvE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=M8Bxt72e; arc=none smtp.client-ip=68.232.154.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="M8Bxt72e" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1780913098; x=1812449098; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=9ns8VLbe6TQKPJoz6QFdSHv+pjT2/iJw8Ty9xd/RvLg=; b=M8Bxt72ewdUj/zzQwcHUq91XiPEXDNZQgVbCf5oY9vhzTQeONXmvpnIv 5LyXBJAjMkZSmCE9Qle+eAJ5g7JOCgtQeqjOjGgkgdPlbw7UVRzTRgA93 z8MjRUkaU/9Dkg6O47hKjKTvBkfM+kcJkIntHp335ueiiXYmOf5hTW3+e XPrDFh7xRCel4WNvT8HOsKBokfRqYKTvQqdUyj/jtNetxSRdHA5d/4RsM vaHL4OIhV7D0KBtCNguFAMbYDbirV5djuBn0HiL6Hi7Ji8e2bd2QXNxta mTJnwKF0N3cJaHIQLMdACwnhQ/n/d1kHIrurYJ3mL1fwzPNv2y29TMQyF w==; X-CSE-ConnectionGUID: oPDOvqoGSruI+lcOEBB0Sw== X-CSE-MsgGUID: ddclArniQdCPSGi2YuqPVg== X-IronPort-AV: E=Sophos;i="6.24,194,1774335600"; d="scan'208";a="59147072" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa2.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 08 Jun 2026 03:04:57 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.58; Mon, 8 Jun 2026 03:04:57 -0700 Received: from che-ld-unglab06.microchip.com (10.10.85.11) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.58 via Frontend Transport; Mon, 8 Jun 2026 03:04:53 -0700 From: Thangaraj Samynathan To: CC: Bryan Whitehead , , Andrew Lunn , "David S . Miller" , Eric Dumazet , "Jakub Kicinski" , Paolo Abeni , Subject: [PATCH net-next v3 1/2] net: lan743x: add RMII strap status detection for PCI11x1x Date: Mon, 8 Jun 2026 15:34:34 +0530 Message-ID: <20260608100435.11214-2-thangaraj.s@microchip.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260608100435.11214-1-thangaraj.s@microchip.com> References: <20260608100435.11214-1-thangaraj.s@microchip.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Extend pci11x1x_strap_get_status() to read the RMII strap bits from the STRAP_READ register. The is_rmii_en flag is initialized to false and updated based on the hardware strap only if SGMII is not already enabled. This ensures correct interface identification during adapter initialization. Signed-off-by: Thangaraj Samynathan --- Changes in v3: - Update debug log to report selected interface (SGMII/RMII/RGMII) instead of only SGMII enable/disable state drivers/net/ethernet/microchip/lan743x_main.c | 12 ++++++++++-- drivers/net/ethernet/microchip/lan743x_main.h | 3 +++ 2 files changed, 13 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/microchip/lan743x_main.c b/drivers/net/et= hernet/microchip/lan743x_main.c index 1cdce35e1423..0798f3f1f435 100644 --- a/drivers/net/ethernet/microchip/lan743x_main.c +++ b/drivers/net/ethernet/microchip/lan743x_main.c @@ -42,6 +42,7 @@ static void pci11x1x_strap_get_status(struct lan743x_adap= ter *adapter) u32 strap; int ret; =20 + adapter->is_rmii_en =3D false; /* Timeout =3D 100 (i.e. 1 sec (10 msce * 100)) */ ret =3D lan743x_hs_syslock_acquire(adapter, 100); if (ret < 0) { @@ -73,8 +74,15 @@ static void pci11x1x_strap_get_status(struct lan743x_ada= pter *adapter) adapter->is_sgmii_en =3D false; } } - netif_dbg(adapter, drv, adapter->netdev, - "SGMII I/F %sable\n", adapter->is_sgmii_en ? "En" : "Dis"); + + if (!adapter->is_sgmii_en && strap & STRAP_READ_USE_RMII_EN_) { + if (strap & STRAP_READ_RMII_EN_) + adapter->is_rmii_en =3D true; + } + + netif_dbg(adapter, drv, adapter->netdev, "Selected I/F: %s\n", + adapter->is_sgmii_en ? "SGMII" : + adapter->is_rmii_en ? "RMII" : "RGMII"); } =20 static bool is_pci11x1x_chip(struct lan743x_adapter *adapter) diff --git a/drivers/net/ethernet/microchip/lan743x_main.h b/drivers/net/et= hernet/microchip/lan743x_main.h index 1573c8f9c993..1f8d9294a6ef 100644 --- a/drivers/net/ethernet/microchip/lan743x_main.h +++ b/drivers/net/ethernet/microchip/lan743x_main.h @@ -36,7 +36,9 @@ #define FPGA_SGMII_OP BIT(24) =20 #define STRAP_READ (0x0C) +#define STRAP_READ_USE_RMII_EN_ BIT(23) #define STRAP_READ_USE_SGMII_EN_ BIT(22) +#define STRAP_READ_RMII_EN_ BIT(7) #define STRAP_READ_SGMII_EN_ BIT(6) #define STRAP_READ_SGMII_REFCLK_ BIT(5) #define STRAP_READ_SGMII_2_5G_ BIT(4) @@ -1072,6 +1074,7 @@ struct lan743x_adapter { struct lan743x_rx rx[LAN743X_USED_RX_CHANNELS]; bool is_pci11x1x; bool is_sgmii_en; + bool is_rmii_en; /* protect ethernet syslock */ spinlock_t eth_syslock_spinlock; bool eth_syslock_en; --=20 2.34.1 From nobody Mon Jun 8 20:41:23 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B457E3C09E4; Mon, 8 Jun 2026 10:05:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780913105; cv=none; b=IRHWOXn9skxcvGGV/O4Ds49G9a/nVWvHJflAdHb5dYbV6gOlif3r50GvFWc+S3GkUx5YOC/FMjWbmdfRt4VNr4/B0tEO2+FJh9/oxtTjPkrwTmjgKgfPDG51CxWkSKRNSXEK0tWAUvvEeFg2YIoU90Xm2RkC8660xYlAHAejWog= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780913105; c=relaxed/simple; bh=pK8CS9MvrORCEFFnC1jlR8gB8rCvCJSOg0OUvw8+l04=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=ehvMgwAUVwE1D3bwf54pY8yIEFhfzyfjU84HcEpCv+OjTwZ/KG4JjgCm70GaN8gWuMVXHpI9yJfrM2M6RkoNCjAu9H6/kSOgL1HezN+ENkgRMz2WgosGsVoU+YFhIkHnUM51+FqyZPQrg0+PPWFmqnSADo0HE5sPv1akFhZQAj8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=USU4APxM; arc=none smtp.client-ip=68.232.154.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="USU4APxM" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1780913103; x=1812449103; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=pK8CS9MvrORCEFFnC1jlR8gB8rCvCJSOg0OUvw8+l04=; b=USU4APxMhOyUZWPESrLTbliddCOkkTn+35DKC4WFA9EOFLwF0UMQDl8s YQUGAOCLISlhiMfb4lgL4rQ4FaXWK2bkBbTo1pv/fsy1a5WcFD0TBNtef O/+oX7Bd9U9Dwl4mUJz3ZXt5I/u6iIVilXn3ueqBmbp2DDQ2Uxs1Qmr9l W+pg2o80Xuy2WDLSm7JoBnbisb/I3BUOYkIRcez+yUXwXSB4Pho4pupMb NROJvFiazkNIvCo2i2RbWbNpEgArQaKSo5aYvlr8MbYkLo7TTKXZiobIO iqesMyQJYSK5rYVA+FVzXH5AkImjPqnvL6nwCYKvumLDCwilfSY4ue8du w==; X-CSE-ConnectionGUID: 2tqGft09R7G4Mrjz4VQQ4w== X-CSE-MsgGUID: f9ediMdxQTWlm2z2n5zojA== X-IronPort-AV: E=Sophos;i="6.24,194,1774335600"; d="scan'208";a="225960970" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 08 Jun 2026 03:05:03 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.58; Mon, 8 Jun 2026 03:05:02 -0700 Received: from che-ld-unglab06.microchip.com (10.10.85.11) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.58 via Frontend Transport; Mon, 8 Jun 2026 03:04:59 -0700 From: Thangaraj Samynathan To: CC: Bryan Whitehead , , Andrew Lunn , "David S . Miller" , Eric Dumazet , "Jakub Kicinski" , Paolo Abeni , Subject: [PATCH net-next v3 2/2] net: lan743x: add support for RMII interface Date: Mon, 8 Jun 2026 15:34:35 +0530 Message-ID: <20260608100435.11214-3-thangaraj.s@microchip.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260608100435.11214-1-thangaraj.s@microchip.com> References: <20260608100435.11214-1-thangaraj.s@microchip.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Enable RMII interface in the lan743x driver for PHY and MAC configuration. - Select RMII interface in lan743x_phy_interface_select(). - Update phylink supported_interfaces and MAC capabilities. - Enable RMII via RMII_CTL in lan743x_hardware_init(). - Define RMII_CTL register and enable bit in lan743x_main.h. EEE is not supported with RMII on PCI11x1x: the hardware does not implement LPI signaling over RMII. Clear RMII from lpi_interfaces to prevent phylink from enabling EEE on this interface. Signed-off-by: Thangaraj Samynathan --- Changes in v3: - Update commit message to document that EEE is disabled by setting lpi_capabilities =3D 0 Changes in v2: - Remove redundant mac_capabilities &=3D ~MAC_1000FD; phylink already handles capability reduction for RMII via phy_caps_from_interface() drivers/net/ethernet/microchip/lan743x_main.c | 17 +++++++++++++++++ drivers/net/ethernet/microchip/lan743x_main.h | 3 +++ 2 files changed, 20 insertions(+) diff --git a/drivers/net/ethernet/microchip/lan743x_main.c b/drivers/net/et= hernet/microchip/lan743x_main.c index 0798f3f1f435..ad3f833c8d86 100644 --- a/drivers/net/ethernet/microchip/lan743x_main.c +++ b/drivers/net/ethernet/microchip/lan743x_main.c @@ -1402,6 +1402,8 @@ static void lan743x_phy_interface_select(struct lan74= 3x_adapter *adapter) =20 if (adapter->is_pci11x1x && adapter->is_sgmii_en) adapter->phy_interface =3D PHY_INTERFACE_MODE_SGMII; + else if (adapter->is_pci11x1x && adapter->is_rmii_en) + adapter->phy_interface =3D PHY_INTERFACE_MODE_RMII; else if (id_rev =3D=3D ID_REV_ID_LAN7430_) adapter->phy_interface =3D PHY_INTERFACE_MODE_GMII; else if ((id_rev =3D=3D ID_REV_ID_LAN7431_) && (data & MAC_CR_MII_EN_)) @@ -3190,6 +3192,12 @@ static int lan743x_phylink_create(struct lan743x_ada= pter *adapter) __set_bit(PHY_INTERFACE_MODE_MII, adapter->phylink_config.supported_interfaces); break; + case PHY_INTERFACE_MODE_RMII: + __set_bit(PHY_INTERFACE_MODE_RMII, + adapter->phylink_config.supported_interfaces); + adapter->phylink_config.lpi_capabilities =3D 0; + break; + default: phy_interface_set_rgmii(adapter->phylink_config.supported_interfaces); } @@ -3197,6 +3205,9 @@ static int lan743x_phylink_create(struct lan743x_adap= ter *adapter) memcpy(adapter->phylink_config.lpi_interfaces, adapter->phylink_config.supported_interfaces, sizeof(adapter->phylink_config.lpi_interfaces)); + if (adapter->phy_interface =3D=3D PHY_INTERFACE_MODE_RMII) + __clear_bit(PHY_INTERFACE_MODE_RMII, + adapter->phylink_config.lpi_interfaces); =20 pl =3D phylink_create(&adapter->phylink_config, NULL, adapter->phy_interface, &lan743x_phylink_mac_ops); @@ -3541,6 +3552,7 @@ static int lan743x_hardware_init(struct lan743x_adapt= er *adapter, { struct lan743x_tx *tx; u32 sgmii_ctl; + u32 rmii_ctl; int index; int ret; =20 @@ -3562,6 +3574,11 @@ static int lan743x_hardware_init(struct lan743x_adap= ter *adapter, sgmii_ctl |=3D SGMII_CTL_SGMII_POWER_DN_; } lan743x_csr_write(adapter, SGMII_CTL, sgmii_ctl); + if (adapter->is_rmii_en) { + rmii_ctl =3D lan743x_csr_read(adapter, RMII_CTL); + rmii_ctl |=3D RMII_CTL_RMII_ENABLE_; + lan743x_csr_write(adapter, RMII_CTL, rmii_ctl); + } } else { adapter->max_tx_channels =3D LAN743X_MAX_TX_CHANNELS; adapter->used_tx_channels =3D LAN743X_USED_TX_CHANNELS; diff --git a/drivers/net/ethernet/microchip/lan743x_main.h b/drivers/net/et= hernet/microchip/lan743x_main.h index 1f8d9294a6ef..d9495cf96b41 100644 --- a/drivers/net/ethernet/microchip/lan743x_main.h +++ b/drivers/net/ethernet/microchip/lan743x_main.h @@ -325,6 +325,9 @@ #define MAC_WUCSR2_IPV6_TCPSYN_RCD_ BIT(5) #define MAC_WUCSR2_IPV4_TCPSYN_RCD_ BIT(4) =20 +#define RMII_CTL (0x710) +#define RMII_CTL_RMII_ENABLE_ BIT(0) + #define SGMII_ACC (0x720) #define SGMII_ACC_SGMII_BZY_ BIT(31) #define SGMII_ACC_SGMII_WR_ BIT(30) --=20 2.34.1