From nobody Mon Jun 8 04:15:28 2026 Received: from mail-pl1-f169.google.com (mail-pl1-f169.google.com [209.85.214.169]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A6CD72F12A1 for ; Mon, 8 Jun 2026 01:00:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.169 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780880425; cv=none; b=qe+OTN0x85z7oBxbwiC7Qg7F0K6XrZoicdyV739q1NWldqepBzSl396DsaW2CZVH4FkOLs7b6LIcJSenhh9cRKMFh3DFCuNqEYAapDKDOThs0/mjQ+F8bJduJxGU2gqORggGoYAPmTqws7LIhVCAXXpOR7EzO8LvsB5Rnl5tg4U= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780880425; c=relaxed/simple; bh=MKjwcF5QA8boZl++n/seX1fhDS3eFeN/H/j/NPGTEmc=; h=From:To:Cc:Subject:Date:Message-Id:MIME-Version; b=RV8As61C3q2YPtmxk3idwytbJVNqZTsGHZ9Aw7KkmgRGd0tKh/VNCq5EeOxDrzsIOV9VwdSTO5Ua10HTfp0hRmVJL3K5c3lgnwoh+CpprK8wt+IKNpifDqbNsfWekBoKU66FM8vgvIQEd/9CHNcbzyb0nQuowqV5AoWGvU4Ftpw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=AFgXxxRY; arc=none smtp.client-ip=209.85.214.169 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="AFgXxxRY" Received: by mail-pl1-f169.google.com with SMTP id d9443c01a7336-2bf114b0cf9so31898895ad.2 for ; Sun, 07 Jun 2026 18:00:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1780880424; x=1781485224; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=iIPw2Ul3tsPc2bxto6n13tf9Lx1PY2MWkQj5XztoNyM=; b=AFgXxxRYpq3P6dXhjTOi1NDamdHMzfKVDctIEb5h4EPefnu389rEmvTY5ljdLVxUdO iYtywSqszMhhzpaJueJGZo35/BFq5l42MQaIqmJHrSmRoLzOlA89eIL3rDMHpi34PAT3 kh8j/2gge5/PZgQrqNuYvzeODq5SVWftJRFietw5Kc1Tt2ENk9HH9xi7muSZn2wxhkep i9UcOJ9GA3OldoU61S6XUg8eEEJYTL6XLjnEAj7fex59cEUeQzSl+6oh2WGRi9eqcILA LYhM8tXP6KM3qFXQP9me1rM+0ZQxKQj5rHniXs1GeUmN7CQEY0KveN4BEOVD2g8Q9Pqa W/xw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1780880424; x=1781485224; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-gg:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to; bh=iIPw2Ul3tsPc2bxto6n13tf9Lx1PY2MWkQj5XztoNyM=; b=PGjfqAz2nW82trMSbB6x1xg+Qpds4D4DwcDayplhV1mdxrkJforomxbDV2hPQpYlqn 78vVsXGCOv3ys4/J8LqJ6phQlrDP796dDtg/9keTuEMxus1VA1gIJZFx4z0kst96BJpL F6d/QST6A1PLo0CtQDpjmVWfL2mfTqOYyriSSthkiNr+vkX023+YkH8tqfdYPnZqyGnT 3I707Ev/rHjxVfBRNb9vTEh8uTiRqrFeZi+bzm5rCl6xbzRqdrFB/CIa/9mivcdOuhm3 8wjdTjCoHfKJKwuR5tv5h6iQESROBt7rNJ9jOjqtKt6Aj6IYZBMPCFPTIV9S3mcq9DJ3 563g== X-Forwarded-Encrypted: i=1; AFNElJ/HZk6Y1op1rg0pawz3Tuh3HNUBP9hDfGp6Ps9JJXjDY+ILYwxVpE8DiAE2oPxbrJAD/WpUmTYgoB8dUWo=@vger.kernel.org X-Gm-Message-State: AOJu0YzWGQRnKqgyfcdiaEq+sZvhZyFP7Jm6PTa+//EnIe7LuP3tcdSy 38y9NrAsI024IK0aGfGH6lO5EAzIzb6wjxIRwpTPFA0MhAZVqh1O6s9u X-Gm-Gg: Acq92OGz9ulo+JP8DBCx8RyBUZXmVKpnTl0ehZvRJX5CoNRGKVr6mu9ZRJLD9q/Jr1J YZA2sNPtrSEtg+u+telImPwn2DknSPU8gqehRqWOYGZqaPmZYzeY4e2+e6A3oqdB9S3ztyFf6g9 Oqg+rEWIjbyul1sWp4fTaVGLTW+tUDOd3RIFhc+1o+u8OnO/h7SejbSfGbs7cxyjjNS+AjWMpo4 fK6oIpU7TR7UhiXYTEecsaPnWCRvKRGZjDgYg0QFQcTu+NGr+R7qgE8xDC8wZ4J7yuyw4dlQqIw /vLMpw75HFoD4ZDwgb9BXz2ACjPvHGVAV2lhdURNXreIA2xaXZechmNBRRd3YT7abm4n7CRZ8ws 1P25m87+N+rYeLMiS4QS9Xn/f4JPbGbXgi/RK/VlBJuZSEDKxYs599elIvHNy5pOmqQqtZ38LB/ mhDYNNCWt8+c52bGywlbtigmtGC/81zodTZdqafL31mY3P/m58Upwz9S+2tM9r6RKJwlbSBhS5P 7LisFjhwIv3yz62Du29 X-Received: by 2002:a17:902:f608:b0:2c0:baaa:db94 with SMTP id d9443c01a7336-2c1e881fd52mr142085415ad.22.1780880423815; Sun, 07 Jun 2026 18:00:23 -0700 (PDT) Received: from localhost.localdomain (60-250-196-139.hinet-ip.hinet.net. [60.250.196.139]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2c16649c302sm156772795ad.73.2026.06.07.18.00.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 07 Jun 2026 18:00:23 -0700 (PDT) From: Zi-Yu Chen To: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org Cc: ychuang3@nuvoton.com, schung@nuvoton.com, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Zi-Yu Chen Subject: [PATCH v2] arm64: dts: nuvoton: ma35d1: add CAN nodes Date: Mon, 8 Jun 2026 09:00:09 +0800 Message-Id: <20260608010009.3389558-1-zychennvt@gmail.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add controller nodes for the four Bosch M_CAN blocks found on the Nuvoton MA35D1 SoC. Additionally, configure pinctrl and enable CAN1 and CAN3 on the MA35D1 SOM board. Also, update the APLL frequency to 200MHz to ensure the CAN controllers receive the required input clock for 50MHz operation. Signed-off-by: Zi-Yu Chen --- v2:=20 - Move assigned-clocks and assigned-clock-rates configurations of=20 CAN_DIV from SoC-level ma35d1.dtsi to board-level ma35d1-som-256m.dts - Update APLL frequency to 200MHz to ensure the CAN controllers=20 receive the required 50MHz input clock. =20 .../boot/dts/nuvoton/ma35d1-som-256m.dts | 32 +++++++++++- arch/arm64/boot/dts/nuvoton/ma35d1.dtsi | 52 +++++++++++++++++++ 2 files changed, 83 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/nuvoton/ma35d1-som-256m.dts b/arch/arm64/b= oot/dts/nuvoton/ma35d1-som-256m.dts index f6f20a17e501..fb23b0573bdc 100644 --- a/arch/arm64/boot/dts/nuvoton/ma35d1-som-256m.dts +++ b/arch/arm64/boot/dts/nuvoton/ma35d1-som-256m.dts @@ -37,6 +37,22 @@ clk_hxt: clock-hxt { }; }; =20 +&can1 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_can1>; + assigned-clocks =3D <&clk CAN1_DIV>; + assigned-clock-rates =3D <50000000>; + status =3D "okay"; +}; + +&can3 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_can3>; + assigned-clocks =3D <&clk CAN3_DIV>; + assigned-clock-rates =3D <50000000>; + status =3D "okay"; +}; + &clk { assigned-clocks =3D <&clk CAPLL>, <&clk DDRPLL>, @@ -45,7 +61,7 @@ &clk { <&clk VPLL>; assigned-clock-rates =3D <800000000>, <266000000>, - <180000000>, + <200000000>, <500000000>, <102000000>; nuvoton,pll-mode =3D "integer", @@ -56,6 +72,20 @@ &clk { }; =20 &pinctrl { + can-grp { + pinctrl_can1: can1-pins { + nuvoton,pins =3D <11 14 4>, + <11 15 4>; + bias-disable; + }; + + pinctrl_can3: can3-pins { + nuvoton,pins =3D <11 10 3>, + <11 11 3>; + bias-disable; + }; + }; + uart-grp { pinctrl_uart0: uart0-pins { nuvoton,pins =3D <4 14 1>, diff --git a/arch/arm64/boot/dts/nuvoton/ma35d1.dtsi b/arch/arm64/boot/dts/= nuvoton/ma35d1.dtsi index e51b98f5bdce..494724a25f3b 100644 --- a/arch/arm64/boot/dts/nuvoton/ma35d1.dtsi +++ b/arch/arm64/boot/dts/nuvoton/ma35d1.dtsi @@ -244,6 +244,58 @@ gpion: gpio@340 { }; }; =20 + can0: can@403c0000 { + compatible =3D "bosch,m_can"; + reg =3D <0x0 0x403c0000 0x0 0x200>, <0x0 0x403c0200 0x0 0x2000>; + reg-names =3D "m_can", "message_ram"; + interrupts =3D , + ; + interrupt-names =3D "int0", "int1"; + clocks =3D <&clk HCLK3>, <&clk CAN0_GATE>; + clock-names =3D "hclk", "cclk"; + bosch,mram-cfg =3D <0x0 4 4 32 32 32 8 8>; + status =3D "disabled"; + }; + + can1: can@403d0000 { + compatible =3D "bosch,m_can"; + reg =3D <0x0 0x403d0000 0x0 0x200>, <0x0 0x403d0200 0x0 0x2000>; + reg-names =3D "m_can", "message_ram"; + interrupts =3D , + ; + interrupt-names =3D "int0", "int1"; + clocks =3D <&clk HCLK3>, <&clk CAN1_GATE>; + clock-names =3D "hclk", "cclk"; + bosch,mram-cfg =3D <0x0 4 4 32 32 32 8 8>; + status =3D "disabled"; + }; + + can2: can@403e0000 { + compatible =3D "bosch,m_can"; + reg =3D <0x0 0x403e0000 0x0 0x200>, <0x0 0x403e0200 0x0 0x2000>; + reg-names =3D "m_can", "message_ram"; + interrupts =3D , + ; + interrupt-names =3D "int0", "int1"; + clocks =3D <&clk HCLK3>, <&clk CAN2_GATE>; + clock-names =3D "hclk", "cclk"; + bosch,mram-cfg =3D <0x0 4 4 32 32 32 8 8>; + status =3D "disabled"; + }; + + can3: can@403f0000 { + compatible =3D "bosch,m_can"; + reg =3D <0x0 0x403f0000 0x0 0x200>, <0x0 0x403f0200 0x0 0x2000>; + reg-names =3D "m_can", "message_ram"; + interrupts =3D , + ; + interrupt-names =3D "int0", "int1"; + clocks =3D <&clk HCLK3>, <&clk CAN3_GATE>; + clock-names =3D "hclk", "cclk"; + bosch,mram-cfg =3D <0x0 4 4 32 32 32 8 8>; + status =3D "disabled"; + }; + uart0: serial@40700000 { compatible =3D "nuvoton,ma35d1-uart"; reg =3D <0x0 0x40700000 0x0 0x100>; --=20 2.34.1