From nobody Mon Jun 8 08:32:27 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9CE723546C7; Mon, 8 Jun 2026 05:09:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780895366; cv=none; b=hA1Zw9L6Vo/xcbngIhaaWD5aZMQldTphWq1Of/IMErNi8KyHRNwrK84W9WfgP9BKdXbWgMNoEo5M9mgtFhB5TEPQDUWeQ4B01ecwcFO6QMXUV7wsyE2yVwFk5N6T+wC9lWBMl/hlOX1ji7j//fBl4UkEOM44BT4w7XBdmMOKlmU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780895366; c=relaxed/simple; bh=FTpVYp3SNjDHJXuzqJNM/Yy/p1AidEHECx8m0pNn1cA=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=bsUd7fNNtFMtAnJ+59J4hP30eyisIaTEp/PKUmwRNchtRbyZ3e5g6Wz3GJduQmukmuoJD1ccHAKYRhSpWS6RSHT7XDGFUvveUiETNabW04iIFQ3P+xp89UzLOsr+kby1ADIY+U+XQzyGzWF5lLT+KYBlkUvTFmyxjEARWR+jdcU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=NlMqyAlG; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="NlMqyAlG" Received: by smtp.kernel.org (Postfix) with ESMTPS id 2DB64C4AF0D; Mon, 8 Jun 2026 05:09:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1780895366; bh=FTpVYp3SNjDHJXuzqJNM/Yy/p1AidEHECx8m0pNn1cA=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=NlMqyAlG5eHwkQC/4wNbd4nWhWXtMr5Km0GbSRgckdNP3iZ0qa+pivgnlZEnkCbUc CQvF2YdJNAoV1aL35o8vNrZpBdTCc/W+8Q8czESFjxPlZsM7aigbSmxsNMDYmuaEBK z1ILHSqeRJeCq80Y53UwpP7tXq98d3x959mzk9LMwzTH9H3bCelhiQwWcQNXE+cxEJ ZTF2Pvx8+QzDmJBA0xR7omWV2lWmfLMnk/HLiYDsn2L72kOdaNeeJ2PEjQe+BfHAsJ ZdRlXI+2Nd11aRPGxLuWaJMcNBF8Do8HDv4/IFHh0QgBvECblfLRrYGKgHoNe34SJI kVK6hMj3lp2Eg== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1AD63CD8C92; Mon, 8 Jun 2026 05:09:26 +0000 (UTC) From: George Moussalem via B4 Relay Date: Mon, 08 Jun 2026 09:09:16 +0400 Subject: [PATCH v4 1/4] dt-bindings: net: ethernet-phy: increase max clock count to two Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260608-ipq5018-gephy-clocks-v4-1-fb2ccd56894b@outlook.com> References: <20260608-ipq5018-gephy-clocks-v4-0-fb2ccd56894b@outlook.com> In-Reply-To: <20260608-ipq5018-gephy-clocks-v4-0-fb2ccd56894b@outlook.com> To: Andrew Lunn , Heiner Kallweit , Russell King , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Florian Fainelli , Bjorn Andersson , Konrad Dybcio Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio , linux-arm-msm@vger.kernel.org, George Moussalem X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1780895363; l=1739; i=george.moussalem@outlook.com; s=20250321; h=from:subject:message-id; bh=Z1y1sb/C6IBBeEe8phafQKeS+tps86kaaT04aCdDGu4=; b=5YgbBl86exwswdTbg8F7C3+4Qbnpx3RC8aabNiGe0nIwlCo3fl3ekSX411uaPX91bM99W98IX TA/pGoNDsGnD08pu041kV00IBFGtdQP2yn92ms/rhtqX7ddYm6Kso68 X-Developer-Key: i=george.moussalem@outlook.com; a=ed25519; pk=/PuRTSI9iYiHwcc6Nrde8qF4ZDhJBlUgpHdhsIjnqIk= X-Endpoint-Received: by B4 Relay for george.moussalem@outlook.com/20250321 with auth_id=364 X-Original-From: George Moussalem Reply-To: george.moussalem@outlook.com From: George Moussalem The clocks property has a restriction to maximum one. Yet, some PHYs may require more than 1 clock such as the IPQ5018 PHY which requires two clocks for RX and TX. As such, increase maxItems to two. Reviewed-by: Rob Herring (Arm) Signed-off-by: George Moussalem --- Commit 350b7a258f20 introduced the clocks property with a restriction to maximum 1 to the main ethernet-phy.yaml binding for Realtek to add an optional external clock source. This is restrictive to all PHY bindings, as some PHYs may require more than 1 clock such as the IPQ5018 PHY which requires 2 clocks (for RX and TX). --- Documentation/devicetree/bindings/net/ethernet-phy.yaml | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/net/ethernet-phy.yaml b/Docu= mentation/devicetree/bindings/net/ethernet-phy.yaml index 21a1a63506f0..c3ebb3af8b52 100644 --- a/Documentation/devicetree/bindings/net/ethernet-phy.yaml +++ b/Documentation/devicetree/bindings/net/ethernet-phy.yaml @@ -106,10 +106,13 @@ properties: by software. =20 clocks: - maxItems: 1 + minItems: 1 + maxItems: 2 description: - External clock connected to the PHY. If not specified it is assumed - that the PHY uses a fixed crystal or an internal oscillator. + External clock connected to the PHY or RX and TX clocks that the PHY + requires to enable explicitly. If not specified it is assumed + that the PHY uses a fixed crystal or an internal oscillator or that = the + RX/TX clocks are hardware enabled by default. =20 enet-phy-lane-swap: $ref: /schemas/types.yaml#/definitions/flag --=20 2.53.0 From nobody Mon Jun 8 08:32:27 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9CD66351C3B; Mon, 8 Jun 2026 05:09:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780895366; cv=none; b=cVL/mkgREc6pZU0RiP94dKkFivKNEeLef2Vp01CAtbxGZysaaeWZNOYb/dt2eILx0Syoyb7zKdcHsmjW2OfMo/p0nvDhynbiSEpwnG0JNEgz5RVGUFcyskCDsAHYqgv5kVVkOniilgW54GxJDxY6W1k2g7WKX+HgwHpG7iiWoHU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780895366; c=relaxed/simple; bh=MHonpYPDMxu6OCmszC5LL+NjrY8r/y0Ipf59wp1R70c=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=BH9YTRIENY+V79LmYRpMY4xIOZ7p8QFERQZuiJzT9V3WoBn5yuhiMmBMxcoBN+j4RgzJaRdZ6bcK0l5Ln1sVm1ykOPCZcJqe7Dk3Kw2cw7yh3zaeCKwH2fkMCG9CGqAqf/4qJc4+CtQ7/wz6ENuOgySQjjHFBkwnBEXTQbU3pAs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=jG5by0qH; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="jG5by0qH" Received: by smtp.kernel.org (Postfix) with ESMTPS id 410ACC4AF0F; Mon, 8 Jun 2026 05:09:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1780895366; bh=MHonpYPDMxu6OCmszC5LL+NjrY8r/y0Ipf59wp1R70c=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=jG5by0qHVXXZQ5k3d9mTz3N6zOtAbsqKMGrpyhhSeehg5fNTkeIuk6PnsQa1kGvw2 6PxvAjz7WKbFY1Ks91HgZG1/lDJ+u15Zu59k+kB2bI6cVq4iEzcnA7J6NdF5GY0DUr QEkgwGo4XyRNgLp/A0C8+5S8NyRBnZLDn8bzmc5IG8CRLniMk9QUZ5DM+jF8f5OUb0 WMo9TGqjGuHhN/DXPaJMuqyQcZOI3ivEENihNZhB+eKiC0fnVZRyI31EnEVjoQWvsH Aw905p73vKFnxPEb1rK8Eb6j8tAHgDmHjOzwylWvzZSfZPG3SW7zO6E230LuZ0sHvU CCrYugV41j7/g== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2C2C1CD8CA4; Mon, 8 Jun 2026 05:09:26 +0000 (UTC) From: George Moussalem via B4 Relay Date: Mon, 08 Jun 2026 09:09:17 +0400 Subject: [PATCH v4 2/4] dt-bindings: net: qca,ar803x: Add clocks for IPQ5018 PHY Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260608-ipq5018-gephy-clocks-v4-2-fb2ccd56894b@outlook.com> References: <20260608-ipq5018-gephy-clocks-v4-0-fb2ccd56894b@outlook.com> In-Reply-To: <20260608-ipq5018-gephy-clocks-v4-0-fb2ccd56894b@outlook.com> To: Andrew Lunn , Heiner Kallweit , Russell King , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Florian Fainelli , Bjorn Andersson , Konrad Dybcio Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio , linux-arm-msm@vger.kernel.org, George Moussalem , Conor Dooley X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1780895363; l=1860; i=george.moussalem@outlook.com; s=20250321; h=from:subject:message-id; bh=9Z6aakN1HhLaGxa1OIpuGJQY0KdKMjoTdfWwUAWMHF8=; b=LFiQLhl1FVNGLEM516fSBbYg8lSXLhkWN81pTJCG8OTIG3vU3BNpXECY+Lu3BxKynEH5/ryOX ra0oht7UxLMDwb1HAxQD9mBLxbNlt61o7RTYCabPTmcpTChqGFPytqU X-Developer-Key: i=george.moussalem@outlook.com; a=ed25519; pk=/PuRTSI9iYiHwcc6Nrde8qF4ZDhJBlUgpHdhsIjnqIk= X-Endpoint-Received: by B4 Relay for george.moussalem@outlook.com/20250321 with auth_id=364 X-Original-From: George Moussalem Reply-To: george.moussalem@outlook.com From: George Moussalem Further testing revealed that the RX and TX clocks of the IPQ5018 PHY need to be explicitly enabled. As such, add the required clocks to the schema. Acked-by: Conor Dooley Signed-off-by: George Moussalem --- Documentation/devicetree/bindings/net/qca,ar803x.yaml | 19 +++++++++++++++= ++++ 1 file changed, 19 insertions(+) diff --git a/Documentation/devicetree/bindings/net/qca,ar803x.yaml b/Docume= ntation/devicetree/bindings/net/qca,ar803x.yaml index 7ae5110e7aa2..53f648c4135f 100644 --- a/Documentation/devicetree/bindings/net/qca,ar803x.yaml +++ b/Documentation/devicetree/bindings/net/qca,ar803x.yaml @@ -28,6 +28,16 @@ allOf: reg: const: 7 # This PHY is always at MDIO address 7 in the IPQ5018 = SoC =20 + clocks: + items: + - description: RX clock + - description: TX clock + + clock-names: + items: + - const: rx + - const: tx + resets: items: - description: @@ -42,6 +52,11 @@ allOf: of this PHY are directly connected to an RJ45 connector. type: boolean =20 + required: + - clocks + - clock-names + - resets + properties: compatible: enum: @@ -162,6 +177,7 @@ examples: }; }; - | + #include #include =20 mdio { @@ -172,6 +188,9 @@ examples: compatible =3D "ethernet-phy-id004d.d0c0"; reg =3D <7>; =20 + clocks =3D <&gcc GCC_GEPHY_RX_CLK>, + <&gcc GCC_GEPHY_TX_CLK>; + clock-names =3D "rx", "tx"; resets =3D <&gcc GCC_GEPHY_MISC_ARES>; }; }; --=20 2.53.0 From nobody Mon Jun 8 08:32:27 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9CDE13546C1; Mon, 8 Jun 2026 05:09:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780895366; cv=none; b=PFcrFBw1zmRJCE2pcykA0s5lgAfgQkvkJJWy8gjD2uls4jSiviu4EYCdVJGRgqeS1S1V5EQHdkrt91s29KOzcc3UIcXg0HhHRZGW6ASGF70F28xQYxRhSUEZiRc038Hq0sT9kSXJJmuX/GGuMyRXWVJWETg41S77Aec4wp9PRUk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780895366; c=relaxed/simple; bh=Xw4DKj40SdH5fG0f1lsN3gM94qCWap7opuJXIrQQIEo=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=AYClmiZ9da4htifRBDUxbQgzjQEajxjPYpYy0OA6EHxDlcS//g1Y0PtJ/4D/mFt2u59fuo8gVkYDJ41ln5x/UvOPqNhWDbQz+jm8tvfX3s89vvgoEi1tCQOYdGnsFKzBtJ/jhqYrTdQdAOPtLJMcbmNkwc1e1Q5mIcoQq3+4Yi4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=N94r/c1r; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="N94r/c1r" Received: by smtp.kernel.org (Postfix) with ESMTPS id 57D82C4AF1B; Mon, 8 Jun 2026 05:09:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1780895366; bh=Xw4DKj40SdH5fG0f1lsN3gM94qCWap7opuJXIrQQIEo=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=N94r/c1rUr851hxTu6EovYvp9xfvqxvULlBCMPKnwxfHzFPY1a6fPPHTUZ3RpxRIK VAxDFcXfTwrnSR88GxNAwZsH/9CC4A3SLY1mYGpmf+tI3Q5uJQL2oe0hD+IGg3Fwuv QznSXxRx90PzzHm6yqN33l0Ho9ZSvvMnKFVF+RKrhtzVS1DJBRgbl0nVuN/KRwXENj IxqQyFpvVigeDL1gbGhzgWXdSEfZgGgWB3fUbaGI2jfDrg3D96gX9zFFGtCphBnjob 5PEX1ybsNeG7DWKZyJiizhqBQzkMtbA4JHzfbL5cr62pzX6kbWUeN61STHYlLv8Egz 4wimtQZPBFdWg== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4CEB2CD8C9D; Mon, 8 Jun 2026 05:09:26 +0000 (UTC) From: George Moussalem via B4 Relay Date: Mon, 08 Jun 2026 09:09:18 +0400 Subject: [PATCH v4 3/4] arm64: qcom: ipq5018: Add GEPHY RX and TX clocks Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260608-ipq5018-gephy-clocks-v4-3-fb2ccd56894b@outlook.com> References: <20260608-ipq5018-gephy-clocks-v4-0-fb2ccd56894b@outlook.com> In-Reply-To: <20260608-ipq5018-gephy-clocks-v4-0-fb2ccd56894b@outlook.com> To: Andrew Lunn , Heiner Kallweit , Russell King , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Florian Fainelli , Bjorn Andersson , Konrad Dybcio Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio , linux-arm-msm@vger.kernel.org, George Moussalem , Dmitry Baryshkov X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1780895363; l=888; i=george.moussalem@outlook.com; s=20250321; h=from:subject:message-id; bh=Z1oXdm/oaqpMEY4mYVlyCRP8DswbVCqV7erO/GmnBEk=; b=cidoJHgdf8W6s5uWKnmnxBwtu76YjO25rxB9oFIenoX8PaniBPJc0NnYv0arFY4/ALXc7W1sW n66AmB2Nm5XDZKGcJrdHOMFK5dQ2eUNIv43E5vdqQmvWY3YsVP6iCkZ X-Developer-Key: i=george.moussalem@outlook.com; a=ed25519; pk=/PuRTSI9iYiHwcc6Nrde8qF4ZDhJBlUgpHdhsIjnqIk= X-Endpoint-Received: by B4 Relay for george.moussalem@outlook.com/20250321 with auth_id=364 X-Original-From: George Moussalem Reply-To: george.moussalem@outlook.com From: George Moussalem Add RX and TX clocks for the IPQ5018 GEPHY to enable the datapath. Fixes: f5f2b835e316 ("arm64: dts: qcom: ipq5018: Add GE PHY to internal mdi= o bus") Reviewed-by: Dmitry Baryshkov Signed-off-by: George Moussalem --- arch/arm64/boot/dts/qcom/ipq5018.dtsi | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/ipq5018.dtsi b/arch/arm64/boot/dts/qc= om/ipq5018.dtsi index 6f8004a22a1f..60c27a6f2b10 100644 --- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi @@ -229,6 +229,9 @@ ge_phy: ethernet-phy@7 { compatible =3D "ethernet-phy-id004d.d0c0"; reg =3D <7>; =20 + clocks =3D <&gcc GCC_GEPHY_RX_CLK>, + <&gcc GCC_GEPHY_TX_CLK>; + clock-names =3D "rx", "tx"; resets =3D <&gcc GCC_GEPHY_MISC_ARES>; }; }; --=20 2.53.0 From nobody Mon Jun 8 08:32:27 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9CF3E3546CC; Mon, 8 Jun 2026 05:09:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780895366; cv=none; b=AvWxJfbOndxmubkk1TUxSs55JSVQsQiGjRNpBHP3zhONrR6db0+HX8rRDzPHEAvpVTygOa+6toSb11p7S5yr6W1pzb56G5rVRrjl3qW+ZPg/zZAbqww4Y8UIJ096txAA1PP9asbjfS699PesZUEYAHtG+1VeG3sz6CHtyI4Kt/I= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780895366; c=relaxed/simple; bh=MFdsgV4tCJIb+7JpW4eY9w89wJ4+M0zHKskp8FOGHr0=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=a3WpkOcmdbCxFpxdEzIpv2YXRRKvOeRM6XbOQpxHQ0xEoNJQs+13Zj/wjJDD+lNBP++1HVEmP2inspROiEDxvCGcyY0/HY/4Swk81MCMI3B+DfMR2ni+O43ih55C31zjMAsx1cYBp9S7xvX418kPXTopC+UUyTOUISVqnq0A31U= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=ReZLZOo6; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="ReZLZOo6" Received: by smtp.kernel.org (Postfix) with ESMTPS id 67182C4AF48; Mon, 8 Jun 2026 05:09:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1780895366; bh=MFdsgV4tCJIb+7JpW4eY9w89wJ4+M0zHKskp8FOGHr0=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=ReZLZOo6htbNM9XihQOc8QrOHyZmfrqJ+9qiglEGSpWQsbgpM4breRJ6XZCRNIy/8 IE+6oSi0+zJH1GAmMY4ZoMIOrohIjx/cfFPWEo5R4S52ovL36Xbw+BApicaWzAPF9Z FoYFQbocEfqrZRkt7mz57UaOo4OV0Y5bO3+QbXnkogoSlQ9TsgWS/j57G/wqS3hnmT abP3C+7LhOYQfUjZfr+KtC2v+ShpbQZJGf/BtmA+yUQ4WS0MryXaaGPKoknqT+eHPv HY4meGT80TkAyHbszhhmFNf4qFN30LF2qEk3Wnb9rXduzJdxgktm31nZl1NTyxelvD k/uCX+3BIr1ow== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5DA01CD8CA7; Mon, 8 Jun 2026 05:09:26 +0000 (UTC) From: George Moussalem via B4 Relay Date: Mon, 08 Jun 2026 09:09:19 +0400 Subject: [PATCH v4 4/4] net: phy: at803x: add RX and TX clock management for IPQ5018 PHY Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260608-ipq5018-gephy-clocks-v4-4-fb2ccd56894b@outlook.com> References: <20260608-ipq5018-gephy-clocks-v4-0-fb2ccd56894b@outlook.com> In-Reply-To: <20260608-ipq5018-gephy-clocks-v4-0-fb2ccd56894b@outlook.com> To: Andrew Lunn , Heiner Kallweit , Russell King , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Florian Fainelli , Bjorn Andersson , Konrad Dybcio Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio , linux-arm-msm@vger.kernel.org, George Moussalem X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1780895363; l=1756; i=george.moussalem@outlook.com; s=20250321; h=from:subject:message-id; bh=m5xYoQj/G89J7xqhL2YgJahZAGwlkkCV+b0laCqNRBU=; b=a9b6VnFuOhU7qXWN2B1DLPAgtbLDyESVPuHBhkQs6Jd27gKLy1uQ+QhPfQyBQnepDm8c+rNSi MHqnN6UFaKXAJ/BZidcIBUyQvDrs7SPjT5eUAJRnjP9UwNlGnji3gVd X-Developer-Key: i=george.moussalem@outlook.com; a=ed25519; pk=/PuRTSI9iYiHwcc6Nrde8qF4ZDhJBlUgpHdhsIjnqIk= X-Endpoint-Received: by B4 Relay for george.moussalem@outlook.com/20250321 with auth_id=364 X-Original-From: George Moussalem Reply-To: george.moussalem@outlook.com From: George Moussalem Acquire and enable the RX and TX clocks for the IPQ5018 PHY. These clocks are required for the PHY's datapath to function correctly. Fixes: d46502279a11 ("net: phy: qcom: at803x: Add Qualcomm IPQ5018 Internal= PHY support") Signed-off-by: George Moussalem --- drivers/net/phy/qcom/at803x.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/net/phy/qcom/at803x.c b/drivers/net/phy/qcom/at803x.c index 63726cf98cd4..ba4dc07752b6 100644 --- a/drivers/net/phy/qcom/at803x.c +++ b/drivers/net/phy/qcom/at803x.c @@ -19,6 +19,7 @@ #include #include #include +#include #include #include #include @@ -1074,6 +1075,7 @@ static void ipq5018_link_change_notify(struct phy_dev= ice *phydev) static int ipq5018_probe(struct phy_device *phydev) { struct device *dev =3D &phydev->mdio.dev; + struct clk *rx_clk, *tx_clk; struct ipq5018_priv *priv; int ret; =20 @@ -1084,6 +1086,16 @@ static int ipq5018_probe(struct phy_device *phydev) priv->set_short_cable_dac =3D of_property_read_bool(dev->of_node, "qcom,dac-preset-short-cable"); =20 + rx_clk =3D devm_clk_get_enabled(dev, "rx"); + if (IS_ERR(rx_clk)) + return dev_err_probe(dev, PTR_ERR(rx_clk), + "failed to get and enable RX clock\n"); + + tx_clk =3D devm_clk_get_enabled(dev, "tx"); + if (IS_ERR(tx_clk)) + return dev_err_probe(dev, PTR_ERR(tx_clk), + "failed to get and enable TX clock\n"); + priv->rst =3D devm_reset_control_array_get_exclusive(dev); if (IS_ERR(priv->rst)) return dev_err_probe(dev, PTR_ERR(priv->rst), --=20 2.53.0