From nobody Mon Jun 8 04:27:38 2026 Received: from mxd.seznam.cz (mxd.seznam.cz [77.75.78.210]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2398478F2F for ; Sun, 7 Jun 2026 21:10:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=77.75.78.210 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780866616; cv=none; b=CLNkhJmBOtoszH84Q+gcc9MG+IEKtmH2hejqz5ZWQEwqVm7qCxkT68yNcuRnYFyiH6JbJEW318mOOebf8IWidL/fQNapeW63f1cm3JNe4VRDfc1rsPbFumO8/b+uw3PXRrhQxAIy3r1z5xcPBaYqUtJvYPNZ8jLJR9lP03ssiks= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780866616; c=relaxed/simple; bh=GP6WO0y1ix7e95T+c9q/piQcbXDAx49I/dSPFnYI4kU=; h=From:To:Cc:Subject:Date:Message-ID:MIME-Version:Content-Type; b=JU+IwvOby6fyvt01E5lnU8wfj7RMvZKIIt7GpTa9HeTfwMy5mEOGRribM1S55TfY0GSLH/vNm/IVJojVVPYC28RCGwBo/J0AOSy2H7U68RbYwQn5fIlwxy2JmjKzOvEf7FR4LlMekCRKI1MfG/1dCs1aoeowHHz7Jg1WvZQFe24= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=seznam.cz; spf=pass smtp.mailfrom=seznam.cz; dkim=pass (2048-bit key) header.d=seznam.cz header.i=@seznam.cz header.b=Xk+UQjcC; arc=none smtp.client-ip=77.75.78.210 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=seznam.cz Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=seznam.cz Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=seznam.cz header.i=@seznam.cz header.b="Xk+UQjcC" Received: from email.seznam.cz by smtpc-mxd-f659df87d-k746b (smtpc-mxd-f659df87d-k746b [2a02:598:64:8a00::1000:a08]) id 2d8dd51f95e2f8902f734f83; Sun, 07 Jun 2026 23:07:12 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=seznam.cz; s=szn1; t=1780866432; bh=eEe/tZRw/ifnMGVHCXcxyT0ihTw7QXiMmSLE038p8Vo=; h=From:To:Cc:Subject:Date:Message-ID:MIME-Version:Content-Type: Content-Transfer-Encoding; b=Xk+UQjcCLaQQKiENZR93IyK45pVr1C09CikYi1MOo2emeGrjIAmTkHisrig7Dy1P/ hw79m2HqKDtxf86eSwTW5s8BvrIyCMuc7WUqvScxBET0mHeuNsThSrCElbN+coQucZ 8W38wjKFde328K2zQSYXhArK97NCtECSQjZUKJaZbbgzv0XzltnAH5DBm9XndU520N XFwSrqzCuwWP3Ntqu3/zIVASbOLKt9MkrfF0PK39Sgv5JrZVDGvaQIlnXdP+WQ269R eGDO3CkIU8dk3JoP7BrKuqnwOADuUI+Hm+kMeYNeAJASHdvsraTnADhjbmLDCJvDbh nfvGNKxDxCgdQ== Received: from archlinux.localdomain ([88.146.244.229]) by smtpd-relay-6f9c9f69dc-45bk7 (szn-email-smtpd/2.0.74) with ESMTPA id 44b86e17-4f7f-4732-9fd0-e8e426a47b5b; Sun, 07 Jun 2026 23:06:57 +0200 From: =?UTF-8?q?Vojt=C4=9Bch=20Kr=C3=A1tk=C3=BD?= To: Cc: =?UTF-8?q?Vojt=C4=9Bch=20Kr=C3=A1tk=C3=BD?= , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Sohil Mehta , Pawan Gupta , Suchit Karunakaran , linux-kernel@vger.kernel.org Subject: [PATCH] x86/cpu: Replace rdmsr() with rdmsrq() in init_intel() to address W=1 warning Date: Sun, 7 Jun 2026 23:06:17 +0200 Message-ID: <20260607210626.183327-1-vo.kratky@seznam.cz> X-Mailer: git-send-email 2.54.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable init_intel reads MSR_IA32_MISC_ENABLE with rdmsr() macro into un unsigned i= nt pair (l1 and l2). Only l1 is used and compared with MSR_IA32_MISC_ENABLE_BTS_UNAVAIL and MSR_IA32_MISC_ENABLE_PEBS_UNAVAIL (both ULL). Because l2 is never used, this caused a -Wunused-but-set-variable warning under W=3D1: arch/x86/kernel/cpu/intel.c: In function =E2=80=98init_intel=E2=80=99: arch/x86/kernel/cpu/intel.c:554:34: warning: variable =E2=80=98l2=E2=80= =99 set but not used [-Wunused-but-set-variable=3D] 554 | unsigned int l1, l2; It was replaced with rdmsrq() to read full 64-bit value directly into u64 v= ariable, and compared with the masks. Dropping the low/high (l1, l2) variables. No functional change intended. Signed-off-by: Vojt=C4=9Bch Kr=C3=A1tk=C3=BD --- arch/x86/kernel/cpu/intel.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c index f28c0efb7c8f..d5e1ecc7baed 100644 --- a/arch/x86/kernel/cpu/intel.c +++ b/arch/x86/kernel/cpu/intel.c @@ -551,12 +551,12 @@ static void init_intel(struct cpuinfo_x86 *c) set_cpu_cap(c, X86_FEATURE_LFENCE_RDTSC); =20 if (boot_cpu_has(X86_FEATURE_DS)) { - unsigned int l1, l2; + u64 val; =20 - rdmsr(MSR_IA32_MISC_ENABLE, l1, l2); - if (!(l1 & MSR_IA32_MISC_ENABLE_BTS_UNAVAIL)) + rdmsrq(MSR_IA32_MISC_ENABLE, val); + if (!(val & MSR_IA32_MISC_ENABLE_BTS_UNAVAIL)) set_cpu_cap(c, X86_FEATURE_BTS); - if (!(l1 & MSR_IA32_MISC_ENABLE_PEBS_UNAVAIL)) + if (!(val & MSR_IA32_MISC_ENABLE_PEBS_UNAVAIL)) set_cpu_cap(c, X86_FEATURE_PEBS); } =20 --=20 2.54.0