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Sun, 07 Jun 2026 04:37:17 -0700 (PDT) From: Ajit Singh To: Bjorn Andersson , Konrad Dybcio Cc: Dmitry Baryshkov , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Ajit Singh , Krzysztof Kozlowski Subject: [PATCH v4 1/3] dt-bindings: vendor-prefixes: Add prefix for Vicharak Date: Sun, 7 Jun 2026 17:06:56 +0530 Message-ID: <20260607113658.25117-2-blfizzyy@gmail.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20260607113658.25117-1-blfizzyy@gmail.com> References: <20260607113658.25117-1-blfizzyy@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Vicharak develops computing platforms and manufactures single-board computers, including FPGA-integrated SBCs. Add a vendor prefix for them. Link: https://vicharak.in/ Acked-by: Krzysztof Kozlowski Signed-off-by: Ajit Singh --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Docum= entation/devicetree/bindings/vendor-prefixes.yaml index ee7fd3cfe203..1948356337b9 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -1767,6 +1767,8 @@ patternProperties: description: VIA Technologies, Inc. "^vialab,.*": description: VIA Labs, Inc. + "^vicharak,.*": + description: Vicharak Computers Pvt. Ltd. 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Sun, 07 Jun 2026 04:37:23 -0700 (PDT) From: Ajit Singh To: Bjorn Andersson , Konrad Dybcio Cc: Dmitry Baryshkov , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Ajit Singh , Krzysztof Kozlowski Subject: [PATCH v4 2/3] dt-bindings: arm: qcom: Add Vicharak Axon Mini Date: Sun, 7 Jun 2026 17:06:57 +0530 Message-ID: <20260607113658.25117-3-blfizzyy@gmail.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20260607113658.25117-1-blfizzyy@gmail.com> References: <20260607113658.25117-1-blfizzyy@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The Vicharak Axon Mini is a single-board computer based on the Qualcomm QCM6490 platform. Add the top-level compatible string for this board. Acked-by: Krzysztof Kozlowski Signed-off-by: Ajit Singh --- Documentation/devicetree/bindings/arm/qcom.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentatio= n/devicetree/bindings/arm/qcom.yaml index d48c625d3fc4..6924bfe7b949 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -361,6 +361,7 @@ properties: - radxa,dragon-q6a - shift,otter - thundercomm,rubikpi3 + - vicharak,axon-mini - const: qcom,qcm6490 =20 - description: Qualcomm Technologies, Inc. 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Sun, 07 Jun 2026 04:37:36 -0700 (PDT) From: Ajit Singh To: Bjorn Andersson , Konrad Dybcio Cc: Dmitry Baryshkov , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Ajit Singh Subject: [PATCH v4 3/3] arm64: dts: qcom: Add Vicharak Axon Mini Date: Sun, 7 Jun 2026 17:06:58 +0530 Message-ID: <20260607113658.25117-4-blfizzyy@gmail.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20260607113658.25117-1-blfizzyy@gmail.com> References: <20260607113658.25117-1-blfizzyy@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add DTS for the Vicharak Axon Mini board based on the Qualcomm QCS6490 SoC. This adds debug UART, eMMC, UFS, SDIO WLAN, USB 2.0 host, PCIe support along with regulators. The UFS ICE block is kept disabled because enabling it currently causes an SError during qcom_ice_create() on this board. UFS works without ICE. Signed-off-by: Ajit Singh Reviewed-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/Makefile | 1 + .../dts/qcom/qcs6490-vicharak-axon-mini.dts | 1027 +++++++++++++++++ 2 files changed, 1028 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/qcs6490-vicharak-axon-mini.dts diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/M= akefile index f80b5d9cf1e8..d8d04dc88e08 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -146,6 +146,7 @@ qcs6490-rb3gen2-industrial-mezzanine-dtbs :=3D qcs6490-= rb3gen2.dtb qcs6490-rb3gen2 dtb-$(CONFIG_ARCH_QCOM) +=3D qcs6490-rb3gen2-industrial-mezzanine.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D qcs6490-rb3gen2-vision-mezzanine.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D qcs6490-thundercomm-rubikpi3.dtb +dtb-$(CONFIG_ARCH_QCOM) +=3D qcs6490-vicharak-axon-mini.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D qcs8300-ride.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D qcs8550-aim300-aiot.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D qcs9100-ride.dtb diff --git a/arch/arm64/boot/dts/qcom/qcs6490-vicharak-axon-mini.dts b/arch= /arm64/boot/dts/qcom/qcs6490-vicharak-axon-mini.dts new file mode 100644 index 000000000000..264668f739e1 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/qcs6490-vicharak-axon-mini.dts @@ -0,0 +1,1027 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2026 Vicharak Computers Pvt. Ltd. + */ + +/dts-v1/; + +/* PM7250B is configured to use SID8/9 */ +#define PM7250B_SID 8 +#define PM7250B_SID1 9 + +#include +#include +#include +#include +#include + +#include "kodiak.dtsi" +#include "pm7250b.dtsi" +#include "pm7325.dtsi" +#include "pm8350c.dtsi" +#include "pmk8350.dtsi" + +/delete-node/ &adsp_mem; +/delete-node/ &cdsp_mem; +/delete-node/ &ipa_fw_mem; +/delete-node/ &mpss_mem; +/delete-node/ &remoteproc_mpss; +/delete-node/ &remoteproc_wpss; +/delete-node/ &rmtfs_mem; +/delete-node/ &video_mem; +/delete-node/ &wifi; +/delete-node/ &wlan_ce_mem; +/delete-node/ &wlan_fw_mem; +/delete-node/ &wpss_mem; +/delete-node/ &xbl_mem; + +/ { + model =3D "Vicharak Axon Mini"; + compatible =3D "vicharak,axon-mini", "qcom,qcm6490"; + chassis-type =3D "embedded"; + + aliases { + serial0 =3D &uart5; + }; + + chosen { + stdout-path =3D "serial0:115200n8"; + }; + + leds { + compatible =3D "gpio-leds"; + + pinctrl-0 =3D <&user_leds>; + pinctrl-names =3D "default"; + + user-led { + color =3D ; + function =3D LED_FUNCTION_INDICATOR; + gpios =3D <&tlmm 19 GPIO_ACTIVE_HIGH>; + linux,default-trigger =3D "default-on"; + default-state =3D "on"; + panic-indicator; + retain-state-suspended; + }; + + status-led { + color =3D ; + function =3D LED_FUNCTION_INDICATOR; + gpios =3D <&tlmm 55 GPIO_ACTIVE_HIGH>; + linux,default-trigger =3D "heartbeat"; + default-state =3D "on"; + retain-state-suspended; + }; + }; + + reserved-memory { + xbl_mem: xbl@80700000 { + reg =3D <0x0 0x80700000 0x0 0x100000>; + no-map; + }; + + cdsp_secure_heap_mem: cdsp-secure-heap@81800000 { + reg =3D <0x0 0x81800000 0x0 0x1e00000>; + no-map; + }; + + camera_mem: camera@84300000 { + reg =3D <0x0 0x84300000 0x0 0x500000>; + no-map; + }; + + wpss_mem: wpss@84800000 { + reg =3D <0x0 0x84800000 0x0 0x1900000>; + no-map; + }; + + adsp_mem: adsp@86100000 { + reg =3D <0x0 0x86100000 0x0 0x2800000>; + no-map; + }; + + cdsp_mem: cdsp@88900000 { + reg =3D <0x0 0x88900000 0x0 0x1e00000>; + no-map; + }; + + video_mem: video@8a700000 { + reg =3D <0x0 0x8a700000 0x0 0x700000>; + no-map; + }; + + cvp_mem: cvp@8ae00000 { + reg =3D <0x0 0x8ae00000 0x0 0x500000>; + no-map; + }; + + ipa_fw_mem: ipa-fw@8b300000 { + reg =3D <0x0 0x8b300000 0x0 0x10000>; + no-map; + }; + + ipa_gsi_mem: ipa-gsi@8b310000 { + reg =3D <0x0 0x8b310000 0x0 0xa000>; + no-map; + }; + + gpu_microcode_mem: gpu-microcode@8b31a000 { + reg =3D <0x0 0x8b31a000 0x0 0x2000>; + no-map; + }; + + tz_stat_mem: tz-stat@c0000000 { + reg =3D <0x0 0xc0000000 0x0 0x100000>; + no-map; + }; + + tags_mem: tags@c0100000 { + reg =3D <0x0 0xc0100000 0x0 0x1200000>; + no-map; + }; + + qtee_mem: qtee@c1300000 { + reg =3D <0x0 0xc1300000 0x0 0x500000>; + no-map; + }; + + trusted_apps_mem: trusted-apps@c1800000 { + reg =3D <0x0 0xc1800000 0x0 0x1c00000>; + no-map; + }; + + debug_vm_mem: debug-vm@d0600000 { + reg =3D <0x0 0xd0600000 0x0 0x100000>; + no-map; + }; + }; + + thermal-zones { + chg-skin-thermal { + polling-delay-passive =3D <0>; + + thermal-sensors =3D <&pm7250b_adc_tm 0>; + + trips { + active-config0 { + temperature =3D <125000>; + hysteresis =3D <1000>; + type =3D "passive"; + }; + }; + }; + + conn-thermal { + polling-delay-passive =3D <0>; + + thermal-sensors =3D <&pm7250b_adc_tm 1>; + + trips { + active-config0 { + temperature =3D <125000>; + hysteresis =3D <1000>; + type =3D "passive"; + }; + }; + }; + + quiet-thermal { + polling-delay-passive =3D <0>; + + thermal-sensors =3D <&pmk8350_adc_tm 1>; + + trips { + active-config0 { + temperature =3D <125000>; + hysteresis =3D <1000>; + type =3D "passive"; + }; + }; + }; + + sdm-skin-thermal { + polling-delay-passive =3D <0>; + + thermal-sensors =3D <&pmk8350_adc_tm 3>; + + trips { + active-config0 { + temperature =3D <125000>; + hysteresis =3D <1000>; + type =3D "passive"; + }; + }; + }; + + xo-thermal { + polling-delay-passive =3D <0>; + + thermal-sensors =3D <&pmk8350_adc_tm 0>; + + trips { + active-config0 { + temperature =3D <125000>; + hysteresis =3D <1000>; + type =3D "passive"; + }; + }; + }; + }; + + vcc_5v0: regulator-vcc-5v-peri { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc_5v0"; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + + vin-supply =3D <&vph_pwr>; + + regulator-boot-on; + regulator-always-on; + }; + + vph_pwr: regulator-vph-pwr { + compatible =3D "regulator-fixed"; + regulator-name =3D "vph_pwr"; + regulator-min-microvolt =3D <3700000>; + regulator-max-microvolt =3D <3700000>; + + regulator-boot-on; + regulator-always-on; + }; + + vcc_5v0_usb2_0: regulator-vcc-5v0-usb2-0 { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc_5v0_usb2_0"; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + + vin-supply =3D <&vcc_5v0>; + + gpio =3D <&tlmm 117 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&vcc5v0_usb2_0_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + regulator-always-on; + }; + + vcc_pcie1_3v3: regulator-vcc-pcie1-3v3 { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc_pcie1_3v3"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + vin-supply =3D <&vcc_5v0>; + + gpio =3D <&tlmm 115 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&vcc_pcie1_3v3_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + regulator-always-on; + }; + + vcc_pcie0_dsi_3v3: regulator-vcc-pcie0-dsi-3v3 { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc_pcie0_dsi_3v3"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + vin-supply =3D <&vcc_5v0>; + + gpio =3D <&tlmm 114 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&vcc_pcie0_dsi_3v3_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + regulator-always-on; + }; + + wlan_pwrseq: wlan-pwrseq { + compatible =3D "mmc-pwrseq-simple"; + + pinctrl-0 =3D <&wl_enable_h>; + pinctrl-names =3D "default"; + + reset-gpios =3D <&tlmm 84 GPIO_ACTIVE_LOW>; + post-power-on-delay-ms =3D <200>; + power-off-delay-us =3D <20000>; + }; +}; + +&apps_rsc { + regulators-0 { + compatible =3D "qcom,pm7325-rpmh-regulators"; + qcom,pmic-id =3D "b"; + + vdd-s1-supply =3D <&vph_pwr>; + vdd-s2-supply =3D <&vph_pwr>; + vdd-s3-supply =3D <&vph_pwr>; + vdd-s4-supply =3D <&vph_pwr>; + vdd-s5-supply =3D <&vph_pwr>; + vdd-s6-supply =3D <&vph_pwr>; + vdd-s7-supply =3D <&vph_pwr>; + vdd-s8-supply =3D <&vph_pwr>; + vdd-l1-l4-l12-l15-supply =3D <&vreg_s7b_0p972>; + vdd-l2-l7-supply =3D <&vreg_bob_3p296>; + vdd-l6-l9-l10-supply =3D <&vreg_s8b_1p272>; + vdd-l8-supply =3D <&vreg_s7b_0p972>; + vdd-l11-l17-l18-l19-supply =3D <&vreg_s1b_1p872>; + vdd-l13-supply =3D <&vreg_s7b_0p972>; + vdd-l14-l16-supply =3D <&vreg_s8b_1p272>; + + vreg_s1b_1p872: smps1 { + regulator-name =3D "vreg_s1b_1p872"; + regulator-min-microvolt =3D <1840000>; + regulator-max-microvolt =3D <2040000>; + }; + + vreg_s7b_0p972: smps7 { + regulator-name =3D "vreg_s7b_0p972"; + regulator-min-microvolt =3D <535000>; + regulator-max-microvolt =3D <1120000>; + }; + + vreg_s8b_1p272: smps8 { + regulator-name =3D "vreg_s8b_1p272"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1500000>; + regulator-initial-mode =3D ; + }; + + vreg_l1b_0p912: ldo1 { + regulator-name =3D "vreg_l1b_0p912"; + regulator-min-microvolt =3D <825000>; + regulator-max-microvolt =3D <925000>; + regulator-initial-mode =3D ; + }; + + vreg_l2b_3p072: ldo2 { + regulator-name =3D "vreg_l2b_3p072"; + regulator-min-microvolt =3D <2700000>; + regulator-max-microvolt =3D <3544000>; + regulator-initial-mode =3D ; + }; + + vreg_l3b_0p504: ldo3 { + regulator-name =3D "vreg_l3b_0p504"; + regulator-min-microvolt =3D <312000>; + regulator-max-microvolt =3D <650000>; + regulator-initial-mode =3D ; + }; + + vreg_l6b_1p2: ldo6 { + regulator-name =3D "vreg_l6b_1p2"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1260000>; + regulator-initial-mode =3D ; + }; + + vreg_l7b_2p96: ldo7 { + regulator-name =3D "vreg_l7b_2p96"; + regulator-min-microvolt =3D <2960000>; + regulator-max-microvolt =3D <2960000>; + regulator-initial-mode =3D ; + regulator-allow-set-load; + regulator-allowed-modes =3D ; + }; + + vreg_l8b_0p904: ldo8 { + regulator-name =3D "vreg_l8b_0p904"; + regulator-min-microvolt =3D <870000>; + regulator-max-microvolt =3D <970000>; + regulator-initial-mode =3D ; + }; + + vreg_l9b_1p2: ldo9 { + regulator-name =3D "vreg_l9b_1p2"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + regulator-initial-mode =3D ; + regulator-allow-set-load; + regulator-allowed-modes =3D ; + }; + + vreg_l11b_1p504: ldo11 { + regulator-name =3D "vreg_l11b_1p504"; + regulator-min-microvolt =3D <1776000>; + regulator-max-microvolt =3D <2000000>; + regulator-initial-mode =3D ; + }; + + vreg_l12b_0p751: ldo12 { + regulator-name =3D "vreg_l12b_0p751"; + regulator-min-microvolt =3D <751000>; + regulator-max-microvolt =3D <824000>; + regulator-initial-mode =3D ; + }; + + vreg_l13b_0p53: ldo13 { + regulator-name =3D "vreg_l13b_0p53"; + regulator-min-microvolt =3D <530000>; + regulator-max-microvolt =3D <824000>; + regulator-initial-mode =3D ; + }; + + vreg_l14b_1p08: ldo14 { + regulator-name =3D "vreg_l14b_1p08"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1304000>; + regulator-initial-mode =3D ; + }; + + vreg_l15b_0p765: ldo15 { + regulator-name =3D "vreg_l15b_0p765"; + regulator-min-microvolt =3D <765000>; + regulator-max-microvolt =3D <1020000>; + regulator-initial-mode =3D ; + }; + + vreg_l16b_1p1: ldo16 { + regulator-name =3D "vreg_l16b_1p1"; + regulator-min-microvolt =3D <1100000>; + regulator-max-microvolt =3D <1300000>; + regulator-initial-mode =3D ; + + regulator-always-on; + regulator-boot-on; + }; + + vreg_l17b_1p7: ldo17 { + regulator-name =3D "vreg_l17b_1p7"; + regulator-min-microvolt =3D <1700000>; + regulator-max-microvolt =3D <1900000>; + regulator-initial-mode =3D ; + + regulator-always-on; + regulator-boot-on; + }; + + vreg_l18b_1p8: ldo18 { + regulator-name =3D "vreg_l18b_1p8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <2000000>; + regulator-initial-mode =3D ; + }; + + vreg_l19b_1p8: ldo19 { + regulator-name =3D "vreg_l19b_1p8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <2000000>; + regulator-initial-mode =3D ; + }; + }; + + regulators-1 { + compatible =3D "qcom,pm8350c-rpmh-regulators"; + qcom,pmic-id =3D "c"; + + vdd-s1-supply =3D <&vph_pwr>; + vdd-s2-supply =3D <&vph_pwr>; + vdd-s3-supply =3D <&vph_pwr>; + vdd-s4-supply =3D <&vph_pwr>; + vdd-s5-supply =3D <&vph_pwr>; + vdd-s6-supply =3D <&vph_pwr>; + vdd-s7-supply =3D <&vph_pwr>; + vdd-s8-supply =3D <&vph_pwr>; + vdd-s9-supply =3D <&vph_pwr>; + vdd-s10-supply =3D <&vph_pwr>; + vdd-l1-l12-supply =3D <&vreg_s1b_1p872>; + vdd-l2-l8-supply =3D <&vreg_s1b_1p872>; + vdd-l3-l4-l5-l7-l13-supply =3D <&vreg_bob_3p296>; + vdd-l6-l9-l11-supply =3D <&vreg_bob_3p296>; + vdd-l10-supply =3D <&vreg_s7b_0p972>; + vdd-bob-supply =3D <&vph_pwr>; + + vreg_s1c_2p19: smps1 { + regulator-name =3D "vreg_s1c_2p19"; + regulator-min-microvolt =3D <2200000>; + regulator-max-microvolt =3D <2208000>; + }; + + vreg_s9c_1p084: smps9 { + regulator-name =3D "vreg_s9c_1p084"; + regulator-min-microvolt =3D <1010000>; + regulator-max-microvolt =3D <1170000>; + }; + + vreg_l1c_1p8: ldo1 { + regulator-name =3D "vreg_l1c_1p8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1980000>; + regulator-initial-mode =3D ; + }; + + vreg_l2c_1p62: ldo2 { + regulator-name =3D "vreg_l2c_1p62"; + regulator-min-microvolt =3D <1620000>; + regulator-max-microvolt =3D <1976000>; + regulator-initial-mode =3D ; + }; + + vreg_l3c_2p8: ldo3 { + regulator-name =3D "vreg_l3c_2p8"; + regulator-min-microvolt =3D <2800000>; + regulator-max-microvolt =3D <3540000>; + regulator-initial-mode =3D ; + }; + + vreg_l4c_1p62: ldo4 { + regulator-name =3D "vreg_l4c_1p62"; + regulator-min-microvolt =3D <1620000>; + regulator-max-microvolt =3D <3300000>; + regulator-initial-mode =3D ; + }; + + vreg_l5c_1p62: ldo5 { + regulator-name =3D "vreg_l5c_1p62"; + regulator-min-microvolt =3D <1620000>; + regulator-max-microvolt =3D <3300000>; + regulator-initial-mode =3D ; + }; + + vreg_l6c_2p96: ldo6 { + regulator-name =3D "vreg_l6c_2p96"; + regulator-min-microvolt =3D <1650000>; + regulator-max-microvolt =3D <3544000>; + regulator-initial-mode =3D ; + }; + + vreg_l7c_3p0: ldo7 { + regulator-name =3D "vreg_l7c_3p0"; + regulator-min-microvolt =3D <3000000>; + regulator-max-microvolt =3D <3544000>; + regulator-initial-mode =3D ; + }; + + vreg_l8c_1p62: ldo8 { + regulator-name =3D "vreg_l8c_1p62"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <2000000>; + regulator-initial-mode =3D ; + }; + + vreg_l9c_2p96: ldo9 { + regulator-name =3D "vreg_l9c_2p96"; + regulator-min-microvolt =3D <2700000>; + regulator-max-microvolt =3D <3544000>; + regulator-initial-mode =3D ; + }; + + vreg_l10c_0p88: ldo10 { + regulator-name =3D "vreg_l10c_0p88"; + regulator-min-microvolt =3D <720000>; + regulator-max-microvolt =3D <1050000>; + regulator-initial-mode =3D ; + }; + + vreg_l11c_2p8: ldo11 { + regulator-name =3D "vreg_l11c_2p8"; + regulator-min-microvolt =3D <2800000>; + regulator-max-microvolt =3D <3544000>; + regulator-initial-mode =3D ; + }; + + vreg_l12c_1p8: ldo12 { + regulator-name =3D "vreg_l12c_1p8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <2000000>; + regulator-initial-mode =3D ; + + /* + * VREG_L12C_1P8 supplies the Ampak WLAN/BT module + * VDDIO and the external 32.768 kHz oscillator. + */ + regulator-always-on; + regulator-boot-on; + }; + + vreg_l13c_2p7: ldo13 { + regulator-name =3D "vreg_l13c_2p7"; + regulator-min-microvolt =3D <2700000>; + regulator-max-microvolt =3D <3544000>; + regulator-initial-mode =3D ; + }; + + vreg_bob_3p296: bob { + regulator-name =3D "vreg_bob_3p296"; + regulator-min-microvolt =3D <3008000>; + regulator-max-microvolt =3D <3300000>; + }; + }; +}; + +&gcc { + protected-clocks =3D , + , + , + , + , + , + , + , + , + , + , + , + , + ; +}; + +&gpi_dma0 { + status =3D "okay"; +}; + +&gpi_dma1 { + status =3D "okay"; +}; + +&gpu { + status =3D "okay"; +}; + +&gpu_zap_shader { + firmware-name =3D "qcom/qcs6490/a660_zap.mbn"; +}; + +&ice { + status =3D "disabled"; +}; + +&pcie0 { + perst-gpios =3D <&tlmm 87 GPIO_ACTIVE_LOW>; + wake-gpios =3D <&tlmm 89 GPIO_ACTIVE_HIGH>; + + pinctrl-0 =3D <&pcie0_clkreq_n>, <&pcie0_reset_n>, <&pcie0_wake_n>; + pinctrl-names =3D "default"; + + status =3D "okay"; +}; + +&pcie0_phy { + vdda-phy-supply =3D <&vreg_l10c_0p88>; + vdda-pll-supply =3D <&vreg_l6b_1p2>; + + status =3D "okay"; +}; + +&pcie1 { + perst-gpios =3D <&tlmm 2 GPIO_ACTIVE_LOW>; + wake-gpios =3D <&tlmm 3 GPIO_ACTIVE_HIGH>; + + pinctrl-0 =3D <&pcie1_reset_n>, <&pcie1_wake_n>, <&pcie1_clkreq_n>; + pinctrl-names =3D "default"; + + status =3D "okay"; +}; + +&pcie1_phy { + vdda-phy-supply =3D <&vreg_l10c_0p88>; + vdda-pll-supply =3D <&vreg_l6b_1p2>; + + status =3D "okay"; +}; + +&pm7250b_adc { + channel@4d { + reg =3D ; + qcom,ratiometric; + qcom,hw-settle-time =3D <200>; + qcom,pre-scaling =3D <1 1>; + label =3D "charger_skin_therm"; + }; + + channel@4f { + reg =3D ; + qcom,ratiometric; + qcom,hw-settle-time =3D <200>; + qcom,pre-scaling =3D <1 1>; + label =3D "conn_therm"; + }; +}; + +&pm7250b_adc_tm { + status =3D "okay"; + + charger-skin-therm@0 { + reg =3D <0>; + io-channels =3D <&pm7250b_adc ADC5_AMUX_THM1_100K_PU>; + qcom,ratiometric; + qcom,hw-settle-time-us =3D <200>; + }; + + conn-therm@1 { + reg =3D <1>; + io-channels =3D <&pm7250b_adc ADC5_AMUX_THM3_100K_PU>; + qcom,ratiometric; + qcom,hw-settle-time-us =3D <200>; + }; +}; + +&pm7325_temp_alarm { + io-channels =3D <&pmk8350_vadc PM7325_ADC7_DIE_TEMP>; + io-channel-names =3D "thermal"; +}; + +&pmk8350_adc_tm { + status =3D "okay"; + + xo-therm@0 { + reg =3D <0>; + io-channels =3D <&pmk8350_vadc PMK8350_ADC7_AMUX_THM1_100K_PU>; + qcom,ratiometric; + qcom,hw-settle-time-us =3D <200>; + }; + + quiet-therm@1 { + reg =3D <1>; + io-channels =3D <&pmk8350_vadc PM7325_ADC7_AMUX_THM1_100K_PU>; + qcom,ratiometric; + qcom,hw-settle-time-us =3D <200>; + }; + + sdm-skin-therm@3 { + reg =3D <3>; + io-channels =3D <&pmk8350_vadc PM7325_ADC7_AMUX_THM3_100K_PU>; + qcom,ratiometric; + qcom,hw-settle-time-us =3D <200>; + }; +}; + +&pmk8350_rtc { + status =3D "okay"; +}; + +&pmk8350_vadc { + status =3D "okay"; + + channel@3 { + reg =3D ; + qcom,pre-scaling =3D <1 1>; + label =3D "pmk8350_die_therm"; + }; + + channel@44 { + reg =3D ; + qcom,ratiometric; + qcom,hw-settle-time =3D <200>; + qcom,pre-scaling =3D <1 1>; + label =3D "pmk8350_xo_therm"; + }; + + channel@103 { + reg =3D ; + qcom,pre-scaling =3D <1 1>; + label =3D "pm7325_die_therm"; + }; + + channel@144 { + reg =3D ; + qcom,ratiometric; + qcom,hw-settle-time =3D <200>; + qcom,pre-scaling =3D <1 1>; + label =3D "pm7325_quiet_therm"; + }; + + channel@146 { + reg =3D ; + qcom,ratiometric; + qcom,hw-settle-time =3D <200>; + qcom,pre-scaling =3D <1 1>; + label =3D "pm7325_sdm_skin_therm"; + }; +}; + +&pon_pwrkey { + status =3D "okay"; +}; + +&pon_resin { + linux,code =3D ; + + status =3D "okay"; +}; + +&qupv3_id_0 { + firmware-name =3D "qcom/qcs6490/qupv3fw.elf"; + + status =3D "okay"; +}; + +&qupv3_id_1 { + firmware-name =3D "qcom/qcs6490/qupv3fw.elf"; + + status =3D "okay"; +}; + +&remoteproc_adsp { + firmware-name =3D "qcom/qcs6490/adsp.mbn"; + + status =3D "okay"; +}; + +&remoteproc_cdsp { + firmware-name =3D "qcom/qcs6490/cdsp.mbn"; + + status =3D "okay"; +}; + +&sdhc_1 { + vqmmc-supply =3D <&vreg_l19b_1p8>; + vmmc-supply =3D <&vreg_bob_3p296>; + + non-removable; + no-sd; + no-sdio; + + status =3D "okay"; +}; + +&sdhc_2 { + vqmmc-supply =3D <&vreg_l2c_1p62>; + vmmc-supply =3D <&vreg_l6c_2p96>; + + mmc-pwrseq =3D <&wlan_pwrseq>; + + bus-width =3D <4>; + non-removable; + no-sd; + no-mmc; + cap-sdio-irq; + keep-power-in-suspend; + max-frequency =3D <100000000>; + + status =3D "okay"; +}; + +&tlmm { + gpio-reserved-ranges =3D <48 4>; /* NFC */ + + pcie0_reset_n: pcie0-reset-n-state { + pins =3D "gpio87"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + pcie0_wake_n: pcie0-wake-n-state { + pins =3D "gpio89"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-pull-up; + }; + + pcie1_reset_n: pcie1-reset-n-state { + pins =3D "gpio2"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + pcie1_wake_n: pcie1-wake-n-state { + pins =3D "gpio3"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-pull-up; + }; + + user_leds: user-led-state { + pins =3D "gpio19", "gpio55"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + vcc_3v3_en: vcc-3v3-en-state { + pins =3D "gpio113"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + vcc5v0_usb2_0_en: vcc-5v0-usb2-0-en-state { + pins =3D "gpio117"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + vcc_pcie0_dsi_3v3_en: vcc-pcie0-dsi-3v3-en-state { + pins =3D "gpio114"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + vcc_pcie1_3v3_en: vcc-pcie1-3v3-en-state { + pins =3D "gpio115"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + wl_enable_h: wl-enable-h-state { + pins =3D "gpio84"; + function =3D "gpio"; + drive-strength =3D <8>; + bias-disable; + }; +}; + +&uart5 { + status =3D "okay"; +}; + +&ufs_mem_hc { + /delete-property/ qcom,ice; + + reset-gpios =3D <&tlmm 175 GPIO_ACTIVE_LOW>; + vcc-supply =3D <&vreg_l7b_2p96>; + vcc-max-microamp =3D <800000>; + vccq-supply =3D <&vreg_l9b_1p2>; + vccq-max-microamp =3D <900000>; + vccq2-supply =3D <&vreg_l9b_1p2>; + vccq2-max-microamp =3D <900000>; + + status =3D "okay"; +}; + +&ufs_mem_phy { + vdda-phy-supply =3D <&vreg_l10c_0p88>; + vdda-pll-supply =3D <&vreg_l6b_1p2>; + + status =3D "okay"; +}; + +&usb_2 { + /* Routed to an onboard USB hub for two USB-A host ports. */ + dr_mode =3D "host"; + + status =3D "okay"; +}; + +&usb_2_hsphy { + vdda-pll-supply =3D <&vreg_l10c_0p88>; + vdda33-supply =3D <&vreg_l2b_3p072>; + vdda18-supply =3D <&vreg_l1c_1p8>; + + status =3D "okay"; +}; + +&venus { + status =3D "okay"; +}; + +/* pinctrl */ +&pcie0_clkreq_n { + bias-pull-up; + drive-strength =3D <2>; +}; + +&pcie1_clkreq_n { + bias-pull-up; + drive-strength =3D <2>; +}; + +&sdc1_clk { + bias-disable; + drive-strength =3D <16>; +}; + +&sdc1_cmd { + bias-pull-up; + drive-strength =3D <10>; +}; + +&sdc1_data { + bias-pull-up; + drive-strength =3D <10>; +}; + +&sdc1_rclk { + bias-pull-down; +}; + +&sdc2_clk { + bias-disable; + drive-strength =3D <16>; +}; + +&sdc2_cmd { + bias-pull-up; + drive-strength =3D <10>; +}; + +&sdc2_data { + bias-pull-up; + drive-strength =3D <10>; +}; --=20 2.50.1 (Apple Git-155)