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charset="utf-8" CXL r3.2 8.2.4.20.12 and 14.13.10 permit committing an HDM decoder with size 0. BIOS commits and locks such decoders to burn the trailing, unused slots so the OS cannot program regions through them, e.g. a Type 3 device in a TSP-established TCB. init_hdm_decoder() rejected these with -ENXIO and aborted port enumeration, so "cxl list" showed nothing. Enumerate the decoder with its hardware LOCK state and skip the DPA reservation it does not need. commit_end may now reference a decoder with no DPA resource, so poison_by_decoder() must still scan the unmapped DPA tail. Signed-off-by: Vishal Aslot Signed-off-by: Richard Cheng --- v3->v4: - Drop the port->hdm_end advance for zero-size decoders (sashiko AI review). The write was outside cxl_rwsem.dpa, and advancing the watermark without a balanced release strands hdm_end and breaks LIFO teardown. It is also unnecessary -- zero-size committed slots are trailing and locked, so the in-order check in __cxl_dpa_reserve() is never reached past them. v2->v3: - Advance port->hdm_end for the committed zero-size decoder so a following committed decoder still passes the in-order check in __cxl_dpa_reserve() (it was left un-incremented in v2). - Fold the poison fix into this patch: commit_end may now reference a zero-size decoder with no DPA resource, so poison_by_decoder() falls through to run cxl_get_poison_unmapped() and scan the unmapped DPA tail. v1->v2: - Add zero-size committed decoders to the topology instead of skipping them. Drop v1's -ENOSPC sentinel and the matching "continue" in devm_cxl_enumerate_decoders(); fall through so add_hdm_decoder() registers the decoder. - Set port->commit_end unconditionally for any committed decoder, not only non-zero-size ones, so subsequent decoders satisfy the out-of-order check. - Add an explicit early-return before devm_cxl_dpa_reserve() in the endpoint-decoder path. __cxl_dpa_reserve() rejects zero-size decoders. - Spell out TSP and TCB and cite spec sections in commit message. - Reorder series, implementation first. --- drivers/cxl/core/hdm.c | 23 +++++++++++++++------ drivers/cxl/core/region.c | 42 +++++++++++++++++++-------------------- 2 files changed, 38 insertions(+), 27 deletions(-) diff --git a/drivers/cxl/core/hdm.c b/drivers/cxl/core/hdm.c index 0c80b76a5f9b..b61f51134551 100644 --- a/drivers/cxl/core/hdm.c +++ b/drivers/cxl/core/hdm.c @@ -1031,13 +1031,17 @@ static int init_hdm_decoder(struct cxl_port *port, = struct cxl_decoder *cxld, return -ENXIO; } =20 - if (size =3D=3D 0) { - dev_warn(&port->dev, - "decoder%d.%d: Committed with zero size\n", - port->id, cxld->id); - return -ENXIO; - } port->commit_end =3D cxld->id; + + /* + * CXL r3.2 8.2.4.20.12 permits committing an HDM decoder with + * size 0. Enumerate it into the topology with its HW-reported + * LOCK state instead of aborting the port. + */ + if (size =3D=3D 0) + dev_dbg(&port->dev, + "decoder%d.%d: Committed with zero size\n", + port->id, cxld->id); } else { if (cxled) { struct cxl_memdev *cxlmd =3D cxled_to_memdev(cxled); @@ -1096,6 +1100,13 @@ static int init_hdm_decoder(struct cxl_port *port, s= truct cxl_decoder *cxld, if (!committed) return 0; =20 + /* + * A committed zero-size decoder reserves no DPA. Leave port->hdm_end + * untouched. + */ + if (size =3D=3D 0) + return 0; + dpa_size =3D div_u64_rem(size, cxld->interleave_ways, &remainder); if (remainder) { dev_err(&port->dev, diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c index e50dc716d4e8..a353d8e7489d 100644 --- a/drivers/cxl/core/region.c +++ b/drivers/cxl/core/region.c @@ -2907,38 +2907,38 @@ static int poison_by_decoder(struct device *dev, vo= id *arg) return rc; =20 cxled =3D to_cxl_endpoint_decoder(dev); - if (!cxled->dpa_res) - return rc; =20 - cxlmd =3D cxled_to_memdev(cxled); - cxlds =3D cxlmd->cxlds; - mode =3D cxlds->part[cxled->part].mode; + if (cxled->dpa_res) { + cxlmd =3D cxled_to_memdev(cxled); + cxlds =3D cxlmd->cxlds; + mode =3D cxlds->part[cxled->part].mode; + + if (cxled->skip) { + offset =3D cxled->dpa_res->start - cxled->skip; + length =3D cxled->skip; + rc =3D cxl_mem_get_poison(cxlmd, offset, length, NULL); + if (rc =3D=3D -EFAULT && mode =3D=3D CXL_PARTMODE_RAM) + rc =3D 0; + if (rc) + return rc; + } =20 - if (cxled->skip) { - offset =3D cxled->dpa_res->start - cxled->skip; - length =3D cxled->skip; - rc =3D cxl_mem_get_poison(cxlmd, offset, length, NULL); + offset =3D cxled->dpa_res->start; + length =3D cxled->dpa_res->end - offset + 1; + rc =3D cxl_mem_get_poison(cxlmd, offset, length, cxled->cxld.region); if (rc =3D=3D -EFAULT && mode =3D=3D CXL_PARTMODE_RAM) rc =3D 0; if (rc) return rc; - } =20 - offset =3D cxled->dpa_res->start; - length =3D cxled->dpa_res->end - offset + 1; - rc =3D cxl_mem_get_poison(cxlmd, offset, length, cxled->cxld.region); - if (rc =3D=3D -EFAULT && mode =3D=3D CXL_PARTMODE_RAM) - rc =3D 0; - if (rc) - return rc; - - /* Iterate until commit_end is reached */ - if (cxled->cxld.id =3D=3D ctx->port->commit_end) { ctx->offset =3D cxled->dpa_res->end + 1; ctx->part =3D cxled->part; - return 1; } =20 + /* Iterate until commit_end is reached */ + if (cxled->cxld.id =3D=3D ctx->port->commit_end) + return 1; + return 0; } =20 --=20 2.43.0 From nobody Mon Jun 8 04:15:14 2026 Received: from CY3PR05CU001.outbound.protection.outlook.com (mail-westcentralusazon11013024.outbound.protection.outlook.com [40.93.201.24]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E5E7530C175; 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charset="utf-8" The kernel now allows committed HDM decoders of zero size so BIOS can burn slots with LOCK; cxl_test needs to exercise that path. Add a mock_zero_size_decoders module parameter (default off). When set, the special endpoints under host-bridge0 (cxl_mem.0 and cxl_mem.4) commit decoders 1 and 2 as zero-size + locked above the decoder[0] auto-region, mirrored on the parent switch and host bridge. commit_end then lands on a decoder with no DPA resource, exercising the new enumeration and poison-by-endpoint paths. Gating keeps the default topology, shared by the rest of the cxl suite, unchanged. Signed-off-by: Vishal Aslot Signed-off-by: Richard Cheng --- v3->v4: - No change. v2->v3: - Gate the zero-size + locked decoder injection behind a new mock_zero_size_decoders module parameter (default off). v2 applied it unconditionally on the host-bridge0 auto-region endpoints, which the region test suite reuses, regressing 7 of 17 cxl unit tests; defaulting off leaves the shared topology untouched. v1->v2: - Replace second_decoder(), third_decoder() with a single match_decoder_by_index() helper, so all lookups share one matcher. - Use DEFINE_RANGE() for the empty range instead of an open-coded struct. - Set cxled->state =3D CXL_DECODER_STATE_MANUAL rather than STATE_AUT= O. - Set CXL_DECODER_F_LOCK on the mock zero-size decoders to model the BIOS-burns-slots case. --- tools/testing/cxl/test/cxl.c | 83 +++++++++++++++++++++++++++++++++--- 1 file changed, 77 insertions(+), 6 deletions(-) diff --git a/tools/testing/cxl/test/cxl.c b/tools/testing/cxl/test/cxl.c index 296516eecfd6..190cb18d6932 100644 --- a/tools/testing/cxl/test/cxl.c +++ b/tools/testing/cxl/test/cxl.c @@ -17,6 +17,7 @@ static int interleave_arithmetic; static bool extended_linear_cache; static bool fail_autoassemble; +static bool mock_zero_size_decoders; =20 #define FAKE_QTG_ID 42 =20 @@ -1041,16 +1042,47 @@ static void default_mock_decoder(struct cxl_decoder= *cxld) WARN_ON_ONCE(!cxld_registry_new(cxld)); } =20 -static int first_decoder(struct device *dev, const void *data) +static int match_decoder_by_index(struct device *dev, const void *data) { + int target_id =3D *(const int *)data; struct cxl_decoder *cxld; =20 if (!is_switch_decoder(dev)) return 0; cxld =3D to_cxl_decoder(dev); - if (cxld->id =3D=3D 0) - return 1; - return 0; + return cxld->id =3D=3D target_id; +} + +/* + * Mock a BIOS-burnt slot: a committed, locked, zero-size decoder + * (CXL r3.2 8.2.4.20.12). Gated by the mock_zero_size_decoders module + * param so the default cxl_test topology, shared by the region test + * suite, is left undisturbed. + */ +static void size_zero_mock_decoder_ep(struct cxl_decoder *cxld, u64 base) +{ + struct cxl_endpoint_decoder *cxled =3D to_cxl_endpoint_decoder(&cxld->dev= ); + + cxld->hpa_range =3D DEFINE_RANGE(base, base - 1); + cxld->interleave_ways =3D 2; + cxld->interleave_granularity =3D 4096; + cxld->target_type =3D CXL_DECODER_HOSTONLYMEM; + cxld->flags =3D CXL_DECODER_F_ENABLE | CXL_DECODER_F_LOCK; + cxled->state =3D CXL_DECODER_STATE_MANUAL; + cxld->commit =3D mock_decoder_commit; + cxld->reset =3D mock_decoder_reset; +} + +static void size_zero_mock_decoder_sw(struct cxl_decoder *cxld, u64 base, + int level) +{ + cxld->flags =3D CXL_DECODER_F_ENABLE | CXL_DECODER_F_LOCK; + cxld->target_type =3D CXL_DECODER_HOSTONLYMEM; + cxld->interleave_ways =3D level =3D=3D 0 ? 2 : 1; + cxld->interleave_granularity =3D 4096; + cxld->hpa_range =3D DEFINE_RANGE(base, base - 1); + cxld->commit =3D mock_decoder_commit; + cxld->reset =3D mock_decoder_reset; } =20 /* @@ -1131,7 +1163,7 @@ static bool mock_init_hdm_decoder(struct cxl_decoder = *cxld) * See 'cxl list -BMPu -m cxl_mem.0,cxl_mem.4' */ if (!is_endpoint_decoder(&cxld->dev) || !hb0 || pdev->id % 4 || - pdev->id > 4 || cxld->id > 0) { + pdev->id > 4 || cxld->id > (mock_zero_size_decoders ? 2 : 0)) { default_mock_decoder(cxld); return false; } @@ -1145,6 +1177,20 @@ static bool mock_init_hdm_decoder(struct cxl_decoder= *cxld) base =3D window->base_hpa; if (extended_linear_cache) base +=3D mock_auto_region_size; + + /* + * With mock_zero_size_decoders, decoders 1 and 2 of the special + * endpoints mock BIOS-burnt zero-size + locked slots above the + * decoder[0] auto-region (CXL r3.2 8.2.4.20.12). commit_end then + * points at a decoder with no DPA resource, exercising the + * zero-size enumeration and poison-by-endpoint code paths. + */ + if (cxld->id =3D=3D 1 || cxld->id =3D=3D 2) { + size_zero_mock_decoder_ep(cxld, base); + port->commit_end =3D cxld->id; + WARN_ON_ONCE(!cxld_registry_new(cxld)); + return false; + } cxld->hpa_range =3D (struct range) { .start =3D base, .end =3D base + mock_auto_region_size - 1, @@ -1168,9 +1214,11 @@ static bool mock_init_hdm_decoder(struct cxl_decoder= *cxld) */ iter =3D port; for (i =3D 0; i < 2; i++) { + int id =3D 0; + dport =3D iter->parent_dport; iter =3D dport->port; - dev =3D device_find_child(&iter->dev, NULL, first_decoder); + dev =3D device_find_child(&iter->dev, &id, match_decoder_by_index); /* * Ancestor ports are guaranteed to be enumerated before * @port, and all ports have at least one decoder. @@ -1214,6 +1262,26 @@ static bool mock_init_hdm_decoder(struct cxl_decoder= *cxld) =20 cxld_registry_update(cxld); put_device(dev); + + if (!mock_zero_size_decoders) + continue; + + /* + * Mirror the endpoint: commit the next two switch decoders + * as zero-size + locked so the burnt-slot layout extends + * end-to-end through the switch and host bridge. + */ + for (id =3D 1; id <=3D 2; id++) { + dev =3D device_find_child(&iter->dev, &id, + match_decoder_by_index); + if (WARN_ON(!dev)) + continue; + cxld =3D to_cxl_decoder(dev); + size_zero_mock_decoder_sw(cxld, base, i); + iter->commit_end =3D id; + cxld_registry_update(cxld); + put_device(dev); + } } =20 return false; @@ -2030,6 +2098,9 @@ module_param(extended_linear_cache, bool, 0444); MODULE_PARM_DESC(extended_linear_cache, "Enable extended linear cache supp= ort"); module_param(fail_autoassemble, bool, 0444); MODULE_PARM_DESC(fail_autoassemble, "Simulate missing member of an auto-re= gion"); +module_param(mock_zero_size_decoders, bool, 0444); +MODULE_PARM_DESC(mock_zero_size_decoders, + "Mock BIOS-burnt committed zero-size locked decoders under host-bridge0= "); module_init(cxl_test_init); module_exit(cxl_test_exit); MODULE_LICENSE("GPL v2"); --=20 2.43.0