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([183.91.15.56]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-84282221059sm8594381b3a.7.2026.06.05.05.20.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 05 Jun 2026 05:20:19 -0700 (PDT) From: phucduc.bui@gmail.com To: Kuninori Morimoto , Mark Brown , Geert Uytterhoeven Cc: Liam Girdwood , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Magnus Damm , Jaroslav Kysela , Takashi Iwai , linux-sound@vger.kernel.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, bui duc phuc Subject: [PATCH v4 01/10] ASoC: dt-bindings: renesas,fsi: add support multiple clocks Date: Fri, 5 Jun 2026 19:19:45 +0700 Message-ID: <20260605121955.105661-2-phucduc.bui@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260605121955.105661-1-phucduc.bui@gmail.com> References: <20260605121955.105661-1-phucduc.bui@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: bui duc phuc The FSI on r8a7740 requires the SPU bus/bridge clock to be enabled before accessing its registers. Without this clock, any register access leads to a system hang as the FSI block sits behind the SPU bus. Update the binding to support multiple clocks to properly describe the hardware clock tree, including: - SPU bus/bridge clock (spu) for register access. - CPG DIV6 clocks (icka/b) as functional clock. - FSI dividers (diva/b) for audio clock generation. - External clock inputs (xcka/b) provided by the board. Both sh73a0 and r8a7740 define the SPU DIV6 clock control register at 0xe6150084. The binding therefore documents the clocks supported by the FSI driver for these variants. Signed-off-by: bui duc phuc --- Changes in v4: - Update dt-bindings based on feedback from Krzysztof, Rob, and Geert. =20 =20 .../bindings/sound/renesas,fsi.yaml | 61 +++++++++++++++++-- 1 file changed, 56 insertions(+), 5 deletions(-) diff --git a/Documentation/devicetree/bindings/sound/renesas,fsi.yaml b/Doc= umentation/devicetree/bindings/sound/renesas,fsi.yaml index df91991699a7..b966b55ff772 100644 --- a/Documentation/devicetree/bindings/sound/renesas,fsi.yaml +++ b/Documentation/devicetree/bindings/sound/renesas,fsi.yaml @@ -9,9 +9,6 @@ title: Renesas FIFO-buffered Serial Interface (FSI) maintainers: - Kuninori Morimoto =20 -allOf: - - $ref: dai-common.yaml# - properties: $nodename: pattern: "^sound@.*" @@ -38,7 +35,32 @@ properties: maxItems: 1 =20 clocks: - maxItems: 1 + minItems: 1 + items: + - description: Main FSI module clock + - description: | + SPU bus/bridge clock. On R8A7740, this clock must be enabled to = allow + register access as the FSI block is connected behind the SPU bus. + - description: CPG DIV6 functional clocks for FSI port A + - description: CPG DIV6 functional clocks for FSI port B + - description: FSI dividers for port A used for audio clock generati= on + - description: FSI dividers for port B used for audio clock generati= on + - description: External clock inputs for FSI port A provided by the = board + - description: External clock inputs for FSI port B provided by the = board + + clock-names: + minItems: 1 + maxItems: 8 + items: + enum: + - fck # Main FSI module clock + - spu # optional SPU bus/bridge clock + - icka # optional CPG DIV6 functional clocks for FSI port A + - ickb # optional CPG DIV6 functional clocks for FSI port B + - diva # optional FSI dividers for port A used for audio clock gen= eration + - divb # optional FSI dividers for port B used for audio clock gen= eration + - xcka # optional External clock inputs for FSI port A provided by= the board + - xckb # optional External clock inputs for FSI port B provided by= the board =20 power-domains: maxItems: 1 @@ -69,6 +91,31 @@ required: =20 unevaluatedProperties: false =20 +allOf: + - $ref: dai-common.yaml# + - if: + properties: + compatible: + contains: + const: renesas,fsi2-r8a7740 + then: + required: + - clock-names + + properties: + clock-names: + minItems: 2 + uniqueItems: true + items: + - const: fck + - const: spu + - enum: [icka, ickb, diva, divb, xcka, xckb] + - enum: [icka, ickb, diva, divb, xcka, xckb] + - enum: [icka, ickb, diva, divb, xcka, xckb] + - enum: [icka, ickb, diva, divb, xcka, xckb] + - enum: [icka, ickb, diva, divb, xcka, xckb] + - enum: [icka, ickb, diva, divb, xcka, xckb] + examples: - | #include @@ -77,7 +124,11 @@ examples: compatible =3D "renesas,fsi2-r8a7740", "renesas,sh_fsi2"; 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([183.91.15.56]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-84282221059sm8594381b3a.7.2026.06.05.05.20.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 05 Jun 2026 05:20:24 -0700 (PDT) From: phucduc.bui@gmail.com To: Kuninori Morimoto , Mark Brown , Geert Uytterhoeven Cc: Liam Girdwood , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Magnus Damm , Jaroslav Kysela , Takashi Iwai , linux-sound@vger.kernel.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, bui duc phuc Subject: [PATCH v4 02/10] ARM: dts: renesas: r8a7740: Add clocks for FSI Date: Fri, 5 Jun 2026 19:19:46 +0700 Message-ID: <20260605121955.105661-3-phucduc.bui@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260605121955.105661-1-phucduc.bui@gmail.com> References: <20260605121955.105661-1-phucduc.bui@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: bui duc phuc Add the SPU bus clock, icka/b functional clocks, and xcka/b external clock inputs to the FSI device node. This prepares for subsequent driver changes that explicitly manage the SPU clock required for FSI register access on the r8a7740. Signed-off-by: bui duc phuc --- arch/arm/boot/dts/renesas/r8a7740.dtsi | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/renesas/r8a7740.dtsi b/arch/arm/boot/dts/ren= esas/r8a7740.dtsi index d13ab86c3ab4..6f9d9bbfd159 100644 --- a/arch/arm/boot/dts/renesas/r8a7740.dtsi +++ b/arch/arm/boot/dts/renesas/r8a7740.dtsi @@ -393,7 +393,11 @@ sh_fsi2: sound@fe1f0000 { compatible =3D "renesas,fsi2-r8a7740", "renesas,sh_fsi2"; reg =3D <0xfe1f0000 0x400>; interrupts =3D ; - clocks =3D <&mstp3_clks R8A7740_CLK_FSI>; + clocks =3D <&mstp3_clks R8A7740_CLK_FSI>, <&spu_clk>, + <&fsia_clk>, <&fsib_clk>, <&fsiack_clk>, + <&fsibck_clk>; + clock-names =3D "fck", "spu", "icka", "ickb", "xcka", + "xckb"; power-domains =3D <&pd_a4mp>; status =3D "disabled"; }; @@ -614,6 +618,12 @@ vou_clk: vou@e6150088 { <0>; #clock-cells =3D <0>; }; + fsib_clk: fsib@e6150090 { + compatible =3D "renesas,r8a7740-div6-clock", "renesas,cpg-div6-clock"; + reg =3D <0xe6150090 4>; + clocks =3D <&pllc1_div2_clk>, <&fsibck_clk>, <0>, <0>; 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([183.91.15.56]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-84282221059sm8594381b3a.7.2026.06.05.05.20.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 05 Jun 2026 05:20:28 -0700 (PDT) From: phucduc.bui@gmail.com To: Kuninori Morimoto , Mark Brown , Geert Uytterhoeven Cc: Liam Girdwood , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Magnus Damm , Jaroslav Kysela , Takashi Iwai , linux-sound@vger.kernel.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, bui duc phuc Subject: [PATCH v4 03/10] ASoC: renesas: fsi: Fix trigger stop ordering Date: Fri, 5 Jun 2026 19:19:47 +0700 Message-ID: <20260605121955.105661-4-phucduc.bui@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260605121955.105661-1-phucduc.bui@gmail.com> References: <20260605121955.105661-1-phucduc.bui@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: bui duc phuc Call fsi_stream_stop() before fsi_hw_shutdown(). This matches the existing order in the suspend path. This change ensures all register accesses during stream shutdown are fully completed before disabling the clocks. Suggested-by: Kuninori Morimoto Signed-off-by: bui duc phuc --- Changes in v4: - update commit messages=20 sound/soc/renesas/fsi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/renesas/fsi.c b/sound/soc/renesas/fsi.c index 8cbd7acc26f4..94ab2e490810 100644 --- a/sound/soc/renesas/fsi.c +++ b/sound/soc/renesas/fsi.c @@ -1586,9 +1586,9 @@ static int fsi_dai_trigger(struct snd_pcm_substream *= substream, int cmd, ret =3D fsi_stream_transfer(io); break; case SNDRV_PCM_TRIGGER_STOP: + fsi_stream_stop(fsi, io); if (!ret) ret =3D fsi_hw_shutdown(fsi, dai->dev); - fsi_stream_stop(fsi, io); fsi_stream_quit(fsi, io); break; } --=20 2.43.0 From nobody Mon Jun 8 06:35:50 2026 Received: from mail-pf1-f172.google.com (mail-pf1-f172.google.com [209.85.210.172]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7212B368974 for ; Fri, 5 Jun 2026 12:20:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780662036; cv=none; b=oe9049iztM1yCSs+3JcU27zUaUtijzKwvbH0JNzSKCJnrzCAhB19BrscAo4d7fAt5LekECZqjJs/Jw16Kzig+FXaZePcoKtdk41El2HyJv1OJoSCTZP+jeQr47yAT6EGfvuto6k0SZ6rhkQXmw/BVe8qTNOq0FZ0NotPIm6QFL0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780662036; c=relaxed/simple; bh=TMiHEe92SuAh6fgG6WujL79mYk0H4L6Yn425oPvB8uY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=kEBNeUic5JNVIW4AtGg8pIyWNmuaQyZZ0H7/3DhaWp97rXKPxULppTmWwblnA9vsa11fMpyOPs7wymsIF7xMa4HG0YlmSkwapnyQpxTNxe+4ZEpD/O+LpAkXBH6OlHh6piurGTN2jYKIKC2o52W70mzUqbejZEUZ1n/rhWsoSDU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=a01nWBZf; arc=none smtp.client-ip=209.85.210.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="a01nWBZf" Received: by mail-pf1-f172.google.com with SMTP id d2e1a72fcca58-8423f869421so1344710b3a.3 for ; Fri, 05 Jun 2026 05:20:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1780662034; x=1781266834; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=KsRhVTKGsiM8JmWvqFHRoyOy+2lKAlrjAXLVyytCHCs=; b=a01nWBZf9sF1KHEwdo7dfm/S8kiyMa/XTflm+byQ84TeWOK6N0cgwr1tx1521QuTPI icP1n8pRwfmaFMMZu7I3tdjKay01nMHQyOvkxjSOrUTALW2GYv64PyukucF8NK7E2LDN gy+FGcTbxCScV5HMvz+8cQ556v7JS4iukL1AwRjN/sB6pHD/W3zSFOMfjt5mrf7nT33Y Ic49vG9yBMiRdHDOR1hM/L7Zn4LKEMmHfkhDi/V3HNFDAzrghFpUr7RfGDf5v+rLllLa gvi05EpOx6YkTpdle16eb5WxqscvSxsnEN0W9kXMSO6/t81ZAUiiO5/Hf+IF8Pd0cuQd AkAQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1780662034; x=1781266834; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=KsRhVTKGsiM8JmWvqFHRoyOy+2lKAlrjAXLVyytCHCs=; b=mTXJP4vELmO/EUMgmpjqDcU0UUkLA2ULVDz5zVyKutyfP+ebxT+282aJb0t0ceBbjh opFhWRDHqCac+hj34SM2pdHMiJOKZfONZ7yMliziz+X5FMfLuaQt1frgEEKrX5MjxPKQ Fnz+WlQjB5enJfMHNAGeIsY9/mGsdLN6mPErc44AXV/gPPVR2MB1AImrZvLBbV+Jty1t lS6d2CJkgH+3byzYx9d2HMQaOE/jSSmeaKLzteUkmhFKDCa0mAv30KIL3D8Ae7d1p1H4 ur37DeFlHYXIFU3ls23ZTIk251A2p45AyZQF7XlmqvlmK6UMIMYKQoOvaDQhF55SloLt gFBQ== X-Forwarded-Encrypted: i=1; AFNElJ/lsKaXikry83QhawtA94ws7MQjFUIjRd38YID7exYe7C+1HsMyTDalnwnXQn/RkkW2j2WcjHj+nbQ/ZNA=@vger.kernel.org X-Gm-Message-State: AOJu0YzvUlhJddQLEYSYUo5foIUSIqGl2zDuq/NC25tEm3QCUjxKwMdN lxWSCcVEGT5m9hfCI0B7EWUgqlTGA9Fjf1q/7X3dQgtd9NTsC+zTms4O X-Gm-Gg: Acq92OEf21yyQlQDNfZdPzj9qUSYvFmuIc2buV7lmFE5a4QFI/rcfiphuXmGAh0WhTJ yBHcAzEofZ1CNgQuFvCKy2qVY25GlgxOXjEOb1uxp8+iZNttnTXX53gBHjhLVC0/rZ+X3Dbkl4u mrCkFdG8AoAMopkSvDtUfsWI/tbGsPx0p7KIdlPUt9LlKofUXFtOt6JC778G3/SERh/YvO0ruAX q+rNADfAIpvAwO2OY96Y+H5I/7yEU23BTQrkzG/MkON6ISs42FVt1ipcPVdEBSt4jHffBoA576o zxsMezDp0Ez+jiGKbSRx7DfrP71LUaOUrX/URDmKQLiK84+XqGDc+jaqp9AQmOjgNnphGwUpvX4 sIvWIykmeeiT+CDKLv04v3tsCCzlnzUyG7tdTS0EKRomACVme5mbROCpYcjg4IEsT9oGsZHn5Nf YQZ4BxMIKBMIAlCw9h0q7qqAlPQzir0vDKrK/uq7Ej+Fu3TrAjY7tx5ZuhReD2mtqY4cDz X-Received: by 2002:a05:6a00:ab83:b0:842:2280:538f with SMTP id d2e1a72fcca58-842b0e74b30mr3311643b3a.16.1780662033809; Fri, 05 Jun 2026 05:20:33 -0700 (PDT) Received: from phuc-desktop.. ([183.91.15.56]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-84282221059sm8594381b3a.7.2026.06.05.05.20.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 05 Jun 2026 05:20:33 -0700 (PDT) From: phucduc.bui@gmail.com To: Kuninori Morimoto , Mark Brown , Geert Uytterhoeven Cc: Liam Girdwood , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Magnus Damm , Jaroslav Kysela , Takashi Iwai , linux-sound@vger.kernel.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, bui duc phuc Subject: [PATCH v4 04/10] ASoC: renesas: fsi: Move fsi_stream_is_working() Date: Fri, 5 Jun 2026 19:19:48 +0700 Message-ID: <20260605121955.105661-5-phucduc.bui@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260605121955.105661-1-phucduc.bui@gmail.com> References: <20260605121955.105661-1-phucduc.bui@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: bui duc phuc Move fsi_stream_is_working() before fsi_count_fifo_err(). This prepares for a subsequent patch that needs to check stream status when handling in-flight IRQ handlers. No functional changwqes intended. Signed-off-by: bui duc phuc --- sound/soc/renesas/fsi.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/sound/soc/renesas/fsi.c b/sound/soc/renesas/fsi.c index 94ab2e490810..429c3c9b6ede 100644 --- a/sound/soc/renesas/fsi.c +++ b/sound/soc/renesas/fsi.c @@ -442,6 +442,16 @@ static int fsi_sample2frame(struct fsi_priv *fsi, int = samples) return samples / fsi->chan_num; } =20 +static int fsi_stream_is_working(struct fsi_priv *fsi, + struct fsi_stream *io) +{ + struct fsi_master *master =3D fsi_get_master(fsi); + + guard(spinlock_irqsave)(&master->lock); + + return !!(io->substream && io->substream->runtime); +} + static int fsi_get_current_fifo_samples(struct fsi_priv *fsi, struct fsi_stream *io) { @@ -488,16 +498,6 @@ static inline struct fsi_stream *fsi_stream_get(struct= fsi_priv *fsi, return fsi_is_play(substream) ? &fsi->playback : &fsi->capture; } =20 -static int fsi_stream_is_working(struct fsi_priv *fsi, - struct fsi_stream *io) -{ - struct fsi_master *master =3D fsi_get_master(fsi); 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([183.91.15.56]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-84282221059sm8594381b3a.7.2026.06.05.05.20.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 05 Jun 2026 05:20:38 -0700 (PDT) From: phucduc.bui@gmail.com To: Kuninori Morimoto , Mark Brown , Geert Uytterhoeven Cc: Liam Girdwood , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Magnus Damm , Jaroslav Kysela , Takashi Iwai , linux-sound@vger.kernel.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, bui duc phuc Subject: [PATCH v4 05/10] ASoC: renesas: fsi: Fix register access from in-flight IRQ after shutdown Date: Fri, 5 Jun 2026 19:19:49 +0700 Message-ID: <20260605121955.105661-6-phucduc.bui@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260605121955.105661-1-phucduc.bui@gmail.com> References: <20260605121955.105661-1-phucduc.bui@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: bui duc phuc In-flight IRQs may still be running when the SPU clock is disabled, leading to register access after shutdown and causing system hangs. Fix this to use fsi_stream_is_working() when handling in-flight IRQ handlers. If no streams are active, the handler now returns immediately to prevent hardware access. Suggested-by: Kuninori Morimoto Signed-off-by: bui duc phuc --- Changes in v4: - use fsi_stream_is_working instead of running_streams. sound/soc/renesas/fsi.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/sound/soc/renesas/fsi.c b/sound/soc/renesas/fsi.c index 429c3c9b6ede..0f350bddeb1d 100644 --- a/sound/soc/renesas/fsi.c +++ b/sound/soc/renesas/fsi.c @@ -470,6 +470,10 @@ static int fsi_get_current_fifo_samples(struct fsi_pri= v *fsi, =20 static void fsi_count_fifo_err(struct fsi_priv *fsi) { + if (!fsi_stream_is_working(fsi, &fsi->playback) && + !fsi_stream_is_working(fsi, &fsi->capture)) + return; + u32 ostatus =3D fsi_reg_read(fsi, DOFF_ST); u32 istatus =3D fsi_reg_read(fsi, DIFF_ST); =20 @@ -681,6 +685,10 @@ static void fsi_irq_clear_status(struct fsi_priv *fsi) u32 data =3D 0; struct fsi_master *master =3D fsi_get_master(fsi); =20 + if (!fsi_stream_is_working(fsi, &fsi->playback) && + !fsi_stream_is_working(fsi, &fsi->capture)) + return; + data |=3D AB_IO(1, fsi_get_port_shift(fsi, &fsi->playback)); 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([183.91.15.56]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-84282221059sm8594381b3a.7.2026.06.05.05.20.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 05 Jun 2026 05:20:42 -0700 (PDT) From: phucduc.bui@gmail.com To: Kuninori Morimoto , Mark Brown , Geert Uytterhoeven Cc: Liam Girdwood , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Magnus Damm , Jaroslav Kysela , Takashi Iwai , linux-sound@vger.kernel.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, bui duc phuc Subject: [PATCH v4 06/10] ASoC: renesas: fsi: Move fsi_clk_init() Date: Fri, 5 Jun 2026 19:19:50 +0700 Message-ID: <20260605121955.105661-7-phucduc.bui@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260605121955.105661-1-phucduc.bui@gmail.com> References: <20260605121955.105661-1-phucduc.bui@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: bui duc phuc Move fsi_clk_init() after set_rate() functions to prepare for subsequent refactoring. Suggested-by: Kuninori Morimoto Signed-off-by: bui duc phuc --- sound/soc/renesas/fsi.c | 128 ++++++++++++++++++++-------------------- 1 file changed, 64 insertions(+), 64 deletions(-) diff --git a/sound/soc/renesas/fsi.c b/sound/soc/renesas/fsi.c index 0f350bddeb1d..43e6772c06d5 100644 --- a/sound/soc/renesas/fsi.c +++ b/sound/soc/renesas/fsi.c @@ -717,70 +717,6 @@ static void fsi_spdif_clk_ctrl(struct fsi_priv *fsi, i= nt enable) /* * clock function */ -static int fsi_clk_init(struct device *dev, - struct fsi_priv *fsi, - int xck, - int ick, - int div, - int (*set_rate)(struct device *dev, - struct fsi_priv *fsi)) -{ - struct fsi_clk *clock =3D &fsi->clock; - int is_porta =3D fsi_is_port_a(fsi); - - clock->xck =3D NULL; - clock->ick =3D NULL; - clock->div =3D NULL; - clock->rate =3D 0; - clock->count =3D 0; - clock->set_rate =3D set_rate; - - clock->own =3D devm_clk_get(dev, NULL); - if (IS_ERR(clock->own)) - return -EINVAL; - - /* external clock */ - if (xck) { - clock->xck =3D devm_clk_get(dev, is_porta ? "xcka" : "xckb"); - if (IS_ERR(clock->xck)) { - dev_err(dev, "can't get xck clock\n"); - return -EINVAL; - } - if (clock->xck =3D=3D clock->own) { - dev_err(dev, "cpu doesn't support xck clock\n"); - return -EINVAL; - } - } - - /* FSIACLK/FSIBCLK */ - if (ick) { - clock->ick =3D devm_clk_get(dev, is_porta ? "icka" : "ickb"); - if (IS_ERR(clock->ick)) { - dev_err(dev, "can't get ick clock\n"); - return -EINVAL; - } - if (clock->ick =3D=3D clock->own) { - dev_err(dev, "cpu doesn't support ick clock\n"); - return -EINVAL; - } - } - - /* FSI-DIV */ - if (div) { - clock->div =3D devm_clk_get(dev, is_porta ? "diva" : "divb"); - if (IS_ERR(clock->div)) { - dev_err(dev, "can't get div clock\n"); - return -EINVAL; - } - if (clock->div =3D=3D clock->own) { - dev_err(dev, "cpu doesn't support div clock\n"); - return -EINVAL; - } - } - - return 0; -} - #define fsi_clk_invalid(fsi) fsi_clk_valid(fsi, 0) static void fsi_clk_valid(struct fsi_priv *fsi, unsigned long rate) { @@ -1034,6 +970,70 @@ static int fsi_clk_set_rate_cpg(struct device *dev, return ret; } =20 +static int fsi_clk_init(struct device *dev, + struct fsi_priv *fsi, + int xck, + int ick, + int div, + int (*set_rate)(struct device *dev, + struct fsi_priv *fsi)) +{ + struct fsi_clk *clock =3D &fsi->clock; + int is_porta =3D fsi_is_port_a(fsi); + + clock->xck =3D NULL; + clock->ick =3D NULL; + clock->div =3D NULL; + clock->rate =3D 0; + clock->count =3D 0; + clock->set_rate =3D set_rate; + + clock->own =3D devm_clk_get(dev, NULL); + if (IS_ERR(clock->own)) + return -EINVAL; + + /* external clock */ + if (xck) { + clock->xck =3D devm_clk_get(dev, is_porta ? "xcka" : "xckb"); + if (IS_ERR(clock->xck)) { + dev_err(dev, "can't get xck clock\n"); + return -EINVAL; + } + if (clock->xck =3D=3D clock->own) { + dev_err(dev, "cpu doesn't support xck clock\n"); + return -EINVAL; + } + } + + /* FSIACLK/FSIBCLK */ + if (ick) { + clock->ick =3D devm_clk_get(dev, is_porta ? "icka" : "ickb"); + if (IS_ERR(clock->ick)) { + dev_err(dev, "can't get ick clock\n"); + return -EINVAL; + } + if (clock->ick =3D=3D clock->own) { + dev_err(dev, "cpu doesn't support ick clock\n"); + return -EINVAL; + } + } + + /* FSI-DIV */ + if (div) { + clock->div =3D devm_clk_get(dev, is_porta ? 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([183.91.15.56]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-84282221059sm8594381b3a.7.2026.06.05.05.20.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 05 Jun 2026 05:20:47 -0700 (PDT) From: phucduc.bui@gmail.com To: Kuninori Morimoto , Mark Brown , Geert Uytterhoeven Cc: Liam Girdwood , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Magnus Damm , Jaroslav Kysela , Takashi Iwai , linux-sound@vger.kernel.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, bui duc phuc Subject: [PATCH v4 07/10] ASoC: renesas: fsi: Use devm_clk_get_optional() for optional clocks Date: Fri, 5 Jun 2026 19:19:51 +0700 Message-ID: <20260605121955.105661-8-phucduc.bui@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260605121955.105661-1-phucduc.bui@gmail.com> References: <20260605121955.105661-1-phucduc.bui@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: bui duc phuc The xck, ick and div clocks are optional resources. Use devm_clk_get_optional() instead of devm_clk_get() when acquiring these clocks and switch to dev_err_probe() for error reporting. Suggested-by: Kuninori Morimoto Signed-off-by: bui duc phuc --- sound/soc/renesas/fsi.c | 26 ++++++++++---------------- 1 file changed, 10 insertions(+), 16 deletions(-) diff --git a/sound/soc/renesas/fsi.c b/sound/soc/renesas/fsi.c index 43e6772c06d5..a2d7d17dd2bb 100644 --- a/sound/soc/renesas/fsi.c +++ b/sound/soc/renesas/fsi.c @@ -990,15 +990,13 @@ static int fsi_clk_init(struct device *dev, =20 clock->own =3D devm_clk_get(dev, NULL); if (IS_ERR(clock->own)) - return -EINVAL; + return dev_err_probe(dev, PTR_ERR(clock->own), "Can't get fck clock\n"); =20 /* external clock */ if (xck) { - clock->xck =3D devm_clk_get(dev, is_porta ? "xcka" : "xckb"); - if (IS_ERR(clock->xck)) { - dev_err(dev, "can't get xck clock\n"); - return -EINVAL; - } + clock->xck =3D devm_clk_get_optional(dev, is_porta ? "xcka" : "xckb"); + if (IS_ERR(clock->xck)) + return dev_err_probe(dev, PTR_ERR(clock->xck), "Can't get xck clock\n"); if (clock->xck =3D=3D clock->own) { dev_err(dev, "cpu doesn't support xck clock\n"); return -EINVAL; @@ -1007,11 +1005,9 @@ static int fsi_clk_init(struct device *dev, =20 /* FSIACLK/FSIBCLK */ if (ick) { - clock->ick =3D devm_clk_get(dev, is_porta ? "icka" : "ickb"); - if (IS_ERR(clock->ick)) { - dev_err(dev, "can't get ick clock\n"); - return -EINVAL; - } + clock->ick =3D devm_clk_get_optional(dev, is_porta ? "icka" : "ickb"); + if (IS_ERR(clock->ick)) + return dev_err_probe(dev, PTR_ERR(clock->ick), "Can't get ick clock\n"); if (clock->ick =3D=3D clock->own) { dev_err(dev, "cpu doesn't support ick clock\n"); return -EINVAL; @@ -1020,11 +1016,9 @@ static int fsi_clk_init(struct device *dev, =20 /* FSI-DIV */ if (div) { - clock->div =3D devm_clk_get(dev, is_porta ? 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([183.91.15.56]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-84282221059sm8594381b3a.7.2026.06.05.05.20.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 05 Jun 2026 05:20:52 -0700 (PDT) From: phucduc.bui@gmail.com To: Kuninori Morimoto , Mark Brown , Geert Uytterhoeven Cc: Liam Girdwood , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Magnus Damm , Jaroslav Kysela , Takashi Iwai , linux-sound@vger.kernel.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, bui duc phuc Subject: [PATCH v4 08/10] ASoC: renesas: fsi: refactor clock initialization Date: Fri, 5 Jun 2026 19:19:52 +0700 Message-ID: <20260605121955.105661-9-phucduc.bui@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260605121955.105661-1-phucduc.bui@gmail.com> References: <20260605121955.105661-1-phucduc.bui@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: bui duc phuc Move fsi_clk_init() from set_fmt() to probe. This moves clock resource lookup from fsi_dai_set_fmt() to the probe path. The set_rate() callbacks validate that the required clock resources are available before they are used for hardware configuration. Suggested-by: Kuninori Morimoto Signed-off-by: bui duc phuc --- Changes in v4: - Handle the return value of fsi_clk_init() to properly support deferred=20 probe, as suggested by Mark. sound/soc/renesas/fsi.c | 52 +++++++++++++++++++++++++++-------------- 1 file changed, 35 insertions(+), 17 deletions(-) diff --git a/sound/soc/renesas/fsi.c b/sound/soc/renesas/fsi.c index a2d7d17dd2bb..3f303e15e835 100644 --- a/sound/soc/renesas/fsi.c +++ b/sound/soc/renesas/fsi.c @@ -292,6 +292,7 @@ struct fsi_master { void __iomem *base; struct fsi_priv fsia; struct fsi_priv fsib; + struct clk *clk_spu; const struct fsi_core *core; spinlock_t lock; }; @@ -862,6 +863,11 @@ static int fsi_clk_set_rate_external(struct device *de= v, int ackmd, bpfmd; int ret =3D 0; =20 + if (!xck || !ick) { + dev_err(dev, "xck clock or ick clock is missing\n"); + return -EINVAL; + } + /* check clock rate */ xrate =3D clk_get_rate(xck); if (xrate % rate) { @@ -898,6 +904,11 @@ static int fsi_clk_set_rate_cpg(struct device *dev, int ackmd, bpfmd; int ret =3D -EINVAL; =20 + if (!ick || !div) { + dev_err(dev, "ick clock or div clock is missing\n"); + return -EINVAL; + } + if (!(12288000 % rate)) target =3D 12288000; if (!(11289600 % rate)) @@ -970,28 +981,38 @@ static int fsi_clk_set_rate_cpg(struct device *dev, return ret; } =20 -static int fsi_clk_init(struct device *dev, - struct fsi_priv *fsi, - int xck, - int ick, - int div, - int (*set_rate)(struct device *dev, - struct fsi_priv *fsi)) +static int fsi_clk_init(struct device *dev, struct fsi_priv *fsi) { struct fsi_clk *clock =3D &fsi->clock; + struct fsi_master *master =3D fsi->master; int is_porta =3D fsi_is_port_a(fsi); + int xck, ick, div; + + if (fsi->clk_cpg) { + xck =3D 0; ick =3D 1; div =3D 1; + clock->set_rate =3D fsi_clk_set_rate_cpg; + } else { + xck =3D 1; ick =3D 1; div =3D 0; + clock->set_rate =3D fsi_clk_set_rate_external; + } =20 clock->xck =3D NULL; clock->ick =3D NULL; clock->div =3D NULL; clock->rate =3D 0; clock->count =3D 0; - clock->set_rate =3D set_rate; =20 clock->own =3D devm_clk_get(dev, NULL); if (IS_ERR(clock->own)) return dev_err_probe(dev, PTR_ERR(clock->own), "Can't get fck clock\n"); =20 + if (!master->clk_spu) { + master->clk_spu =3D devm_clk_get_optional(dev, "spu"); + if (IS_ERR(master->clk_spu)) + return dev_err_probe(dev, PTR_ERR(master->clk_spu), + "Can't get spu clock\n"); + } + /* external clock */ if (xck) { clock->xck =3D devm_clk_get_optional(dev, is_porta ? "xcka" : "xckb"); @@ -1666,15 +1687,6 @@ static int fsi_dai_set_fmt(struct snd_soc_dai *dai, = unsigned int fmt) break; } =20 - if (fsi_is_clk_master(fsi)) { - if (fsi->clk_cpg) - fsi_clk_init(dai->dev, fsi, 0, 1, 1, - fsi_clk_set_rate_cpg); - else - fsi_clk_init(dai->dev, fsi, 1, 1, 0, - fsi_clk_set_rate_external); - } - /* set format */ if (fsi_is_spdif(fsi)) ret =3D fsi_set_fmt_spdif(fsi); @@ -1972,6 +1984,9 @@ static int fsi_probe(struct platform_device *pdev) fsi->master =3D master; fsi_port_info_init(fsi, &info.port_a); fsi_handler_init(fsi, &info.port_a); + ret =3D fsi_clk_init(&pdev->dev, fsi); + if (ret) + return ret; ret =3D fsi_stream_probe(fsi, &pdev->dev); if (ret < 0) { dev_err(&pdev->dev, "FSIA stream probe failed\n"); @@ -1985,6 +2000,9 @@ static int fsi_probe(struct platform_device *pdev) fsi->master =3D master; fsi_port_info_init(fsi, &info.port_b); fsi_handler_init(fsi, &info.port_b); + ret =3D fsi_clk_init(&pdev->dev, fsi); + if (ret) + return ret; ret =3D fsi_stream_probe(fsi, &pdev->dev); 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([183.91.15.56]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-84282221059sm8594381b3a.7.2026.06.05.05.20.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 05 Jun 2026 05:20:57 -0700 (PDT) From: phucduc.bui@gmail.com To: Kuninori Morimoto , Mark Brown , Geert Uytterhoeven Cc: Liam Girdwood , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Magnus Damm , Jaroslav Kysela , Takashi Iwai , linux-sound@vger.kernel.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, bui duc phuc Subject: [PATCH v4 09/10] ASoC: renesas: fsi: add fsi_clk_prepare/unprepare() Date: Fri, 5 Jun 2026 19:19:53 +0700 Message-ID: <20260605121955.105661-10-phucduc.bui@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260605121955.105661-1-phucduc.bui@gmail.com> References: <20260605121955.105661-1-phucduc.bui@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: bui duc phuc Add fsi_clk_prepare() and fsi_clk_unprepare() helpers and call them from fsi_dai_startup() and fsi_dai_shutdown(). This ensures clk_prepare() and clk_unprepare() are executed from sleepable contexts and keeps clocks prepared only while audio streams are active. Suggested-by: Kuninori Morimoto Signed-off-by: bui duc phuc --- Changes in v4: - Move clock->count early return check to the beginning of=20 fsi_clk_[un]prepare() to simplify the code. sound/soc/renesas/fsi.c | 77 ++++++++++++++++++++++++++++++++++++++++- 1 file changed, 76 insertions(+), 1 deletion(-) diff --git a/sound/soc/renesas/fsi.c b/sound/soc/renesas/fsi.c index 3f303e15e835..6537321242c0 100644 --- a/sound/soc/renesas/fsi.c +++ b/sound/soc/renesas/fsi.c @@ -294,6 +294,7 @@ struct fsi_master { struct fsi_priv fsib; struct clk *clk_spu; const struct fsi_core *core; + int spu_count; spinlock_t lock; }; =20 @@ -730,6 +731,78 @@ static int fsi_clk_is_valid(struct fsi_priv *fsi) fsi->clock.rate; } =20 +static int fsi_clk_prepare(struct fsi_priv *fsi) +{ + struct fsi_clk *clock =3D &fsi->clock; + struct clk *spu =3D fsi->master->clk_spu; + struct clk *xck =3D clock->xck; + struct clk *ick =3D clock->ick; + struct clk *div =3D clock->div; + int ret; + + if (clock->count !=3D 0) + return 0; + + if (!IS_ERR_OR_NULL(spu) && fsi->master->spu_count =3D=3D 0) { + ret =3D clk_prepare(spu); + if (ret) + return ret; + } + + if (!IS_ERR_OR_NULL(xck)) { + ret =3D clk_prepare(xck); + if (ret) + goto err_spu; + } + + if (!IS_ERR_OR_NULL(ick)) { + ret =3D clk_prepare(ick); + if (ret) + goto err_xck; + } + + if (!IS_ERR_OR_NULL(div)) { + ret =3D clk_prepare(div); + if (ret) + goto err_ick; + } + + return 0; + +err_ick: + clk_unprepare(ick); +err_xck: + clk_unprepare(xck); +err_spu: + clk_unprepare(spu); + + return ret; +} + +static void fsi_clk_unprepare(struct fsi_priv *fsi) +{ + struct fsi_clk *clock =3D &fsi->clock; + struct clk *spu =3D fsi->master->clk_spu; + struct clk *xck =3D clock->xck; + struct clk *ick =3D clock->ick; + struct clk *div =3D clock->div; + + if (clock->count !=3D 0) + return; + + if (!IS_ERR_OR_NULL(div)) + clk_unprepare(div); + + if (!IS_ERR_OR_NULL(ick)) + clk_unprepare(ick); + + if (!IS_ERR_OR_NULL(xck)) + clk_unprepare(xck); + + if (!IS_ERR_OR_NULL(spu) && fsi->master->spu_count =3D=3D 0) + clk_unprepare(spu); +} + static int fsi_clk_enable(struct device *dev, struct fsi_priv *fsi) { @@ -1580,7 +1653,7 @@ static int fsi_dai_startup(struct snd_pcm_substream *= substream, =20 fsi_clk_invalid(fsi); =20 - return 0; + return fsi_clk_prepare(fsi); } =20 static void fsi_dai_shutdown(struct snd_pcm_substream *substream, @@ -1588,6 +1661,7 @@ static void fsi_dai_shutdown(struct snd_pcm_substream= *substream, { struct fsi_priv *fsi =3D fsi_get_priv(substream); =20 + fsi_clk_unprepare(fsi); fsi_clk_invalid(fsi); } =20 @@ -1975,6 +2049,7 @@ static int fsi_probe(struct platform_device *pdev) =20 /* master setting */ master->core =3D core; + master->spu_count =3D 0; spin_lock_init(&master->lock); =20 /* FSI A setting */ --=20 2.43.0 From nobody Mon Jun 8 06:35:50 2026 Received: from mail-pj1-f47.google.com (mail-pj1-f47.google.com [209.85.216.47]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3DDED4E3770 for ; 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([183.91.15.56]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-84282221059sm8594381b3a.7.2026.06.05.05.20.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 05 Jun 2026 05:21:02 -0700 (PDT) From: phucduc.bui@gmail.com To: Kuninori Morimoto , Mark Brown , Geert Uytterhoeven Cc: Liam Girdwood , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Magnus Damm , Jaroslav Kysela , Takashi Iwai , linux-sound@vger.kernel.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, bui duc phuc Subject: [PATCH v4 10/10] ASoC: renesas: fsi: Add SPU clock control in hw_startup/shutdown Date: Fri, 5 Jun 2026 19:19:54 +0700 Message-ID: <20260605121955.105661-11-phucduc.bui@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260605121955.105661-1-phucduc.bui@gmail.com> References: <20260605121955.105661-1-phucduc.bui@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: bui duc phuc Enable and disable the SPU clock in fsi_hw_startup() and fsi_hw_shutdown() to ensure the clock is active while the driver accesses hardware registers. Suggested-by: Kuninori Morimoto Signed-off-by: bui duc phuc --- sound/soc/renesas/fsi.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/sound/soc/renesas/fsi.c b/sound/soc/renesas/fsi.c index 6537321242c0..d7cc5a14a099 100644 --- a/sound/soc/renesas/fsi.c +++ b/sound/soc/renesas/fsi.c @@ -1585,6 +1585,19 @@ static int fsi_hw_startup(struct fsi_priv *fsi, struct device *dev) { u32 data =3D 0; + int ret; + + /* enable spu clock */ + if (fsi->master->clk_spu) { + scoped_guard(spinlock_irqsave, &fsi->master->lock) { + if (fsi->master->spu_count =3D=3D 0) { + ret =3D clk_enable(fsi->master->clk_spu); + if (ret < 0) + return ret; + } + fsi->master->spu_count++; + } + } =20 /* clock setting */ if (fsi_is_clk_master(fsi)) @@ -1642,6 +1655,12 @@ static int fsi_hw_shutdown(struct fsi_priv *fsi, /* stop master clock */ if (fsi_is_clk_master(fsi)) return fsi_clk_disable(dev, fsi); + if (fsi->master->clk_spu) { + scoped_guard(spinlock_irqsave, &fsi->master->lock) { + if (--fsi->master->spu_count =3D=3D 0) + clk_disable(fsi->master->clk_spu); + } + } =20 return 0; } --=20 2.43.0