From nobody Mon Jun 8 07:24:44 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A30B6495510; Fri, 5 Jun 2026 08:11:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780647091; cv=none; b=izElTZnAl4VU4jMwjDaYCFw9xgx5Jdm3nvzLj6yKtIxqBkHhndvHgZTl1ps4ZXGZY7WuzqrPlnZzKvjqbmLl9zMojNhz9bfdRUSxAHckbIK7FvDAqJkdGnW7vUVhM2Y2vqBfHF8y99Y7jlplG33EUJvsGus3U3Nwb3XrMMA+TEk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780647091; c=relaxed/simple; bh=wVsP7qwG8BJu2wprX0HV2M1fTkH7tQV3G1mR8NtSBaw=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:To:Cc; b=YkSoB8rVHO59IG66zmiHuYuyYWLzbyGnZ4+Pyj30JYpjAyBu7MB3zgNmma5FE0yJ7yiQycoKrPcRux8qX7HpzavyQwPsDNmhSJ3eRqrE70gLAOVn8Aia4AnJW0rE5tcNyS6PhhYfflZLwAMqrMF9wuhVOgl8HQ/nT/H2Xry/x8Q= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=Hbrnqrg9; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="Hbrnqrg9" Received: by smtp.kernel.org (Postfix) with ESMTPS id 4CA61C2BCC6; Fri, 5 Jun 2026 08:11:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1780647091; bh=wVsP7qwG8BJu2wprX0HV2M1fTkH7tQV3G1mR8NtSBaw=; h=From:Date:Subject:To:Cc:Reply-To:From; b=Hbrnqrg9RhUWrD93DON6WYHKiUY/P9JoQoOKcBb0/KJWXzbzKUzy1aiEPRDNCz74l unOk46jE02c/euDZYR1gDWxh9Uxacss0xlUunTTj86g+Uk7iSNaM04wzH4DGgAqWuP QOK6c9mcDNCgEQ6otxAJVE8JDdQ6Rci/uyPf3YSW6lk2Xc5jca5/hSBn1Ed49K5Ycp e3VdODdZns9EJlfW2FyX1pLCLijdAZOhdw0+BdfL7Jl8v1NW3lPx68kX0BRG1rAFRs fIOgpgls+EJeJW0zsiaY65LScSz0F1I6vkcMUyGlEv/qY6jPK7TwZ9GbG+DUyC7SF3 jl5FVBD61KZUQ== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 305B6CD6E5D; Fri, 5 Jun 2026 08:11:31 +0000 (UTC) From: George Moussalem via B4 Relay Date: Fri, 05 Jun 2026 12:11:29 +0400 Subject: [PATCH next-next v2] net: dsa: qca8k: Add support for force mode for fixed link topology Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260605-qca8337-force-mode-v2-1-d9a6b6545bfa@outlook.com> X-B4-Tracking: v=1; b=H4sIAAAAAAAC/32NTQ6CMBCFr0Jm7ZjSYlFX3sOwKGUqjdLRFgmGc HcrB3Dzki/vb4FE0VOCc7FApMknzyGD3BVgexNuhL7LDFJILbRQ+LLmqFSNjqMlHLgjdK1tzUG edFVpyMVnJOfnbfQKgeYRfwJNtnqfRo6f7W4qt8C/5anEEq1xta6Fc6ZVF36PD+b73vIAzbquX 0/JJvLBAAAA X-Change-ID: 20260603-qca8337-force-mode-fbcba5296446 To: Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, George Moussalem X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1780647089; l=3187; i=george.moussalem@outlook.com; s=20250321; h=from:subject:message-id; bh=/1K49g/Q0+wrB8ffa0QJHaW9eANv5Yae+dqQkwbdI4U=; b=Xn7RwqPiLUqBSMkfjxaoyatDwqn+EhlJZVxXog3mgyAtwLsVAImKiBsVWVvKVPlXJ//K6hwlv IPyVfdFw1CBAI5t89drX8j9nLQevPmF9+g75OyKnuqOsk4jD9ZFIckZ X-Developer-Key: i=george.moussalem@outlook.com; a=ed25519; pk=/PuRTSI9iYiHwcc6Nrde8qF4ZDhJBlUgpHdhsIjnqIk= X-Endpoint-Received: by B4 Relay for george.moussalem@outlook.com/20250321 with auth_id=364 X-Original-From: George Moussalem Reply-To: george.moussalem@outlook.com From: George Moussalem A fixed link topology is commonly used to connect this switch (on port 0 or 6) to a SoC's MAC over SGMII. When inband negotiation is not used, the switch needs to be configured to operate in force mode. As such, enable support for force mode. Reviewed-by: Andrew Lunn Signed-off-by: George Moussalem --- Changes in v2: - Added check for QCA8337 switch ID and build up the register mask accordingly before writing the force mode bit to avoid overwriting the bit on switches other than QCA8337 for which there's no documentation on whether force mode is supported or not. - Added comment to state that regardless of port used (0 or 6), the force mode bit is written to the PORT0 PAD register as per vendor SDK. - Link to v1: https://lore.kernel.org/r/20260603-qca8337-force-mode-v1-1-ca= f7670ffab3@outlook.com --- drivers/net/dsa/qca/qca8k-8xxx.c | 22 ++++++++++++++++------ drivers/net/dsa/qca/qca8k.h | 1 + 2 files changed, 17 insertions(+), 6 deletions(-) diff --git a/drivers/net/dsa/qca/qca8k-8xxx.c b/drivers/net/dsa/qca/qca8k-8= xxx.c index a36b8b07030e..4c928983b862 100644 --- a/drivers/net/dsa/qca/qca8k-8xxx.c +++ b/drivers/net/dsa/qca/qca8k-8xxx.c @@ -1538,7 +1538,7 @@ static int qca8k_pcs_config(struct phylink_pcs *pcs, = unsigned int neg_mode, { struct qca8k_priv *priv =3D pcs_to_qca8k_pcs(pcs)->priv; int cpu_port_index, ret, port; - u32 reg, val; + u32 mask, reg, val; =20 port =3D pcs_to_qca8k_pcs(pcs)->port; switch (port) { @@ -1611,11 +1611,21 @@ static int qca8k_pcs_config(struct phylink_pcs *pcs= , unsigned int neg_mode, if (priv->ports_config.sgmii_tx_clk_falling_edge) val |=3D QCA8K_PORT0_PAD_SGMII_TXCLK_FALLING_EDGE; =20 - if (val) - ret =3D qca8k_rmw(priv, reg, - QCA8K_PORT0_PAD_SGMII_RXCLK_FALLING_EDGE | - QCA8K_PORT0_PAD_SGMII_TXCLK_FALLING_EDGE, - val); + mask =3D (val) ? (QCA8K_PORT0_PAD_SGMII_RXCLK_FALLING_EDGE | + QCA8K_PORT0_PAD_SGMII_TXCLK_FALLING_EDGE) : 0; + + /* + * (Un)set force mode on QCA8337 only, don't include it in the mask for + * others. It is written to the PORT0 PAD register for both port 0 and 6. + */ + if (priv->switch_id =3D=3D QCA8K_ID_QCA8337) { + if (neg_mode =3D=3D PHYLINK_PCS_NEG_OUTBAND) + val |=3D QCA8K_PORT_PAD_SGMII_FORCE_MODE; + mask |=3D QCA8K_PORT_PAD_SGMII_FORCE_MODE; + } + + if (mask) + ret =3D qca8k_rmw(priv, reg, mask, val); =20 return 0; } diff --git a/drivers/net/dsa/qca/qca8k.h b/drivers/net/dsa/qca/qca8k.h index 1a00e2f62fef..956338893032 100644 --- a/drivers/net/dsa/qca/qca8k.h +++ b/drivers/net/dsa/qca/qca8k.h @@ -58,6 +58,7 @@ #define QCA8K_PORT_PAD_RGMII_TX_DELAY_EN BIT(25) #define QCA8K_PORT_PAD_RGMII_RX_DELAY_EN BIT(24) #define QCA8K_PORT_PAD_SGMII_EN BIT(7) +#define QCA8K_PORT_PAD_SGMII_FORCE_MODE BIT(3) #define QCA8K_REG_PWS 0x010 #define QCA8K_PWS_POWER_ON_SEL BIT(31) /* This reg is only valid for QCA832x and toggle the package --- base-commit: b7bee4ca5688e30ca50fbc87b1b8f7eed7006c17 change-id: 20260603-qca8337-force-mode-fbcba5296446 Best regards, --=20 George Moussalem