From nobody Mon Jun 8 04:27:37 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6C0FC37F74A; Fri, 5 Jun 2026 12:41:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780663299; cv=none; b=lou+oEhOshw7HicWHNSBM0Z8Q/dy74ERC4poeq7OyCIm0JBtlZQ0i43NScl5HwJJsI3bpL/TgFOAroluy+ZpEmZAjo8ZkIxKjB1ZVLxd8JcgY488x3JUGKRyVXnS2MZiXq8jWxSt4aCGNBpyP4ocrb/XFMx6w1S+mx5OGVozNVY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780663299; c=relaxed/simple; bh=96+55tXFmTQ8vBo+6ftEpOb+5/z/w8m26jdwVC9AxW4=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=FfMnpxG+3g18myA2zzNqbENd2ItGb68sR4/yCqbqRZ5gm8OX3puwMdyjPw5r96kTAAa2ignsxmpWl/gsJ2NWO/gTxb/bs759cvOLivi734Kh/U3LIf4b3ienuopV3ZSRTJnP6V7rGK8imP2PQtJV6Wms4BCHjfW3cU5vxLJwRyU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=XTJyZRPp; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="XTJyZRPp" Received: by smtp.kernel.org (Postfix) with ESMTPS id 1F8DBC2BCC4; Fri, 5 Jun 2026 12:41:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1780663299; bh=96+55tXFmTQ8vBo+6ftEpOb+5/z/w8m26jdwVC9AxW4=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=XTJyZRPpMMSiNCESwHWrAVrhtgzqfQhoRBTO2BjoNy+KvSPZKODIS64YqO7OtF0kl u/ObMpu5+0X+E42mpk+0mZ1PehuuZxa+cdhSJO2jiM8je+1raksfuwPEpT7U9+rT9L o4WfKp9uLDkhJLuxv9qUWnJj2JmmBvByGJpHZDGb7x0ljJpIRMHS5kWITqEZR7huNF 8JUwSzoo0IDZGTvi3YeoGIYcbGJgujR8EgNkLBjKD+47HtrKqxQBmXLKPKm1fOxDFU XBs90bOToSP56C+PVL7BSe2daFOr000SlvIsL6LZ9KCHD0Q6t7StxeHYDWTeCm2vd1 3uGO7/SpZe7yQ== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 08CC1CD6E79; Fri, 5 Jun 2026 12:41:39 +0000 (UTC) From: George Moussalem via B4 Relay Date: Fri, 05 Jun 2026 16:41:26 +0400 Subject: [PATCH v3 1/4] dt-bindings: net: ethernet-phy: increase max clock count to two Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260605-ipq5018-gephy-clocks-v3-1-f232d9ca0966@outlook.com> References: <20260605-ipq5018-gephy-clocks-v3-0-f232d9ca0966@outlook.com> In-Reply-To: <20260605-ipq5018-gephy-clocks-v3-0-f232d9ca0966@outlook.com> To: Andrew Lunn , Heiner Kallweit , Russell King , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Florian Fainelli , Bjorn Andersson , Konrad Dybcio Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio , linux-arm-msm@vger.kernel.org, George Moussalem X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1780663297; l=1689; i=george.moussalem@outlook.com; s=20250321; h=from:subject:message-id; bh=LaY00tRcmZfFwiKiQy3sLDDbN7PRP6JIqJfZseU/bhY=; b=Ej4W7dTZsUe7bJ0nU4A8yVnozkz8GdTH0hVntcxUuPQzJYRIsytXROniAzIPdr//9IZNg5gT7 v3gRNnJPwSyBrYZgLw1DkNcHByDhSIeIwj8v/9VIfxL8OqOfnSPTCny X-Developer-Key: i=george.moussalem@outlook.com; a=ed25519; pk=/PuRTSI9iYiHwcc6Nrde8qF4ZDhJBlUgpHdhsIjnqIk= X-Endpoint-Received: by B4 Relay for george.moussalem@outlook.com/20250321 with auth_id=364 X-Original-From: George Moussalem Reply-To: george.moussalem@outlook.com From: George Moussalem The clocks property has a restriction to maximum one. Yet, some PHYs may require more than 1 clock such as the IPQ5018 PHY which requires two clocks for RX and TX. As such, increase maxItems to two. Signed-off-by: George Moussalem Reviewed-by: Rob Herring (Arm) --- Commit 350b7a258f20 introduced the clocks property with a restriction to maximum 1 to the main ethernet-phy.yaml binding for Realtek to add an optional external clock source. This is restrictive to all PHY bindings, as some PHYs may require more than 1 clock such as the IPQ5018 PHY which requires 2 clocks (for RX and TX). --- Documentation/devicetree/bindings/net/ethernet-phy.yaml | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/net/ethernet-phy.yaml b/Docu= mentation/devicetree/bindings/net/ethernet-phy.yaml index 21a1a63506f0..c3ebb3af8b52 100644 --- a/Documentation/devicetree/bindings/net/ethernet-phy.yaml +++ b/Documentation/devicetree/bindings/net/ethernet-phy.yaml @@ -106,10 +106,13 @@ properties: by software. =20 clocks: - maxItems: 1 + minItems: 1 + maxItems: 2 description: - External clock connected to the PHY. If not specified it is assumed - that the PHY uses a fixed crystal or an internal oscillator. + External clock connected to the PHY or RX and TX clocks that the PHY + requires to enable explicitly. If not specified it is assumed + that the PHY uses a fixed crystal or an internal oscillator or that = the + RX/TX clocks are hardware enabled by default. =20 enet-phy-lane-swap: $ref: /schemas/types.yaml#/definitions/flag --=20 2.53.0 From nobody Mon Jun 8 04:27:37 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6C4FD3859D7; Fri, 5 Jun 2026 12:41:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780663299; cv=none; b=NshNnbCNKK26HCNdGeq1myJcHYZvKCoabZ9M1PYDKy3qf4RFq57Ph7nO1850VGto7QNKdblJDQVw9v99Yio5mYQ7hi2/UcXcNuJ1+lm7/bKnmI7B1RxHD98L4zUb8QFFIhYISV+JfKr3N80UjdlcpaktoPGBn8WfyLxeMdKkWSk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780663299; c=relaxed/simple; bh=MHonpYPDMxu6OCmszC5LL+NjrY8r/y0Ipf59wp1R70c=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=c4/JAplDVZ4CpEwMJ36kda17W/7Of0ecoL+VDgQBh8/r0qj2kYFY6rS7yrcrvc3dhQIVU8Uue1F5w67g7typh/ZuwHHnnzV9WFBxOmHA75t7XixNkje2pA0qlgHmedx5cAOzjtWapArNvoZ8n33kn0VliGYuT73skdRxYoSeX6s= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=bW9QGRBV; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="bW9QGRBV" Received: by smtp.kernel.org (Postfix) with ESMTPS id 301A7C2BCC9; Fri, 5 Jun 2026 12:41:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1780663299; bh=MHonpYPDMxu6OCmszC5LL+NjrY8r/y0Ipf59wp1R70c=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=bW9QGRBVPPBPg0XxS2PSC7b0CEnK7TAWqGjyssS45Ub8Gg0kWyf6KKi21kl1T9fHC YvigMwBGdOoQqzJ+pnbAtnAG2cbEUuFlCXNRdQo/KKHFK4FGXWGIXwDEF/OsSoXj1f uxcpDapHp6lbKFr/5n1ttmj4Y0gCjfYAky4fz9wYombzToFVUZYkUGocDsq28BAlaD NpZi4Tql4tkpiDMRcMB3oSN8klfLgPD95fED6yy8PMmkTs/IV99uMW9JSJ68RJtdnR NlilCYHe/IjtD0Ci8gbkw9SW6P5Kw+u5ck6Eg2hCNx1w9IfoRqTBTt0TUNA0o7zweL 9ePqjcYX6znqQ== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1AD5DCD6E7D; Fri, 5 Jun 2026 12:41:39 +0000 (UTC) From: George Moussalem via B4 Relay Date: Fri, 05 Jun 2026 16:41:27 +0400 Subject: [PATCH v3 2/4] dt-bindings: net: qca,ar803x: Add clocks for IPQ5018 PHY Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260605-ipq5018-gephy-clocks-v3-2-f232d9ca0966@outlook.com> References: <20260605-ipq5018-gephy-clocks-v3-0-f232d9ca0966@outlook.com> In-Reply-To: <20260605-ipq5018-gephy-clocks-v3-0-f232d9ca0966@outlook.com> To: Andrew Lunn , Heiner Kallweit , Russell King , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Florian Fainelli , Bjorn Andersson , Konrad Dybcio Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio , linux-arm-msm@vger.kernel.org, George Moussalem , Conor Dooley X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1780663297; l=1860; i=george.moussalem@outlook.com; s=20250321; h=from:subject:message-id; bh=9Z6aakN1HhLaGxa1OIpuGJQY0KdKMjoTdfWwUAWMHF8=; b=35vQ31A2+T17FdYHX7YbK3+f5sFkkYEKYcD//bJOBSMWqZ/OLQc7yybfbzinL6bN6VT3HtvsI HtS42u2mHmVAmzwfUK7DmlabPItaAz96c6JMzn7Fm1rl0Jok8KiZmES X-Developer-Key: i=george.moussalem@outlook.com; a=ed25519; pk=/PuRTSI9iYiHwcc6Nrde8qF4ZDhJBlUgpHdhsIjnqIk= X-Endpoint-Received: by B4 Relay for george.moussalem@outlook.com/20250321 with auth_id=364 X-Original-From: George Moussalem Reply-To: george.moussalem@outlook.com From: George Moussalem Further testing revealed that the RX and TX clocks of the IPQ5018 PHY need to be explicitly enabled. As such, add the required clocks to the schema. Acked-by: Conor Dooley Signed-off-by: George Moussalem --- Documentation/devicetree/bindings/net/qca,ar803x.yaml | 19 +++++++++++++++= ++++ 1 file changed, 19 insertions(+) diff --git a/Documentation/devicetree/bindings/net/qca,ar803x.yaml b/Docume= ntation/devicetree/bindings/net/qca,ar803x.yaml index 7ae5110e7aa2..53f648c4135f 100644 --- a/Documentation/devicetree/bindings/net/qca,ar803x.yaml +++ b/Documentation/devicetree/bindings/net/qca,ar803x.yaml @@ -28,6 +28,16 @@ allOf: reg: const: 7 # This PHY is always at MDIO address 7 in the IPQ5018 = SoC =20 + clocks: + items: + - description: RX clock + - description: TX clock + + clock-names: + items: + - const: rx + - const: tx + resets: items: - description: @@ -42,6 +52,11 @@ allOf: of this PHY are directly connected to an RJ45 connector. type: boolean =20 + required: + - clocks + - clock-names + - resets + properties: compatible: enum: @@ -162,6 +177,7 @@ examples: }; }; - | + #include #include =20 mdio { @@ -172,6 +188,9 @@ examples: compatible =3D "ethernet-phy-id004d.d0c0"; reg =3D <7>; =20 + clocks =3D <&gcc GCC_GEPHY_RX_CLK>, + <&gcc GCC_GEPHY_TX_CLK>; + clock-names =3D "rx", "tx"; resets =3D <&gcc GCC_GEPHY_MISC_ARES>; }; }; --=20 2.53.0 From nobody Mon Jun 8 04:27:37 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 768EB38F654; Fri, 5 Jun 2026 12:41:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780663299; cv=none; b=M0s7caiD17jR5oMIlxV26LiEUgtKQmWsdqQmmrNHAIRwzXrU8IFBSN9G7PA/2697VrCGKcv0PTDrwHyPCk4YPbH1hgDbvcbOqvoTE4xUWJZbojclaFWoK/BaGeUGtVhFXb5CoHM4BW3nxZaMWXjZyhK+syW5b7j+h+C73tVJSDU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780663299; c=relaxed/simple; bh=Xw4DKj40SdH5fG0f1lsN3gM94qCWap7opuJXIrQQIEo=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=nNMXumrTT7vl7KJXm2IKRndtRQKlzNPfVHhbg7yrBpK7QNNHO76l/ArlRlxToR5jcV79/wR0vnjh+e3ekglE4moAn/OQJkFPp8HZe8Nnd/eQs6Z5KfV6JZDu0VYeu6YEiH1MbBXSp+4aFiMfLosWfAAVJldUxLH/RQJnFCso7D4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=IjJnN2KY; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="IjJnN2KY" Received: by smtp.kernel.org (Postfix) with ESMTPS id 40F43C2BCB9; Fri, 5 Jun 2026 12:41:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1780663299; bh=Xw4DKj40SdH5fG0f1lsN3gM94qCWap7opuJXIrQQIEo=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=IjJnN2KY44F6m5b5xxLkO4tjCKJlPY4OVdNegd6Rc8z5NXFpK8krip8t8NkXLCEHO /3Mob2jwPM04Cq0bpM+NnHjUn5Nre4AgqTrPk1ibLns7CVIvvHAnWWGHyyZ8/WTvuS 5INlJtcrPPSmflpvSL+64Mzqhx1HXiBBDrfOQgavTLd/ECyz4EaSW3PsIlBVvh9nis 8t2sYmtsiCwHdO0b+gpFc42mxLfTWCwPM1zoLhlV047thpAeipcKK0LZvMTwn9JfyP LDKKZIlGdAWSW4jbIqJw0kXLgOhHPZDR7zvJ/jRK5+AF8qkaevX1rbEPW3QTkxrNqy p+rLBiRwORjUg== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2DCEDCD6E74; Fri, 5 Jun 2026 12:41:39 +0000 (UTC) From: George Moussalem via B4 Relay Date: Fri, 05 Jun 2026 16:41:28 +0400 Subject: [PATCH v3 3/4] arm64: qcom: ipq5018: Add GEPHY RX and TX clocks Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260605-ipq5018-gephy-clocks-v3-3-f232d9ca0966@outlook.com> References: <20260605-ipq5018-gephy-clocks-v3-0-f232d9ca0966@outlook.com> In-Reply-To: <20260605-ipq5018-gephy-clocks-v3-0-f232d9ca0966@outlook.com> To: Andrew Lunn , Heiner Kallweit , Russell King , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Florian Fainelli , Bjorn Andersson , Konrad Dybcio Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio , linux-arm-msm@vger.kernel.org, George Moussalem , Dmitry Baryshkov X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1780663297; l=888; i=george.moussalem@outlook.com; s=20250321; h=from:subject:message-id; bh=Z1oXdm/oaqpMEY4mYVlyCRP8DswbVCqV7erO/GmnBEk=; b=38YiGYWPsZh8N1z8PW3HfZaQp2Da+JNm4VRzfseDHyRQfaK1qgNaZcRMf6ymW0Z8gar2OsDHu yy3vjnBowSbBRdf1P4qrvA4r7ZKKj6EM2HZoU0lV73TLvlBT2b9EWbg X-Developer-Key: i=george.moussalem@outlook.com; a=ed25519; pk=/PuRTSI9iYiHwcc6Nrde8qF4ZDhJBlUgpHdhsIjnqIk= X-Endpoint-Received: by B4 Relay for george.moussalem@outlook.com/20250321 with auth_id=364 X-Original-From: George Moussalem Reply-To: george.moussalem@outlook.com From: George Moussalem Add RX and TX clocks for the IPQ5018 GEPHY to enable the datapath. Fixes: f5f2b835e316 ("arm64: dts: qcom: ipq5018: Add GE PHY to internal mdi= o bus") Reviewed-by: Dmitry Baryshkov Signed-off-by: George Moussalem --- arch/arm64/boot/dts/qcom/ipq5018.dtsi | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/ipq5018.dtsi b/arch/arm64/boot/dts/qc= om/ipq5018.dtsi index 6f8004a22a1f..60c27a6f2b10 100644 --- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi @@ -229,6 +229,9 @@ ge_phy: ethernet-phy@7 { compatible =3D "ethernet-phy-id004d.d0c0"; reg =3D <7>; =20 + clocks =3D <&gcc GCC_GEPHY_RX_CLK>, + <&gcc GCC_GEPHY_TX_CLK>; + clock-names =3D "rx", "tx"; resets =3D <&gcc GCC_GEPHY_MISC_ARES>; }; }; --=20 2.53.0 From nobody Mon Jun 8 04:27:37 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 80423395AE7; Fri, 5 Jun 2026 12:41:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780663299; cv=none; b=qiEhsVQHey8oeVLDTZVd14USKInDsZmTODWn0BQdgYjjxMBmoFFZwcy2CHNOhgJzpDIlqQdZteGPI9hu5tU+ueHOJSCikcjHLKA/wCdlRWvmtZ9Ly6oGXuJ3NjK8SMyEv7j+Qsd91ONITT/GOLS/7ZTdcJ8yPicY7CXs6tnvn8M= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780663299; c=relaxed/simple; bh=yBbQQOk+fUvfPZ5vfaumStuzxQ9XjoQe1h8vA618STU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=SnIoukxtXzROZtNinsYb1yJd4CmtMkgM+uYIP2v6txDZXi+70l9djFiIFtKjRYzdo/UmodDLA50kBJtoo8NmnDxh64sMU6QT1TGC5o76hmDiRvNhaiIr13VK4/rTMEkqpOtyk7uJKt5Zq8WDccSeGzojdzWngGaaU0y1sSQrcfs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=ax57QoW5; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="ax57QoW5" Received: by smtp.kernel.org (Postfix) with ESMTPS id 47F74C4AF0E; Fri, 5 Jun 2026 12:41:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1780663299; bh=yBbQQOk+fUvfPZ5vfaumStuzxQ9XjoQe1h8vA618STU=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=ax57QoW5yFZHXNb/D24ylbzalRRJnCf8LYSjROpp7Sx690lb1i9wFYYNFeJxbM05B VQgYA/MDaRFdE2SPt0aAnZR8Jj3D0O+8xLPztJFxrQYqqYeIsTuGBeG4U1TeXkXRp9 vWrUQZQn6DDpLbZq1JrqubkOmtNfEItgtJQd2JjB3P0lMb8+5uhybbb0XBoSWOoUIh Qr3Dasp2ylqWlroFL1p8HlO6dPUV2Wddpn2woVnHGHQT9hUJNXmIy1uVNXK9q0UB22 et5qAmKZJyIbTydy/l7Prn8sP/9WSBAYGonSFYKY56pL5UDSnWp4nSePQQEpG1K1wL 3tTqmyeYhVnlg== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3D299CD6E7C; Fri, 5 Jun 2026 12:41:39 +0000 (UTC) From: George Moussalem via B4 Relay Date: Fri, 05 Jun 2026 16:41:29 +0400 Subject: [PATCH v3 4/4] net: phy: at803x: add RX and TX clock management for IPQ5018 PHY Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260605-ipq5018-gephy-clocks-v3-4-f232d9ca0966@outlook.com> References: <20260605-ipq5018-gephy-clocks-v3-0-f232d9ca0966@outlook.com> In-Reply-To: <20260605-ipq5018-gephy-clocks-v3-0-f232d9ca0966@outlook.com> To: Andrew Lunn , Heiner Kallweit , Russell King , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Florian Fainelli , Bjorn Andersson , Konrad Dybcio Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio , linux-arm-msm@vger.kernel.org, George Moussalem X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1780663297; l=2852; i=george.moussalem@outlook.com; s=20250321; h=from:subject:message-id; bh=MWXgHKXSj4vmywVK+GS467+qaJ57q5XVTsgCD/+MZ10=; b=ctVlAF8Yev5vmJGYXp0WvV7idienC027GOek/Zp0sqZdyVf5UNvVa1am8j+IdN8LDAuk7vaEq KH84wuc3oiyC8cGk3vNNgoAnVFdVUqu2aFNzMs/H9asSgLIOcCQ0uGK X-Developer-Key: i=george.moussalem@outlook.com; a=ed25519; pk=/PuRTSI9iYiHwcc6Nrde8qF4ZDhJBlUgpHdhsIjnqIk= X-Endpoint-Received: by B4 Relay for george.moussalem@outlook.com/20250321 with auth_id=364 X-Original-From: George Moussalem Reply-To: george.moussalem@outlook.com From: George Moussalem Acquire and manage the RX and TX clocks for the IPQ5018 PHY. These clocks are required for the PHY's datapath to function correctly. Gate the clocks upon link state changes for improved power management. Fixes: d46502279a11 ("net: phy: qcom: at803x: Add Qualcomm IPQ5018 Internal= PHY support") Signed-off-by: George Moussalem --- drivers/net/phy/qcom/at803x.c | 43 +++++++++++++++++++++++++++++++++++++++= ++++ 1 file changed, 43 insertions(+) diff --git a/drivers/net/phy/qcom/at803x.c b/drivers/net/phy/qcom/at803x.c index 63726cf98cd4..99bc710531a4 100644 --- a/drivers/net/phy/qcom/at803x.c +++ b/drivers/net/phy/qcom/at803x.c @@ -19,6 +19,8 @@ #include #include #include +#include +#include #include #include #include @@ -176,6 +178,8 @@ struct at803x_context { }; =20 struct ipq5018_priv { + struct clk *rx_clk; + struct clk *tx_clk; struct reset_control *rst; bool set_short_cable_dac; }; @@ -1062,6 +1066,35 @@ static int ipq5018_config_init(struct phy_device *ph= ydev) =20 static void ipq5018_link_change_notify(struct phy_device *phydev) { + struct ipq5018_priv *priv =3D phydev->priv; + int ret; + + if (phydev->link) { + if (!__clk_is_enabled(priv->rx_clk)) { + ret =3D clk_prepare_enable(priv->rx_clk); + if (ret) { + dev_err(&phydev->mdio.dev, + "failed to enable RX clock\n"); + goto reset_fifo; + } + } + + if (!__clk_is_enabled(priv->tx_clk)) { + ret =3D clk_prepare_enable(priv->tx_clk); + if (ret) { + dev_err(&phydev->mdio.dev, + "failed to enable TX clock\n"); + clk_disable_unprepare(priv->rx_clk); + } + } + } else { + if (__clk_is_enabled(priv->rx_clk)) + clk_disable_unprepare(priv->rx_clk); + if (__clk_is_enabled(priv->tx_clk)) + clk_disable_unprepare(priv->tx_clk); + } + +reset_fifo: /* * Reset the FIFO buffer upon link disconnects to clear any residual data * which may cause issues with the FIFO which it cannot recover from. @@ -1084,6 +1117,16 @@ static int ipq5018_probe(struct phy_device *phydev) priv->set_short_cable_dac =3D of_property_read_bool(dev->of_node, "qcom,dac-preset-short-cable"); =20 + priv->rx_clk =3D devm_clk_get(dev, "rx"); + if (IS_ERR(priv->rx_clk)) + return dev_err_probe(dev, PTR_ERR(priv->rx_clk), + "failed to get RX clock\n"); + + priv->tx_clk =3D devm_clk_get(dev, "tx"); + if (IS_ERR(priv->tx_clk)) + return dev_err_probe(dev, PTR_ERR(priv->tx_clk), + "failed to get TX clock\n"); + priv->rst =3D devm_reset_control_array_get_exclusive(dev); if (IS_ERR(priv->rst)) return dev_err_probe(dev, PTR_ERR(priv->rst), --=20 2.53.0