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Thu, 4 Jun 2026 01:58:30 -0700 From: Kartik Rajput To: , , , , , , CC: Kartik Rajput Subject: [PATCH v4] soc/tegra: pmc: Add PMC support for Tegra410 Date: Thu, 4 Jun 2026 14:28:24 +0530 Message-ID: <20260604085824.3435199-1-kkartik@nvidia.com> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN1PEPF00006002:EE_|CH8PR12MB999204:EE_ X-MS-Office365-Filtering-Correlation-Id: 2f30efe7-16a9-4add-2997-08dec217809a X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700016|82310400026|376014|1800799024|56012099006|11063799006|18002099003; X-Microsoft-Antispam-Message-Info: nQ7pHUufx2C3QT0hQE+yIMFlFpqCaezbtPM/SSeDHFShy+5s5fBOpgt0/3aFDQpA6ndKsEAMXHpYXzgOO+dwjgrw4L4YBeLsS6nxaoHUKs67b6W3h5qHoghWLepWSFWV+piZCJSbNml2oeE3zRZvtZq/6sys2L8ZQjH/QrFzDe4t4UMa9e31I58dZtMZmrE1uSNv+i0dPfALNyKBM4Dp1q2/FdEiLiD9HGZawaEN+7DFGVGANh8/uW2ANILUVcrJuprPwITMCzgL+kLgMWqTCPxeAxNbfvjsqQ2374nvr7oQplPjXb+C0HEldOlRCQTeSM8utVaqNL+NHI9LFaxzgaGDcoPePDXu8LKJ7ZA+ihFcEwbPnqBxRW7VUNd3svDHP4qpGa2i06aGKhNGnA6c3N6FjGKOwhpprDpj1yxc/0j1gyD0Q+hKzDYidvN8pDEXtosaand+20mtLyIdIgjHCYIILNtTI2oUr6bRRmYSjOaFp8yVGGiChMUyrQC6C8NtDt0pTd38+D6FVxqOp67U4tHJH71HBIqF0flo0swXxSNxUBp7F0bUUvGgLSk/WOAiXSZVXetCOrrs5yw+kUOKHHzdsw0hr0Iiylbhv/c1myW/LrK/GsORsyPXod25ZqDoRSWaVblbtC3/3DxMmbRbs3XwO1huPrwOy9zWZBIJb4qUoOtOoIqei/XYKPvrR99nEmAsg01fVWkd8/eYPpaXsK3Y+4IRGbAVVe/IZIpDtts= X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230040)(36860700016)(82310400026)(376014)(1800799024)(56012099006)(11063799006)(18002099003);DIR:OUT;SFP:1101; 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charset="utf-8" Tegra410 uses PMC driver only to retrieve system reset reason using PMC sysfs. Tegra410 uses ACPI to probe PMC, unlike device-tree boot it does not use the early initialisation sequence. Add PMC support for Tegra410, which uses the PMC driver to retrieve the system reset reason via PMC sysfs. Signed-off-by: Kartik Rajput --- Changes in v4: - Rebased the patch. Changes in v3: - Cleaned up NULL and false initialised entries from SoC data. Changes in v2: - Updated commit message. --- drivers/soc/tegra/pmc.c | 98 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 98 insertions(+) diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c index f419a5395545..2408dc049e1f 100644 --- a/drivers/soc/tegra/pmc.c +++ b/drivers/soc/tegra/pmc.c @@ -11,6 +11,7 @@ =20 #define pr_fmt(fmt) "tegra-pmc: " fmt =20 +#include #include #include #include @@ -2980,6 +2981,18 @@ static void tegra_pmc_reset_suspend_mode(void *data) pmc->suspend_mode =3D TEGRA_SUSPEND_NOT_READY; } =20 +static int tegra_pmc_acpi_probe(struct platform_device *pdev, struct tegra= _pmc *pmc) +{ + pmc->base =3D devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(pmc->base)) + return PTR_ERR(pmc->base); + + tegra_pmc_reset_sysfs_init(pmc); + platform_set_drvdata(pdev, pmc); + + return 0; +} + static int tegra_pmc_probe(struct platform_device *pdev) { struct tegra_pmc *pmc; @@ -3004,6 +3017,9 @@ static int tegra_pmc_probe(struct platform_device *pd= ev) mutex_init(&pmc->powergates_lock); pmc->dev =3D &pdev->dev; =20 + if (is_acpi_node(dev_fwnode(&pdev->dev))) + return tegra_pmc_acpi_probe(pdev, pmc); + err =3D tegra_pmc_parse_dt(pmc, pdev->dev.of_node); if (err < 0) return dev_err_probe(&pdev->dev, err, "failed to parse DT\n"); @@ -4817,6 +4833,81 @@ static const struct tegra_pmc_soc tegra264_pmc_soc = =3D { .max_wake_vectors =3D 4, }; =20 +static const char * const tegra410_reset_sources[] =3D { + "SYS_RESET_N", /* 0x0 */ + "CSDC_RTC_XTAL", + "VREFRO_POWER_BAD", + "FMON_32K", + "FMON_OSC", + "POD_RTC", + "POD_IO", + "POD_PLUS_IO_SPLL", + "POD_PLUS_IO_VMON", /* 0x8 */ + "POD_PLUS_SOC", + "VMON_PLUS_UV", + "VMON_PLUS_OV", + "FUSECRC_FAULT", + "OSC_FAULT", + "BPMP_BOOT_FAULT", + "SCPM_BPMP_CORE_CLK", + "SCPM_PSC_SE_CLK", /* 0x10 */ + "VMON_SOC_MIN", + "VMON_SOC_MAX", + "NVJTAG_SEL_MONITOR", + "L0_RST_REQ_N", + "NV_THERM_FAULT", + "PSC_SW", + "POD_C2C_LPI_0", + "POD_C2C_LPI_1", /* 0x18 */ + "BPMP_FMON", + "FMON_SPLL_OUT", + "L1_RST_REQ_N", + "OCP_RECOVERY", + "AO_WDT_POR", + "BPMP_WDT_POR", + "RAS_WDT_POR", + "TOP_0_WDT_POR", /* 0x20 */ + "TOP_1_WDT_POR", + "TOP_2_WDT_POR", + "PSC_WDT_POR", + "OOBHUB_WDT_POR", + "MSS_SEQ_WDT_POR", + "SW_MAIN", + "L0L1_RST_OUT_N", + "HSM", /* 0x28 */ + "CSITE_SW", + "AO_WDT_DBG", + "BPMP_WDT_DBG", + "RAS_WDT_DBG", + "TOP_0_WDT_DBG", + "TOP_1_WDT_DBG", + "TOP_2_WDT_DBG", + "PSC_WDT_DBG", /* 0x30 */ + "TSC_0_WDT_DBG", + "TSC_1_WDT_DBG", + "OOBHUB_WDT_DBG", + "MSS_SEQ_WDT_DBG", + "L2_RST_REQ_N", + "L2_RST_OUT_N", + "SC7" +}; + +static const struct tegra_pmc_regs tegra410_pmc_regs =3D { + .rst_status =3D 0x8, + .rst_source_shift =3D 0x2, + .rst_source_mask =3D 0xfc, + .rst_level_shift =3D 0x0, + .rst_level_mask =3D 0x3, +}; + +static const struct tegra_pmc_soc tegra410_pmc_soc =3D { + .regs =3D &tegra410_pmc_regs, + .reset_sources =3D tegra410_reset_sources, + .num_reset_sources =3D ARRAY_SIZE(tegra410_reset_sources), + .reset_levels =3D tegra186_reset_levels, + .num_reset_levels =3D ARRAY_SIZE(tegra186_reset_levels), +}; + static const struct of_device_id tegra_pmc_match[] =3D { { .compatible =3D "nvidia,tegra264-pmc", .data =3D &tegra264_pmc_soc }, { .compatible =3D "nvidia,tegra238-pmc", .data =3D &tegra238_pmc_soc }, @@ -4832,6 +4923,12 @@ static const struct of_device_id tegra_pmc_match[] = =3D { { } }; =20 +static const struct acpi_device_id tegra_pmc_acpi_match[] =3D { + { .id =3D "NVDA2016", .driver_data =3D (kernel_ulong_t)&tegra410_pmc_soc = }, + { } +}; +MODULE_DEVICE_TABLE(acpi, tegra_pmc_acpi_match); + static void tegra_pmc_sync_state(struct device *dev) { struct tegra_pmc *pmc =3D dev_get_drvdata(dev); @@ -4883,6 +4980,7 @@ static struct platform_driver tegra_pmc_driver =3D { .name =3D "tegra-pmc", .suppress_bind_attrs =3D true, .of_match_table =3D tegra_pmc_match, + .acpi_match_table =3D tegra_pmc_acpi_match, #if defined(CONFIG_PM_SLEEP) && defined(CONFIG_ARM) .pm =3D &tegra_pmc_pm_ops, #endif --=20 2.43.0